lpfc_sli.c 82 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. struct lpfc_iocbq *
  62. lpfc_sli_get_iocbq(struct lpfc_hba * phba)
  63. {
  64. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  65. struct lpfc_iocbq * iocbq = NULL;
  66. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  67. return iocbq;
  68. }
  69. void
  70. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  71. {
  72. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  73. /*
  74. * Clean all volatile data fields, preserve iotag and node struct.
  75. */
  76. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  77. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  78. }
  79. /*
  80. * Translate the iocb command to an iocb command type used to decide the final
  81. * disposition of each completed IOCB.
  82. */
  83. static lpfc_iocb_type
  84. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  85. {
  86. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  87. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  88. return 0;
  89. switch (iocb_cmnd) {
  90. case CMD_XMIT_SEQUENCE_CR:
  91. case CMD_XMIT_SEQUENCE_CX:
  92. case CMD_XMIT_BCAST_CN:
  93. case CMD_XMIT_BCAST_CX:
  94. case CMD_ELS_REQUEST_CR:
  95. case CMD_ELS_REQUEST_CX:
  96. case CMD_CREATE_XRI_CR:
  97. case CMD_CREATE_XRI_CX:
  98. case CMD_GET_RPI_CN:
  99. case CMD_XMIT_ELS_RSP_CX:
  100. case CMD_GET_RPI_CR:
  101. case CMD_FCP_IWRITE_CR:
  102. case CMD_FCP_IWRITE_CX:
  103. case CMD_FCP_IREAD_CR:
  104. case CMD_FCP_IREAD_CX:
  105. case CMD_FCP_ICMND_CR:
  106. case CMD_FCP_ICMND_CX:
  107. case CMD_ADAPTER_MSG:
  108. case CMD_ADAPTER_DUMP:
  109. case CMD_XMIT_SEQUENCE64_CR:
  110. case CMD_XMIT_SEQUENCE64_CX:
  111. case CMD_XMIT_BCAST64_CN:
  112. case CMD_XMIT_BCAST64_CX:
  113. case CMD_ELS_REQUEST64_CR:
  114. case CMD_ELS_REQUEST64_CX:
  115. case CMD_FCP_IWRITE64_CR:
  116. case CMD_FCP_IWRITE64_CX:
  117. case CMD_FCP_IREAD64_CR:
  118. case CMD_FCP_IREAD64_CX:
  119. case CMD_FCP_ICMND64_CR:
  120. case CMD_FCP_ICMND64_CX:
  121. case CMD_GEN_REQUEST64_CR:
  122. case CMD_GEN_REQUEST64_CX:
  123. case CMD_XMIT_ELS_RSP64_CX:
  124. type = LPFC_SOL_IOCB;
  125. break;
  126. case CMD_ABORT_XRI_CN:
  127. case CMD_ABORT_XRI_CX:
  128. case CMD_CLOSE_XRI_CN:
  129. case CMD_CLOSE_XRI_CX:
  130. case CMD_XRI_ABORTED_CX:
  131. case CMD_ABORT_MXRI64_CN:
  132. type = LPFC_ABORT_IOCB;
  133. break;
  134. case CMD_RCV_SEQUENCE_CX:
  135. case CMD_RCV_ELS_REQ_CX:
  136. case CMD_RCV_SEQUENCE64_CX:
  137. case CMD_RCV_ELS_REQ64_CX:
  138. type = LPFC_UNSOL_IOCB;
  139. break;
  140. default:
  141. type = LPFC_UNKNOWN_IOCB;
  142. break;
  143. }
  144. return type;
  145. }
  146. static int
  147. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  148. {
  149. struct lpfc_sli *psli = &phba->sli;
  150. MAILBOX_t *pmbox = &pmb->mb;
  151. int i, rc;
  152. for (i = 0; i < psli->num_rings; i++) {
  153. phba->hba_state = LPFC_INIT_MBX_CMDS;
  154. lpfc_config_ring(phba, i, pmb);
  155. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  156. if (rc != MBX_SUCCESS) {
  157. lpfc_printf_log(phba,
  158. KERN_ERR,
  159. LOG_INIT,
  160. "%d:0446 Adapter failed to init, "
  161. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  162. "ring %d\n",
  163. phba->brd_no,
  164. pmbox->mbxCommand,
  165. pmbox->mbxStatus,
  166. i);
  167. phba->hba_state = LPFC_HBA_ERROR;
  168. return -ENXIO;
  169. }
  170. }
  171. return 0;
  172. }
  173. static int
  174. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  175. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  176. {
  177. list_add_tail(&piocb->list, &pring->txcmplq);
  178. pring->txcmplq_cnt++;
  179. if (unlikely(pring->ringno == LPFC_ELS_RING))
  180. mod_timer(&phba->els_tmofunc,
  181. jiffies + HZ * (phba->fc_ratov << 1));
  182. return (0);
  183. }
  184. static struct lpfc_iocbq *
  185. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  186. {
  187. struct list_head *dlp;
  188. struct lpfc_iocbq *cmd_iocb;
  189. dlp = &pring->txq;
  190. cmd_iocb = NULL;
  191. list_remove_head((&pring->txq), cmd_iocb,
  192. struct lpfc_iocbq,
  193. list);
  194. if (cmd_iocb) {
  195. /* If the first ptr is not equal to the list header,
  196. * deque the IOCBQ_t and return it.
  197. */
  198. pring->txq_cnt--;
  199. }
  200. return (cmd_iocb);
  201. }
  202. static IOCB_t *
  203. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  204. {
  205. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  206. uint32_t max_cmd_idx = pring->numCiocb;
  207. IOCB_t *iocb = NULL;
  208. if ((pring->next_cmdidx == pring->cmdidx) &&
  209. (++pring->next_cmdidx >= max_cmd_idx))
  210. pring->next_cmdidx = 0;
  211. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  212. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  213. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  214. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  215. "%d:0315 Ring %d issue: portCmdGet %d "
  216. "is bigger then cmd ring %d\n",
  217. phba->brd_no, pring->ringno,
  218. pring->local_getidx, max_cmd_idx);
  219. phba->hba_state = LPFC_HBA_ERROR;
  220. /*
  221. * All error attention handlers are posted to
  222. * worker thread
  223. */
  224. phba->work_ha |= HA_ERATT;
  225. phba->work_hs = HS_FFER3;
  226. if (phba->work_wait)
  227. wake_up(phba->work_wait);
  228. return NULL;
  229. }
  230. if (pring->local_getidx == pring->next_cmdidx)
  231. return NULL;
  232. }
  233. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  234. return iocb;
  235. }
  236. uint16_t
  237. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  238. {
  239. struct lpfc_iocbq ** new_arr;
  240. struct lpfc_iocbq ** old_arr;
  241. size_t new_len;
  242. struct lpfc_sli *psli = &phba->sli;
  243. uint16_t iotag;
  244. spin_lock_irq(phba->host->host_lock);
  245. iotag = psli->last_iotag;
  246. if(++iotag < psli->iocbq_lookup_len) {
  247. psli->last_iotag = iotag;
  248. psli->iocbq_lookup[iotag] = iocbq;
  249. spin_unlock_irq(phba->host->host_lock);
  250. iocbq->iotag = iotag;
  251. return iotag;
  252. }
  253. else if (psli->iocbq_lookup_len < (0xffff
  254. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  255. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  256. spin_unlock_irq(phba->host->host_lock);
  257. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  258. GFP_KERNEL);
  259. if (new_arr) {
  260. memset((char *)new_arr, 0,
  261. new_len * sizeof (struct lpfc_iocbq *));
  262. spin_lock_irq(phba->host->host_lock);
  263. old_arr = psli->iocbq_lookup;
  264. if (new_len <= psli->iocbq_lookup_len) {
  265. /* highly unprobable case */
  266. kfree(new_arr);
  267. iotag = psli->last_iotag;
  268. if(++iotag < psli->iocbq_lookup_len) {
  269. psli->last_iotag = iotag;
  270. psli->iocbq_lookup[iotag] = iocbq;
  271. spin_unlock_irq(phba->host->host_lock);
  272. iocbq->iotag = iotag;
  273. return iotag;
  274. }
  275. spin_unlock_irq(phba->host->host_lock);
  276. return 0;
  277. }
  278. if (psli->iocbq_lookup)
  279. memcpy(new_arr, old_arr,
  280. ((psli->last_iotag + 1) *
  281. sizeof (struct lpfc_iocbq *)));
  282. psli->iocbq_lookup = new_arr;
  283. psli->iocbq_lookup_len = new_len;
  284. psli->last_iotag = iotag;
  285. psli->iocbq_lookup[iotag] = iocbq;
  286. spin_unlock_irq(phba->host->host_lock);
  287. iocbq->iotag = iotag;
  288. kfree(old_arr);
  289. return iotag;
  290. }
  291. } else
  292. spin_unlock_irq(phba->host->host_lock);
  293. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  294. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  295. phba->brd_no, psli->last_iotag);
  296. return 0;
  297. }
  298. static void
  299. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  300. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  301. {
  302. /*
  303. * Set up an iotag
  304. */
  305. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  306. /*
  307. * Issue iocb command to adapter
  308. */
  309. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  310. wmb();
  311. pring->stats.iocb_cmd++;
  312. /*
  313. * If there is no completion routine to call, we can release the
  314. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  315. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  316. */
  317. if (nextiocb->iocb_cmpl)
  318. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  319. else
  320. lpfc_sli_release_iocbq(phba, nextiocb);
  321. /*
  322. * Let the HBA know what IOCB slot will be the next one the
  323. * driver will put a command into.
  324. */
  325. pring->cmdidx = pring->next_cmdidx;
  326. writel(pring->cmdidx, phba->MBslimaddr
  327. + (SLIMOFF + (pring->ringno * 2)) * 4);
  328. }
  329. static void
  330. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  331. struct lpfc_sli_ring *pring)
  332. {
  333. int ringno = pring->ringno;
  334. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  335. wmb();
  336. /*
  337. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  338. * The HBA will tell us when an IOCB entry is available.
  339. */
  340. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  341. readl(phba->CAregaddr); /* flush */
  342. pring->stats.iocb_cmd_full++;
  343. }
  344. static void
  345. lpfc_sli_update_ring(struct lpfc_hba * phba,
  346. struct lpfc_sli_ring *pring)
  347. {
  348. int ringno = pring->ringno;
  349. /*
  350. * Tell the HBA that there is work to do in this ring.
  351. */
  352. wmb();
  353. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  354. readl(phba->CAregaddr); /* flush */
  355. }
  356. static void
  357. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  358. {
  359. IOCB_t *iocb;
  360. struct lpfc_iocbq *nextiocb;
  361. /*
  362. * Check to see if:
  363. * (a) there is anything on the txq to send
  364. * (b) link is up
  365. * (c) link attention events can be processed (fcp ring only)
  366. * (d) IOCB processing is not blocked by the outstanding mbox command.
  367. */
  368. if (pring->txq_cnt &&
  369. (phba->hba_state > LPFC_LINK_DOWN) &&
  370. (pring->ringno != phba->sli.fcp_ring ||
  371. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  372. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  373. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  374. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  375. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  376. if (iocb)
  377. lpfc_sli_update_ring(phba, pring);
  378. else
  379. lpfc_sli_update_full_ring(phba, pring);
  380. }
  381. return;
  382. }
  383. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  384. static void
  385. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  386. {
  387. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  388. /* If the ring is active, flag it */
  389. if (phba->sli.ring[ringno].cmdringaddr) {
  390. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  391. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  392. /*
  393. * Force update of the local copy of cmdGetInx
  394. */
  395. phba->sli.ring[ringno].local_getidx
  396. = le32_to_cpu(pgp->cmdGetInx);
  397. spin_lock_irq(phba->host->host_lock);
  398. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  399. spin_unlock_irq(phba->host->host_lock);
  400. }
  401. }
  402. }
  403. static int
  404. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  405. {
  406. uint8_t ret;
  407. switch (mbxCommand) {
  408. case MBX_LOAD_SM:
  409. case MBX_READ_NV:
  410. case MBX_WRITE_NV:
  411. case MBX_RUN_BIU_DIAG:
  412. case MBX_INIT_LINK:
  413. case MBX_DOWN_LINK:
  414. case MBX_CONFIG_LINK:
  415. case MBX_CONFIG_RING:
  416. case MBX_RESET_RING:
  417. case MBX_READ_CONFIG:
  418. case MBX_READ_RCONFIG:
  419. case MBX_READ_SPARM:
  420. case MBX_READ_STATUS:
  421. case MBX_READ_RPI:
  422. case MBX_READ_XRI:
  423. case MBX_READ_REV:
  424. case MBX_READ_LNK_STAT:
  425. case MBX_REG_LOGIN:
  426. case MBX_UNREG_LOGIN:
  427. case MBX_READ_LA:
  428. case MBX_CLEAR_LA:
  429. case MBX_DUMP_MEMORY:
  430. case MBX_DUMP_CONTEXT:
  431. case MBX_RUN_DIAGS:
  432. case MBX_RESTART:
  433. case MBX_UPDATE_CFG:
  434. case MBX_DOWN_LOAD:
  435. case MBX_DEL_LD_ENTRY:
  436. case MBX_RUN_PROGRAM:
  437. case MBX_SET_MASK:
  438. case MBX_SET_SLIM:
  439. case MBX_UNREG_D_ID:
  440. case MBX_KILL_BOARD:
  441. case MBX_CONFIG_FARP:
  442. case MBX_BEACON:
  443. case MBX_LOAD_AREA:
  444. case MBX_RUN_BIU_DIAG64:
  445. case MBX_CONFIG_PORT:
  446. case MBX_READ_SPARM64:
  447. case MBX_READ_RPI64:
  448. case MBX_REG_LOGIN64:
  449. case MBX_READ_LA64:
  450. case MBX_FLASH_WR_ULA:
  451. case MBX_SET_DEBUG:
  452. case MBX_LOAD_EXP_ROM:
  453. ret = mbxCommand;
  454. break;
  455. default:
  456. ret = MBX_SHUTDOWN;
  457. break;
  458. }
  459. return (ret);
  460. }
  461. static void
  462. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  463. {
  464. wait_queue_head_t *pdone_q;
  465. /*
  466. * If pdone_q is empty, the driver thread gave up waiting and
  467. * continued running.
  468. */
  469. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  470. if (pdone_q)
  471. wake_up_interruptible(pdone_q);
  472. return;
  473. }
  474. void
  475. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  476. {
  477. struct lpfc_dmabuf *mp;
  478. mp = (struct lpfc_dmabuf *) (pmb->context1);
  479. if (mp) {
  480. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  481. kfree(mp);
  482. }
  483. mempool_free( pmb, phba->mbox_mem_pool);
  484. return;
  485. }
  486. int
  487. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  488. {
  489. MAILBOX_t *mbox;
  490. MAILBOX_t *pmbox;
  491. LPFC_MBOXQ_t *pmb;
  492. struct lpfc_sli *psli;
  493. int i, rc;
  494. uint32_t process_next;
  495. psli = &phba->sli;
  496. /* We should only get here if we are in SLI2 mode */
  497. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  498. return (1);
  499. }
  500. phba->sli.slistat.mbox_event++;
  501. /* Get a Mailbox buffer to setup mailbox commands for callback */
  502. if ((pmb = phba->sli.mbox_active)) {
  503. pmbox = &pmb->mb;
  504. mbox = &phba->slim2p->mbx;
  505. /* First check out the status word */
  506. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  507. /* Sanity check to ensure the host owns the mailbox */
  508. if (pmbox->mbxOwner != OWN_HOST) {
  509. /* Lets try for a while */
  510. for (i = 0; i < 10240; i++) {
  511. /* First copy command data */
  512. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  513. sizeof (uint32_t));
  514. if (pmbox->mbxOwner == OWN_HOST)
  515. goto mbout;
  516. }
  517. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  518. <status> */
  519. lpfc_printf_log(phba,
  520. KERN_WARNING,
  521. LOG_MBOX | LOG_SLI,
  522. "%d:0304 Stray Mailbox Interrupt "
  523. "mbxCommand x%x mbxStatus x%x\n",
  524. phba->brd_no,
  525. pmbox->mbxCommand,
  526. pmbox->mbxStatus);
  527. spin_lock_irq(phba->host->host_lock);
  528. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  529. spin_unlock_irq(phba->host->host_lock);
  530. return (1);
  531. }
  532. mbout:
  533. del_timer_sync(&phba->sli.mbox_tmo);
  534. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  535. /*
  536. * It is a fatal error if unknown mbox command completion.
  537. */
  538. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  539. MBX_SHUTDOWN) {
  540. /* Unknow mailbox command compl */
  541. lpfc_printf_log(phba,
  542. KERN_ERR,
  543. LOG_MBOX | LOG_SLI,
  544. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  545. phba->brd_no,
  546. pmbox->mbxCommand);
  547. phba->hba_state = LPFC_HBA_ERROR;
  548. phba->work_hs = HS_FFER3;
  549. lpfc_handle_eratt(phba);
  550. return (0);
  551. }
  552. phba->sli.mbox_active = NULL;
  553. if (pmbox->mbxStatus) {
  554. phba->sli.slistat.mbox_stat_err++;
  555. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  556. /* Mbox cmd cmpl error - RETRYing */
  557. lpfc_printf_log(phba,
  558. KERN_INFO,
  559. LOG_MBOX | LOG_SLI,
  560. "%d:0305 Mbox cmd cmpl error - "
  561. "RETRYing Data: x%x x%x x%x x%x\n",
  562. phba->brd_no,
  563. pmbox->mbxCommand,
  564. pmbox->mbxStatus,
  565. pmbox->un.varWords[0],
  566. phba->hba_state);
  567. pmbox->mbxStatus = 0;
  568. pmbox->mbxOwner = OWN_HOST;
  569. spin_lock_irq(phba->host->host_lock);
  570. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  571. spin_unlock_irq(phba->host->host_lock);
  572. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  573. if (rc == MBX_SUCCESS)
  574. return (0);
  575. }
  576. }
  577. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  578. lpfc_printf_log(phba,
  579. KERN_INFO,
  580. LOG_MBOX | LOG_SLI,
  581. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  582. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  583. phba->brd_no,
  584. pmbox->mbxCommand,
  585. pmb->mbox_cmpl,
  586. *((uint32_t *) pmbox),
  587. pmbox->un.varWords[0],
  588. pmbox->un.varWords[1],
  589. pmbox->un.varWords[2],
  590. pmbox->un.varWords[3],
  591. pmbox->un.varWords[4],
  592. pmbox->un.varWords[5],
  593. pmbox->un.varWords[6],
  594. pmbox->un.varWords[7]);
  595. if (pmb->mbox_cmpl) {
  596. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  597. pmb->mbox_cmpl(phba,pmb);
  598. }
  599. }
  600. do {
  601. process_next = 0; /* by default don't loop */
  602. spin_lock_irq(phba->host->host_lock);
  603. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  604. /* Process next mailbox command if there is one */
  605. if ((pmb = lpfc_mbox_get(phba))) {
  606. spin_unlock_irq(phba->host->host_lock);
  607. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  608. if (rc == MBX_NOT_FINISHED) {
  609. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  610. pmb->mbox_cmpl(phba,pmb);
  611. process_next = 1;
  612. continue; /* loop back */
  613. }
  614. } else {
  615. spin_unlock_irq(phba->host->host_lock);
  616. /* Turn on IOCB processing */
  617. for (i = 0; i < phba->sli.num_rings; i++) {
  618. lpfc_sli_turn_on_ring(phba, i);
  619. }
  620. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  621. while (!list_empty(&phba->freebufList)) {
  622. struct lpfc_dmabuf *mp;
  623. mp = NULL;
  624. list_remove_head((&phba->freebufList),
  625. mp,
  626. struct lpfc_dmabuf,
  627. list);
  628. if (mp) {
  629. lpfc_mbuf_free(phba, mp->virt,
  630. mp->phys);
  631. kfree(mp);
  632. }
  633. }
  634. }
  635. } while (process_next);
  636. return (0);
  637. }
  638. static int
  639. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  640. struct lpfc_iocbq *saveq)
  641. {
  642. IOCB_t * irsp;
  643. WORD5 * w5p;
  644. uint32_t Rctl, Type;
  645. uint32_t match, i;
  646. match = 0;
  647. irsp = &(saveq->iocb);
  648. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  649. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  650. Rctl = FC_ELS_REQ;
  651. Type = FC_ELS_DATA;
  652. } else {
  653. w5p =
  654. (WORD5 *) & (saveq->iocb.un.
  655. ulpWord[5]);
  656. Rctl = w5p->hcsw.Rctl;
  657. Type = w5p->hcsw.Type;
  658. /* Firmware Workaround */
  659. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  660. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  661. Rctl = FC_ELS_REQ;
  662. Type = FC_ELS_DATA;
  663. w5p->hcsw.Rctl = Rctl;
  664. w5p->hcsw.Type = Type;
  665. }
  666. }
  667. /* unSolicited Responses */
  668. if (pring->prt[0].profile) {
  669. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  670. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  671. saveq);
  672. match = 1;
  673. } else {
  674. /* We must search, based on rctl / type
  675. for the right routine */
  676. for (i = 0; i < pring->num_mask;
  677. i++) {
  678. if ((pring->prt[i].rctl ==
  679. Rctl)
  680. && (pring->prt[i].
  681. type == Type)) {
  682. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  683. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  684. (phba, pring, saveq);
  685. match = 1;
  686. break;
  687. }
  688. }
  689. }
  690. if (match == 0) {
  691. /* Unexpected Rctl / Type received */
  692. /* Ring <ringno> handler: unexpected
  693. Rctl <Rctl> Type <Type> received */
  694. lpfc_printf_log(phba,
  695. KERN_WARNING,
  696. LOG_SLI,
  697. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  698. "Type x%x received \n",
  699. phba->brd_no,
  700. pring->ringno,
  701. Rctl,
  702. Type);
  703. }
  704. return(1);
  705. }
  706. static struct lpfc_iocbq *
  707. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  708. struct lpfc_sli_ring * pring,
  709. struct lpfc_iocbq * prspiocb)
  710. {
  711. struct lpfc_iocbq *cmd_iocb = NULL;
  712. uint16_t iotag;
  713. iotag = prspiocb->iocb.ulpIoTag;
  714. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  715. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  716. list_del(&cmd_iocb->list);
  717. pring->txcmplq_cnt--;
  718. return cmd_iocb;
  719. }
  720. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  721. "%d:0317 iotag x%x is out off "
  722. "range: max iotag x%x wd0 x%x\n",
  723. phba->brd_no, iotag,
  724. phba->sli.last_iotag,
  725. *(((uint32_t *) &prspiocb->iocb) + 7));
  726. return NULL;
  727. }
  728. static int
  729. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  730. struct lpfc_iocbq *saveq)
  731. {
  732. struct lpfc_iocbq * cmdiocbp;
  733. int rc = 1;
  734. unsigned long iflag;
  735. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  736. spin_lock_irqsave(phba->host->host_lock, iflag);
  737. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  738. if (cmdiocbp) {
  739. if (cmdiocbp->iocb_cmpl) {
  740. /*
  741. * Post all ELS completions to the worker thread.
  742. * All other are passed to the completion callback.
  743. */
  744. if (pring->ringno == LPFC_ELS_RING) {
  745. spin_unlock_irqrestore(phba->host->host_lock,
  746. iflag);
  747. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  748. spin_lock_irqsave(phba->host->host_lock, iflag);
  749. }
  750. else {
  751. spin_unlock_irqrestore(phba->host->host_lock,
  752. iflag);
  753. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  754. spin_lock_irqsave(phba->host->host_lock, iflag);
  755. }
  756. } else
  757. lpfc_sli_release_iocbq(phba, cmdiocbp);
  758. } else {
  759. /*
  760. * Unknown initiating command based on the response iotag.
  761. * This could be the case on the ELS ring because of
  762. * lpfc_els_abort().
  763. */
  764. if (pring->ringno != LPFC_ELS_RING) {
  765. /*
  766. * Ring <ringno> handler: unexpected completion IoTag
  767. * <IoTag>
  768. */
  769. lpfc_printf_log(phba,
  770. KERN_WARNING,
  771. LOG_SLI,
  772. "%d:0322 Ring %d handler: unexpected "
  773. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  774. phba->brd_no,
  775. pring->ringno,
  776. saveq->iocb.ulpIoTag,
  777. saveq->iocb.ulpStatus,
  778. saveq->iocb.un.ulpWord[4],
  779. saveq->iocb.ulpCommand,
  780. saveq->iocb.ulpContext);
  781. }
  782. }
  783. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  784. return rc;
  785. }
  786. static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
  787. struct lpfc_sli_ring * pring)
  788. {
  789. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  790. /*
  791. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  792. * rsp ring <portRspMax>
  793. */
  794. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  795. "%d:0312 Ring %d handler: portRspPut %d "
  796. "is bigger then rsp ring %d\n",
  797. phba->brd_no, pring->ringno,
  798. le32_to_cpu(pgp->rspPutInx),
  799. pring->numRiocb);
  800. phba->hba_state = LPFC_HBA_ERROR;
  801. /*
  802. * All error attention handlers are posted to
  803. * worker thread
  804. */
  805. phba->work_ha |= HA_ERATT;
  806. phba->work_hs = HS_FFER3;
  807. if (phba->work_wait)
  808. wake_up(phba->work_wait);
  809. return;
  810. }
  811. void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
  812. {
  813. struct lpfc_sli * psli = &phba->sli;
  814. struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
  815. IOCB_t *irsp = NULL;
  816. IOCB_t *entry = NULL;
  817. struct lpfc_iocbq *cmdiocbq = NULL;
  818. struct lpfc_iocbq rspiocbq;
  819. struct lpfc_pgp *pgp;
  820. uint32_t status;
  821. uint32_t portRspPut, portRspMax;
  822. int type;
  823. uint32_t rsp_cmpl = 0;
  824. void __iomem *to_slim;
  825. uint32_t ha_copy;
  826. pring->stats.iocb_event++;
  827. /* The driver assumes SLI-2 mode */
  828. pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  829. /*
  830. * The next available response entry should never exceed the maximum
  831. * entries. If it does, treat it as an adapter hardware error.
  832. */
  833. portRspMax = pring->numRiocb;
  834. portRspPut = le32_to_cpu(pgp->rspPutInx);
  835. if (unlikely(portRspPut >= portRspMax)) {
  836. lpfc_sli_rsp_pointers_error(phba, pring);
  837. return;
  838. }
  839. rmb();
  840. while (pring->rspidx != portRspPut) {
  841. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  842. if (++pring->rspidx >= portRspMax)
  843. pring->rspidx = 0;
  844. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  845. (uint32_t *) &rspiocbq.iocb,
  846. sizeof (IOCB_t));
  847. irsp = &rspiocbq.iocb;
  848. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  849. pring->stats.iocb_rsp++;
  850. rsp_cmpl++;
  851. if (unlikely(irsp->ulpStatus)) {
  852. /* Rsp ring <ringno> error: IOCB */
  853. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  854. "%d:0326 Rsp Ring %d error: IOCB Data: "
  855. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  856. phba->brd_no, pring->ringno,
  857. irsp->un.ulpWord[0],
  858. irsp->un.ulpWord[1],
  859. irsp->un.ulpWord[2],
  860. irsp->un.ulpWord[3],
  861. irsp->un.ulpWord[4],
  862. irsp->un.ulpWord[5],
  863. *(((uint32_t *) irsp) + 6),
  864. *(((uint32_t *) irsp) + 7));
  865. }
  866. switch (type) {
  867. case LPFC_ABORT_IOCB:
  868. case LPFC_SOL_IOCB:
  869. /*
  870. * Idle exchange closed via ABTS from port. No iocb
  871. * resources need to be recovered.
  872. */
  873. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  874. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  875. "%d:0314 IOCB cmd 0x%x"
  876. " processed. Skipping"
  877. " completion", phba->brd_no,
  878. irsp->ulpCommand);
  879. break;
  880. }
  881. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  882. &rspiocbq);
  883. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  884. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  885. &rspiocbq);
  886. }
  887. break;
  888. default:
  889. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  890. char adaptermsg[LPFC_MAX_ADPTMSG];
  891. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  892. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  893. MAX_MSG_DATA);
  894. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  895. phba->brd_no, adaptermsg);
  896. } else {
  897. /* Unknown IOCB command */
  898. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  899. "%d:0321 Unknown IOCB command "
  900. "Data: x%x, x%x x%x x%x x%x\n",
  901. phba->brd_no, type,
  902. irsp->ulpCommand,
  903. irsp->ulpStatus,
  904. irsp->ulpIoTag,
  905. irsp->ulpContext);
  906. }
  907. break;
  908. }
  909. /*
  910. * The response IOCB has been processed. Update the ring
  911. * pointer in SLIM. If the port response put pointer has not
  912. * been updated, sync the pgp->rspPutInx and fetch the new port
  913. * response put pointer.
  914. */
  915. to_slim = phba->MBslimaddr +
  916. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  917. writeb(pring->rspidx, to_slim);
  918. if (pring->rspidx == portRspPut)
  919. portRspPut = le32_to_cpu(pgp->rspPutInx);
  920. }
  921. ha_copy = readl(phba->HAregaddr);
  922. ha_copy >>= (LPFC_FCP_RING * 4);
  923. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  924. pring->stats.iocb_rsp_full++;
  925. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  926. writel(status, phba->CAregaddr);
  927. readl(phba->CAregaddr);
  928. }
  929. if ((ha_copy & HA_R0CE_RSP) &&
  930. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  931. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  932. pring->stats.iocb_cmd_empty++;
  933. /* Force update of the local copy of cmdGetInx */
  934. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  935. lpfc_sli_resume_iocb(phba, pring);
  936. if ((pring->lpfc_sli_cmd_available))
  937. (pring->lpfc_sli_cmd_available) (phba, pring);
  938. }
  939. return;
  940. }
  941. /*
  942. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  943. * to check it explicitly.
  944. */
  945. static int
  946. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  947. struct lpfc_sli_ring * pring, uint32_t mask)
  948. {
  949. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  950. IOCB_t *irsp = NULL;
  951. IOCB_t *entry = NULL;
  952. struct lpfc_iocbq *cmdiocbq = NULL;
  953. struct lpfc_iocbq rspiocbq;
  954. uint32_t status;
  955. uint32_t portRspPut, portRspMax;
  956. int rc = 1;
  957. lpfc_iocb_type type;
  958. unsigned long iflag;
  959. uint32_t rsp_cmpl = 0;
  960. void __iomem *to_slim;
  961. spin_lock_irqsave(phba->host->host_lock, iflag);
  962. pring->stats.iocb_event++;
  963. /*
  964. * The next available response entry should never exceed the maximum
  965. * entries. If it does, treat it as an adapter hardware error.
  966. */
  967. portRspMax = pring->numRiocb;
  968. portRspPut = le32_to_cpu(pgp->rspPutInx);
  969. if (unlikely(portRspPut >= portRspMax)) {
  970. lpfc_sli_rsp_pointers_error(phba, pring);
  971. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  972. return 1;
  973. }
  974. rmb();
  975. while (pring->rspidx != portRspPut) {
  976. /*
  977. * Fetch an entry off the ring and copy it into a local data
  978. * structure. The copy involves a byte-swap since the
  979. * network byte order and pci byte orders are different.
  980. */
  981. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  982. if (++pring->rspidx >= portRspMax)
  983. pring->rspidx = 0;
  984. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  985. (uint32_t *) &rspiocbq.iocb,
  986. sizeof (IOCB_t));
  987. irsp = &rspiocbq.iocb;
  988. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  989. pring->stats.iocb_rsp++;
  990. rsp_cmpl++;
  991. if (unlikely(irsp->ulpStatus)) {
  992. /* Rsp ring <ringno> error: IOCB */
  993. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  994. "%d:0336 Rsp Ring %d error: IOCB Data: "
  995. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  996. phba->brd_no, pring->ringno,
  997. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  998. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  999. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  1000. *(((uint32_t *) irsp) + 6),
  1001. *(((uint32_t *) irsp) + 7));
  1002. }
  1003. switch (type) {
  1004. case LPFC_ABORT_IOCB:
  1005. case LPFC_SOL_IOCB:
  1006. /*
  1007. * Idle exchange closed via ABTS from port. No iocb
  1008. * resources need to be recovered.
  1009. */
  1010. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1011. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1012. "%d:0333 IOCB cmd 0x%x"
  1013. " processed. Skipping"
  1014. " completion\n", phba->brd_no,
  1015. irsp->ulpCommand);
  1016. break;
  1017. }
  1018. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1019. &rspiocbq);
  1020. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1021. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1022. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1023. &rspiocbq);
  1024. } else {
  1025. spin_unlock_irqrestore(
  1026. phba->host->host_lock, iflag);
  1027. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1028. &rspiocbq);
  1029. spin_lock_irqsave(phba->host->host_lock,
  1030. iflag);
  1031. }
  1032. }
  1033. break;
  1034. default:
  1035. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1036. char adaptermsg[LPFC_MAX_ADPTMSG];
  1037. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1038. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1039. MAX_MSG_DATA);
  1040. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1041. phba->brd_no, adaptermsg);
  1042. } else {
  1043. /* Unknown IOCB command */
  1044. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1045. "%d:0334 Unknown IOCB command "
  1046. "Data: x%x, x%x x%x x%x x%x\n",
  1047. phba->brd_no, type, irsp->ulpCommand,
  1048. irsp->ulpStatus, irsp->ulpIoTag,
  1049. irsp->ulpContext);
  1050. }
  1051. break;
  1052. }
  1053. /*
  1054. * The response IOCB has been processed. Update the ring
  1055. * pointer in SLIM. If the port response put pointer has not
  1056. * been updated, sync the pgp->rspPutInx and fetch the new port
  1057. * response put pointer.
  1058. */
  1059. to_slim = phba->MBslimaddr +
  1060. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  1061. writel(pring->rspidx, to_slim);
  1062. if (pring->rspidx == portRspPut)
  1063. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1064. }
  1065. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1066. pring->stats.iocb_rsp_full++;
  1067. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1068. writel(status, phba->CAregaddr);
  1069. readl(phba->CAregaddr);
  1070. }
  1071. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1072. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1073. pring->stats.iocb_cmd_empty++;
  1074. /* Force update of the local copy of cmdGetInx */
  1075. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1076. lpfc_sli_resume_iocb(phba, pring);
  1077. if ((pring->lpfc_sli_cmd_available))
  1078. (pring->lpfc_sli_cmd_available) (phba, pring);
  1079. }
  1080. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1081. return rc;
  1082. }
  1083. int
  1084. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  1085. struct lpfc_sli_ring * pring, uint32_t mask)
  1086. {
  1087. IOCB_t *entry;
  1088. IOCB_t *irsp = NULL;
  1089. struct lpfc_iocbq *rspiocbp = NULL;
  1090. struct lpfc_iocbq *next_iocb;
  1091. struct lpfc_iocbq *cmdiocbp;
  1092. struct lpfc_iocbq *saveq;
  1093. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1094. uint8_t iocb_cmd_type;
  1095. lpfc_iocb_type type;
  1096. uint32_t status, free_saveq;
  1097. uint32_t portRspPut, portRspMax;
  1098. int rc = 1;
  1099. unsigned long iflag;
  1100. void __iomem *to_slim;
  1101. spin_lock_irqsave(phba->host->host_lock, iflag);
  1102. pring->stats.iocb_event++;
  1103. /*
  1104. * The next available response entry should never exceed the maximum
  1105. * entries. If it does, treat it as an adapter hardware error.
  1106. */
  1107. portRspMax = pring->numRiocb;
  1108. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1109. if (portRspPut >= portRspMax) {
  1110. /*
  1111. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1112. * rsp ring <portRspMax>
  1113. */
  1114. lpfc_printf_log(phba,
  1115. KERN_ERR,
  1116. LOG_SLI,
  1117. "%d:0303 Ring %d handler: portRspPut %d "
  1118. "is bigger then rsp ring %d\n",
  1119. phba->brd_no,
  1120. pring->ringno, portRspPut, portRspMax);
  1121. phba->hba_state = LPFC_HBA_ERROR;
  1122. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1123. phba->work_hs = HS_FFER3;
  1124. lpfc_handle_eratt(phba);
  1125. return 1;
  1126. }
  1127. rmb();
  1128. while (pring->rspidx != portRspPut) {
  1129. /*
  1130. * Build a completion list and call the appropriate handler.
  1131. * The process is to get the next available response iocb, get
  1132. * a free iocb from the list, copy the response data into the
  1133. * free iocb, insert to the continuation list, and update the
  1134. * next response index to slim. This process makes response
  1135. * iocb's in the ring available to DMA as fast as possible but
  1136. * pays a penalty for a copy operation. Since the iocb is
  1137. * only 32 bytes, this penalty is considered small relative to
  1138. * the PCI reads for register values and a slim write. When
  1139. * the ulpLe field is set, the entire Command has been
  1140. * received.
  1141. */
  1142. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1143. rspiocbp = lpfc_sli_get_iocbq(phba);
  1144. if (rspiocbp == NULL) {
  1145. printk(KERN_ERR "%s: out of buffers! Failing "
  1146. "completion.\n", __FUNCTION__);
  1147. break;
  1148. }
  1149. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1150. irsp = &rspiocbp->iocb;
  1151. if (++pring->rspidx >= portRspMax)
  1152. pring->rspidx = 0;
  1153. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1154. + 1) * 4;
  1155. writel(pring->rspidx, to_slim);
  1156. if (list_empty(&(pring->iocb_continueq))) {
  1157. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1158. } else {
  1159. list_add_tail(&rspiocbp->list,
  1160. &(pring->iocb_continueq));
  1161. }
  1162. pring->iocb_continueq_cnt++;
  1163. if (irsp->ulpLe) {
  1164. /*
  1165. * By default, the driver expects to free all resources
  1166. * associated with this iocb completion.
  1167. */
  1168. free_saveq = 1;
  1169. saveq = list_get_first(&pring->iocb_continueq,
  1170. struct lpfc_iocbq, list);
  1171. irsp = &(saveq->iocb);
  1172. list_del_init(&pring->iocb_continueq);
  1173. pring->iocb_continueq_cnt = 0;
  1174. pring->stats.iocb_rsp++;
  1175. if (irsp->ulpStatus) {
  1176. /* Rsp ring <ringno> error: IOCB */
  1177. lpfc_printf_log(phba,
  1178. KERN_WARNING,
  1179. LOG_SLI,
  1180. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1181. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1182. phba->brd_no,
  1183. pring->ringno,
  1184. irsp->un.ulpWord[0],
  1185. irsp->un.ulpWord[1],
  1186. irsp->un.ulpWord[2],
  1187. irsp->un.ulpWord[3],
  1188. irsp->un.ulpWord[4],
  1189. irsp->un.ulpWord[5],
  1190. *(((uint32_t *) irsp) + 6),
  1191. *(((uint32_t *) irsp) + 7));
  1192. }
  1193. /*
  1194. * Fetch the IOCB command type and call the correct
  1195. * completion routine. Solicited and Unsolicited
  1196. * IOCBs on the ELS ring get freed back to the
  1197. * lpfc_iocb_list by the discovery kernel thread.
  1198. */
  1199. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1200. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1201. if (type == LPFC_SOL_IOCB) {
  1202. spin_unlock_irqrestore(phba->host->host_lock,
  1203. iflag);
  1204. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1205. saveq);
  1206. spin_lock_irqsave(phba->host->host_lock, iflag);
  1207. } else if (type == LPFC_UNSOL_IOCB) {
  1208. spin_unlock_irqrestore(phba->host->host_lock,
  1209. iflag);
  1210. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1211. saveq);
  1212. spin_lock_irqsave(phba->host->host_lock, iflag);
  1213. } else if (type == LPFC_ABORT_IOCB) {
  1214. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1215. ((cmdiocbp =
  1216. lpfc_sli_iocbq_lookup(phba, pring,
  1217. saveq)))) {
  1218. /* Call the specified completion
  1219. routine */
  1220. if (cmdiocbp->iocb_cmpl) {
  1221. spin_unlock_irqrestore(
  1222. phba->host->host_lock,
  1223. iflag);
  1224. (cmdiocbp->iocb_cmpl) (phba,
  1225. cmdiocbp, saveq);
  1226. spin_lock_irqsave(
  1227. phba->host->host_lock,
  1228. iflag);
  1229. } else
  1230. lpfc_sli_release_iocbq(phba,
  1231. cmdiocbp);
  1232. }
  1233. } else if (type == LPFC_UNKNOWN_IOCB) {
  1234. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1235. char adaptermsg[LPFC_MAX_ADPTMSG];
  1236. memset(adaptermsg, 0,
  1237. LPFC_MAX_ADPTMSG);
  1238. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1239. MAX_MSG_DATA);
  1240. dev_warn(&((phba->pcidev)->dev),
  1241. "lpfc%d: %s",
  1242. phba->brd_no, adaptermsg);
  1243. } else {
  1244. /* Unknown IOCB command */
  1245. lpfc_printf_log(phba,
  1246. KERN_ERR,
  1247. LOG_SLI,
  1248. "%d:0335 Unknown IOCB command "
  1249. "Data: x%x x%x x%x x%x\n",
  1250. phba->brd_no,
  1251. irsp->ulpCommand,
  1252. irsp->ulpStatus,
  1253. irsp->ulpIoTag,
  1254. irsp->ulpContext);
  1255. }
  1256. }
  1257. if (free_saveq) {
  1258. if (!list_empty(&saveq->list)) {
  1259. list_for_each_entry_safe(rspiocbp,
  1260. next_iocb,
  1261. &saveq->list,
  1262. list) {
  1263. list_del(&rspiocbp->list);
  1264. lpfc_sli_release_iocbq(phba,
  1265. rspiocbp);
  1266. }
  1267. }
  1268. lpfc_sli_release_iocbq(phba, saveq);
  1269. }
  1270. }
  1271. /*
  1272. * If the port response put pointer has not been updated, sync
  1273. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1274. * response put pointer.
  1275. */
  1276. if (pring->rspidx == portRspPut) {
  1277. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1278. }
  1279. } /* while (pring->rspidx != portRspPut) */
  1280. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1281. /* At least one response entry has been freed */
  1282. pring->stats.iocb_rsp_full++;
  1283. /* SET RxRE_RSP in Chip Att register */
  1284. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1285. writel(status, phba->CAregaddr);
  1286. readl(phba->CAregaddr); /* flush */
  1287. }
  1288. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1289. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1290. pring->stats.iocb_cmd_empty++;
  1291. /* Force update of the local copy of cmdGetInx */
  1292. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1293. lpfc_sli_resume_iocb(phba, pring);
  1294. if ((pring->lpfc_sli_cmd_available))
  1295. (pring->lpfc_sli_cmd_available) (phba, pring);
  1296. }
  1297. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1298. return rc;
  1299. }
  1300. int
  1301. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1302. {
  1303. struct lpfc_iocbq *iocb, *next_iocb;
  1304. IOCB_t *icmd = NULL, *cmd = NULL;
  1305. int errcnt;
  1306. errcnt = 0;
  1307. /* Error everything on txq and txcmplq
  1308. * First do the txq.
  1309. */
  1310. spin_lock_irq(phba->host->host_lock);
  1311. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1312. list_del_init(&iocb->list);
  1313. if (iocb->iocb_cmpl) {
  1314. icmd = &iocb->iocb;
  1315. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1316. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1317. spin_unlock_irq(phba->host->host_lock);
  1318. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1319. spin_lock_irq(phba->host->host_lock);
  1320. } else
  1321. lpfc_sli_release_iocbq(phba, iocb);
  1322. }
  1323. pring->txq_cnt = 0;
  1324. INIT_LIST_HEAD(&(pring->txq));
  1325. /* Next issue ABTS for everything on the txcmplq */
  1326. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1327. cmd = &iocb->iocb;
  1328. /*
  1329. * Imediate abort of IOCB, deque and call compl
  1330. */
  1331. list_del_init(&iocb->list);
  1332. pring->txcmplq_cnt--;
  1333. if (iocb->iocb_cmpl) {
  1334. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1335. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1336. spin_unlock_irq(phba->host->host_lock);
  1337. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1338. spin_lock_irq(phba->host->host_lock);
  1339. } else
  1340. lpfc_sli_release_iocbq(phba, iocb);
  1341. }
  1342. INIT_LIST_HEAD(&pring->txcmplq);
  1343. pring->txcmplq_cnt = 0;
  1344. spin_unlock_irq(phba->host->host_lock);
  1345. return errcnt;
  1346. }
  1347. int
  1348. lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
  1349. {
  1350. uint32_t status;
  1351. int i = 0;
  1352. int retval = 0;
  1353. /* Read the HBA Host Status Register */
  1354. status = readl(phba->HSregaddr);
  1355. /*
  1356. * Check status register every 100ms for 5 retries, then every
  1357. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1358. * every 2.5 sec for 4.
  1359. * Break our of the loop if errors occurred during init.
  1360. */
  1361. while (((status & mask) != mask) &&
  1362. !(status & HS_FFERM) &&
  1363. i++ < 20) {
  1364. if (i <= 5)
  1365. msleep(10);
  1366. else if (i <= 10)
  1367. msleep(500);
  1368. else
  1369. msleep(2500);
  1370. if (i == 15) {
  1371. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1372. lpfc_sli_brdrestart(phba);
  1373. }
  1374. /* Read the HBA Host Status Register */
  1375. status = readl(phba->HSregaddr);
  1376. }
  1377. /* Check to see if any errors occurred during init */
  1378. if ((status & HS_FFERM) || (i >= 20)) {
  1379. phba->hba_state = LPFC_HBA_ERROR;
  1380. retval = 1;
  1381. }
  1382. return retval;
  1383. }
  1384. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1385. void lpfc_reset_barrier(struct lpfc_hba * phba)
  1386. {
  1387. uint32_t __iomem *resp_buf;
  1388. uint32_t __iomem *mbox_buf;
  1389. volatile uint32_t mbox;
  1390. uint32_t hc_copy;
  1391. int i;
  1392. uint8_t hdrtype;
  1393. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1394. if (hdrtype != 0x80 ||
  1395. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1396. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1397. return;
  1398. /*
  1399. * Tell the other part of the chip to suspend temporarily all
  1400. * its DMA activity.
  1401. */
  1402. resp_buf = phba->MBslimaddr;
  1403. /* Disable the error attention */
  1404. hc_copy = readl(phba->HCregaddr);
  1405. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1406. readl(phba->HCregaddr); /* flush */
  1407. if (readl(phba->HAregaddr) & HA_ERATT) {
  1408. /* Clear Chip error bit */
  1409. writel(HA_ERATT, phba->HAregaddr);
  1410. phba->stopped = 1;
  1411. }
  1412. mbox = 0;
  1413. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1414. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1415. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1416. mbox_buf = phba->MBslimaddr;
  1417. writel(mbox, mbox_buf);
  1418. for (i = 0;
  1419. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1420. mdelay(1);
  1421. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1422. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1423. phba->stopped)
  1424. goto restore_hc;
  1425. else
  1426. goto clear_errat;
  1427. }
  1428. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1429. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1430. mdelay(1);
  1431. clear_errat:
  1432. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1433. mdelay(1);
  1434. if (readl(phba->HAregaddr) & HA_ERATT) {
  1435. writel(HA_ERATT, phba->HAregaddr);
  1436. phba->stopped = 1;
  1437. }
  1438. restore_hc:
  1439. writel(hc_copy, phba->HCregaddr);
  1440. readl(phba->HCregaddr); /* flush */
  1441. }
  1442. int
  1443. lpfc_sli_brdkill(struct lpfc_hba * phba)
  1444. {
  1445. struct lpfc_sli *psli;
  1446. LPFC_MBOXQ_t *pmb;
  1447. uint32_t status;
  1448. uint32_t ha_copy;
  1449. int retval;
  1450. int i = 0;
  1451. psli = &phba->sli;
  1452. /* Kill HBA */
  1453. lpfc_printf_log(phba,
  1454. KERN_INFO,
  1455. LOG_SLI,
  1456. "%d:0329 Kill HBA Data: x%x x%x\n",
  1457. phba->brd_no,
  1458. phba->hba_state,
  1459. psli->sli_flag);
  1460. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1461. GFP_KERNEL)) == 0)
  1462. return 1;
  1463. /* Disable the error attention */
  1464. spin_lock_irq(phba->host->host_lock);
  1465. status = readl(phba->HCregaddr);
  1466. status &= ~HC_ERINT_ENA;
  1467. writel(status, phba->HCregaddr);
  1468. readl(phba->HCregaddr); /* flush */
  1469. spin_unlock_irq(phba->host->host_lock);
  1470. lpfc_kill_board(phba, pmb);
  1471. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1472. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1473. if (retval != MBX_SUCCESS) {
  1474. if (retval != MBX_BUSY)
  1475. mempool_free(pmb, phba->mbox_mem_pool);
  1476. return 1;
  1477. }
  1478. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1479. mempool_free(pmb, phba->mbox_mem_pool);
  1480. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1481. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1482. * 3 seconds we still set HBA_ERROR state because the status of the
  1483. * board is now undefined.
  1484. */
  1485. ha_copy = readl(phba->HAregaddr);
  1486. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1487. mdelay(100);
  1488. ha_copy = readl(phba->HAregaddr);
  1489. }
  1490. del_timer_sync(&psli->mbox_tmo);
  1491. if (ha_copy & HA_ERATT) {
  1492. writel(HA_ERATT, phba->HAregaddr);
  1493. phba->stopped = 1;
  1494. }
  1495. spin_lock_irq(phba->host->host_lock);
  1496. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1497. spin_unlock_irq(phba->host->host_lock);
  1498. psli->mbox_active = NULL;
  1499. lpfc_hba_down_post(phba);
  1500. phba->hba_state = LPFC_HBA_ERROR;
  1501. return (ha_copy & HA_ERATT ? 0 : 1);
  1502. }
  1503. int
  1504. lpfc_sli_brdreset(struct lpfc_hba * phba)
  1505. {
  1506. struct lpfc_sli *psli;
  1507. struct lpfc_sli_ring *pring;
  1508. uint16_t cfg_value;
  1509. int i;
  1510. psli = &phba->sli;
  1511. /* Reset HBA */
  1512. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1513. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1514. phba->hba_state, psli->sli_flag);
  1515. /* perform board reset */
  1516. phba->fc_eventTag = 0;
  1517. phba->fc_myDID = 0;
  1518. phba->fc_prevDID = 0;
  1519. /* Turn off parity checking and serr during the physical reset */
  1520. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1521. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1522. (cfg_value &
  1523. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1524. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1525. /* Now toggle INITFF bit in the Host Control Register */
  1526. writel(HC_INITFF, phba->HCregaddr);
  1527. mdelay(1);
  1528. readl(phba->HCregaddr); /* flush */
  1529. writel(0, phba->HCregaddr);
  1530. readl(phba->HCregaddr); /* flush */
  1531. /* Restore PCI cmd register */
  1532. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1533. /* Initialize relevant SLI info */
  1534. for (i = 0; i < psli->num_rings; i++) {
  1535. pring = &psli->ring[i];
  1536. pring->flag = 0;
  1537. pring->rspidx = 0;
  1538. pring->next_cmdidx = 0;
  1539. pring->local_getidx = 0;
  1540. pring->cmdidx = 0;
  1541. pring->missbufcnt = 0;
  1542. }
  1543. phba->hba_state = LPFC_WARM_START;
  1544. return 0;
  1545. }
  1546. int
  1547. lpfc_sli_brdrestart(struct lpfc_hba * phba)
  1548. {
  1549. MAILBOX_t *mb;
  1550. struct lpfc_sli *psli;
  1551. uint16_t skip_post;
  1552. volatile uint32_t word0;
  1553. void __iomem *to_slim;
  1554. spin_lock_irq(phba->host->host_lock);
  1555. psli = &phba->sli;
  1556. /* Restart HBA */
  1557. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1558. "%d:0337 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1559. phba->hba_state, psli->sli_flag);
  1560. word0 = 0;
  1561. mb = (MAILBOX_t *) &word0;
  1562. mb->mbxCommand = MBX_RESTART;
  1563. mb->mbxHc = 1;
  1564. lpfc_reset_barrier(phba);
  1565. to_slim = phba->MBslimaddr;
  1566. writel(*(uint32_t *) mb, to_slim);
  1567. readl(to_slim); /* flush */
  1568. /* Only skip post after fc_ffinit is completed */
  1569. if (phba->hba_state) {
  1570. skip_post = 1;
  1571. word0 = 1; /* This is really setting up word1 */
  1572. } else {
  1573. skip_post = 0;
  1574. word0 = 0; /* This is really setting up word1 */
  1575. }
  1576. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1577. writel(*(uint32_t *) mb, to_slim);
  1578. readl(to_slim); /* flush */
  1579. lpfc_sli_brdreset(phba);
  1580. phba->stopped = 0;
  1581. phba->hba_state = LPFC_INIT_START;
  1582. spin_unlock_irq(phba->host->host_lock);
  1583. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1584. psli->stats_start = get_seconds();
  1585. if (skip_post)
  1586. mdelay(100);
  1587. else
  1588. mdelay(2000);
  1589. lpfc_hba_down_post(phba);
  1590. return 0;
  1591. }
  1592. static int
  1593. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1594. {
  1595. uint32_t status, i = 0;
  1596. /* Read the HBA Host Status Register */
  1597. status = readl(phba->HSregaddr);
  1598. /* Check status register to see what current state is */
  1599. i = 0;
  1600. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1601. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1602. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1603. * 4.
  1604. */
  1605. if (i++ >= 20) {
  1606. /* Adapter failed to init, timeout, status reg
  1607. <status> */
  1608. lpfc_printf_log(phba,
  1609. KERN_ERR,
  1610. LOG_INIT,
  1611. "%d:0436 Adapter failed to init, "
  1612. "timeout, status reg x%x\n",
  1613. phba->brd_no,
  1614. status);
  1615. phba->hba_state = LPFC_HBA_ERROR;
  1616. return -ETIMEDOUT;
  1617. }
  1618. /* Check to see if any errors occurred during init */
  1619. if (status & HS_FFERM) {
  1620. /* ERROR: During chipset initialization */
  1621. /* Adapter failed to init, chipset, status reg
  1622. <status> */
  1623. lpfc_printf_log(phba,
  1624. KERN_ERR,
  1625. LOG_INIT,
  1626. "%d:0437 Adapter failed to init, "
  1627. "chipset, status reg x%x\n",
  1628. phba->brd_no,
  1629. status);
  1630. phba->hba_state = LPFC_HBA_ERROR;
  1631. return -EIO;
  1632. }
  1633. if (i <= 5) {
  1634. msleep(10);
  1635. } else if (i <= 10) {
  1636. msleep(500);
  1637. } else {
  1638. msleep(2500);
  1639. }
  1640. if (i == 15) {
  1641. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1642. lpfc_sli_brdrestart(phba);
  1643. }
  1644. /* Read the HBA Host Status Register */
  1645. status = readl(phba->HSregaddr);
  1646. }
  1647. /* Check to see if any errors occurred during init */
  1648. if (status & HS_FFERM) {
  1649. /* ERROR: During chipset initialization */
  1650. /* Adapter failed to init, chipset, status reg <status> */
  1651. lpfc_printf_log(phba,
  1652. KERN_ERR,
  1653. LOG_INIT,
  1654. "%d:0438 Adapter failed to init, chipset, "
  1655. "status reg x%x\n",
  1656. phba->brd_no,
  1657. status);
  1658. phba->hba_state = LPFC_HBA_ERROR;
  1659. return -EIO;
  1660. }
  1661. /* Clear all interrupt enable conditions */
  1662. writel(0, phba->HCregaddr);
  1663. readl(phba->HCregaddr); /* flush */
  1664. /* setup host attn register */
  1665. writel(0xffffffff, phba->HAregaddr);
  1666. readl(phba->HAregaddr); /* flush */
  1667. return 0;
  1668. }
  1669. int
  1670. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1671. {
  1672. LPFC_MBOXQ_t *pmb;
  1673. uint32_t resetcount = 0, rc = 0, done = 0;
  1674. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1675. if (!pmb) {
  1676. phba->hba_state = LPFC_HBA_ERROR;
  1677. return -ENOMEM;
  1678. }
  1679. while (resetcount < 2 && !done) {
  1680. spin_lock_irq(phba->host->host_lock);
  1681. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1682. spin_unlock_irq(phba->host->host_lock);
  1683. phba->hba_state = LPFC_STATE_UNKNOWN;
  1684. lpfc_sli_brdrestart(phba);
  1685. msleep(2500);
  1686. rc = lpfc_sli_chipset_init(phba);
  1687. if (rc)
  1688. break;
  1689. spin_lock_irq(phba->host->host_lock);
  1690. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1691. spin_unlock_irq(phba->host->host_lock);
  1692. resetcount++;
  1693. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1694. * means the call was successful. Any other nonzero value is a failure,
  1695. * but if ERESTART is returned, the driver may reset the HBA and try
  1696. * again.
  1697. */
  1698. rc = lpfc_config_port_prep(phba);
  1699. if (rc == -ERESTART) {
  1700. phba->hba_state = 0;
  1701. continue;
  1702. } else if (rc) {
  1703. break;
  1704. }
  1705. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1706. lpfc_config_port(phba, pmb);
  1707. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1708. if (rc == MBX_SUCCESS)
  1709. done = 1;
  1710. else {
  1711. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1712. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1713. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1714. phba->brd_no, pmb->mb.mbxCommand,
  1715. pmb->mb.mbxStatus, 0);
  1716. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1717. }
  1718. }
  1719. if (!done)
  1720. goto lpfc_sli_hba_setup_error;
  1721. rc = lpfc_sli_ring_map(phba, pmb);
  1722. if (rc)
  1723. goto lpfc_sli_hba_setup_error;
  1724. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1725. rc = lpfc_config_port_post(phba);
  1726. if (rc)
  1727. goto lpfc_sli_hba_setup_error;
  1728. goto lpfc_sli_hba_setup_exit;
  1729. lpfc_sli_hba_setup_error:
  1730. phba->hba_state = LPFC_HBA_ERROR;
  1731. lpfc_sli_hba_setup_exit:
  1732. mempool_free(pmb, phba->mbox_mem_pool);
  1733. return rc;
  1734. }
  1735. static void
  1736. lpfc_mbox_abort(struct lpfc_hba * phba)
  1737. {
  1738. LPFC_MBOXQ_t *pmbox;
  1739. MAILBOX_t *mb;
  1740. if (phba->sli.mbox_active) {
  1741. del_timer_sync(&phba->sli.mbox_tmo);
  1742. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1743. pmbox = phba->sli.mbox_active;
  1744. mb = &pmbox->mb;
  1745. phba->sli.mbox_active = NULL;
  1746. if (pmbox->mbox_cmpl) {
  1747. mb->mbxStatus = MBX_NOT_FINISHED;
  1748. (pmbox->mbox_cmpl) (phba, pmbox);
  1749. }
  1750. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1751. }
  1752. /* Abort all the non active mailbox commands. */
  1753. spin_lock_irq(phba->host->host_lock);
  1754. pmbox = lpfc_mbox_get(phba);
  1755. while (pmbox) {
  1756. mb = &pmbox->mb;
  1757. if (pmbox->mbox_cmpl) {
  1758. mb->mbxStatus = MBX_NOT_FINISHED;
  1759. spin_unlock_irq(phba->host->host_lock);
  1760. (pmbox->mbox_cmpl) (phba, pmbox);
  1761. spin_lock_irq(phba->host->host_lock);
  1762. }
  1763. pmbox = lpfc_mbox_get(phba);
  1764. }
  1765. spin_unlock_irq(phba->host->host_lock);
  1766. return;
  1767. }
  1768. /*! lpfc_mbox_timeout
  1769. *
  1770. * \pre
  1771. * \post
  1772. * \param hba Pointer to per struct lpfc_hba structure
  1773. * \param l1 Pointer to the driver's mailbox queue.
  1774. * \return
  1775. * void
  1776. *
  1777. * \b Description:
  1778. *
  1779. * This routine handles mailbox timeout events at timer interrupt context.
  1780. */
  1781. void
  1782. lpfc_mbox_timeout(unsigned long ptr)
  1783. {
  1784. struct lpfc_hba *phba;
  1785. unsigned long iflag;
  1786. phba = (struct lpfc_hba *)ptr;
  1787. spin_lock_irqsave(phba->host->host_lock, iflag);
  1788. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1789. phba->work_hba_events |= WORKER_MBOX_TMO;
  1790. if (phba->work_wait)
  1791. wake_up(phba->work_wait);
  1792. }
  1793. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1794. }
  1795. void
  1796. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1797. {
  1798. LPFC_MBOXQ_t *pmbox;
  1799. MAILBOX_t *mb;
  1800. spin_lock_irq(phba->host->host_lock);
  1801. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1802. spin_unlock_irq(phba->host->host_lock);
  1803. return;
  1804. }
  1805. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1806. pmbox = phba->sli.mbox_active;
  1807. mb = &pmbox->mb;
  1808. /* Mbox cmd <mbxCommand> timeout */
  1809. lpfc_printf_log(phba,
  1810. KERN_ERR,
  1811. LOG_MBOX | LOG_SLI,
  1812. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1813. phba->brd_no,
  1814. mb->mbxCommand,
  1815. phba->hba_state,
  1816. phba->sli.sli_flag,
  1817. phba->sli.mbox_active);
  1818. phba->sli.mbox_active = NULL;
  1819. if (pmbox->mbox_cmpl) {
  1820. mb->mbxStatus = MBX_NOT_FINISHED;
  1821. spin_unlock_irq(phba->host->host_lock);
  1822. (pmbox->mbox_cmpl) (phba, pmbox);
  1823. spin_lock_irq(phba->host->host_lock);
  1824. }
  1825. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1826. spin_unlock_irq(phba->host->host_lock);
  1827. lpfc_mbox_abort(phba);
  1828. return;
  1829. }
  1830. int
  1831. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1832. {
  1833. MAILBOX_t *mb;
  1834. struct lpfc_sli *psli;
  1835. uint32_t status, evtctr;
  1836. uint32_t ha_copy;
  1837. int i;
  1838. unsigned long drvr_flag = 0;
  1839. volatile uint32_t word0, ldata;
  1840. void __iomem *to_slim;
  1841. psli = &phba->sli;
  1842. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1843. mb = &pmbox->mb;
  1844. status = MBX_SUCCESS;
  1845. if (phba->hba_state == LPFC_HBA_ERROR) {
  1846. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1847. /* Mbox command <mbxCommand> cannot issue */
  1848. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1849. return (MBX_NOT_FINISHED);
  1850. }
  1851. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  1852. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  1853. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1854. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1855. return (MBX_NOT_FINISHED);
  1856. }
  1857. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1858. /* Polling for a mbox command when another one is already active
  1859. * is not allowed in SLI. Also, the driver must have established
  1860. * SLI2 mode to queue and process multiple mbox commands.
  1861. */
  1862. if (flag & MBX_POLL) {
  1863. spin_unlock_irqrestore(phba->host->host_lock,
  1864. drvr_flag);
  1865. /* Mbox command <mbxCommand> cannot issue */
  1866. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1867. return (MBX_NOT_FINISHED);
  1868. }
  1869. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1870. spin_unlock_irqrestore(phba->host->host_lock,
  1871. drvr_flag);
  1872. /* Mbox command <mbxCommand> cannot issue */
  1873. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1874. return (MBX_NOT_FINISHED);
  1875. }
  1876. /* Handle STOP IOCB processing flag. This is only meaningful
  1877. * if we are not polling for mbox completion.
  1878. */
  1879. if (flag & MBX_STOP_IOCB) {
  1880. flag &= ~MBX_STOP_IOCB;
  1881. /* Now flag each ring */
  1882. for (i = 0; i < psli->num_rings; i++) {
  1883. /* If the ring is active, flag it */
  1884. if (psli->ring[i].cmdringaddr) {
  1885. psli->ring[i].flag |=
  1886. LPFC_STOP_IOCB_MBX;
  1887. }
  1888. }
  1889. }
  1890. /* Another mailbox command is still being processed, queue this
  1891. * command to be processed later.
  1892. */
  1893. lpfc_mbox_put(phba, pmbox);
  1894. /* Mbox cmd issue - BUSY */
  1895. lpfc_printf_log(phba,
  1896. KERN_INFO,
  1897. LOG_MBOX | LOG_SLI,
  1898. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1899. phba->brd_no,
  1900. mb->mbxCommand,
  1901. phba->hba_state,
  1902. psli->sli_flag,
  1903. flag);
  1904. psli->slistat.mbox_busy++;
  1905. spin_unlock_irqrestore(phba->host->host_lock,
  1906. drvr_flag);
  1907. return (MBX_BUSY);
  1908. }
  1909. /* Handle STOP IOCB processing flag. This is only meaningful
  1910. * if we are not polling for mbox completion.
  1911. */
  1912. if (flag & MBX_STOP_IOCB) {
  1913. flag &= ~MBX_STOP_IOCB;
  1914. if (flag == MBX_NOWAIT) {
  1915. /* Now flag each ring */
  1916. for (i = 0; i < psli->num_rings; i++) {
  1917. /* If the ring is active, flag it */
  1918. if (psli->ring[i].cmdringaddr) {
  1919. psli->ring[i].flag |=
  1920. LPFC_STOP_IOCB_MBX;
  1921. }
  1922. }
  1923. }
  1924. }
  1925. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1926. /* If we are not polling, we MUST be in SLI2 mode */
  1927. if (flag != MBX_POLL) {
  1928. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  1929. (mb->mbxCommand != MBX_KILL_BOARD)) {
  1930. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1931. spin_unlock_irqrestore(phba->host->host_lock,
  1932. drvr_flag);
  1933. /* Mbox command <mbxCommand> cannot issue */
  1934. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1935. return (MBX_NOT_FINISHED);
  1936. }
  1937. /* timeout active mbox command */
  1938. mod_timer(&psli->mbox_tmo, (jiffies +
  1939. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  1940. }
  1941. /* Mailbox cmd <cmd> issue */
  1942. lpfc_printf_log(phba,
  1943. KERN_INFO,
  1944. LOG_MBOX | LOG_SLI,
  1945. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1946. phba->brd_no,
  1947. mb->mbxCommand,
  1948. phba->hba_state,
  1949. psli->sli_flag,
  1950. flag);
  1951. psli->slistat.mbox_cmd++;
  1952. evtctr = psli->slistat.mbox_event;
  1953. /* next set own bit for the adapter and copy over command word */
  1954. mb->mbxOwner = OWN_CHIP;
  1955. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1956. /* First copy command data to host SLIM area */
  1957. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1958. } else {
  1959. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1960. /* copy command data into host mbox for cmpl */
  1961. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1962. MAILBOX_CMD_SIZE);
  1963. }
  1964. /* First copy mbox command data to HBA SLIM, skip past first
  1965. word */
  1966. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1967. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1968. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1969. /* Next copy over first word, with mbxOwner set */
  1970. ldata = *((volatile uint32_t *)mb);
  1971. to_slim = phba->MBslimaddr;
  1972. writel(ldata, to_slim);
  1973. readl(to_slim); /* flush */
  1974. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1975. /* switch over to host mailbox */
  1976. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1977. }
  1978. }
  1979. wmb();
  1980. /* interrupt board to doit right away */
  1981. writel(CA_MBATT, phba->CAregaddr);
  1982. readl(phba->CAregaddr); /* flush */
  1983. switch (flag) {
  1984. case MBX_NOWAIT:
  1985. /* Don't wait for it to finish, just return */
  1986. psli->mbox_active = pmbox;
  1987. break;
  1988. case MBX_POLL:
  1989. psli->mbox_active = NULL;
  1990. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1991. /* First read mbox status word */
  1992. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1993. word0 = le32_to_cpu(word0);
  1994. } else {
  1995. /* First read mbox status word */
  1996. word0 = readl(phba->MBslimaddr);
  1997. }
  1998. /* Read the HBA Host Attention Register */
  1999. ha_copy = readl(phba->HAregaddr);
  2000. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2001. i *= 1000; /* Convert to ms */
  2002. /* Wait for command to complete */
  2003. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2004. (!(ha_copy & HA_MBATT) &&
  2005. (phba->hba_state > LPFC_WARM_START))) {
  2006. if (i-- <= 0) {
  2007. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2008. spin_unlock_irqrestore(phba->host->host_lock,
  2009. drvr_flag);
  2010. return (MBX_NOT_FINISHED);
  2011. }
  2012. /* Check if we took a mbox interrupt while we were
  2013. polling */
  2014. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2015. && (evtctr != psli->slistat.mbox_event))
  2016. break;
  2017. spin_unlock_irqrestore(phba->host->host_lock,
  2018. drvr_flag);
  2019. /* Can be in interrupt context, do not sleep */
  2020. /* (or might be called with interrupts disabled) */
  2021. mdelay(1);
  2022. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  2023. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2024. /* First copy command data */
  2025. word0 = *((volatile uint32_t *)
  2026. &phba->slim2p->mbx);
  2027. word0 = le32_to_cpu(word0);
  2028. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2029. MAILBOX_t *slimmb;
  2030. volatile uint32_t slimword0;
  2031. /* Check real SLIM for any errors */
  2032. slimword0 = readl(phba->MBslimaddr);
  2033. slimmb = (MAILBOX_t *) & slimword0;
  2034. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2035. && slimmb->mbxStatus) {
  2036. psli->sli_flag &=
  2037. ~LPFC_SLI2_ACTIVE;
  2038. word0 = slimword0;
  2039. }
  2040. }
  2041. } else {
  2042. /* First copy command data */
  2043. word0 = readl(phba->MBslimaddr);
  2044. }
  2045. /* Read the HBA Host Attention Register */
  2046. ha_copy = readl(phba->HAregaddr);
  2047. }
  2048. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2049. /* copy results back to user */
  2050. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2051. MAILBOX_CMD_SIZE);
  2052. } else {
  2053. /* First copy command data */
  2054. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2055. MAILBOX_CMD_SIZE);
  2056. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2057. pmbox->context2) {
  2058. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2059. phba->MBslimaddr + DMP_RSP_OFFSET,
  2060. mb->un.varDmp.word_cnt);
  2061. }
  2062. }
  2063. writel(HA_MBATT, phba->HAregaddr);
  2064. readl(phba->HAregaddr); /* flush */
  2065. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2066. status = mb->mbxStatus;
  2067. }
  2068. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  2069. return (status);
  2070. }
  2071. static int
  2072. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2073. struct lpfc_iocbq * piocb)
  2074. {
  2075. /* Insert the caller's iocb in the txq tail for later processing. */
  2076. list_add_tail(&piocb->list, &pring->txq);
  2077. pring->txq_cnt++;
  2078. return (0);
  2079. }
  2080. static struct lpfc_iocbq *
  2081. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2082. struct lpfc_iocbq ** piocb)
  2083. {
  2084. struct lpfc_iocbq * nextiocb;
  2085. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2086. if (!nextiocb) {
  2087. nextiocb = *piocb;
  2088. *piocb = NULL;
  2089. }
  2090. return nextiocb;
  2091. }
  2092. int
  2093. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2094. struct lpfc_iocbq *piocb, uint32_t flag)
  2095. {
  2096. struct lpfc_iocbq *nextiocb;
  2097. IOCB_t *iocb;
  2098. /*
  2099. * We should never get an IOCB if we are in a < LINK_DOWN state
  2100. */
  2101. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2102. return IOCB_ERROR;
  2103. /*
  2104. * Check to see if we are blocking IOCB processing because of a
  2105. * outstanding mbox command.
  2106. */
  2107. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2108. goto iocb_busy;
  2109. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  2110. /*
  2111. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  2112. * can be issued if the link is not up.
  2113. */
  2114. switch (piocb->iocb.ulpCommand) {
  2115. case CMD_QUE_RING_BUF_CN:
  2116. case CMD_QUE_RING_BUF64_CN:
  2117. /*
  2118. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2119. * completion, iocb_cmpl MUST be 0.
  2120. */
  2121. if (piocb->iocb_cmpl)
  2122. piocb->iocb_cmpl = NULL;
  2123. /*FALLTHROUGH*/
  2124. case CMD_CREATE_XRI_CR:
  2125. break;
  2126. default:
  2127. goto iocb_busy;
  2128. }
  2129. /*
  2130. * For FCP commands, we must be in a state where we can process link
  2131. * attention events.
  2132. */
  2133. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2134. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  2135. goto iocb_busy;
  2136. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2137. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2138. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2139. if (iocb)
  2140. lpfc_sli_update_ring(phba, pring);
  2141. else
  2142. lpfc_sli_update_full_ring(phba, pring);
  2143. if (!piocb)
  2144. return IOCB_SUCCESS;
  2145. goto out_busy;
  2146. iocb_busy:
  2147. pring->stats.iocb_cmd_delay++;
  2148. out_busy:
  2149. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2150. lpfc_sli_ringtx_put(phba, pring, piocb);
  2151. return IOCB_SUCCESS;
  2152. }
  2153. return IOCB_BUSY;
  2154. }
  2155. static int
  2156. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2157. {
  2158. struct lpfc_sli *psli;
  2159. struct lpfc_sli_ring *pring;
  2160. psli = &phba->sli;
  2161. /* Adjust cmd/rsp ring iocb entries more evenly */
  2162. pring = &psli->ring[psli->fcp_ring];
  2163. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2164. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2165. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2166. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2167. pring = &psli->ring[1];
  2168. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2169. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2170. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2171. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2172. /* Setup default profile for this ring */
  2173. pring->iotag_max = 4096;
  2174. pring->num_mask = 1;
  2175. pring->prt[0].profile = 0; /* Mask 0 */
  2176. pring->prt[0].rctl = FC_UNSOL_DATA;
  2177. pring->prt[0].type = 5;
  2178. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2179. return 0;
  2180. }
  2181. int
  2182. lpfc_sli_setup(struct lpfc_hba *phba)
  2183. {
  2184. int i, totiocb = 0;
  2185. struct lpfc_sli *psli = &phba->sli;
  2186. struct lpfc_sli_ring *pring;
  2187. psli->num_rings = MAX_CONFIGURED_RINGS;
  2188. psli->sli_flag = 0;
  2189. psli->fcp_ring = LPFC_FCP_RING;
  2190. psli->next_ring = LPFC_FCP_NEXT_RING;
  2191. psli->ip_ring = LPFC_IP_RING;
  2192. psli->iocbq_lookup = NULL;
  2193. psli->iocbq_lookup_len = 0;
  2194. psli->last_iotag = 0;
  2195. for (i = 0; i < psli->num_rings; i++) {
  2196. pring = &psli->ring[i];
  2197. switch (i) {
  2198. case LPFC_FCP_RING: /* ring 0 - FCP */
  2199. /* numCiocb and numRiocb are used in config_port */
  2200. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2201. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2202. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2203. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2204. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2205. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2206. pring->iotag_ctr = 0;
  2207. pring->iotag_max =
  2208. (phba->cfg_hba_queue_depth * 2);
  2209. pring->fast_iotag = pring->iotag_max;
  2210. pring->num_mask = 0;
  2211. break;
  2212. case LPFC_IP_RING: /* ring 1 - IP */
  2213. /* numCiocb and numRiocb are used in config_port */
  2214. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2215. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2216. pring->num_mask = 0;
  2217. break;
  2218. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2219. /* numCiocb and numRiocb are used in config_port */
  2220. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2221. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2222. pring->fast_iotag = 0;
  2223. pring->iotag_ctr = 0;
  2224. pring->iotag_max = 4096;
  2225. pring->num_mask = 4;
  2226. pring->prt[0].profile = 0; /* Mask 0 */
  2227. pring->prt[0].rctl = FC_ELS_REQ;
  2228. pring->prt[0].type = FC_ELS_DATA;
  2229. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2230. lpfc_els_unsol_event;
  2231. pring->prt[1].profile = 0; /* Mask 1 */
  2232. pring->prt[1].rctl = FC_ELS_RSP;
  2233. pring->prt[1].type = FC_ELS_DATA;
  2234. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2235. lpfc_els_unsol_event;
  2236. pring->prt[2].profile = 0; /* Mask 2 */
  2237. /* NameServer Inquiry */
  2238. pring->prt[2].rctl = FC_UNSOL_CTL;
  2239. /* NameServer */
  2240. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2241. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2242. lpfc_ct_unsol_event;
  2243. pring->prt[3].profile = 0; /* Mask 3 */
  2244. /* NameServer response */
  2245. pring->prt[3].rctl = FC_SOL_CTL;
  2246. /* NameServer */
  2247. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2248. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2249. lpfc_ct_unsol_event;
  2250. break;
  2251. }
  2252. totiocb += (pring->numCiocb + pring->numRiocb);
  2253. }
  2254. if (totiocb > MAX_SLI2_IOCB) {
  2255. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2256. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2257. "%d:0462 Too many cmd / rsp ring entries in "
  2258. "SLI2 SLIM Data: x%x x%x\n",
  2259. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  2260. }
  2261. if (phba->cfg_multi_ring_support == 2)
  2262. lpfc_extra_ring_setup(phba);
  2263. return 0;
  2264. }
  2265. int
  2266. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  2267. {
  2268. struct lpfc_sli *psli;
  2269. struct lpfc_sli_ring *pring;
  2270. int i;
  2271. psli = &phba->sli;
  2272. spin_lock_irq(phba->host->host_lock);
  2273. INIT_LIST_HEAD(&psli->mboxq);
  2274. /* Initialize list headers for txq and txcmplq as double linked lists */
  2275. for (i = 0; i < psli->num_rings; i++) {
  2276. pring = &psli->ring[i];
  2277. pring->ringno = i;
  2278. pring->next_cmdidx = 0;
  2279. pring->local_getidx = 0;
  2280. pring->cmdidx = 0;
  2281. INIT_LIST_HEAD(&pring->txq);
  2282. INIT_LIST_HEAD(&pring->txcmplq);
  2283. INIT_LIST_HEAD(&pring->iocb_continueq);
  2284. INIT_LIST_HEAD(&pring->postbufq);
  2285. }
  2286. spin_unlock_irq(phba->host->host_lock);
  2287. return (1);
  2288. }
  2289. int
  2290. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2291. {
  2292. struct lpfc_sli *psli;
  2293. struct lpfc_sli_ring *pring;
  2294. LPFC_MBOXQ_t *pmb;
  2295. struct lpfc_iocbq *iocb, *next_iocb;
  2296. IOCB_t *icmd = NULL;
  2297. int i;
  2298. unsigned long flags = 0;
  2299. psli = &phba->sli;
  2300. lpfc_hba_down_prep(phba);
  2301. spin_lock_irqsave(phba->host->host_lock, flags);
  2302. for (i = 0; i < psli->num_rings; i++) {
  2303. pring = &psli->ring[i];
  2304. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2305. /*
  2306. * Error everything on the txq since these iocbs have not been
  2307. * given to the FW yet.
  2308. */
  2309. pring->txq_cnt = 0;
  2310. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2311. list_del_init(&iocb->list);
  2312. if (iocb->iocb_cmpl) {
  2313. icmd = &iocb->iocb;
  2314. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2315. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2316. spin_unlock_irqrestore(phba->host->host_lock,
  2317. flags);
  2318. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2319. spin_lock_irqsave(phba->host->host_lock, flags);
  2320. } else
  2321. lpfc_sli_release_iocbq(phba, iocb);
  2322. }
  2323. INIT_LIST_HEAD(&(pring->txq));
  2324. }
  2325. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2326. /* Return any active mbox cmds */
  2327. del_timer_sync(&psli->mbox_tmo);
  2328. spin_lock_irqsave(phba->host->host_lock, flags);
  2329. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2330. if (psli->mbox_active) {
  2331. pmb = psli->mbox_active;
  2332. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2333. if (pmb->mbox_cmpl) {
  2334. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2335. pmb->mbox_cmpl(phba,pmb);
  2336. spin_lock_irqsave(phba->host->host_lock, flags);
  2337. }
  2338. }
  2339. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2340. psli->mbox_active = NULL;
  2341. /* Return any pending mbox cmds */
  2342. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2343. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2344. if (pmb->mbox_cmpl) {
  2345. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2346. pmb->mbox_cmpl(phba,pmb);
  2347. spin_lock_irqsave(phba->host->host_lock, flags);
  2348. }
  2349. }
  2350. INIT_LIST_HEAD(&psli->mboxq);
  2351. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2352. return 1;
  2353. }
  2354. void
  2355. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2356. {
  2357. uint32_t *src = srcp;
  2358. uint32_t *dest = destp;
  2359. uint32_t ldata;
  2360. int i;
  2361. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2362. ldata = *src;
  2363. ldata = le32_to_cpu(ldata);
  2364. *dest = ldata;
  2365. src++;
  2366. dest++;
  2367. }
  2368. }
  2369. int
  2370. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2371. struct lpfc_dmabuf * mp)
  2372. {
  2373. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2374. later */
  2375. list_add_tail(&mp->list, &pring->postbufq);
  2376. pring->postbufq_cnt++;
  2377. return 0;
  2378. }
  2379. struct lpfc_dmabuf *
  2380. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2381. dma_addr_t phys)
  2382. {
  2383. struct lpfc_dmabuf *mp, *next_mp;
  2384. struct list_head *slp = &pring->postbufq;
  2385. /* Search postbufq, from the begining, looking for a match on phys */
  2386. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2387. if (mp->phys == phys) {
  2388. list_del_init(&mp->list);
  2389. pring->postbufq_cnt--;
  2390. return mp;
  2391. }
  2392. }
  2393. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2394. "%d:0410 Cannot find virtual addr for mapped buf on "
  2395. "ring %d Data x%llx x%p x%p x%x\n",
  2396. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2397. slp->next, slp->prev, pring->postbufq_cnt);
  2398. return NULL;
  2399. }
  2400. static void
  2401. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2402. struct lpfc_iocbq * rspiocb)
  2403. {
  2404. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2405. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2406. * just aborted.
  2407. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2408. */
  2409. if (cmdiocb->context2) {
  2410. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2411. /* Free the response IOCB before completing the abort
  2412. command. */
  2413. buf_ptr = NULL;
  2414. list_remove_head((&buf_ptr1->list), buf_ptr,
  2415. struct lpfc_dmabuf, list);
  2416. if (buf_ptr) {
  2417. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2418. kfree(buf_ptr);
  2419. }
  2420. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2421. kfree(buf_ptr1);
  2422. }
  2423. if (cmdiocb->context3) {
  2424. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2425. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2426. kfree(buf_ptr);
  2427. }
  2428. lpfc_sli_release_iocbq(phba, cmdiocb);
  2429. return;
  2430. }
  2431. int
  2432. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2433. struct lpfc_sli_ring * pring,
  2434. struct lpfc_iocbq * cmdiocb)
  2435. {
  2436. struct lpfc_iocbq *abtsiocbp;
  2437. IOCB_t *icmd = NULL;
  2438. IOCB_t *iabt = NULL;
  2439. /* issue ABTS for this IOCB based on iotag */
  2440. abtsiocbp = lpfc_sli_get_iocbq(phba);
  2441. if (abtsiocbp == NULL)
  2442. return 0;
  2443. iabt = &abtsiocbp->iocb;
  2444. icmd = &cmdiocb->iocb;
  2445. switch (icmd->ulpCommand) {
  2446. case CMD_ELS_REQUEST64_CR:
  2447. /* Even though we abort the ELS command, the firmware may access
  2448. * the BPL or other resources before it processes our
  2449. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2450. * resources till the actual abort request completes.
  2451. */
  2452. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2453. abtsiocbp->context2 = cmdiocb->context2;
  2454. abtsiocbp->context3 = cmdiocb->context3;
  2455. cmdiocb->context2 = NULL;
  2456. cmdiocb->context3 = NULL;
  2457. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2458. break;
  2459. default:
  2460. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2461. return 0;
  2462. }
  2463. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2464. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2465. iabt->ulpLe = 1;
  2466. iabt->ulpClass = CLASS3;
  2467. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2468. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2469. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2470. return 0;
  2471. }
  2472. return 1;
  2473. }
  2474. static int
  2475. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  2476. uint64_t lun_id, uint32_t ctx,
  2477. lpfc_ctx_cmd ctx_cmd)
  2478. {
  2479. struct lpfc_scsi_buf *lpfc_cmd;
  2480. struct scsi_cmnd *cmnd;
  2481. int rc = 1;
  2482. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  2483. return rc;
  2484. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  2485. cmnd = lpfc_cmd->pCmd;
  2486. if (cmnd == NULL)
  2487. return rc;
  2488. switch (ctx_cmd) {
  2489. case LPFC_CTX_LUN:
  2490. if ((cmnd->device->id == tgt_id) &&
  2491. (cmnd->device->lun == lun_id))
  2492. rc = 0;
  2493. break;
  2494. case LPFC_CTX_TGT:
  2495. if (cmnd->device->id == tgt_id)
  2496. rc = 0;
  2497. break;
  2498. case LPFC_CTX_CTX:
  2499. if (iocbq->iocb.ulpContext == ctx)
  2500. rc = 0;
  2501. break;
  2502. case LPFC_CTX_HOST:
  2503. rc = 0;
  2504. break;
  2505. default:
  2506. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2507. __FUNCTION__, ctx_cmd);
  2508. break;
  2509. }
  2510. return rc;
  2511. }
  2512. int
  2513. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2514. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2515. {
  2516. struct lpfc_iocbq *iocbq;
  2517. int sum, i;
  2518. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  2519. iocbq = phba->sli.iocbq_lookup[i];
  2520. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2521. 0, ctx_cmd) == 0)
  2522. sum++;
  2523. }
  2524. return sum;
  2525. }
  2526. void
  2527. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2528. struct lpfc_iocbq * rspiocb)
  2529. {
  2530. spin_lock_irq(phba->host->host_lock);
  2531. lpfc_sli_release_iocbq(phba, cmdiocb);
  2532. spin_unlock_irq(phba->host->host_lock);
  2533. return;
  2534. }
  2535. int
  2536. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2537. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2538. lpfc_ctx_cmd abort_cmd)
  2539. {
  2540. struct lpfc_iocbq *iocbq;
  2541. struct lpfc_iocbq *abtsiocb;
  2542. IOCB_t *cmd = NULL;
  2543. int errcnt = 0, ret_val = 0;
  2544. int i;
  2545. for (i = 1; i <= phba->sli.last_iotag; i++) {
  2546. iocbq = phba->sli.iocbq_lookup[i];
  2547. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2548. 0, abort_cmd) != 0)
  2549. continue;
  2550. /* issue ABTS for this IOCB based on iotag */
  2551. abtsiocb = lpfc_sli_get_iocbq(phba);
  2552. if (abtsiocb == NULL) {
  2553. errcnt++;
  2554. continue;
  2555. }
  2556. cmd = &iocbq->iocb;
  2557. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2558. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2559. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2560. abtsiocb->iocb.ulpLe = 1;
  2561. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2562. if (phba->hba_state >= LPFC_LINK_UP)
  2563. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2564. else
  2565. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2566. /* Setup callback routine and issue the command. */
  2567. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2568. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2569. if (ret_val == IOCB_ERROR) {
  2570. lpfc_sli_release_iocbq(phba, abtsiocb);
  2571. errcnt++;
  2572. continue;
  2573. }
  2574. }
  2575. return errcnt;
  2576. }
  2577. static void
  2578. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2579. struct lpfc_iocbq *cmdiocbq,
  2580. struct lpfc_iocbq *rspiocbq)
  2581. {
  2582. wait_queue_head_t *pdone_q;
  2583. unsigned long iflags;
  2584. spin_lock_irqsave(phba->host->host_lock, iflags);
  2585. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2586. if (cmdiocbq->context2 && rspiocbq)
  2587. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2588. &rspiocbq->iocb, sizeof(IOCB_t));
  2589. pdone_q = cmdiocbq->context_un.wait_queue;
  2590. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2591. if (pdone_q)
  2592. wake_up(pdone_q);
  2593. return;
  2594. }
  2595. /*
  2596. * Issue the caller's iocb and wait for its completion, but no longer than the
  2597. * caller's timeout. Note that iocb_flags is cleared before the
  2598. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2599. * definition this is a wait function.
  2600. */
  2601. int
  2602. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2603. struct lpfc_sli_ring * pring,
  2604. struct lpfc_iocbq * piocb,
  2605. struct lpfc_iocbq * prspiocbq,
  2606. uint32_t timeout)
  2607. {
  2608. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2609. long timeleft, timeout_req = 0;
  2610. int retval = IOCB_SUCCESS;
  2611. uint32_t creg_val;
  2612. /*
  2613. * If the caller has provided a response iocbq buffer, then context2
  2614. * is NULL or its an error.
  2615. */
  2616. if (prspiocbq) {
  2617. if (piocb->context2)
  2618. return IOCB_ERROR;
  2619. piocb->context2 = prspiocbq;
  2620. }
  2621. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2622. piocb->context_un.wait_queue = &done_q;
  2623. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2624. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2625. creg_val = readl(phba->HCregaddr);
  2626. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  2627. writel(creg_val, phba->HCregaddr);
  2628. readl(phba->HCregaddr); /* flush */
  2629. }
  2630. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2631. if (retval == IOCB_SUCCESS) {
  2632. timeout_req = timeout * HZ;
  2633. spin_unlock_irq(phba->host->host_lock);
  2634. timeleft = wait_event_timeout(done_q,
  2635. piocb->iocb_flag & LPFC_IO_WAKE,
  2636. timeout_req);
  2637. spin_lock_irq(phba->host->host_lock);
  2638. if (timeleft == 0) {
  2639. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2640. "%d:0338 IOCB wait timeout error - no "
  2641. "wake response Data x%x\n",
  2642. phba->brd_no, timeout);
  2643. retval = IOCB_TIMEDOUT;
  2644. } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
  2645. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2646. "%d:0330 IOCB wake NOT set, "
  2647. "Data x%x x%lx\n", phba->brd_no,
  2648. timeout, (timeleft / jiffies));
  2649. retval = IOCB_TIMEDOUT;
  2650. } else {
  2651. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2652. "%d:0331 IOCB wake signaled\n",
  2653. phba->brd_no);
  2654. }
  2655. } else {
  2656. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2657. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2658. phba->brd_no, retval);
  2659. retval = IOCB_ERROR;
  2660. }
  2661. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2662. creg_val = readl(phba->HCregaddr);
  2663. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  2664. writel(creg_val, phba->HCregaddr);
  2665. readl(phba->HCregaddr); /* flush */
  2666. }
  2667. if (prspiocbq)
  2668. piocb->context2 = NULL;
  2669. piocb->context_un.wait_queue = NULL;
  2670. piocb->iocb_cmpl = NULL;
  2671. return retval;
  2672. }
  2673. int
  2674. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2675. uint32_t timeout)
  2676. {
  2677. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2678. DECLARE_WAITQUEUE(wq_entry, current);
  2679. uint32_t timeleft = 0;
  2680. int retval;
  2681. /* The caller must leave context1 empty. */
  2682. if (pmboxq->context1 != 0) {
  2683. return (MBX_NOT_FINISHED);
  2684. }
  2685. /* setup wake call as IOCB callback */
  2686. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2687. /* setup context field to pass wait_queue pointer to wake function */
  2688. pmboxq->context1 = &done_q;
  2689. /* start to sleep before we wait, to avoid races */
  2690. set_current_state(TASK_INTERRUPTIBLE);
  2691. add_wait_queue(&done_q, &wq_entry);
  2692. /* now issue the command */
  2693. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2694. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2695. timeleft = schedule_timeout(timeout * HZ);
  2696. pmboxq->context1 = NULL;
  2697. /* if schedule_timeout returns 0, we timed out and were not
  2698. woken up */
  2699. if ((timeleft == 0) || signal_pending(current))
  2700. retval = MBX_TIMEOUT;
  2701. else
  2702. retval = MBX_SUCCESS;
  2703. }
  2704. set_current_state(TASK_RUNNING);
  2705. remove_wait_queue(&done_q, &wq_entry);
  2706. return retval;
  2707. }
  2708. int
  2709. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  2710. {
  2711. int i = 0;
  2712. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !phba->stopped) {
  2713. if (i++ > LPFC_MBOX_TMO * 1000)
  2714. return 1;
  2715. if (lpfc_sli_handle_mb_event(phba) == 0)
  2716. i = 0;
  2717. msleep(1);
  2718. }
  2719. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  2720. }
  2721. irqreturn_t
  2722. lpfc_intr_handler(int irq, void *dev_id)
  2723. {
  2724. struct lpfc_hba *phba;
  2725. uint32_t ha_copy;
  2726. uint32_t work_ha_copy;
  2727. unsigned long status;
  2728. int i;
  2729. uint32_t control;
  2730. /*
  2731. * Get the driver's phba structure from the dev_id and
  2732. * assume the HBA is not interrupting.
  2733. */
  2734. phba = (struct lpfc_hba *) dev_id;
  2735. if (unlikely(!phba))
  2736. return IRQ_NONE;
  2737. phba->sli.slistat.sli_intr++;
  2738. /*
  2739. * Call the HBA to see if it is interrupting. If not, don't claim
  2740. * the interrupt
  2741. */
  2742. /* Ignore all interrupts during initialization. */
  2743. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2744. return IRQ_NONE;
  2745. /*
  2746. * Read host attention register to determine interrupt source
  2747. * Clear Attention Sources, except Error Attention (to
  2748. * preserve status) and Link Attention
  2749. */
  2750. spin_lock(phba->host->host_lock);
  2751. ha_copy = readl(phba->HAregaddr);
  2752. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2753. readl(phba->HAregaddr); /* flush */
  2754. spin_unlock(phba->host->host_lock);
  2755. if (unlikely(!ha_copy))
  2756. return IRQ_NONE;
  2757. work_ha_copy = ha_copy & phba->work_ha_mask;
  2758. if (unlikely(work_ha_copy)) {
  2759. if (work_ha_copy & HA_LATT) {
  2760. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2761. /*
  2762. * Turn off Link Attention interrupts
  2763. * until CLEAR_LA done
  2764. */
  2765. spin_lock(phba->host->host_lock);
  2766. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2767. control = readl(phba->HCregaddr);
  2768. control &= ~HC_LAINT_ENA;
  2769. writel(control, phba->HCregaddr);
  2770. readl(phba->HCregaddr); /* flush */
  2771. spin_unlock(phba->host->host_lock);
  2772. }
  2773. else
  2774. work_ha_copy &= ~HA_LATT;
  2775. }
  2776. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2777. for (i = 0; i < phba->sli.num_rings; i++) {
  2778. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2779. /*
  2780. * Turn off Slow Rings interrupts
  2781. */
  2782. spin_lock(phba->host->host_lock);
  2783. control = readl(phba->HCregaddr);
  2784. control &= ~(HC_R0INT_ENA << i);
  2785. writel(control, phba->HCregaddr);
  2786. readl(phba->HCregaddr); /* flush */
  2787. spin_unlock(phba->host->host_lock);
  2788. }
  2789. }
  2790. }
  2791. if (work_ha_copy & HA_ERATT) {
  2792. phba->hba_state = LPFC_HBA_ERROR;
  2793. /*
  2794. * There was a link/board error. Read the
  2795. * status register to retrieve the error event
  2796. * and process it.
  2797. */
  2798. phba->sli.slistat.err_attn_event++;
  2799. /* Save status info */
  2800. phba->work_hs = readl(phba->HSregaddr);
  2801. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2802. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2803. /* Clear Chip error bit */
  2804. writel(HA_ERATT, phba->HAregaddr);
  2805. readl(phba->HAregaddr); /* flush */
  2806. phba->stopped = 1;
  2807. }
  2808. spin_lock(phba->host->host_lock);
  2809. phba->work_ha |= work_ha_copy;
  2810. if (phba->work_wait)
  2811. wake_up(phba->work_wait);
  2812. spin_unlock(phba->host->host_lock);
  2813. }
  2814. ha_copy &= ~(phba->work_ha_mask);
  2815. /*
  2816. * Process all events on FCP ring. Take the optimized path for
  2817. * FCP IO. Any other IO is slow path and is handled by
  2818. * the worker thread.
  2819. */
  2820. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2821. status >>= (4*LPFC_FCP_RING);
  2822. if (status & HA_RXATT)
  2823. lpfc_sli_handle_fast_ring_event(phba,
  2824. &phba->sli.ring[LPFC_FCP_RING],
  2825. status);
  2826. return IRQ_HANDLED;
  2827. } /* lpfc_intr_handler */