aic94xx_sds.c 27 KB

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  1. /*
  2. * Aic94xx SAS/SATA driver access to shared data structures and memory
  3. * maps.
  4. *
  5. * Copyright (C) 2005 Adaptec, Inc. All rights reserved.
  6. * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
  7. *
  8. * This file is licensed under GPLv2.
  9. *
  10. * This file is part of the aic94xx driver.
  11. *
  12. * The aic94xx driver is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; version 2 of the
  15. * License.
  16. *
  17. * The aic94xx driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  20. * General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with the aic94xx driver; if not, write to the Free Software
  24. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  25. *
  26. */
  27. #include <linux/pci.h>
  28. #include <linux/delay.h>
  29. #include "aic94xx.h"
  30. #include "aic94xx_reg.h"
  31. /* ---------- OCM stuff ---------- */
  32. struct asd_ocm_dir_ent {
  33. u8 type;
  34. u8 offs[3];
  35. u8 _r1;
  36. u8 size[3];
  37. } __attribute__ ((packed));
  38. struct asd_ocm_dir {
  39. char sig[2];
  40. u8 _r1[2];
  41. u8 major; /* 0 */
  42. u8 minor; /* 0 */
  43. u8 _r2;
  44. u8 num_de;
  45. struct asd_ocm_dir_ent entry[15];
  46. } __attribute__ ((packed));
  47. #define OCM_DE_OCM_DIR 0x00
  48. #define OCM_DE_WIN_DRVR 0x01
  49. #define OCM_DE_BIOS_CHIM 0x02
  50. #define OCM_DE_RAID_ENGN 0x03
  51. #define OCM_DE_BIOS_INTL 0x04
  52. #define OCM_DE_BIOS_CHIM_OSM 0x05
  53. #define OCM_DE_BIOS_CHIM_DYNAMIC 0x06
  54. #define OCM_DE_ADDC2C_RES0 0x07
  55. #define OCM_DE_ADDC2C_RES1 0x08
  56. #define OCM_DE_ADDC2C_RES2 0x09
  57. #define OCM_DE_ADDC2C_RES3 0x0A
  58. #define OCM_INIT_DIR_ENTRIES 5
  59. /***************************************************************************
  60. * OCM dircetory default
  61. ***************************************************************************/
  62. static struct asd_ocm_dir OCMDirInit =
  63. {
  64. .sig = {0x4D, 0x4F}, /* signature */
  65. .num_de = OCM_INIT_DIR_ENTRIES, /* no. of directory entries */
  66. };
  67. /***************************************************************************
  68. * OCM dircetory Entries default
  69. ***************************************************************************/
  70. static struct asd_ocm_dir_ent OCMDirEntriesInit[OCM_INIT_DIR_ENTRIES] =
  71. {
  72. {
  73. .type = (OCM_DE_ADDC2C_RES0), /* Entry type */
  74. .offs = {128}, /* Offset */
  75. .size = {0, 4}, /* size */
  76. },
  77. {
  78. .type = (OCM_DE_ADDC2C_RES1), /* Entry type */
  79. .offs = {128, 4}, /* Offset */
  80. .size = {0, 4}, /* size */
  81. },
  82. {
  83. .type = (OCM_DE_ADDC2C_RES2), /* Entry type */
  84. .offs = {128, 8}, /* Offset */
  85. .size = {0, 4}, /* size */
  86. },
  87. {
  88. .type = (OCM_DE_ADDC2C_RES3), /* Entry type */
  89. .offs = {128, 12}, /* Offset */
  90. .size = {0, 4}, /* size */
  91. },
  92. {
  93. .type = (OCM_DE_WIN_DRVR), /* Entry type */
  94. .offs = {128, 16}, /* Offset */
  95. .size = {128, 235, 1}, /* size */
  96. },
  97. };
  98. struct asd_bios_chim_struct {
  99. char sig[4];
  100. u8 major; /* 1 */
  101. u8 minor; /* 0 */
  102. u8 bios_major;
  103. u8 bios_minor;
  104. __le32 bios_build;
  105. u8 flags;
  106. u8 pci_slot;
  107. __le16 ue_num;
  108. __le16 ue_size;
  109. u8 _r[14];
  110. /* The unit element array is right here.
  111. */
  112. } __attribute__ ((packed));
  113. /**
  114. * asd_read_ocm_seg - read an on chip memory (OCM) segment
  115. * @asd_ha: pointer to the host adapter structure
  116. * @buffer: where to write the read data
  117. * @offs: offset into OCM where to read from
  118. * @size: how many bytes to read
  119. *
  120. * Return the number of bytes not read. Return 0 on success.
  121. */
  122. static int asd_read_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer,
  123. u32 offs, int size)
  124. {
  125. u8 *p = buffer;
  126. if (unlikely(asd_ha->iospace))
  127. asd_read_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size);
  128. else {
  129. for ( ; size > 0; size--, offs++, p++)
  130. *p = asd_read_ocm_byte(asd_ha, offs);
  131. }
  132. return size;
  133. }
  134. static int asd_read_ocm_dir(struct asd_ha_struct *asd_ha,
  135. struct asd_ocm_dir *dir, u32 offs)
  136. {
  137. int err = asd_read_ocm_seg(asd_ha, dir, offs, sizeof(*dir));
  138. if (err) {
  139. ASD_DPRINTK("couldn't read ocm segment\n");
  140. return err;
  141. }
  142. if (dir->sig[0] != 'M' || dir->sig[1] != 'O') {
  143. ASD_DPRINTK("no valid dir signature(%c%c) at start of OCM\n",
  144. dir->sig[0], dir->sig[1]);
  145. return -ENOENT;
  146. }
  147. if (dir->major != 0) {
  148. asd_printk("unsupported major version of ocm dir:0x%x\n",
  149. dir->major);
  150. return -ENOENT;
  151. }
  152. dir->num_de &= 0xf;
  153. return 0;
  154. }
  155. /**
  156. * asd_write_ocm_seg - write an on chip memory (OCM) segment
  157. * @asd_ha: pointer to the host adapter structure
  158. * @buffer: where to read the write data
  159. * @offs: offset into OCM to write to
  160. * @size: how many bytes to write
  161. *
  162. * Return the number of bytes not written. Return 0 on success.
  163. */
  164. static void asd_write_ocm_seg(struct asd_ha_struct *asd_ha, void *buffer,
  165. u32 offs, int size)
  166. {
  167. u8 *p = buffer;
  168. if (unlikely(asd_ha->iospace))
  169. asd_write_reg_string(asd_ha, buffer, offs+OCM_BASE_ADDR, size);
  170. else {
  171. for ( ; size > 0; size--, offs++, p++)
  172. asd_write_ocm_byte(asd_ha, offs, *p);
  173. }
  174. return;
  175. }
  176. #define THREE_TO_NUM(X) ((X)[0] | ((X)[1] << 8) | ((X)[2] << 16))
  177. static int asd_find_dir_entry(struct asd_ocm_dir *dir, u8 type,
  178. u32 *offs, u32 *size)
  179. {
  180. int i;
  181. struct asd_ocm_dir_ent *ent;
  182. for (i = 0; i < dir->num_de; i++) {
  183. if (dir->entry[i].type == type)
  184. break;
  185. }
  186. if (i >= dir->num_de)
  187. return -ENOENT;
  188. ent = &dir->entry[i];
  189. *offs = (u32) THREE_TO_NUM(ent->offs);
  190. *size = (u32) THREE_TO_NUM(ent->size);
  191. return 0;
  192. }
  193. #define OCM_BIOS_CHIM_DE 2
  194. #define BC_BIOS_PRESENT 1
  195. static int asd_get_bios_chim(struct asd_ha_struct *asd_ha,
  196. struct asd_ocm_dir *dir)
  197. {
  198. int err;
  199. struct asd_bios_chim_struct *bc_struct;
  200. u32 offs, size;
  201. err = asd_find_dir_entry(dir, OCM_BIOS_CHIM_DE, &offs, &size);
  202. if (err) {
  203. ASD_DPRINTK("couldn't find BIOS_CHIM dir ent\n");
  204. goto out;
  205. }
  206. err = -ENOMEM;
  207. bc_struct = kmalloc(sizeof(*bc_struct), GFP_KERNEL);
  208. if (!bc_struct) {
  209. asd_printk("no memory for bios_chim struct\n");
  210. goto out;
  211. }
  212. err = asd_read_ocm_seg(asd_ha, (void *)bc_struct, offs,
  213. sizeof(*bc_struct));
  214. if (err) {
  215. ASD_DPRINTK("couldn't read ocm segment\n");
  216. goto out2;
  217. }
  218. if (strncmp(bc_struct->sig, "SOIB", 4)
  219. && strncmp(bc_struct->sig, "IPSA", 4)) {
  220. ASD_DPRINTK("BIOS_CHIM entry has no valid sig(%c%c%c%c)\n",
  221. bc_struct->sig[0], bc_struct->sig[1],
  222. bc_struct->sig[2], bc_struct->sig[3]);
  223. err = -ENOENT;
  224. goto out2;
  225. }
  226. if (bc_struct->major != 1) {
  227. asd_printk("BIOS_CHIM unsupported major version:0x%x\n",
  228. bc_struct->major);
  229. err = -ENOENT;
  230. goto out2;
  231. }
  232. if (bc_struct->flags & BC_BIOS_PRESENT) {
  233. asd_ha->hw_prof.bios.present = 1;
  234. asd_ha->hw_prof.bios.maj = bc_struct->bios_major;
  235. asd_ha->hw_prof.bios.min = bc_struct->bios_minor;
  236. asd_ha->hw_prof.bios.bld = le32_to_cpu(bc_struct->bios_build);
  237. ASD_DPRINTK("BIOS present (%d,%d), %d\n",
  238. asd_ha->hw_prof.bios.maj,
  239. asd_ha->hw_prof.bios.min,
  240. asd_ha->hw_prof.bios.bld);
  241. }
  242. asd_ha->hw_prof.ue.num = le16_to_cpu(bc_struct->ue_num);
  243. asd_ha->hw_prof.ue.size= le16_to_cpu(bc_struct->ue_size);
  244. ASD_DPRINTK("ue num:%d, ue size:%d\n", asd_ha->hw_prof.ue.num,
  245. asd_ha->hw_prof.ue.size);
  246. size = asd_ha->hw_prof.ue.num * asd_ha->hw_prof.ue.size;
  247. if (size > 0) {
  248. err = -ENOMEM;
  249. asd_ha->hw_prof.ue.area = kmalloc(size, GFP_KERNEL);
  250. if (!asd_ha->hw_prof.ue.area)
  251. goto out2;
  252. err = asd_read_ocm_seg(asd_ha, (void *)asd_ha->hw_prof.ue.area,
  253. offs + sizeof(*bc_struct), size);
  254. if (err) {
  255. kfree(asd_ha->hw_prof.ue.area);
  256. asd_ha->hw_prof.ue.area = NULL;
  257. asd_ha->hw_prof.ue.num = 0;
  258. asd_ha->hw_prof.ue.size = 0;
  259. ASD_DPRINTK("couldn't read ue entries(%d)\n", err);
  260. }
  261. }
  262. out2:
  263. kfree(bc_struct);
  264. out:
  265. return err;
  266. }
  267. static void
  268. asd_hwi_initialize_ocm_dir (struct asd_ha_struct *asd_ha)
  269. {
  270. int i;
  271. /* Zero OCM */
  272. for (i = 0; i < OCM_MAX_SIZE; i += 4)
  273. asd_write_ocm_dword(asd_ha, i, 0);
  274. /* Write Dir */
  275. asd_write_ocm_seg(asd_ha, &OCMDirInit, 0,
  276. sizeof(struct asd_ocm_dir));
  277. /* Write Dir Entries */
  278. for (i = 0; i < OCM_INIT_DIR_ENTRIES; i++)
  279. asd_write_ocm_seg(asd_ha, &OCMDirEntriesInit[i],
  280. sizeof(struct asd_ocm_dir) +
  281. (i * sizeof(struct asd_ocm_dir_ent))
  282. , sizeof(struct asd_ocm_dir_ent));
  283. }
  284. static int
  285. asd_hwi_check_ocm_access (struct asd_ha_struct *asd_ha)
  286. {
  287. struct pci_dev *pcidev = asd_ha->pcidev;
  288. u32 reg;
  289. int err = 0;
  290. u32 v;
  291. /* check if OCM has been initialized by BIOS */
  292. reg = asd_read_reg_dword(asd_ha, EXSICNFGR);
  293. if (!(reg & OCMINITIALIZED)) {
  294. err = pci_read_config_dword(pcidev, PCIC_INTRPT_STAT, &v);
  295. if (err) {
  296. asd_printk("couldn't access PCIC_INTRPT_STAT of %s\n",
  297. pci_name(pcidev));
  298. goto out;
  299. }
  300. printk(KERN_INFO "OCM is not initialized by BIOS,"
  301. "reinitialize it and ignore it, current IntrptStatus"
  302. "is 0x%x\n", v);
  303. if (v)
  304. err = pci_write_config_dword(pcidev,
  305. PCIC_INTRPT_STAT, v);
  306. if (err) {
  307. asd_printk("couldn't write PCIC_INTRPT_STAT of %s\n",
  308. pci_name(pcidev));
  309. goto out;
  310. }
  311. asd_hwi_initialize_ocm_dir(asd_ha);
  312. }
  313. out:
  314. return err;
  315. }
  316. /**
  317. * asd_read_ocm - read on chip memory (OCM)
  318. * @asd_ha: pointer to the host adapter structure
  319. */
  320. int asd_read_ocm(struct asd_ha_struct *asd_ha)
  321. {
  322. int err;
  323. struct asd_ocm_dir *dir;
  324. if (asd_hwi_check_ocm_access(asd_ha))
  325. return -1;
  326. dir = kmalloc(sizeof(*dir), GFP_KERNEL);
  327. if (!dir) {
  328. asd_printk("no memory for ocm dir\n");
  329. return -ENOMEM;
  330. }
  331. err = asd_read_ocm_dir(asd_ha, dir, 0);
  332. if (err)
  333. goto out;
  334. err = asd_get_bios_chim(asd_ha, dir);
  335. out:
  336. kfree(dir);
  337. return err;
  338. }
  339. /* ---------- FLASH stuff ---------- */
  340. #define FLASH_RESET 0xF0
  341. #define FLASH_SIZE 0x200000
  342. #define FLASH_DIR_COOKIE "*** ADAPTEC FLASH DIRECTORY *** "
  343. #define FLASH_NEXT_ENTRY_OFFS 0x2000
  344. #define FLASH_MAX_DIR_ENTRIES 32
  345. #define FLASH_DE_TYPE_MASK 0x3FFFFFFF
  346. #define FLASH_DE_MS 0x120
  347. #define FLASH_DE_CTRL_A_USER 0xE0
  348. struct asd_flash_de {
  349. __le32 type;
  350. __le32 offs;
  351. __le32 pad_size;
  352. __le32 image_size;
  353. __le32 chksum;
  354. u8 _r[12];
  355. u8 version[32];
  356. } __attribute__ ((packed));
  357. struct asd_flash_dir {
  358. u8 cookie[32];
  359. __le32 rev; /* 2 */
  360. __le32 chksum;
  361. __le32 chksum_antidote;
  362. __le32 bld;
  363. u8 bld_id[32]; /* build id data */
  364. u8 ver_data[32]; /* date and time of build */
  365. __le32 ae_mask;
  366. __le32 v_mask;
  367. __le32 oc_mask;
  368. u8 _r[20];
  369. struct asd_flash_de dir_entry[FLASH_MAX_DIR_ENTRIES];
  370. } __attribute__ ((packed));
  371. struct asd_manuf_sec {
  372. char sig[2]; /* 'S', 'M' */
  373. u16 offs_next;
  374. u8 maj; /* 0 */
  375. u8 min; /* 0 */
  376. u16 chksum;
  377. u16 size;
  378. u8 _r[6];
  379. u8 sas_addr[SAS_ADDR_SIZE];
  380. u8 pcba_sn[ASD_PCBA_SN_SIZE];
  381. /* Here start the other segments */
  382. u8 linked_list[0];
  383. } __attribute__ ((packed));
  384. struct asd_manuf_phy_desc {
  385. u8 state; /* low 4 bits */
  386. #define MS_PHY_STATE_ENABLEABLE 0
  387. #define MS_PHY_STATE_REPORTED 1
  388. #define MS_PHY_STATE_HIDDEN 2
  389. u8 phy_id;
  390. u16 _r;
  391. u8 phy_control_0; /* mode 5 reg 0x160 */
  392. u8 phy_control_1; /* mode 5 reg 0x161 */
  393. u8 phy_control_2; /* mode 5 reg 0x162 */
  394. u8 phy_control_3; /* mode 5 reg 0x163 */
  395. } __attribute__ ((packed));
  396. struct asd_manuf_phy_param {
  397. char sig[2]; /* 'P', 'M' */
  398. u16 next;
  399. u8 maj; /* 0 */
  400. u8 min; /* 2 */
  401. u8 num_phy_desc; /* 8 */
  402. u8 phy_desc_size; /* 8 */
  403. u8 _r[3];
  404. u8 usage_model_id;
  405. u32 _r2;
  406. struct asd_manuf_phy_desc phy_desc[ASD_MAX_PHYS];
  407. } __attribute__ ((packed));
  408. #if 0
  409. static const char *asd_sb_type[] = {
  410. "unknown",
  411. "SGPIO",
  412. [2 ... 0x7F] = "unknown",
  413. [0x80] = "ADPT_I2C",
  414. [0x81 ... 0xFF] = "VENDOR_UNIQUExx"
  415. };
  416. #endif
  417. struct asd_ms_sb_desc {
  418. u8 type;
  419. u8 node_desc_index;
  420. u8 conn_desc_index;
  421. u8 _recvd[0];
  422. } __attribute__ ((packed));
  423. #if 0
  424. static const char *asd_conn_type[] = {
  425. [0 ... 7] = "unknown",
  426. "SFF8470",
  427. "SFF8482",
  428. "SFF8484",
  429. [0x80] = "PCIX_DAUGHTER0",
  430. [0x81] = "SAS_DAUGHTER0",
  431. [0x82 ... 0xFF] = "VENDOR_UNIQUExx"
  432. };
  433. static const char *asd_conn_location[] = {
  434. "unknown",
  435. "internal",
  436. "external",
  437. "board_to_board",
  438. };
  439. #endif
  440. struct asd_ms_conn_desc {
  441. u8 type;
  442. u8 location;
  443. u8 num_sideband_desc;
  444. u8 size_sideband_desc;
  445. u32 _resvd;
  446. u8 name[16];
  447. struct asd_ms_sb_desc sb_desc[0];
  448. } __attribute__ ((packed));
  449. struct asd_nd_phy_desc {
  450. u8 vp_attch_type;
  451. u8 attch_specific[0];
  452. } __attribute__ ((packed));
  453. #if 0
  454. static const char *asd_node_type[] = {
  455. "IOP",
  456. "IO_CONTROLLER",
  457. "EXPANDER",
  458. "PORT_MULTIPLIER",
  459. "PORT_MULTIPLEXER",
  460. "MULTI_DROP_I2C_BUS",
  461. };
  462. #endif
  463. struct asd_ms_node_desc {
  464. u8 type;
  465. u8 num_phy_desc;
  466. u8 size_phy_desc;
  467. u8 _resvd;
  468. u8 name[16];
  469. struct asd_nd_phy_desc phy_desc[0];
  470. } __attribute__ ((packed));
  471. struct asd_ms_conn_map {
  472. char sig[2]; /* 'M', 'C' */
  473. __le16 next;
  474. u8 maj; /* 0 */
  475. u8 min; /* 0 */
  476. __le16 cm_size; /* size of this struct */
  477. u8 num_conn;
  478. u8 conn_size;
  479. u8 num_nodes;
  480. u8 usage_model_id;
  481. u32 _resvd;
  482. struct asd_ms_conn_desc conn_desc[0];
  483. struct asd_ms_node_desc node_desc[0];
  484. } __attribute__ ((packed));
  485. struct asd_ctrla_phy_entry {
  486. u8 sas_addr[SAS_ADDR_SIZE];
  487. u8 sas_link_rates; /* max in hi bits, min in low bits */
  488. u8 flags;
  489. u8 sata_link_rates;
  490. u8 _r[5];
  491. } __attribute__ ((packed));
  492. struct asd_ctrla_phy_settings {
  493. u8 id0; /* P'h'y */
  494. u8 _r;
  495. u16 next;
  496. u8 num_phys; /* number of PHYs in the PCI function */
  497. u8 _r2[3];
  498. struct asd_ctrla_phy_entry phy_ent[ASD_MAX_PHYS];
  499. } __attribute__ ((packed));
  500. struct asd_ll_el {
  501. u8 id0;
  502. u8 id1;
  503. __le16 next;
  504. u8 something_here[0];
  505. } __attribute__ ((packed));
  506. static int asd_poll_flash(struct asd_ha_struct *asd_ha)
  507. {
  508. int c;
  509. u8 d;
  510. for (c = 5000; c > 0; c--) {
  511. d = asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar);
  512. d ^= asd_read_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar);
  513. if (!d)
  514. return 0;
  515. udelay(5);
  516. }
  517. return -ENOENT;
  518. }
  519. static int asd_reset_flash(struct asd_ha_struct *asd_ha)
  520. {
  521. int err;
  522. err = asd_poll_flash(asd_ha);
  523. if (err)
  524. return err;
  525. asd_write_reg_byte(asd_ha, asd_ha->hw_prof.flash.bar, FLASH_RESET);
  526. err = asd_poll_flash(asd_ha);
  527. return err;
  528. }
  529. static inline int asd_read_flash_seg(struct asd_ha_struct *asd_ha,
  530. void *buffer, u32 offs, int size)
  531. {
  532. asd_read_reg_string(asd_ha, buffer, asd_ha->hw_prof.flash.bar+offs,
  533. size);
  534. return 0;
  535. }
  536. /**
  537. * asd_find_flash_dir - finds and reads the flash directory
  538. * @asd_ha: pointer to the host adapter structure
  539. * @flash_dir: pointer to flash directory structure
  540. *
  541. * If found, the flash directory segment will be copied to
  542. * @flash_dir. Return 1 if found, 0 if not.
  543. */
  544. static int asd_find_flash_dir(struct asd_ha_struct *asd_ha,
  545. struct asd_flash_dir *flash_dir)
  546. {
  547. u32 v;
  548. for (v = 0; v < FLASH_SIZE; v += FLASH_NEXT_ENTRY_OFFS) {
  549. asd_read_flash_seg(asd_ha, flash_dir, v,
  550. sizeof(FLASH_DIR_COOKIE)-1);
  551. if (memcmp(flash_dir->cookie, FLASH_DIR_COOKIE,
  552. sizeof(FLASH_DIR_COOKIE)-1) == 0) {
  553. asd_ha->hw_prof.flash.dir_offs = v;
  554. asd_read_flash_seg(asd_ha, flash_dir, v,
  555. sizeof(*flash_dir));
  556. return 1;
  557. }
  558. }
  559. return 0;
  560. }
  561. static int asd_flash_getid(struct asd_ha_struct *asd_ha)
  562. {
  563. int err = 0;
  564. u32 reg;
  565. reg = asd_read_reg_dword(asd_ha, EXSICNFGR);
  566. if (!(reg & FLASHEX)) {
  567. ASD_DPRINTK("flash doesn't exist\n");
  568. return -ENOENT;
  569. }
  570. if (pci_read_config_dword(asd_ha->pcidev, PCI_CONF_FLSH_BAR,
  571. &asd_ha->hw_prof.flash.bar)) {
  572. asd_printk("couldn't read PCI_CONF_FLSH_BAR of %s\n",
  573. pci_name(asd_ha->pcidev));
  574. return -ENOENT;
  575. }
  576. asd_ha->hw_prof.flash.present = 1;
  577. asd_ha->hw_prof.flash.wide = reg & FLASHW ? 1 : 0;
  578. err = asd_reset_flash(asd_ha);
  579. if (err) {
  580. ASD_DPRINTK("couldn't reset flash(%d)\n", err);
  581. return err;
  582. }
  583. return 0;
  584. }
  585. static u16 asd_calc_flash_chksum(u16 *p, int size)
  586. {
  587. u16 chksum = 0;
  588. while (size-- > 0)
  589. chksum += *p++;
  590. return chksum;
  591. }
  592. static int asd_find_flash_de(struct asd_flash_dir *flash_dir, u32 entry_type,
  593. u32 *offs, u32 *size)
  594. {
  595. int i;
  596. struct asd_flash_de *de;
  597. for (i = 0; i < FLASH_MAX_DIR_ENTRIES; i++) {
  598. u32 type = le32_to_cpu(flash_dir->dir_entry[i].type);
  599. type &= FLASH_DE_TYPE_MASK;
  600. if (type == entry_type)
  601. break;
  602. }
  603. if (i >= FLASH_MAX_DIR_ENTRIES)
  604. return -ENOENT;
  605. de = &flash_dir->dir_entry[i];
  606. *offs = le32_to_cpu(de->offs);
  607. *size = le32_to_cpu(de->pad_size);
  608. return 0;
  609. }
  610. static int asd_validate_ms(struct asd_manuf_sec *ms)
  611. {
  612. if (ms->sig[0] != 'S' || ms->sig[1] != 'M') {
  613. ASD_DPRINTK("manuf sec: no valid sig(%c%c)\n",
  614. ms->sig[0], ms->sig[1]);
  615. return -ENOENT;
  616. }
  617. if (ms->maj != 0) {
  618. asd_printk("unsupported manuf. sector. major version:%x\n",
  619. ms->maj);
  620. return -ENOENT;
  621. }
  622. ms->offs_next = le16_to_cpu((__force __le16) ms->offs_next);
  623. ms->chksum = le16_to_cpu((__force __le16) ms->chksum);
  624. ms->size = le16_to_cpu((__force __le16) ms->size);
  625. if (asd_calc_flash_chksum((u16 *)ms, ms->size/2)) {
  626. asd_printk("failed manuf sector checksum\n");
  627. }
  628. return 0;
  629. }
  630. static int asd_ms_get_sas_addr(struct asd_ha_struct *asd_ha,
  631. struct asd_manuf_sec *ms)
  632. {
  633. memcpy(asd_ha->hw_prof.sas_addr, ms->sas_addr, SAS_ADDR_SIZE);
  634. return 0;
  635. }
  636. static int asd_ms_get_pcba_sn(struct asd_ha_struct *asd_ha,
  637. struct asd_manuf_sec *ms)
  638. {
  639. memcpy(asd_ha->hw_prof.pcba_sn, ms->pcba_sn, ASD_PCBA_SN_SIZE);
  640. asd_ha->hw_prof.pcba_sn[ASD_PCBA_SN_SIZE] = '\0';
  641. return 0;
  642. }
  643. /**
  644. * asd_find_ll_by_id - find a linked list entry by its id
  645. * @start: void pointer to the first element in the linked list
  646. * @id0: the first byte of the id (offs 0)
  647. * @id1: the second byte of the id (offs 1)
  648. *
  649. * @start has to be the _base_ element start, since the
  650. * linked list entries's offset is from this pointer.
  651. * Some linked list entries use only the first id, in which case
  652. * you can pass 0xFF for the second.
  653. */
  654. static void *asd_find_ll_by_id(void * const start, const u8 id0, const u8 id1)
  655. {
  656. struct asd_ll_el *el = start;
  657. do {
  658. switch (id1) {
  659. default:
  660. if (el->id1 == id1)
  661. case 0xFF:
  662. if (el->id0 == id0)
  663. return el;
  664. }
  665. el = start + le16_to_cpu(el->next);
  666. } while (el != start);
  667. return NULL;
  668. }
  669. /**
  670. * asd_ms_get_phy_params - get phy parameters from the manufacturing sector
  671. * @asd_ha: pointer to the host adapter structure
  672. * @manuf_sec: pointer to the manufacturing sector
  673. *
  674. * The manufacturing sector contans also the linked list of sub-segments,
  675. * since when it was read, its size was taken from the flash directory,
  676. * not from the structure size.
  677. *
  678. * HIDDEN phys do not count in the total count. REPORTED phys cannot
  679. * be enabled but are reported and counted towards the total.
  680. * ENEBLEABLE phys are enabled by default and count towards the total.
  681. * The absolute total phy number is ASD_MAX_PHYS. hw_prof->num_phys
  682. * merely specifies the number of phys the host adapter decided to
  683. * report. E.g., it is possible for phys 0, 1 and 2 to be HIDDEN,
  684. * phys 3, 4 and 5 to be REPORTED and phys 6 and 7 to be ENEBLEABLE.
  685. * In this case ASD_MAX_PHYS is 8, hw_prof->num_phys is 5, and only 2
  686. * are actually enabled (enabled by default, max number of phys
  687. * enableable in this case).
  688. */
  689. static int asd_ms_get_phy_params(struct asd_ha_struct *asd_ha,
  690. struct asd_manuf_sec *manuf_sec)
  691. {
  692. int i;
  693. int en_phys = 0;
  694. int rep_phys = 0;
  695. struct asd_manuf_phy_param *phy_param;
  696. struct asd_manuf_phy_param dflt_phy_param;
  697. phy_param = asd_find_ll_by_id(manuf_sec, 'P', 'M');
  698. if (!phy_param) {
  699. ASD_DPRINTK("ms: no phy parameters found\n");
  700. ASD_DPRINTK("ms: Creating default phy parameters\n");
  701. dflt_phy_param.sig[0] = 'P';
  702. dflt_phy_param.sig[1] = 'M';
  703. dflt_phy_param.maj = 0;
  704. dflt_phy_param.min = 2;
  705. dflt_phy_param.num_phy_desc = 8;
  706. dflt_phy_param.phy_desc_size = sizeof(struct asd_manuf_phy_desc);
  707. for (i =0; i < ASD_MAX_PHYS; i++) {
  708. dflt_phy_param.phy_desc[i].state = 0;
  709. dflt_phy_param.phy_desc[i].phy_id = i;
  710. dflt_phy_param.phy_desc[i].phy_control_0 = 0xf6;
  711. dflt_phy_param.phy_desc[i].phy_control_1 = 0x10;
  712. dflt_phy_param.phy_desc[i].phy_control_2 = 0x43;
  713. dflt_phy_param.phy_desc[i].phy_control_3 = 0xeb;
  714. }
  715. phy_param = &dflt_phy_param;
  716. }
  717. if (phy_param->maj != 0) {
  718. asd_printk("unsupported manuf. phy param major version:0x%x\n",
  719. phy_param->maj);
  720. return -ENOENT;
  721. }
  722. ASD_DPRINTK("ms: num_phy_desc: %d\n", phy_param->num_phy_desc);
  723. asd_ha->hw_prof.enabled_phys = 0;
  724. for (i = 0; i < phy_param->num_phy_desc; i++) {
  725. struct asd_manuf_phy_desc *pd = &phy_param->phy_desc[i];
  726. switch (pd->state & 0xF) {
  727. case MS_PHY_STATE_HIDDEN:
  728. ASD_DPRINTK("ms: phy%d: HIDDEN\n", i);
  729. continue;
  730. case MS_PHY_STATE_REPORTED:
  731. ASD_DPRINTK("ms: phy%d: REPORTED\n", i);
  732. asd_ha->hw_prof.enabled_phys &= ~(1 << i);
  733. rep_phys++;
  734. continue;
  735. case MS_PHY_STATE_ENABLEABLE:
  736. ASD_DPRINTK("ms: phy%d: ENEBLEABLE\n", i);
  737. asd_ha->hw_prof.enabled_phys |= (1 << i);
  738. en_phys++;
  739. break;
  740. }
  741. asd_ha->hw_prof.phy_desc[i].phy_control_0 = pd->phy_control_0;
  742. asd_ha->hw_prof.phy_desc[i].phy_control_1 = pd->phy_control_1;
  743. asd_ha->hw_prof.phy_desc[i].phy_control_2 = pd->phy_control_2;
  744. asd_ha->hw_prof.phy_desc[i].phy_control_3 = pd->phy_control_3;
  745. }
  746. asd_ha->hw_prof.max_phys = rep_phys + en_phys;
  747. asd_ha->hw_prof.num_phys = en_phys;
  748. ASD_DPRINTK("ms: max_phys:0x%x, num_phys:0x%x\n",
  749. asd_ha->hw_prof.max_phys, asd_ha->hw_prof.num_phys);
  750. ASD_DPRINTK("ms: enabled_phys:0x%x\n", asd_ha->hw_prof.enabled_phys);
  751. return 0;
  752. }
  753. static int asd_ms_get_connector_map(struct asd_ha_struct *asd_ha,
  754. struct asd_manuf_sec *manuf_sec)
  755. {
  756. struct asd_ms_conn_map *cm;
  757. cm = asd_find_ll_by_id(manuf_sec, 'M', 'C');
  758. if (!cm) {
  759. ASD_DPRINTK("ms: no connector map found\n");
  760. return 0;
  761. }
  762. if (cm->maj != 0) {
  763. ASD_DPRINTK("ms: unsupported: connector map major version 0x%x"
  764. "\n", cm->maj);
  765. return -ENOENT;
  766. }
  767. /* XXX */
  768. return 0;
  769. }
  770. /**
  771. * asd_process_ms - find and extract information from the manufacturing sector
  772. * @asd_ha: pointer to the host adapter structure
  773. * @flash_dir: pointer to the flash directory
  774. */
  775. static int asd_process_ms(struct asd_ha_struct *asd_ha,
  776. struct asd_flash_dir *flash_dir)
  777. {
  778. int err;
  779. struct asd_manuf_sec *manuf_sec;
  780. u32 offs, size;
  781. err = asd_find_flash_de(flash_dir, FLASH_DE_MS, &offs, &size);
  782. if (err) {
  783. ASD_DPRINTK("Couldn't find the manuf. sector\n");
  784. goto out;
  785. }
  786. if (size == 0)
  787. goto out;
  788. err = -ENOMEM;
  789. manuf_sec = kmalloc(size, GFP_KERNEL);
  790. if (!manuf_sec) {
  791. ASD_DPRINTK("no mem for manuf sector\n");
  792. goto out;
  793. }
  794. err = asd_read_flash_seg(asd_ha, (void *)manuf_sec, offs, size);
  795. if (err) {
  796. ASD_DPRINTK("couldn't read manuf sector at 0x%x, size 0x%x\n",
  797. offs, size);
  798. goto out2;
  799. }
  800. err = asd_validate_ms(manuf_sec);
  801. if (err) {
  802. ASD_DPRINTK("couldn't validate manuf sector\n");
  803. goto out2;
  804. }
  805. err = asd_ms_get_sas_addr(asd_ha, manuf_sec);
  806. if (err) {
  807. ASD_DPRINTK("couldn't read the SAS_ADDR\n");
  808. goto out2;
  809. }
  810. ASD_DPRINTK("manuf sect SAS_ADDR %llx\n",
  811. SAS_ADDR(asd_ha->hw_prof.sas_addr));
  812. err = asd_ms_get_pcba_sn(asd_ha, manuf_sec);
  813. if (err) {
  814. ASD_DPRINTK("couldn't read the PCBA SN\n");
  815. goto out2;
  816. }
  817. ASD_DPRINTK("manuf sect PCBA SN %s\n", asd_ha->hw_prof.pcba_sn);
  818. err = asd_ms_get_phy_params(asd_ha, manuf_sec);
  819. if (err) {
  820. ASD_DPRINTK("ms: couldn't get phy parameters\n");
  821. goto out2;
  822. }
  823. err = asd_ms_get_connector_map(asd_ha, manuf_sec);
  824. if (err) {
  825. ASD_DPRINTK("ms: couldn't get connector map\n");
  826. goto out2;
  827. }
  828. out2:
  829. kfree(manuf_sec);
  830. out:
  831. return err;
  832. }
  833. static int asd_process_ctrla_phy_settings(struct asd_ha_struct *asd_ha,
  834. struct asd_ctrla_phy_settings *ps)
  835. {
  836. int i;
  837. for (i = 0; i < ps->num_phys; i++) {
  838. struct asd_ctrla_phy_entry *pe = &ps->phy_ent[i];
  839. if (!PHY_ENABLED(asd_ha, i))
  840. continue;
  841. if (*(u64 *)pe->sas_addr == 0) {
  842. asd_ha->hw_prof.enabled_phys &= ~(1 << i);
  843. continue;
  844. }
  845. /* This is the SAS address which should be sent in IDENTIFY. */
  846. memcpy(asd_ha->hw_prof.phy_desc[i].sas_addr, pe->sas_addr,
  847. SAS_ADDR_SIZE);
  848. asd_ha->hw_prof.phy_desc[i].max_sas_lrate =
  849. (pe->sas_link_rates & 0xF0) >> 4;
  850. asd_ha->hw_prof.phy_desc[i].min_sas_lrate =
  851. (pe->sas_link_rates & 0x0F);
  852. asd_ha->hw_prof.phy_desc[i].max_sata_lrate =
  853. (pe->sata_link_rates & 0xF0) >> 4;
  854. asd_ha->hw_prof.phy_desc[i].min_sata_lrate =
  855. (pe->sata_link_rates & 0x0F);
  856. asd_ha->hw_prof.phy_desc[i].flags = pe->flags;
  857. ASD_DPRINTK("ctrla: phy%d: sas_addr: %llx, sas rate:0x%x-0x%x,"
  858. " sata rate:0x%x-0x%x, flags:0x%x\n",
  859. i,
  860. SAS_ADDR(asd_ha->hw_prof.phy_desc[i].sas_addr),
  861. asd_ha->hw_prof.phy_desc[i].max_sas_lrate,
  862. asd_ha->hw_prof.phy_desc[i].min_sas_lrate,
  863. asd_ha->hw_prof.phy_desc[i].max_sata_lrate,
  864. asd_ha->hw_prof.phy_desc[i].min_sata_lrate,
  865. asd_ha->hw_prof.phy_desc[i].flags);
  866. }
  867. return 0;
  868. }
  869. /**
  870. * asd_process_ctrl_a_user - process CTRL-A user settings
  871. * @asd_ha: pointer to the host adapter structure
  872. * @flash_dir: pointer to the flash directory
  873. */
  874. static int asd_process_ctrl_a_user(struct asd_ha_struct *asd_ha,
  875. struct asd_flash_dir *flash_dir)
  876. {
  877. int err, i;
  878. u32 offs, size;
  879. struct asd_ll_el *el;
  880. struct asd_ctrla_phy_settings *ps;
  881. struct asd_ctrla_phy_settings dflt_ps;
  882. err = asd_find_flash_de(flash_dir, FLASH_DE_CTRL_A_USER, &offs, &size);
  883. if (err) {
  884. ASD_DPRINTK("couldn't find CTRL-A user settings section\n");
  885. ASD_DPRINTK("Creating default CTRL-A user settings section\n");
  886. dflt_ps.id0 = 'h';
  887. dflt_ps.num_phys = 8;
  888. for (i =0; i < ASD_MAX_PHYS; i++) {
  889. memcpy(dflt_ps.phy_ent[i].sas_addr,
  890. asd_ha->hw_prof.sas_addr, SAS_ADDR_SIZE);
  891. dflt_ps.phy_ent[i].sas_link_rates = 0x98;
  892. dflt_ps.phy_ent[i].flags = 0x0;
  893. dflt_ps.phy_ent[i].sata_link_rates = 0x0;
  894. }
  895. size = sizeof(struct asd_ctrla_phy_settings);
  896. ps = &dflt_ps;
  897. }
  898. if (size == 0)
  899. goto out;
  900. err = -ENOMEM;
  901. el = kmalloc(size, GFP_KERNEL);
  902. if (!el) {
  903. ASD_DPRINTK("no mem for ctrla user settings section\n");
  904. goto out;
  905. }
  906. err = asd_read_flash_seg(asd_ha, (void *)el, offs, size);
  907. if (err) {
  908. ASD_DPRINTK("couldn't read ctrla phy settings section\n");
  909. goto out2;
  910. }
  911. err = -ENOENT;
  912. ps = asd_find_ll_by_id(el, 'h', 0xFF);
  913. if (!ps) {
  914. ASD_DPRINTK("couldn't find ctrla phy settings struct\n");
  915. goto out2;
  916. }
  917. err = asd_process_ctrla_phy_settings(asd_ha, ps);
  918. if (err) {
  919. ASD_DPRINTK("couldn't process ctrla phy settings\n");
  920. goto out2;
  921. }
  922. out2:
  923. kfree(el);
  924. out:
  925. return err;
  926. }
  927. /**
  928. * asd_read_flash - read flash memory
  929. * @asd_ha: pointer to the host adapter structure
  930. */
  931. int asd_read_flash(struct asd_ha_struct *asd_ha)
  932. {
  933. int err;
  934. struct asd_flash_dir *flash_dir;
  935. err = asd_flash_getid(asd_ha);
  936. if (err)
  937. return err;
  938. flash_dir = kmalloc(sizeof(*flash_dir), GFP_KERNEL);
  939. if (!flash_dir)
  940. return -ENOMEM;
  941. err = -ENOENT;
  942. if (!asd_find_flash_dir(asd_ha, flash_dir)) {
  943. ASD_DPRINTK("couldn't find flash directory\n");
  944. goto out;
  945. }
  946. if (le32_to_cpu(flash_dir->rev) != 2) {
  947. asd_printk("unsupported flash dir version:0x%x\n",
  948. le32_to_cpu(flash_dir->rev));
  949. goto out;
  950. }
  951. err = asd_process_ms(asd_ha, flash_dir);
  952. if (err) {
  953. ASD_DPRINTK("couldn't process manuf sector settings\n");
  954. goto out;
  955. }
  956. err = asd_process_ctrl_a_user(asd_ha, flash_dir);
  957. if (err) {
  958. ASD_DPRINTK("couldn't process CTRL-A user settings\n");
  959. goto out;
  960. }
  961. out:
  962. kfree(flash_dir);
  963. return err;
  964. }