ioasm.h 3.9 KB

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  1. #ifndef S390_CIO_IOASM_H
  2. #define S390_CIO_IOASM_H
  3. #include "schid.h"
  4. /*
  5. * TPI info structure
  6. */
  7. struct tpi_info {
  8. struct subchannel_id schid;
  9. __u32 intparm; /* interruption parameter */
  10. __u32 adapter_IO : 1;
  11. __u32 reserved2 : 1;
  12. __u32 isc : 3;
  13. __u32 reserved3 : 12;
  14. __u32 int_type : 3;
  15. __u32 reserved4 : 12;
  16. } __attribute__ ((packed));
  17. /*
  18. * Some S390 specific IO instructions as inline
  19. */
  20. static inline int stsch(struct subchannel_id schid,
  21. volatile struct schib *addr)
  22. {
  23. register struct subchannel_id reg1 asm ("1") = schid;
  24. int ccode;
  25. asm volatile(
  26. " stsch 0(%2)\n"
  27. " ipm %0\n"
  28. " srl %0,28"
  29. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  30. return ccode;
  31. }
  32. static inline int stsch_err(struct subchannel_id schid,
  33. volatile struct schib *addr)
  34. {
  35. register struct subchannel_id reg1 asm ("1") = schid;
  36. int ccode = -EIO;
  37. asm volatile(
  38. " stsch 0(%2)\n"
  39. "0: ipm %0\n"
  40. " srl %0,28\n"
  41. "1:\n"
  42. EX_TABLE(0b,1b)
  43. : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  44. return ccode;
  45. }
  46. static inline int msch(struct subchannel_id schid,
  47. volatile struct schib *addr)
  48. {
  49. register struct subchannel_id reg1 asm ("1") = schid;
  50. int ccode;
  51. asm volatile(
  52. " msch 0(%2)\n"
  53. " ipm %0\n"
  54. " srl %0,28"
  55. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  56. return ccode;
  57. }
  58. static inline int msch_err(struct subchannel_id schid,
  59. volatile struct schib *addr)
  60. {
  61. register struct subchannel_id reg1 asm ("1") = schid;
  62. int ccode = -EIO;
  63. asm volatile(
  64. " msch 0(%2)\n"
  65. "0: ipm %0\n"
  66. " srl %0,28\n"
  67. "1:\n"
  68. EX_TABLE(0b,1b)
  69. : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  70. return ccode;
  71. }
  72. static inline int tsch(struct subchannel_id schid,
  73. volatile struct irb *addr)
  74. {
  75. register struct subchannel_id reg1 asm ("1") = schid;
  76. int ccode;
  77. asm volatile(
  78. " tsch 0(%2)\n"
  79. " ipm %0\n"
  80. " srl %0,28"
  81. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  82. return ccode;
  83. }
  84. static inline int tpi( volatile struct tpi_info *addr)
  85. {
  86. int ccode;
  87. asm volatile(
  88. " tpi 0(%1)\n"
  89. " ipm %0\n"
  90. " srl %0,28"
  91. : "=d" (ccode) : "a" (addr), "m" (*addr) : "cc");
  92. return ccode;
  93. }
  94. static inline int ssch(struct subchannel_id schid,
  95. volatile struct orb *addr)
  96. {
  97. register struct subchannel_id reg1 asm ("1") = schid;
  98. int ccode;
  99. asm volatile(
  100. " ssch 0(%2)\n"
  101. " ipm %0\n"
  102. " srl %0,28"
  103. : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc");
  104. return ccode;
  105. }
  106. static inline int rsch(struct subchannel_id schid)
  107. {
  108. register struct subchannel_id reg1 asm ("1") = schid;
  109. int ccode;
  110. asm volatile(
  111. " rsch\n"
  112. " ipm %0\n"
  113. " srl %0,28"
  114. : "=d" (ccode) : "d" (reg1) : "cc");
  115. return ccode;
  116. }
  117. static inline int csch(struct subchannel_id schid)
  118. {
  119. register struct subchannel_id reg1 asm ("1") = schid;
  120. int ccode;
  121. asm volatile(
  122. " csch\n"
  123. " ipm %0\n"
  124. " srl %0,28"
  125. : "=d" (ccode) : "d" (reg1) : "cc");
  126. return ccode;
  127. }
  128. static inline int hsch(struct subchannel_id schid)
  129. {
  130. register struct subchannel_id reg1 asm ("1") = schid;
  131. int ccode;
  132. asm volatile(
  133. " hsch\n"
  134. " ipm %0\n"
  135. " srl %0,28"
  136. : "=d" (ccode) : "d" (reg1) : "cc");
  137. return ccode;
  138. }
  139. static inline int xsch(struct subchannel_id schid)
  140. {
  141. register struct subchannel_id reg1 asm ("1") = schid;
  142. int ccode;
  143. asm volatile(
  144. " .insn rre,0xb2760000,%1,0\n"
  145. " ipm %0\n"
  146. " srl %0,28"
  147. : "=d" (ccode) : "d" (reg1) : "cc");
  148. return ccode;
  149. }
  150. static inline int chsc(void *chsc_area)
  151. {
  152. typedef struct { char _[4096]; } addr_type;
  153. int cc;
  154. asm volatile(
  155. " .insn rre,0xb25f0000,%2,0\n"
  156. " ipm %0\n"
  157. " srl %0,28\n"
  158. : "=d" (cc), "=m" (*(addr_type *) chsc_area)
  159. : "d" (chsc_area), "m" (*(addr_type *) chsc_area)
  160. : "cc");
  161. return cc;
  162. }
  163. static inline int rchp(int chpid)
  164. {
  165. register unsigned int reg1 asm ("1") = chpid;
  166. int ccode;
  167. asm volatile(
  168. " lr 1,%1\n"
  169. " rchp\n"
  170. " ipm %0\n"
  171. " srl %0,28"
  172. : "=d" (ccode) : "d" (reg1) : "cc");
  173. return ccode;
  174. }
  175. #endif