rtc-s3c.c 14 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2004,2006 Simtec Electronics
  4. * Ben Dooks, <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  12. */
  13. #include <linux/module.h>
  14. #include <linux/fs.h>
  15. #include <linux/string.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/clk.h>
  22. #include <asm/hardware.h>
  23. #include <asm/uaccess.h>
  24. #include <asm/io.h>
  25. #include <asm/irq.h>
  26. #include <asm/rtc.h>
  27. #include <asm/mach/time.h>
  28. #include <asm/arch/regs-rtc.h>
  29. /* I have yet to find an S3C implementation with more than one
  30. * of these rtc blocks in */
  31. static struct resource *s3c_rtc_mem;
  32. static void __iomem *s3c_rtc_base;
  33. static int s3c_rtc_alarmno = NO_IRQ;
  34. static int s3c_rtc_tickno = NO_IRQ;
  35. static int s3c_rtc_freq = 1;
  36. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  37. static unsigned int tick_count;
  38. /* IRQ Handlers */
  39. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  40. {
  41. struct rtc_device *rdev = id;
  42. rtc_update_irq(&rdev->class_dev, 1, RTC_AF | RTC_IRQF);
  43. return IRQ_HANDLED;
  44. }
  45. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  46. {
  47. struct rtc_device *rdev = id;
  48. rtc_update_irq(&rdev->class_dev, tick_count++, RTC_PF | RTC_IRQF);
  49. return IRQ_HANDLED;
  50. }
  51. /* Update control registers */
  52. static void s3c_rtc_setaie(int to)
  53. {
  54. unsigned int tmp;
  55. pr_debug("%s: aie=%d\n", __FUNCTION__, to);
  56. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  57. if (to)
  58. tmp |= S3C2410_RTCALM_ALMEN;
  59. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  60. }
  61. static void s3c_rtc_setpie(int to)
  62. {
  63. unsigned int tmp;
  64. pr_debug("%s: pie=%d\n", __FUNCTION__, to);
  65. spin_lock_irq(&s3c_rtc_pie_lock);
  66. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE;
  67. if (to)
  68. tmp |= S3C2410_TICNT_ENABLE;
  69. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  70. spin_unlock_irq(&s3c_rtc_pie_lock);
  71. }
  72. static void s3c_rtc_setfreq(int freq)
  73. {
  74. unsigned int tmp;
  75. spin_lock_irq(&s3c_rtc_pie_lock);
  76. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE;
  77. s3c_rtc_freq = freq;
  78. tmp |= (128 / freq)-1;
  79. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  80. spin_unlock_irq(&s3c_rtc_pie_lock);
  81. }
  82. /* Time read/write */
  83. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  84. {
  85. unsigned int have_retried = 0;
  86. void __iomem *base = s3c_rtc_base;
  87. retry_get_time:
  88. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  89. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  90. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  91. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  92. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  93. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  94. /* the only way to work out wether the system was mid-update
  95. * when we read it is to check the second counter, and if it
  96. * is zero, then we re-try the entire read
  97. */
  98. if (rtc_tm->tm_sec == 0 && !have_retried) {
  99. have_retried = 1;
  100. goto retry_get_time;
  101. }
  102. pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
  103. rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  104. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  105. BCD_TO_BIN(rtc_tm->tm_sec);
  106. BCD_TO_BIN(rtc_tm->tm_min);
  107. BCD_TO_BIN(rtc_tm->tm_hour);
  108. BCD_TO_BIN(rtc_tm->tm_mday);
  109. BCD_TO_BIN(rtc_tm->tm_mon);
  110. BCD_TO_BIN(rtc_tm->tm_year);
  111. rtc_tm->tm_year += 100;
  112. rtc_tm->tm_mon -= 1;
  113. return 0;
  114. }
  115. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  116. {
  117. void __iomem *base = s3c_rtc_base;
  118. int year = tm->tm_year - 100;
  119. pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
  120. tm->tm_year, tm->tm_mon, tm->tm_mday,
  121. tm->tm_hour, tm->tm_min, tm->tm_sec);
  122. /* we get around y2k by simply not supporting it */
  123. if (year < 0 || year >= 100) {
  124. dev_err(dev, "rtc only supports 100 years\n");
  125. return -EINVAL;
  126. }
  127. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC);
  128. writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN);
  129. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR);
  130. writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE);
  131. writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON);
  132. writeb(BIN2BCD(year), base + S3C2410_RTCYEAR);
  133. return 0;
  134. }
  135. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  136. {
  137. struct rtc_time *alm_tm = &alrm->time;
  138. void __iomem *base = s3c_rtc_base;
  139. unsigned int alm_en;
  140. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  141. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  142. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  143. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  144. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  145. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  146. alm_en = readb(base + S3C2410_RTCALM);
  147. pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
  148. alm_en,
  149. alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  150. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  151. /* decode the alarm enable field */
  152. if (alm_en & S3C2410_RTCALM_SECEN)
  153. BCD_TO_BIN(alm_tm->tm_sec);
  154. else
  155. alm_tm->tm_sec = 0xff;
  156. if (alm_en & S3C2410_RTCALM_MINEN)
  157. BCD_TO_BIN(alm_tm->tm_min);
  158. else
  159. alm_tm->tm_min = 0xff;
  160. if (alm_en & S3C2410_RTCALM_HOUREN)
  161. BCD_TO_BIN(alm_tm->tm_hour);
  162. else
  163. alm_tm->tm_hour = 0xff;
  164. if (alm_en & S3C2410_RTCALM_DAYEN)
  165. BCD_TO_BIN(alm_tm->tm_mday);
  166. else
  167. alm_tm->tm_mday = 0xff;
  168. if (alm_en & S3C2410_RTCALM_MONEN) {
  169. BCD_TO_BIN(alm_tm->tm_mon);
  170. alm_tm->tm_mon -= 1;
  171. } else {
  172. alm_tm->tm_mon = 0xff;
  173. }
  174. if (alm_en & S3C2410_RTCALM_YEAREN)
  175. BCD_TO_BIN(alm_tm->tm_year);
  176. else
  177. alm_tm->tm_year = 0xffff;
  178. return 0;
  179. }
  180. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  181. {
  182. struct rtc_time *tm = &alrm->time;
  183. void __iomem *base = s3c_rtc_base;
  184. unsigned int alrm_en;
  185. pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
  186. alrm->enabled,
  187. tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
  188. tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
  189. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  190. writeb(0x00, base + S3C2410_RTCALM);
  191. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  192. alrm_en |= S3C2410_RTCALM_SECEN;
  193. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC);
  194. }
  195. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  196. alrm_en |= S3C2410_RTCALM_MINEN;
  197. writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN);
  198. }
  199. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  200. alrm_en |= S3C2410_RTCALM_HOUREN;
  201. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR);
  202. }
  203. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  204. writeb(alrm_en, base + S3C2410_RTCALM);
  205. if (0) {
  206. alrm_en = readb(base + S3C2410_RTCALM);
  207. alrm_en &= ~S3C2410_RTCALM_ALMEN;
  208. writeb(alrm_en, base + S3C2410_RTCALM);
  209. disable_irq_wake(s3c_rtc_alarmno);
  210. }
  211. if (alrm->enabled)
  212. enable_irq_wake(s3c_rtc_alarmno);
  213. else
  214. disable_irq_wake(s3c_rtc_alarmno);
  215. return 0;
  216. }
  217. static int s3c_rtc_ioctl(struct device *dev,
  218. unsigned int cmd, unsigned long arg)
  219. {
  220. unsigned int ret = -ENOIOCTLCMD;
  221. switch (cmd) {
  222. case RTC_AIE_OFF:
  223. case RTC_AIE_ON:
  224. s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0);
  225. ret = 0;
  226. break;
  227. case RTC_PIE_OFF:
  228. case RTC_PIE_ON:
  229. tick_count = 0;
  230. s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0);
  231. ret = 0;
  232. break;
  233. case RTC_IRQP_READ:
  234. ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg);
  235. break;
  236. case RTC_IRQP_SET:
  237. /* check for power of 2 */
  238. if ((arg & (arg-1)) != 0 || arg < 1) {
  239. ret = -EINVAL;
  240. goto exit;
  241. }
  242. pr_debug("s3c2410_rtc: setting frequency %ld\n", arg);
  243. s3c_rtc_setfreq(arg);
  244. ret = 0;
  245. break;
  246. case RTC_UIE_ON:
  247. case RTC_UIE_OFF:
  248. ret = -EINVAL;
  249. }
  250. exit:
  251. return ret;
  252. }
  253. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  254. {
  255. unsigned int rtcalm = readb(s3c_rtc_base + S3C2410_RTCALM);
  256. unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  257. seq_printf(seq, "alarm_IRQ\t: %s\n",
  258. (rtcalm & S3C2410_RTCALM_ALMEN) ? "yes" : "no" );
  259. seq_printf(seq, "periodic_IRQ\t: %s\n",
  260. (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" );
  261. seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq);
  262. return 0;
  263. }
  264. static int s3c_rtc_open(struct device *dev)
  265. {
  266. struct platform_device *pdev = to_platform_device(dev);
  267. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  268. int ret;
  269. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  270. SA_INTERRUPT, "s3c2410-rtc alarm", rtc_dev);
  271. if (ret) {
  272. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  273. return ret;
  274. }
  275. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  276. SA_INTERRUPT, "s3c2410-rtc tick", rtc_dev);
  277. if (ret) {
  278. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  279. goto tick_err;
  280. }
  281. return ret;
  282. tick_err:
  283. free_irq(s3c_rtc_alarmno, rtc_dev);
  284. return ret;
  285. }
  286. static void s3c_rtc_release(struct device *dev)
  287. {
  288. struct platform_device *pdev = to_platform_device(dev);
  289. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  290. /* do not clear AIE here, it may be needed for wake */
  291. s3c_rtc_setpie(0);
  292. free_irq(s3c_rtc_alarmno, rtc_dev);
  293. free_irq(s3c_rtc_tickno, rtc_dev);
  294. }
  295. static const struct rtc_class_ops s3c_rtcops = {
  296. .open = s3c_rtc_open,
  297. .release = s3c_rtc_release,
  298. .ioctl = s3c_rtc_ioctl,
  299. .read_time = s3c_rtc_gettime,
  300. .set_time = s3c_rtc_settime,
  301. .read_alarm = s3c_rtc_getalarm,
  302. .set_alarm = s3c_rtc_setalarm,
  303. .proc = s3c_rtc_proc,
  304. };
  305. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  306. {
  307. void __iomem *base = s3c_rtc_base;
  308. unsigned int tmp;
  309. if (s3c_rtc_base == NULL)
  310. return;
  311. if (!en) {
  312. tmp = readb(base + S3C2410_RTCCON);
  313. writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON);
  314. tmp = readb(base + S3C2410_TICNT);
  315. writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT);
  316. } else {
  317. /* re-enable the device, and check it is ok */
  318. if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
  319. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  320. tmp = readb(base + S3C2410_RTCCON);
  321. writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
  322. }
  323. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
  324. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  325. tmp = readb(base + S3C2410_RTCCON);
  326. writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
  327. }
  328. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
  329. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  330. tmp = readb(base + S3C2410_RTCCON);
  331. writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
  332. }
  333. }
  334. }
  335. static int s3c_rtc_remove(struct platform_device *dev)
  336. {
  337. struct rtc_device *rtc = platform_get_drvdata(dev);
  338. platform_set_drvdata(dev, NULL);
  339. rtc_device_unregister(rtc);
  340. s3c_rtc_setpie(0);
  341. s3c_rtc_setaie(0);
  342. iounmap(s3c_rtc_base);
  343. release_resource(s3c_rtc_mem);
  344. kfree(s3c_rtc_mem);
  345. return 0;
  346. }
  347. static int s3c_rtc_probe(struct platform_device *pdev)
  348. {
  349. struct rtc_device *rtc;
  350. struct resource *res;
  351. int ret;
  352. pr_debug("%s: probe=%p\n", __FUNCTION__, pdev);
  353. /* find the IRQs */
  354. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  355. if (s3c_rtc_tickno < 0) {
  356. dev_err(&pdev->dev, "no irq for rtc tick\n");
  357. return -ENOENT;
  358. }
  359. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  360. if (s3c_rtc_alarmno < 0) {
  361. dev_err(&pdev->dev, "no irq for alarm\n");
  362. return -ENOENT;
  363. }
  364. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  365. s3c_rtc_tickno, s3c_rtc_alarmno);
  366. /* get the memory region */
  367. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  368. if (res == NULL) {
  369. dev_err(&pdev->dev, "failed to get memory region resource\n");
  370. return -ENOENT;
  371. }
  372. s3c_rtc_mem = request_mem_region(res->start,
  373. res->end-res->start+1,
  374. pdev->name);
  375. if (s3c_rtc_mem == NULL) {
  376. dev_err(&pdev->dev, "failed to reserve memory region\n");
  377. ret = -ENOENT;
  378. goto err_nores;
  379. }
  380. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  381. if (s3c_rtc_base == NULL) {
  382. dev_err(&pdev->dev, "failed ioremap()\n");
  383. ret = -EINVAL;
  384. goto err_nomap;
  385. }
  386. /* check to see if everything is setup correctly */
  387. s3c_rtc_enable(pdev, 1);
  388. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  389. readb(s3c_rtc_base + S3C2410_RTCCON));
  390. s3c_rtc_setfreq(s3c_rtc_freq);
  391. /* register RTC and exit */
  392. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  393. THIS_MODULE);
  394. if (IS_ERR(rtc)) {
  395. dev_err(&pdev->dev, "cannot attach rtc\n");
  396. ret = PTR_ERR(rtc);
  397. goto err_nortc;
  398. }
  399. rtc->max_user_freq = 128;
  400. platform_set_drvdata(pdev, rtc);
  401. return 0;
  402. err_nortc:
  403. s3c_rtc_enable(pdev, 0);
  404. iounmap(s3c_rtc_base);
  405. err_nomap:
  406. release_resource(s3c_rtc_mem);
  407. err_nores:
  408. return ret;
  409. }
  410. #ifdef CONFIG_PM
  411. /* RTC Power management control */
  412. static struct timespec s3c_rtc_delta;
  413. static int ticnt_save;
  414. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  415. {
  416. struct rtc_time tm;
  417. struct timespec time;
  418. time.tv_nsec = 0;
  419. /* save TICNT for anyone using periodic interrupts */
  420. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  421. /* calculate time delta for suspend */
  422. s3c_rtc_gettime(&pdev->dev, &tm);
  423. rtc_tm_to_time(&tm, &time.tv_sec);
  424. save_time_delta(&s3c_rtc_delta, &time);
  425. s3c_rtc_enable(pdev, 0);
  426. return 0;
  427. }
  428. static int s3c_rtc_resume(struct platform_device *pdev)
  429. {
  430. struct rtc_time tm;
  431. struct timespec time;
  432. time.tv_nsec = 0;
  433. s3c_rtc_enable(pdev, 1);
  434. s3c_rtc_gettime(&pdev->dev, &tm);
  435. rtc_tm_to_time(&tm, &time.tv_sec);
  436. restore_time_delta(&s3c_rtc_delta, &time);
  437. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  438. return 0;
  439. }
  440. #else
  441. #define s3c_rtc_suspend NULL
  442. #define s3c_rtc_resume NULL
  443. #endif
  444. static struct platform_driver s3c2410_rtcdrv = {
  445. .probe = s3c_rtc_probe,
  446. .remove = s3c_rtc_remove,
  447. .suspend = s3c_rtc_suspend,
  448. .resume = s3c_rtc_resume,
  449. .driver = {
  450. .name = "s3c2410-rtc",
  451. .owner = THIS_MODULE,
  452. },
  453. };
  454. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  455. static int __init s3c_rtc_init(void)
  456. {
  457. printk(banner);
  458. return platform_driver_register(&s3c2410_rtcdrv);
  459. }
  460. static void __exit s3c_rtc_exit(void)
  461. {
  462. platform_driver_unregister(&s3c2410_rtcdrv);
  463. }
  464. module_init(s3c_rtc_init);
  465. module_exit(s3c_rtc_exit);
  466. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  467. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  468. MODULE_LICENSE("GPL");