aerdrv_core.c 20 KB

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  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/acpi.h>
  25. #include <linux/pci-acpi.h>
  26. #include <linux/delay.h>
  27. #include "aerdrv.h"
  28. static int forceload;
  29. module_param(forceload, bool, 0);
  30. #define PCI_CFG_SPACE_SIZE (0x100)
  31. int pci_find_aer_capability(struct pci_dev *dev)
  32. {
  33. int pos;
  34. u32 reg32 = 0;
  35. /* Check if it's a pci-express device */
  36. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  37. if (!pos)
  38. return 0;
  39. /* Check if it supports pci-express AER */
  40. pos = PCI_CFG_SPACE_SIZE;
  41. while (pos) {
  42. if (pci_read_config_dword(dev, pos, &reg32))
  43. return 0;
  44. /* some broken boards return ~0 */
  45. if (reg32 == 0xffffffff)
  46. return 0;
  47. if (PCI_EXT_CAP_ID(reg32) == PCI_EXT_CAP_ID_ERR)
  48. break;
  49. pos = reg32 >> 20;
  50. }
  51. return pos;
  52. }
  53. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  54. {
  55. u16 reg16 = 0;
  56. int pos;
  57. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  58. if (!pos)
  59. return -EIO;
  60. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  61. reg16 = reg16 |
  62. PCI_EXP_DEVCTL_CERE |
  63. PCI_EXP_DEVCTL_NFERE |
  64. PCI_EXP_DEVCTL_FERE |
  65. PCI_EXP_DEVCTL_URRE;
  66. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  67. reg16);
  68. return 0;
  69. }
  70. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  71. {
  72. u16 reg16 = 0;
  73. int pos;
  74. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  75. if (!pos)
  76. return -EIO;
  77. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  78. reg16 = reg16 & ~(PCI_EXP_DEVCTL_CERE |
  79. PCI_EXP_DEVCTL_NFERE |
  80. PCI_EXP_DEVCTL_FERE |
  81. PCI_EXP_DEVCTL_URRE);
  82. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  83. reg16);
  84. return 0;
  85. }
  86. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  87. {
  88. int pos;
  89. u32 status, mask;
  90. pos = pci_find_aer_capability(dev);
  91. if (!pos)
  92. return -EIO;
  93. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  94. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
  95. if (dev->error_state == pci_channel_io_normal)
  96. status &= ~mask; /* Clear corresponding nonfatal bits */
  97. else
  98. status &= mask; /* Clear corresponding fatal bits */
  99. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  100. return 0;
  101. }
  102. static int find_device_iter(struct device *device, void *data)
  103. {
  104. struct pci_dev *dev;
  105. u16 id = *(unsigned long *)data;
  106. u8 secondary, subordinate, d_bus = id >> 8;
  107. if (device->bus == &pci_bus_type) {
  108. dev = to_pci_dev(device);
  109. if (id == ((dev->bus->number << 8) | dev->devfn)) {
  110. /*
  111. * Device ID match
  112. */
  113. *(unsigned long*)data = (unsigned long)device;
  114. return 1;
  115. }
  116. /*
  117. * If device is P2P, check if it is an upstream?
  118. */
  119. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  120. pci_read_config_byte(dev, PCI_SECONDARY_BUS,
  121. &secondary);
  122. pci_read_config_byte(dev, PCI_SUBORDINATE_BUS,
  123. &subordinate);
  124. if (d_bus >= secondary && d_bus <= subordinate) {
  125. *(unsigned long*)data = (unsigned long)device;
  126. return 1;
  127. }
  128. }
  129. }
  130. return 0;
  131. }
  132. /**
  133. * find_source_device - search through device hierarchy for source device
  134. * @p_dev: pointer to Root Port pci_dev data structure
  135. * @id: device ID of agent who sends an error message to this Root Port
  136. *
  137. * Invoked when error is detected at the Root Port.
  138. **/
  139. static struct device* find_source_device(struct pci_dev *parent, u16 id)
  140. {
  141. struct pci_dev *dev = parent;
  142. struct device *device;
  143. unsigned long device_addr;
  144. int status;
  145. /* Is Root Port an agent that sends error message? */
  146. if (id == ((dev->bus->number << 8) | dev->devfn))
  147. return &dev->dev;
  148. do {
  149. device_addr = id;
  150. if ((status = device_for_each_child(&dev->dev,
  151. &device_addr, find_device_iter))) {
  152. device = (struct device*)device_addr;
  153. dev = to_pci_dev(device);
  154. if (id == ((dev->bus->number << 8) | dev->devfn))
  155. return device;
  156. }
  157. }while (status);
  158. return NULL;
  159. }
  160. static void report_error_detected(struct pci_dev *dev, void *data)
  161. {
  162. pci_ers_result_t vote;
  163. struct pci_error_handlers *err_handler;
  164. struct aer_broadcast_data *result_data;
  165. result_data = (struct aer_broadcast_data *) data;
  166. dev->error_state = result_data->state;
  167. if (!dev->driver ||
  168. !dev->driver->err_handler ||
  169. !dev->driver->err_handler->error_detected) {
  170. if (result_data->state == pci_channel_io_frozen &&
  171. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  172. /*
  173. * In case of fatal recovery, if one of down-
  174. * stream device has no driver. We might be
  175. * unable to recover because a later insmod
  176. * of a driver for this device is unaware of
  177. * its hw state.
  178. */
  179. printk(KERN_DEBUG "Device ID[%s] has %s\n",
  180. dev->dev.bus_id, (dev->driver) ?
  181. "no AER-aware driver" : "no driver");
  182. }
  183. return;
  184. }
  185. err_handler = dev->driver->err_handler;
  186. vote = err_handler->error_detected(dev, result_data->state);
  187. result_data->result = merge_result(result_data->result, vote);
  188. return;
  189. }
  190. static void report_mmio_enabled(struct pci_dev *dev, void *data)
  191. {
  192. pci_ers_result_t vote;
  193. struct pci_error_handlers *err_handler;
  194. struct aer_broadcast_data *result_data;
  195. result_data = (struct aer_broadcast_data *) data;
  196. if (!dev->driver ||
  197. !dev->driver->err_handler ||
  198. !dev->driver->err_handler->mmio_enabled)
  199. return;
  200. err_handler = dev->driver->err_handler;
  201. vote = err_handler->mmio_enabled(dev);
  202. result_data->result = merge_result(result_data->result, vote);
  203. return;
  204. }
  205. static void report_slot_reset(struct pci_dev *dev, void *data)
  206. {
  207. pci_ers_result_t vote;
  208. struct pci_error_handlers *err_handler;
  209. struct aer_broadcast_data *result_data;
  210. result_data = (struct aer_broadcast_data *) data;
  211. if (!dev->driver ||
  212. !dev->driver->err_handler ||
  213. !dev->driver->err_handler->slot_reset)
  214. return;
  215. err_handler = dev->driver->err_handler;
  216. vote = err_handler->slot_reset(dev);
  217. result_data->result = merge_result(result_data->result, vote);
  218. return;
  219. }
  220. static void report_resume(struct pci_dev *dev, void *data)
  221. {
  222. struct pci_error_handlers *err_handler;
  223. dev->error_state = pci_channel_io_normal;
  224. if (!dev->driver ||
  225. !dev->driver->err_handler ||
  226. !dev->driver->err_handler->slot_reset)
  227. return;
  228. err_handler = dev->driver->err_handler;
  229. err_handler->resume(dev);
  230. return;
  231. }
  232. /**
  233. * broadcast_error_message - handle message broadcast to downstream drivers
  234. * @device: pointer to from where in a hierarchy message is broadcasted down
  235. * @api: callback to be broadcasted
  236. * @state: error state
  237. *
  238. * Invoked during error recovery process. Once being invoked, the content
  239. * of error severity will be broadcasted to all downstream drivers in a
  240. * hierarchy in question.
  241. **/
  242. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  243. enum pci_channel_state state,
  244. char *error_mesg,
  245. void (*cb)(struct pci_dev *, void *))
  246. {
  247. struct aer_broadcast_data result_data;
  248. printk(KERN_DEBUG "Broadcast %s message\n", error_mesg);
  249. result_data.state = state;
  250. if (cb == report_error_detected)
  251. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  252. else
  253. result_data.result = PCI_ERS_RESULT_RECOVERED;
  254. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  255. /*
  256. * If the error is reported by a bridge, we think this error
  257. * is related to the downstream link of the bridge, so we
  258. * do error recovery on all subordinates of the bridge instead
  259. * of the bridge and clear the error status of the bridge.
  260. */
  261. if (cb == report_error_detected)
  262. dev->error_state = state;
  263. pci_walk_bus(dev->subordinate, cb, &result_data);
  264. if (cb == report_resume) {
  265. pci_cleanup_aer_uncorrect_error_status(dev);
  266. dev->error_state = pci_channel_io_normal;
  267. }
  268. }
  269. else {
  270. /*
  271. * If the error is reported by an end point, we think this
  272. * error is related to the upstream link of the end point.
  273. */
  274. pci_walk_bus(dev->bus, cb, &result_data);
  275. }
  276. return result_data.result;
  277. }
  278. struct find_aer_service_data {
  279. struct pcie_port_service_driver *aer_driver;
  280. int is_downstream;
  281. };
  282. static int find_aer_service_iter(struct device *device, void *data)
  283. {
  284. struct device_driver *driver;
  285. struct pcie_port_service_driver *service_driver;
  286. struct pcie_device *pcie_dev;
  287. struct find_aer_service_data *result;
  288. result = (struct find_aer_service_data *) data;
  289. if (device->bus == &pcie_port_bus_type) {
  290. pcie_dev = to_pcie_device(device);
  291. if (pcie_dev->id.port_type == PCIE_SW_DOWNSTREAM_PORT)
  292. result->is_downstream = 1;
  293. driver = device->driver;
  294. if (driver) {
  295. service_driver = to_service_driver(driver);
  296. if (service_driver->id_table->service_type ==
  297. PCIE_PORT_SERVICE_AER) {
  298. result->aer_driver = service_driver;
  299. return 1;
  300. }
  301. }
  302. }
  303. return 0;
  304. }
  305. static void find_aer_service(struct pci_dev *dev,
  306. struct find_aer_service_data *data)
  307. {
  308. int retval;
  309. retval = device_for_each_child(&dev->dev, data, find_aer_service_iter);
  310. }
  311. static pci_ers_result_t reset_link(struct pcie_device *aerdev,
  312. struct pci_dev *dev)
  313. {
  314. struct pci_dev *udev;
  315. pci_ers_result_t status;
  316. struct find_aer_service_data data;
  317. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)
  318. udev = dev;
  319. else
  320. udev= dev->bus->self;
  321. data.is_downstream = 0;
  322. data.aer_driver = NULL;
  323. find_aer_service(udev, &data);
  324. /*
  325. * Use the aer driver of the error agent firstly.
  326. * If it hasn't the aer driver, use the root port's
  327. */
  328. if (!data.aer_driver || !data.aer_driver->reset_link) {
  329. if (data.is_downstream &&
  330. aerdev->device.driver &&
  331. to_service_driver(aerdev->device.driver)->reset_link) {
  332. data.aer_driver =
  333. to_service_driver(aerdev->device.driver);
  334. } else {
  335. printk(KERN_DEBUG "No link-reset support to Device ID"
  336. "[%s]\n",
  337. dev->dev.bus_id);
  338. return PCI_ERS_RESULT_DISCONNECT;
  339. }
  340. }
  341. status = data.aer_driver->reset_link(udev);
  342. if (status != PCI_ERS_RESULT_RECOVERED) {
  343. printk(KERN_DEBUG "Link reset at upstream Device ID"
  344. "[%s] failed\n",
  345. udev->dev.bus_id);
  346. return PCI_ERS_RESULT_DISCONNECT;
  347. }
  348. return status;
  349. }
  350. /**
  351. * do_recovery - handle nonfatal/fatal error recovery process
  352. * @aerdev: pointer to a pcie_device data structure of root port
  353. * @dev: pointer to a pci_dev data structure of agent detecting an error
  354. * @severity: error severity type
  355. *
  356. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  357. * error detected message to all downstream drivers within a hierarchy in
  358. * question and return the returned code.
  359. **/
  360. static pci_ers_result_t do_recovery(struct pcie_device *aerdev,
  361. struct pci_dev *dev,
  362. int severity)
  363. {
  364. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  365. enum pci_channel_state state;
  366. if (severity == AER_FATAL)
  367. state = pci_channel_io_frozen;
  368. else
  369. state = pci_channel_io_normal;
  370. status = broadcast_error_message(dev,
  371. state,
  372. "error_detected",
  373. report_error_detected);
  374. if (severity == AER_FATAL) {
  375. result = reset_link(aerdev, dev);
  376. if (result != PCI_ERS_RESULT_RECOVERED) {
  377. /* TODO: Should panic here? */
  378. return result;
  379. }
  380. }
  381. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  382. status = broadcast_error_message(dev,
  383. state,
  384. "mmio_enabled",
  385. report_mmio_enabled);
  386. if (status == PCI_ERS_RESULT_NEED_RESET) {
  387. /*
  388. * TODO: Should call platform-specific
  389. * functions to reset slot before calling
  390. * drivers' slot_reset callbacks?
  391. */
  392. status = broadcast_error_message(dev,
  393. state,
  394. "slot_reset",
  395. report_slot_reset);
  396. }
  397. if (status == PCI_ERS_RESULT_RECOVERED)
  398. broadcast_error_message(dev,
  399. state,
  400. "resume",
  401. report_resume);
  402. return status;
  403. }
  404. /**
  405. * handle_error_source - handle logging error into an event log
  406. * @aerdev: pointer to pcie_device data structure of the root port
  407. * @dev: pointer to pci_dev data structure of error source device
  408. * @info: comprehensive error information
  409. *
  410. * Invoked when an error being detected by Root Port.
  411. **/
  412. static void handle_error_source(struct pcie_device * aerdev,
  413. struct pci_dev *dev,
  414. struct aer_err_info info)
  415. {
  416. pci_ers_result_t status = 0;
  417. int pos;
  418. if (info.severity == AER_CORRECTABLE) {
  419. /*
  420. * Correctable error does not need software intevention.
  421. * No need to go through error recovery process.
  422. */
  423. pos = pci_find_aer_capability(dev);
  424. if (pos)
  425. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  426. info.status);
  427. } else {
  428. status = do_recovery(aerdev, dev, info.severity);
  429. if (status == PCI_ERS_RESULT_RECOVERED) {
  430. printk(KERN_DEBUG "AER driver successfully recovered\n");
  431. } else {
  432. /* TODO: Should kernel panic here? */
  433. printk(KERN_DEBUG "AER driver didn't recover\n");
  434. }
  435. }
  436. }
  437. /**
  438. * aer_enable_rootport - enable Root Port's interrupts when receiving messages
  439. * @rpc: pointer to a Root Port data structure
  440. *
  441. * Invoked when PCIE bus loads AER service driver.
  442. **/
  443. void aer_enable_rootport(struct aer_rpc *rpc)
  444. {
  445. struct pci_dev *pdev = rpc->rpd->port;
  446. int pos, aer_pos;
  447. u16 reg16;
  448. u32 reg32;
  449. pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
  450. /* Clear PCIE Capability's Device Status */
  451. pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
  452. pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
  453. /* Disable system error generation in response to error messages */
  454. pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
  455. reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
  456. pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
  457. aer_pos = pci_find_aer_capability(pdev);
  458. /* Clear error status */
  459. pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, &reg32);
  460. pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, reg32);
  461. pci_read_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, &reg32);
  462. pci_write_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, reg32);
  463. pci_read_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, &reg32);
  464. pci_write_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, reg32);
  465. /* Enable Root Port device reporting error itself */
  466. pci_read_config_word(pdev, pos+PCI_EXP_DEVCTL, &reg16);
  467. reg16 = reg16 |
  468. PCI_EXP_DEVCTL_CERE |
  469. PCI_EXP_DEVCTL_NFERE |
  470. PCI_EXP_DEVCTL_FERE |
  471. PCI_EXP_DEVCTL_URRE;
  472. pci_write_config_word(pdev, pos+PCI_EXP_DEVCTL,
  473. reg16);
  474. /* Enable Root Port's interrupt in response to error messages */
  475. pci_write_config_dword(pdev,
  476. aer_pos + PCI_ERR_ROOT_COMMAND,
  477. ROOT_PORT_INTR_ON_MESG_MASK);
  478. }
  479. /**
  480. * disable_root_aer - disable Root Port's interrupts when receiving messages
  481. * @rpc: pointer to a Root Port data structure
  482. *
  483. * Invoked when PCIE bus unloads AER service driver.
  484. **/
  485. static void disable_root_aer(struct aer_rpc *rpc)
  486. {
  487. struct pci_dev *pdev = rpc->rpd->port;
  488. u32 reg32;
  489. int pos;
  490. pos = pci_find_aer_capability(pdev);
  491. /* Disable Root's interrupt in response to error messages */
  492. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, 0);
  493. /* Clear Root's error status reg */
  494. pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  495. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, reg32);
  496. }
  497. /**
  498. * get_e_source - retrieve an error source
  499. * @rpc: pointer to the root port which holds an error
  500. *
  501. * Invoked by DPC handler to consume an error.
  502. **/
  503. static struct aer_err_source* get_e_source(struct aer_rpc *rpc)
  504. {
  505. struct aer_err_source *e_source;
  506. unsigned long flags;
  507. /* Lock access to Root error producer/consumer index */
  508. spin_lock_irqsave(&rpc->e_lock, flags);
  509. if (rpc->prod_idx == rpc->cons_idx) {
  510. spin_unlock_irqrestore(&rpc->e_lock, flags);
  511. return NULL;
  512. }
  513. e_source = &rpc->e_sources[rpc->cons_idx];
  514. rpc->cons_idx++;
  515. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  516. rpc->cons_idx = 0;
  517. spin_unlock_irqrestore(&rpc->e_lock, flags);
  518. return e_source;
  519. }
  520. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  521. {
  522. int pos;
  523. pos = pci_find_aer_capability(dev);
  524. /* The device might not support AER */
  525. if (!pos)
  526. return AER_SUCCESS;
  527. if (info->severity == AER_CORRECTABLE) {
  528. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  529. &info->status);
  530. if (!(info->status & ERR_CORRECTABLE_ERROR_MASK))
  531. return AER_UNSUCCESS;
  532. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  533. info->severity == AER_NONFATAL) {
  534. /* Link is still healthy for IO reads */
  535. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  536. &info->status);
  537. if (!(info->status & ERR_UNCORRECTABLE_ERROR_MASK))
  538. return AER_UNSUCCESS;
  539. if (info->status & AER_LOG_TLP_MASKS) {
  540. info->flags |= AER_TLP_HEADER_VALID_FLAG;
  541. pci_read_config_dword(dev,
  542. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  543. pci_read_config_dword(dev,
  544. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  545. pci_read_config_dword(dev,
  546. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  547. pci_read_config_dword(dev,
  548. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  549. }
  550. }
  551. return AER_SUCCESS;
  552. }
  553. /**
  554. * aer_isr_one_error - consume an error detected by root port
  555. * @p_device: pointer to error root port service device
  556. * @e_src: pointer to an error source
  557. **/
  558. static void aer_isr_one_error(struct pcie_device *p_device,
  559. struct aer_err_source *e_src)
  560. {
  561. struct device *s_device;
  562. struct aer_err_info e_info = {0, 0, 0,};
  563. int i;
  564. u16 id;
  565. /*
  566. * There is a possibility that both correctable error and
  567. * uncorrectable error being logged. Report correctable error first.
  568. */
  569. for (i = 1; i & ROOT_ERR_STATUS_MASKS ; i <<= 2) {
  570. if (i > 4)
  571. break;
  572. if (!(e_src->status & i))
  573. continue;
  574. /* Init comprehensive error information */
  575. if (i & PCI_ERR_ROOT_COR_RCV) {
  576. id = ERR_COR_ID(e_src->id);
  577. e_info.severity = AER_CORRECTABLE;
  578. } else {
  579. id = ERR_UNCOR_ID(e_src->id);
  580. e_info.severity = ((e_src->status >> 6) & 1);
  581. }
  582. if (e_src->status &
  583. (PCI_ERR_ROOT_MULTI_COR_RCV |
  584. PCI_ERR_ROOT_MULTI_UNCOR_RCV))
  585. e_info.flags |= AER_MULTI_ERROR_VALID_FLAG;
  586. if (!(s_device = find_source_device(p_device->port, id))) {
  587. printk(KERN_DEBUG "%s->can't find device of ID%04x\n",
  588. __FUNCTION__, id);
  589. continue;
  590. }
  591. if (get_device_error_info(to_pci_dev(s_device), &e_info) ==
  592. AER_SUCCESS) {
  593. aer_print_error(to_pci_dev(s_device), &e_info);
  594. handle_error_source(p_device,
  595. to_pci_dev(s_device),
  596. e_info);
  597. }
  598. }
  599. }
  600. /**
  601. * aer_isr - consume errors detected by root port
  602. * @context: pointer to a private data of pcie device
  603. *
  604. * Invoked, as DPC, when root port records new detected error
  605. **/
  606. void aer_isr(void *context)
  607. {
  608. struct pcie_device *p_device = (struct pcie_device *) context;
  609. struct aer_rpc *rpc = get_service_data(p_device);
  610. struct aer_err_source *e_src;
  611. mutex_lock(&rpc->rpc_mutex);
  612. e_src = get_e_source(rpc);
  613. while (e_src) {
  614. aer_isr_one_error(p_device, e_src);
  615. e_src = get_e_source(rpc);
  616. }
  617. mutex_unlock(&rpc->rpc_mutex);
  618. wake_up(&rpc->wait_release);
  619. }
  620. /**
  621. * aer_delete_rootport - disable root port aer and delete service data
  622. * @rpc: pointer to a root port device being deleted
  623. *
  624. * Invoked when AER service unloaded on a specific Root Port
  625. **/
  626. void aer_delete_rootport(struct aer_rpc *rpc)
  627. {
  628. /* Disable root port AER itself */
  629. disable_root_aer(rpc);
  630. kfree(rpc);
  631. }
  632. /**
  633. * aer_init - provide AER initialization
  634. * @dev: pointer to AER pcie device
  635. *
  636. * Invoked when AER service driver is loaded.
  637. **/
  638. int aer_init(struct pcie_device *dev)
  639. {
  640. int status;
  641. /* Run _OSC Method */
  642. status = aer_osc_setup(dev->port);
  643. if(status != OSC_METHOD_RUN_SUCCESS) {
  644. printk(KERN_DEBUG "%s: AER service init fails - %s\n",
  645. __FUNCTION__,
  646. (status == OSC_METHOD_NOT_SUPPORTED) ?
  647. "No ACPI _OSC support" : "Run ACPI _OSC fails");
  648. if (!forceload)
  649. return status;
  650. }
  651. return AER_SUCCESS;
  652. }
  653. EXPORT_SYMBOL_GPL(pci_find_aer_capability);
  654. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  655. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  656. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);