pci-sysfs.c 17 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/pci.h>
  18. #include <linux/stat.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include "pci.h"
  22. static int sysfs_initialized; /* = 0 */
  23. /* show configuration fields */
  24. #define pci_config_attr(field, format_string) \
  25. static ssize_t \
  26. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  27. { \
  28. struct pci_dev *pdev; \
  29. \
  30. pdev = to_pci_dev (dev); \
  31. return sprintf (buf, format_string, pdev->field); \
  32. }
  33. pci_config_attr(vendor, "0x%04x\n");
  34. pci_config_attr(device, "0x%04x\n");
  35. pci_config_attr(subsystem_vendor, "0x%04x\n");
  36. pci_config_attr(subsystem_device, "0x%04x\n");
  37. pci_config_attr(class, "0x%06x\n");
  38. pci_config_attr(irq, "%u\n");
  39. pci_config_attr(is_enabled, "%u\n");
  40. static ssize_t broken_parity_status_show(struct device *dev,
  41. struct device_attribute *attr,
  42. char *buf)
  43. {
  44. struct pci_dev *pdev = to_pci_dev(dev);
  45. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  46. }
  47. static ssize_t broken_parity_status_store(struct device *dev,
  48. struct device_attribute *attr,
  49. const char *buf, size_t count)
  50. {
  51. struct pci_dev *pdev = to_pci_dev(dev);
  52. ssize_t consumed = -EINVAL;
  53. if ((count > 0) && (*buf == '0' || *buf == '1')) {
  54. pdev->broken_parity_status = *buf == '1' ? 1 : 0;
  55. consumed = count;
  56. }
  57. return consumed;
  58. }
  59. static ssize_t local_cpus_show(struct device *dev,
  60. struct device_attribute *attr, char *buf)
  61. {
  62. cpumask_t mask;
  63. int len;
  64. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  65. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  66. strcat(buf,"\n");
  67. return 1+len;
  68. }
  69. /* show resources */
  70. static ssize_t
  71. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  72. {
  73. struct pci_dev * pci_dev = to_pci_dev(dev);
  74. char * str = buf;
  75. int i;
  76. int max = 7;
  77. resource_size_t start, end;
  78. if (pci_dev->subordinate)
  79. max = DEVICE_COUNT_RESOURCE;
  80. for (i = 0; i < max; i++) {
  81. struct resource *res = &pci_dev->resource[i];
  82. pci_resource_to_user(pci_dev, i, res, &start, &end);
  83. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  84. (unsigned long long)start,
  85. (unsigned long long)end,
  86. (unsigned long long)res->flags);
  87. }
  88. return (str - buf);
  89. }
  90. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  91. {
  92. struct pci_dev *pci_dev = to_pci_dev(dev);
  93. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  94. pci_dev->vendor, pci_dev->device,
  95. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  96. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  97. (u8)(pci_dev->class));
  98. }
  99. static ssize_t
  100. is_enabled_store(struct device *dev, struct device_attribute *attr,
  101. const char *buf, size_t count)
  102. {
  103. struct pci_dev *pdev = to_pci_dev(dev);
  104. int retval = 0;
  105. /* this can crash the machine when done on the "wrong" device */
  106. if (!capable(CAP_SYS_ADMIN))
  107. return count;
  108. if (*buf == '0')
  109. pci_disable_device(pdev);
  110. if (*buf == '1')
  111. retval = pci_enable_device(pdev);
  112. if (retval)
  113. return retval;
  114. return count;
  115. }
  116. static ssize_t
  117. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  118. {
  119. struct pci_dev *pdev = to_pci_dev(dev);
  120. if (!pdev->subordinate)
  121. return 0;
  122. return sprintf (buf, "%u\n",
  123. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  124. }
  125. static ssize_t
  126. msi_bus_store(struct device *dev, struct device_attribute *attr,
  127. const char *buf, size_t count)
  128. {
  129. struct pci_dev *pdev = to_pci_dev(dev);
  130. /* bad things may happen if the no_msi flag is changed
  131. * while some drivers are loaded */
  132. if (!capable(CAP_SYS_ADMIN))
  133. return count;
  134. if (!pdev->subordinate)
  135. return count;
  136. if (*buf == '0') {
  137. pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  138. dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
  139. " bad things could happen.\n");
  140. }
  141. if (*buf == '1') {
  142. pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  143. dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
  144. " bad things could happen.\n");
  145. }
  146. return count;
  147. }
  148. struct device_attribute pci_dev_attrs[] = {
  149. __ATTR_RO(resource),
  150. __ATTR_RO(vendor),
  151. __ATTR_RO(device),
  152. __ATTR_RO(subsystem_vendor),
  153. __ATTR_RO(subsystem_device),
  154. __ATTR_RO(class),
  155. __ATTR_RO(irq),
  156. __ATTR_RO(local_cpus),
  157. __ATTR_RO(modalias),
  158. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  159. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  160. broken_parity_status_show,broken_parity_status_store),
  161. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  162. __ATTR_NULL,
  163. };
  164. static ssize_t
  165. pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  166. {
  167. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  168. unsigned int size = 64;
  169. loff_t init_off = off;
  170. u8 *data = (u8*) buf;
  171. /* Several chips lock up trying to read undefined config space */
  172. if (capable(CAP_SYS_ADMIN)) {
  173. size = dev->cfg_size;
  174. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  175. size = 128;
  176. }
  177. if (off > size)
  178. return 0;
  179. if (off + count > size) {
  180. size -= off;
  181. count = size;
  182. } else {
  183. size = count;
  184. }
  185. if ((off & 1) && size) {
  186. u8 val;
  187. pci_user_read_config_byte(dev, off, &val);
  188. data[off - init_off] = val;
  189. off++;
  190. size--;
  191. }
  192. if ((off & 3) && size > 2) {
  193. u16 val;
  194. pci_user_read_config_word(dev, off, &val);
  195. data[off - init_off] = val & 0xff;
  196. data[off - init_off + 1] = (val >> 8) & 0xff;
  197. off += 2;
  198. size -= 2;
  199. }
  200. while (size > 3) {
  201. u32 val;
  202. pci_user_read_config_dword(dev, off, &val);
  203. data[off - init_off] = val & 0xff;
  204. data[off - init_off + 1] = (val >> 8) & 0xff;
  205. data[off - init_off + 2] = (val >> 16) & 0xff;
  206. data[off - init_off + 3] = (val >> 24) & 0xff;
  207. off += 4;
  208. size -= 4;
  209. }
  210. if (size >= 2) {
  211. u16 val;
  212. pci_user_read_config_word(dev, off, &val);
  213. data[off - init_off] = val & 0xff;
  214. data[off - init_off + 1] = (val >> 8) & 0xff;
  215. off += 2;
  216. size -= 2;
  217. }
  218. if (size > 0) {
  219. u8 val;
  220. pci_user_read_config_byte(dev, off, &val);
  221. data[off - init_off] = val;
  222. off++;
  223. --size;
  224. }
  225. return count;
  226. }
  227. static ssize_t
  228. pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  229. {
  230. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  231. unsigned int size = count;
  232. loff_t init_off = off;
  233. u8 *data = (u8*) buf;
  234. if (off > dev->cfg_size)
  235. return 0;
  236. if (off + count > dev->cfg_size) {
  237. size = dev->cfg_size - off;
  238. count = size;
  239. }
  240. if ((off & 1) && size) {
  241. pci_user_write_config_byte(dev, off, data[off - init_off]);
  242. off++;
  243. size--;
  244. }
  245. if ((off & 3) && size > 2) {
  246. u16 val = data[off - init_off];
  247. val |= (u16) data[off - init_off + 1] << 8;
  248. pci_user_write_config_word(dev, off, val);
  249. off += 2;
  250. size -= 2;
  251. }
  252. while (size > 3) {
  253. u32 val = data[off - init_off];
  254. val |= (u32) data[off - init_off + 1] << 8;
  255. val |= (u32) data[off - init_off + 2] << 16;
  256. val |= (u32) data[off - init_off + 3] << 24;
  257. pci_user_write_config_dword(dev, off, val);
  258. off += 4;
  259. size -= 4;
  260. }
  261. if (size >= 2) {
  262. u16 val = data[off - init_off];
  263. val |= (u16) data[off - init_off + 1] << 8;
  264. pci_user_write_config_word(dev, off, val);
  265. off += 2;
  266. size -= 2;
  267. }
  268. if (size) {
  269. pci_user_write_config_byte(dev, off, data[off - init_off]);
  270. off++;
  271. --size;
  272. }
  273. return count;
  274. }
  275. #ifdef HAVE_PCI_LEGACY
  276. /**
  277. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  278. * @kobj: kobject corresponding to file to read from
  279. * @buf: buffer to store results
  280. * @off: offset into legacy I/O port space
  281. * @count: number of bytes to read
  282. *
  283. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  284. * callback routine (pci_legacy_read).
  285. */
  286. ssize_t
  287. pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  288. {
  289. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  290. struct class_device,
  291. kobj));
  292. /* Only support 1, 2 or 4 byte accesses */
  293. if (count != 1 && count != 2 && count != 4)
  294. return -EINVAL;
  295. return pci_legacy_read(bus, off, (u32 *)buf, count);
  296. }
  297. /**
  298. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  299. * @kobj: kobject corresponding to file to read from
  300. * @buf: buffer containing value to be written
  301. * @off: offset into legacy I/O port space
  302. * @count: number of bytes to write
  303. *
  304. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  305. * callback routine (pci_legacy_write).
  306. */
  307. ssize_t
  308. pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  309. {
  310. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  311. struct class_device,
  312. kobj));
  313. /* Only support 1, 2 or 4 byte accesses */
  314. if (count != 1 && count != 2 && count != 4)
  315. return -EINVAL;
  316. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  317. }
  318. /**
  319. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  320. * @kobj: kobject corresponding to device to be mapped
  321. * @attr: struct bin_attribute for this file
  322. * @vma: struct vm_area_struct passed to mmap
  323. *
  324. * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
  325. * legacy memory space (first meg of bus space) into application virtual
  326. * memory space.
  327. */
  328. int
  329. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  330. struct vm_area_struct *vma)
  331. {
  332. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  333. struct class_device,
  334. kobj));
  335. return pci_mmap_legacy_page_range(bus, vma);
  336. }
  337. #endif /* HAVE_PCI_LEGACY */
  338. #ifdef HAVE_PCI_MMAP
  339. /**
  340. * pci_mmap_resource - map a PCI resource into user memory space
  341. * @kobj: kobject for mapping
  342. * @attr: struct bin_attribute for the file being mapped
  343. * @vma: struct vm_area_struct passed into the mmap
  344. *
  345. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  346. * FIXME: write combining? maybe automatic for prefetchable regions?
  347. */
  348. static int
  349. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  350. struct vm_area_struct *vma)
  351. {
  352. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  353. struct device, kobj));
  354. struct resource *res = (struct resource *)attr->private;
  355. enum pci_mmap_state mmap_type;
  356. resource_size_t start, end;
  357. int i;
  358. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  359. if (res == &pdev->resource[i])
  360. break;
  361. if (i >= PCI_ROM_RESOURCE)
  362. return -ENODEV;
  363. /* pci_mmap_page_range() expects the same kind of entry as coming
  364. * from /proc/bus/pci/ which is a "user visible" value. If this is
  365. * different from the resource itself, arch will do necessary fixup.
  366. */
  367. pci_resource_to_user(pdev, i, res, &start, &end);
  368. vma->vm_pgoff += start >> PAGE_SHIFT;
  369. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  370. return pci_mmap_page_range(pdev, vma, mmap_type, 0);
  371. }
  372. /**
  373. * pci_remove_resource_files - cleanup resource files
  374. * @dev: dev to cleanup
  375. *
  376. * If we created resource files for @dev, remove them from sysfs and
  377. * free their resources.
  378. */
  379. static void
  380. pci_remove_resource_files(struct pci_dev *pdev)
  381. {
  382. int i;
  383. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  384. struct bin_attribute *res_attr;
  385. res_attr = pdev->res_attr[i];
  386. if (res_attr) {
  387. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  388. kfree(res_attr);
  389. }
  390. }
  391. }
  392. /**
  393. * pci_create_resource_files - create resource files in sysfs for @dev
  394. * @dev: dev in question
  395. *
  396. * Walk the resources in @dev creating files for each resource available.
  397. */
  398. static int pci_create_resource_files(struct pci_dev *pdev)
  399. {
  400. int i;
  401. int retval;
  402. /* Expose the PCI resources from this device as files */
  403. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  404. struct bin_attribute *res_attr;
  405. /* skip empty resources */
  406. if (!pci_resource_len(pdev, i))
  407. continue;
  408. /* allocate attribute structure, piggyback attribute name */
  409. res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
  410. if (res_attr) {
  411. char *res_attr_name = (char *)(res_attr + 1);
  412. pdev->res_attr[i] = res_attr;
  413. sprintf(res_attr_name, "resource%d", i);
  414. res_attr->attr.name = res_attr_name;
  415. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  416. res_attr->attr.owner = THIS_MODULE;
  417. res_attr->size = pci_resource_len(pdev, i);
  418. res_attr->mmap = pci_mmap_resource;
  419. res_attr->private = &pdev->resource[i];
  420. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  421. if (retval) {
  422. pci_remove_resource_files(pdev);
  423. return retval;
  424. }
  425. } else {
  426. return -ENOMEM;
  427. }
  428. }
  429. return 0;
  430. }
  431. #else /* !HAVE_PCI_MMAP */
  432. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  433. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  434. #endif /* HAVE_PCI_MMAP */
  435. /**
  436. * pci_write_rom - used to enable access to the PCI ROM display
  437. * @kobj: kernel object handle
  438. * @buf: user input
  439. * @off: file offset
  440. * @count: number of byte in input
  441. *
  442. * writing anything except 0 enables it
  443. */
  444. static ssize_t
  445. pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  446. {
  447. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  448. if ((off == 0) && (*buf == '0') && (count == 2))
  449. pdev->rom_attr_enabled = 0;
  450. else
  451. pdev->rom_attr_enabled = 1;
  452. return count;
  453. }
  454. /**
  455. * pci_read_rom - read a PCI ROM
  456. * @kobj: kernel object handle
  457. * @buf: where to put the data we read from the ROM
  458. * @off: file offset
  459. * @count: number of bytes to read
  460. *
  461. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  462. * device corresponding to @kobj.
  463. */
  464. static ssize_t
  465. pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  466. {
  467. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  468. void __iomem *rom;
  469. size_t size;
  470. if (!pdev->rom_attr_enabled)
  471. return -EINVAL;
  472. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  473. if (!rom)
  474. return 0;
  475. if (off >= size)
  476. count = 0;
  477. else {
  478. if (off + count > size)
  479. count = size - off;
  480. memcpy_fromio(buf, rom + off, count);
  481. }
  482. pci_unmap_rom(pdev, rom);
  483. return count;
  484. }
  485. static struct bin_attribute pci_config_attr = {
  486. .attr = {
  487. .name = "config",
  488. .mode = S_IRUGO | S_IWUSR,
  489. .owner = THIS_MODULE,
  490. },
  491. .size = 256,
  492. .read = pci_read_config,
  493. .write = pci_write_config,
  494. };
  495. static struct bin_attribute pcie_config_attr = {
  496. .attr = {
  497. .name = "config",
  498. .mode = S_IRUGO | S_IWUSR,
  499. .owner = THIS_MODULE,
  500. },
  501. .size = 4096,
  502. .read = pci_read_config,
  503. .write = pci_write_config,
  504. };
  505. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  506. {
  507. struct bin_attribute *rom_attr = NULL;
  508. int retval;
  509. if (!sysfs_initialized)
  510. return -EACCES;
  511. if (pdev->cfg_size < 4096)
  512. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  513. else
  514. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  515. if (retval)
  516. goto err;
  517. retval = pci_create_resource_files(pdev);
  518. if (retval)
  519. goto err_bin_file;
  520. /* If the device has a ROM, try to expose it in sysfs. */
  521. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  522. rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
  523. if (rom_attr) {
  524. pdev->rom_attr = rom_attr;
  525. rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  526. rom_attr->attr.name = "rom";
  527. rom_attr->attr.mode = S_IRUSR;
  528. rom_attr->attr.owner = THIS_MODULE;
  529. rom_attr->read = pci_read_rom;
  530. rom_attr->write = pci_write_rom;
  531. retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
  532. if (retval)
  533. goto err_rom;
  534. } else {
  535. retval = -ENOMEM;
  536. goto err_bin_file;
  537. }
  538. }
  539. /* add platform-specific attributes */
  540. pcibios_add_platform_entries(pdev);
  541. return 0;
  542. err_rom:
  543. kfree(rom_attr);
  544. err_bin_file:
  545. if (pdev->cfg_size < 4096)
  546. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  547. else
  548. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  549. err:
  550. return retval;
  551. }
  552. /**
  553. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  554. * @pdev: device whose entries we should free
  555. *
  556. * Cleanup when @pdev is removed from sysfs.
  557. */
  558. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  559. {
  560. if (pdev->cfg_size < 4096)
  561. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  562. else
  563. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  564. pci_remove_resource_files(pdev);
  565. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  566. if (pdev->rom_attr) {
  567. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  568. kfree(pdev->rom_attr);
  569. }
  570. }
  571. }
  572. static int __init pci_sysfs_init(void)
  573. {
  574. struct pci_dev *pdev = NULL;
  575. int retval;
  576. sysfs_initialized = 1;
  577. for_each_pci_dev(pdev) {
  578. retval = pci_create_sysfs_dev_files(pdev);
  579. if (retval)
  580. return retval;
  581. }
  582. return 0;
  583. }
  584. __initcall(pci_sysfs_init);