zd_rf_al2230.c 10 KB

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  1. /* zd_rf_al2230.c: Functions for the AL2230 RF controller
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License as published by
  5. * the Free Software Foundation; either version 2 of the License, or
  6. * (at your option) any later version.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. */
  17. #include <linux/kernel.h>
  18. #include "zd_rf.h"
  19. #include "zd_usb.h"
  20. #include "zd_chip.h"
  21. static const u32 zd1211_al2230_table[][3] = {
  22. RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
  23. RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
  24. RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
  25. RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
  26. RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
  27. RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
  28. RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
  29. RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
  30. RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
  31. RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
  32. RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
  33. RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
  34. RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
  35. RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
  36. };
  37. static const u32 zd1211b_al2230_table[][3] = {
  38. RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
  39. RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
  40. RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
  41. RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
  42. RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
  43. RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
  44. RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
  45. RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
  46. RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
  47. RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
  48. RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
  49. RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
  50. RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
  51. RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
  52. };
  53. static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
  54. { CR240, 0x57 }, { CR9, 0xe0 },
  55. };
  56. static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
  57. {
  58. int r;
  59. static const struct zd_ioreq16 ioreqs[] = {
  60. { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
  61. { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
  62. { CR203, 0x06 },
  63. { },
  64. { CR240, 0x80 },
  65. };
  66. r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  67. if (r)
  68. return r;
  69. /* related to antenna selection? */
  70. if (chip->new_phy_layout) {
  71. r = zd_iowrite16_locked(chip, 0xe1, CR9);
  72. if (r)
  73. return r;
  74. }
  75. return zd_iowrite16_locked(chip, 0x06, CR203);
  76. }
  77. static int zd1211_al2230_init_hw(struct zd_rf *rf)
  78. {
  79. int r;
  80. struct zd_chip *chip = zd_rf_to_chip(rf);
  81. static const struct zd_ioreq16 ioreqs[] = {
  82. { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
  83. { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
  84. { CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a },
  85. { CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b },
  86. { CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 },
  87. /* for newest (3rd cut) AL2300 */
  88. { CR17, 0x28 },
  89. { CR26, 0x93 }, { CR34, 0x30 },
  90. /* for newest (3rd cut) AL2300 */
  91. { CR35, 0x3e },
  92. { CR41, 0x24 }, { CR44, 0x32 },
  93. /* for newest (3rd cut) AL2300 */
  94. { CR46, 0x96 },
  95. { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
  96. { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
  97. { CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 },
  98. { CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 },
  99. { CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 },
  100. { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
  101. { CR114, 0x27 },
  102. /* for newest (3rd cut) AL2300 */
  103. { CR115, 0x24 },
  104. { CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc },
  105. { CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 },
  106. { CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff },
  107. { CR253, 0xff },
  108. /* These following happen separately in the vendor driver */
  109. { },
  110. /* shdnb(PLL_ON)=0 */
  111. { CR251, 0x2f },
  112. /* shdnb(PLL_ON)=1 */
  113. { CR251, 0x3f },
  114. { CR138, 0x28 }, { CR203, 0x06 },
  115. };
  116. static const u32 rv[] = {
  117. /* Channel 1 */
  118. 0x03f790,
  119. 0x033331,
  120. 0x00000d,
  121. 0x0b3331,
  122. 0x03b812,
  123. 0x00fff3,
  124. 0x000da4,
  125. 0x0f4dc5, /* fix freq shift, 0x04edc5 */
  126. 0x0805b6,
  127. 0x011687,
  128. 0x000688,
  129. 0x0403b9, /* external control TX power (CR31) */
  130. 0x00dbba,
  131. 0x00099b,
  132. 0x0bdffc,
  133. 0x00000d,
  134. 0x00500f,
  135. /* These writes happen separately in the vendor driver */
  136. 0x00d00f,
  137. 0x004c0f,
  138. 0x00540f,
  139. 0x00700f,
  140. 0x00500f,
  141. };
  142. r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  143. if (r)
  144. return r;
  145. r = zd_rfwritev_locked(chip, rv, ARRAY_SIZE(rv), RF_RV_BITS);
  146. if (r)
  147. return r;
  148. return 0;
  149. }
  150. static int zd1211b_al2230_init_hw(struct zd_rf *rf)
  151. {
  152. int r;
  153. struct zd_chip *chip = zd_rf_to_chip(rf);
  154. static const struct zd_ioreq16 ioreqs1[] = {
  155. { CR10, 0x89 }, { CR15, 0x20 },
  156. { CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
  157. { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
  158. { CR28, 0x3e }, { CR29, 0x00 },
  159. { CR33, 0x28 }, /* 5621 */
  160. { CR34, 0x30 },
  161. { CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
  162. { CR41, 0x24 }, { CR44, 0x32 },
  163. { CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
  164. { CR47, 0x1e },
  165. /* ZD1211B 05.06.10 */
  166. { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 },
  167. { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
  168. { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
  169. { CR69, 0x28 },
  170. { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
  171. { CR87, 0x0a }, { CR89, 0x04 },
  172. { CR91, 0x00 }, /* 5621 */
  173. { CR92, 0x0a },
  174. { CR98, 0x8d }, /* 4804, for 1212 new algorithm */
  175. { CR99, 0x00 }, /* 5621 */
  176. { CR101, 0x13 }, { CR102, 0x27 },
  177. { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
  178. { CR107, 0x2a },
  179. { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
  180. { CR110, 0x1f }, /* 4804, for 1212 new algorithm */
  181. { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
  182. { CR114, 0x27 },
  183. { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */
  184. { CR116, 0x24 },
  185. { CR117, 0xfa }, /* for 1211b */
  186. { CR118, 0xfa }, /* for 1211b */
  187. { CR119, 0x10 },
  188. { CR120, 0x4f },
  189. { CR121, 0x6c }, /* for 1211b */
  190. { CR122, 0xfc }, /* E0->FC at 4902 */
  191. { CR123, 0x57 }, /* 5623 */
  192. { CR125, 0xad }, /* 4804, for 1212 new algorithm */
  193. { CR126, 0x6c }, /* 5614 */
  194. { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
  195. { CR137, 0x50 }, /* 5614 */
  196. { CR138, 0xa8 },
  197. { CR144, 0xac }, /* 5621 */
  198. { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 },
  199. };
  200. static const u32 rv1[] = {
  201. 0x8cccd0,
  202. 0x481dc0,
  203. 0xcfff00,
  204. 0x25a000,
  205. /* To improve AL2230 yield, improve phase noise, 4713 */
  206. 0x25a000,
  207. 0xa3b2f0,
  208. 0x6da010, /* Reg6 update for MP versio */
  209. 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
  210. 0x116000,
  211. 0x9dc020, /* External control TX power (CR31) */
  212. 0x5ddb00, /* RegA update for MP version */
  213. 0xd99000, /* RegB update for MP version */
  214. 0x3ffbd0, /* RegC update for MP version */
  215. 0xb00000, /* RegD update for MP version */
  216. /* improve phase noise and remove phase calibration,4713 */
  217. 0xf01a00,
  218. };
  219. static const struct zd_ioreq16 ioreqs2[] = {
  220. { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
  221. { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
  222. };
  223. static const u32 rv2[] = {
  224. /* To improve AL2230 yield, 4713 */
  225. 0xf01b00,
  226. 0xf01e00,
  227. 0xf01a00,
  228. };
  229. static const struct zd_ioreq16 ioreqs3[] = {
  230. /* related to 6M band edge patching, happens unconditionally */
  231. { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
  232. };
  233. r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
  234. ARRAY_SIZE(zd1211b_ioreqs_shared_1));
  235. if (r)
  236. return r;
  237. r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
  238. if (r)
  239. return r;
  240. r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
  241. if (r)
  242. return r;
  243. r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
  244. if (r)
  245. return r;
  246. r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
  247. if (r)
  248. return r;
  249. r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
  250. if (r)
  251. return r;
  252. r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
  253. if (r)
  254. return r;
  255. return zd1211b_al2230_finalize_rf(chip);
  256. }
  257. static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
  258. {
  259. int r;
  260. const u32 *rv = zd1211_al2230_table[channel-1];
  261. struct zd_chip *chip = zd_rf_to_chip(rf);
  262. static const struct zd_ioreq16 ioreqs[] = {
  263. { CR138, 0x28 },
  264. { CR203, 0x06 },
  265. };
  266. r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
  267. if (r)
  268. return r;
  269. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  270. }
  271. static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
  272. {
  273. int r;
  274. const u32 *rv = zd1211b_al2230_table[channel-1];
  275. struct zd_chip *chip = zd_rf_to_chip(rf);
  276. r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
  277. ARRAY_SIZE(zd1211b_ioreqs_shared_1));
  278. if (r)
  279. return r;
  280. r = zd_rfwritev_cr_locked(chip, rv, 3);
  281. if (r)
  282. return r;
  283. return zd1211b_al2230_finalize_rf(chip);
  284. }
  285. static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
  286. {
  287. struct zd_chip *chip = zd_rf_to_chip(rf);
  288. static const struct zd_ioreq16 ioreqs[] = {
  289. { CR11, 0x00 },
  290. { CR251, 0x3f },
  291. };
  292. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  293. }
  294. static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
  295. {
  296. struct zd_chip *chip = zd_rf_to_chip(rf);
  297. static const struct zd_ioreq16 ioreqs[] = {
  298. { CR11, 0x00 },
  299. { CR251, 0x7f },
  300. };
  301. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  302. }
  303. static int al2230_switch_radio_off(struct zd_rf *rf)
  304. {
  305. struct zd_chip *chip = zd_rf_to_chip(rf);
  306. static const struct zd_ioreq16 ioreqs[] = {
  307. { CR11, 0x04 },
  308. { CR251, 0x2f },
  309. };
  310. return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
  311. }
  312. int zd_rf_init_al2230(struct zd_rf *rf)
  313. {
  314. struct zd_chip *chip = zd_rf_to_chip(rf);
  315. rf->switch_radio_off = al2230_switch_radio_off;
  316. if (chip->is_zd1211b) {
  317. rf->init_hw = zd1211b_al2230_init_hw;
  318. rf->set_channel = zd1211b_al2230_set_channel;
  319. rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
  320. } else {
  321. rf->init_hw = zd1211_al2230_init_hw;
  322. rf->set_channel = zd1211_al2230_set_channel;
  323. rf->switch_radio_on = zd1211_al2230_switch_radio_on;
  324. }
  325. rf->patch_6m_band_edge = 1;
  326. return 0;
  327. }