smctr.c 187 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733
  1. /*
  2. * smctr.c: A network driver for the SMC Token Ring Adapters.
  3. *
  4. * Written by Jay Schulist <jschlst@samba.org>
  5. *
  6. * This software may be used and distributed according to the terms
  7. * of the GNU General Public License, incorporated herein by reference.
  8. *
  9. * This device driver works with the following SMC adapters:
  10. * - SMC TokenCard Elite (8115T, chips 825/584)
  11. * - SMC TokenCard Elite/A MCA (8115T/A, chips 825/594)
  12. *
  13. * Source(s):
  14. * - SMC TokenCard SDK.
  15. *
  16. * Maintainer(s):
  17. * JS Jay Schulist <jschlst@samba.org>
  18. *
  19. * Changes:
  20. * 07102000 JS Fixed a timing problem in smctr_wait_cmd();
  21. * Also added a bit more discriptive error msgs.
  22. * 07122000 JS Fixed problem with detecting a card with
  23. * module io/irq/mem specified.
  24. *
  25. * To do:
  26. * 1. Multicast support.
  27. *
  28. * Initial 2.5 cleanup Alan Cox <alan@redhat.com> 2002/10/28
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/types.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/ptrace.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include <linux/time.h>
  41. #include <linux/errno.h>
  42. #include <linux/init.h>
  43. #include <linux/pci.h>
  44. #include <linux/mca-legacy.h>
  45. #include <linux/delay.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/etherdevice.h>
  48. #include <linux/skbuff.h>
  49. #include <linux/trdevice.h>
  50. #include <linux/bitops.h>
  51. #include <asm/system.h>
  52. #include <asm/io.h>
  53. #include <asm/dma.h>
  54. #include <asm/irq.h>
  55. #if BITS_PER_LONG == 64
  56. #error FIXME: driver does not support 64-bit platforms
  57. #endif
  58. #include "smctr.h" /* Our Stuff */
  59. #include "smctr_firmware.h" /* SMC adapter firmware */
  60. static char version[] __initdata = KERN_INFO "smctr.c: v1.4 7/12/00 by jschlst@samba.org\n";
  61. static const char cardname[] = "smctr";
  62. #define SMCTR_IO_EXTENT 20
  63. #ifdef CONFIG_MCA_LEGACY
  64. static unsigned int smctr_posid = 0x6ec6;
  65. #endif
  66. static int ringspeed;
  67. /* SMC Name of the Adapter. */
  68. static char smctr_name[] = "SMC TokenCard";
  69. static char *smctr_model = "Unknown";
  70. /* Use 0 for production, 1 for verification, 2 for debug, and
  71. * 3 for very verbose debug.
  72. */
  73. #ifndef SMCTR_DEBUG
  74. #define SMCTR_DEBUG 1
  75. #endif
  76. static unsigned int smctr_debug = SMCTR_DEBUG;
  77. /* smctr.c prototypes and functions are arranged alphabeticly
  78. * for clearity, maintainability and pure old fashion fun.
  79. */
  80. /* A */
  81. static int smctr_alloc_shared_memory(struct net_device *dev);
  82. /* B */
  83. static int smctr_bypass_state(struct net_device *dev);
  84. /* C */
  85. static int smctr_checksum_firmware(struct net_device *dev);
  86. static int __init smctr_chk_isa(struct net_device *dev);
  87. static int smctr_chg_rx_mask(struct net_device *dev);
  88. static int smctr_clear_int(struct net_device *dev);
  89. static int smctr_clear_trc_reset(int ioaddr);
  90. static int smctr_close(struct net_device *dev);
  91. /* D */
  92. static int smctr_decode_firmware(struct net_device *dev);
  93. static int smctr_disable_16bit(struct net_device *dev);
  94. static int smctr_disable_adapter_ctrl_store(struct net_device *dev);
  95. static int smctr_disable_bic_int(struct net_device *dev);
  96. /* E */
  97. static int smctr_enable_16bit(struct net_device *dev);
  98. static int smctr_enable_adapter_ctrl_store(struct net_device *dev);
  99. static int smctr_enable_adapter_ram(struct net_device *dev);
  100. static int smctr_enable_bic_int(struct net_device *dev);
  101. /* G */
  102. static int __init smctr_get_boardid(struct net_device *dev, int mca);
  103. static int smctr_get_group_address(struct net_device *dev);
  104. static int smctr_get_functional_address(struct net_device *dev);
  105. static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev);
  106. static int smctr_get_physical_drop_number(struct net_device *dev);
  107. static __u8 *smctr_get_rx_pointer(struct net_device *dev, short queue);
  108. static int smctr_get_station_id(struct net_device *dev);
  109. static struct net_device_stats *smctr_get_stats(struct net_device *dev);
  110. static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,
  111. __u16 bytes_count);
  112. static int smctr_get_upstream_neighbor_addr(struct net_device *dev);
  113. /* H */
  114. static int smctr_hardware_send_packet(struct net_device *dev,
  115. struct net_local *tp);
  116. /* I */
  117. static int smctr_init_acbs(struct net_device *dev);
  118. static int smctr_init_adapter(struct net_device *dev);
  119. static int smctr_init_card_real(struct net_device *dev);
  120. static int smctr_init_rx_bdbs(struct net_device *dev);
  121. static int smctr_init_rx_fcbs(struct net_device *dev);
  122. static int smctr_init_shared_memory(struct net_device *dev);
  123. static int smctr_init_tx_bdbs(struct net_device *dev);
  124. static int smctr_init_tx_fcbs(struct net_device *dev);
  125. static int smctr_internal_self_test(struct net_device *dev);
  126. static irqreturn_t smctr_interrupt(int irq, void *dev_id);
  127. static int smctr_issue_enable_int_cmd(struct net_device *dev,
  128. __u16 interrupt_enable_mask);
  129. static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code,
  130. __u16 ibits);
  131. static int smctr_issue_init_timers_cmd(struct net_device *dev);
  132. static int smctr_issue_init_txrx_cmd(struct net_device *dev);
  133. static int smctr_issue_insert_cmd(struct net_device *dev);
  134. static int smctr_issue_read_ring_status_cmd(struct net_device *dev);
  135. static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt);
  136. static int smctr_issue_remove_cmd(struct net_device *dev);
  137. static int smctr_issue_resume_acb_cmd(struct net_device *dev);
  138. static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue);
  139. static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue);
  140. static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue);
  141. static int smctr_issue_test_internal_rom_cmd(struct net_device *dev);
  142. static int smctr_issue_test_hic_cmd(struct net_device *dev);
  143. static int smctr_issue_test_mac_reg_cmd(struct net_device *dev);
  144. static int smctr_issue_trc_loopback_cmd(struct net_device *dev);
  145. static int smctr_issue_tri_loopback_cmd(struct net_device *dev);
  146. static int smctr_issue_write_byte_cmd(struct net_device *dev,
  147. short aword_cnt, void *byte);
  148. static int smctr_issue_write_word_cmd(struct net_device *dev,
  149. short aword_cnt, void *word);
  150. /* J */
  151. static int smctr_join_complete_state(struct net_device *dev);
  152. /* L */
  153. static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev);
  154. static int smctr_load_firmware(struct net_device *dev);
  155. static int smctr_load_node_addr(struct net_device *dev);
  156. static int smctr_lobe_media_test(struct net_device *dev);
  157. static int smctr_lobe_media_test_cmd(struct net_device *dev);
  158. static int smctr_lobe_media_test_state(struct net_device *dev);
  159. /* M */
  160. static int smctr_make_8025_hdr(struct net_device *dev,
  161. MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc);
  162. static int smctr_make_access_pri(struct net_device *dev,
  163. MAC_SUB_VECTOR *tsv);
  164. static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv);
  165. static int smctr_make_auth_funct_class(struct net_device *dev,
  166. MAC_SUB_VECTOR *tsv);
  167. static int smctr_make_corr(struct net_device *dev,
  168. MAC_SUB_VECTOR *tsv, __u16 correlator);
  169. static int smctr_make_funct_addr(struct net_device *dev,
  170. MAC_SUB_VECTOR *tsv);
  171. static int smctr_make_group_addr(struct net_device *dev,
  172. MAC_SUB_VECTOR *tsv);
  173. static int smctr_make_phy_drop_num(struct net_device *dev,
  174. MAC_SUB_VECTOR *tsv);
  175. static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);
  176. static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv);
  177. static int smctr_make_ring_station_status(struct net_device *dev,
  178. MAC_SUB_VECTOR *tsv);
  179. static int smctr_make_ring_station_version(struct net_device *dev,
  180. MAC_SUB_VECTOR *tsv);
  181. static int smctr_make_tx_status_code(struct net_device *dev,
  182. MAC_SUB_VECTOR *tsv, __u16 tx_fstatus);
  183. static int smctr_make_upstream_neighbor_addr(struct net_device *dev,
  184. MAC_SUB_VECTOR *tsv);
  185. static int smctr_make_wrap_data(struct net_device *dev,
  186. MAC_SUB_VECTOR *tsv);
  187. /* O */
  188. static int smctr_open(struct net_device *dev);
  189. static int smctr_open_tr(struct net_device *dev);
  190. /* P */
  191. struct net_device *smctr_probe(int unit);
  192. static int __init smctr_probe1(struct net_device *dev, int ioaddr);
  193. static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,
  194. struct net_device *dev, __u16 rx_status);
  195. /* R */
  196. static int smctr_ram_memory_test(struct net_device *dev);
  197. static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,
  198. __u16 *correlator);
  199. static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,
  200. __u16 *correlator);
  201. static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf);
  202. static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,
  203. MAC_HEADER *rmf, __u16 *correlator);
  204. static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,
  205. __u16 *correlator);
  206. static int smctr_reset_adapter(struct net_device *dev);
  207. static int smctr_restart_tx_chain(struct net_device *dev, short queue);
  208. static int smctr_ring_status_chg(struct net_device *dev);
  209. static int smctr_rx_frame(struct net_device *dev);
  210. /* S */
  211. static int smctr_send_dat(struct net_device *dev);
  212. static int smctr_send_packet(struct sk_buff *skb, struct net_device *dev);
  213. static int smctr_send_lobe_media_test(struct net_device *dev);
  214. static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,
  215. __u16 correlator);
  216. static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,
  217. __u16 correlator);
  218. static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,
  219. __u16 correlator);
  220. static int smctr_send_rpt_tx_forward(struct net_device *dev,
  221. MAC_HEADER *rmf, __u16 tx_fstatus);
  222. static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,
  223. __u16 rcode, __u16 correlator);
  224. static int smctr_send_rq_init(struct net_device *dev);
  225. static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,
  226. __u16 *tx_fstatus);
  227. static int smctr_set_auth_access_pri(struct net_device *dev,
  228. MAC_SUB_VECTOR *rsv);
  229. static int smctr_set_auth_funct_class(struct net_device *dev,
  230. MAC_SUB_VECTOR *rsv);
  231. static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,
  232. __u16 *correlator);
  233. static int smctr_set_error_timer_value(struct net_device *dev,
  234. MAC_SUB_VECTOR *rsv);
  235. static int smctr_set_frame_forward(struct net_device *dev,
  236. MAC_SUB_VECTOR *rsv, __u8 dc_sc);
  237. static int smctr_set_local_ring_num(struct net_device *dev,
  238. MAC_SUB_VECTOR *rsv);
  239. static unsigned short smctr_set_ctrl_attention(struct net_device *dev);
  240. static void smctr_set_multicast_list(struct net_device *dev);
  241. static int smctr_set_page(struct net_device *dev, __u8 *buf);
  242. static int smctr_set_phy_drop(struct net_device *dev,
  243. MAC_SUB_VECTOR *rsv);
  244. static int smctr_set_ring_speed(struct net_device *dev);
  245. static int smctr_set_rx_look_ahead(struct net_device *dev);
  246. static int smctr_set_trc_reset(int ioaddr);
  247. static int smctr_setup_single_cmd(struct net_device *dev,
  248. __u16 command, __u16 subcommand);
  249. static int smctr_setup_single_cmd_w_data(struct net_device *dev,
  250. __u16 command, __u16 subcommand);
  251. static char *smctr_malloc(struct net_device *dev, __u16 size);
  252. static int smctr_status_chg(struct net_device *dev);
  253. /* T */
  254. static void smctr_timeout(struct net_device *dev);
  255. static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,
  256. __u16 queue);
  257. static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue);
  258. static unsigned short smctr_tx_move_frame(struct net_device *dev,
  259. struct sk_buff *skb, __u8 *pbuff, unsigned int bytes);
  260. /* U */
  261. static int smctr_update_err_stats(struct net_device *dev);
  262. static int smctr_update_rx_chain(struct net_device *dev, __u16 queue);
  263. static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,
  264. __u16 queue);
  265. /* W */
  266. static int smctr_wait_cmd(struct net_device *dev);
  267. static int smctr_wait_while_cbusy(struct net_device *dev);
  268. #define TO_256_BYTE_BOUNDRY(X) (((X + 0xff) & 0xff00) - X)
  269. #define TO_PARAGRAPH_BOUNDRY(X) (((X + 0x0f) & 0xfff0) - X)
  270. #define PARAGRAPH_BOUNDRY(X) smctr_malloc(dev, TO_PARAGRAPH_BOUNDRY(X))
  271. /* Allocate Adapter Shared Memory.
  272. * IMPORTANT NOTE: Any changes to this function MUST be mirrored in the
  273. * function "get_num_rx_bdbs" below!!!
  274. *
  275. * Order of memory allocation:
  276. *
  277. * 0. Initial System Configuration Block Pointer
  278. * 1. System Configuration Block
  279. * 2. System Control Block
  280. * 3. Action Command Block
  281. * 4. Interrupt Status Block
  282. *
  283. * 5. MAC TX FCB'S
  284. * 6. NON-MAC TX FCB'S
  285. * 7. MAC TX BDB'S
  286. * 8. NON-MAC TX BDB'S
  287. * 9. MAC RX FCB'S
  288. * 10. NON-MAC RX FCB'S
  289. * 11. MAC RX BDB'S
  290. * 12. NON-MAC RX BDB'S
  291. * 13. MAC TX Data Buffer( 1, 256 byte buffer)
  292. * 14. MAC RX Data Buffer( 1, 256 byte buffer)
  293. *
  294. * 15. NON-MAC TX Data Buffer
  295. * 16. NON-MAC RX Data Buffer
  296. */
  297. static int smctr_alloc_shared_memory(struct net_device *dev)
  298. {
  299. struct net_local *tp = netdev_priv(dev);
  300. if(smctr_debug > 10)
  301. printk(KERN_DEBUG "%s: smctr_alloc_shared_memory\n", dev->name);
  302. /* Allocate initial System Control Block pointer.
  303. * This pointer is located in the last page, last offset - 4.
  304. */
  305. tp->iscpb_ptr = (ISCPBlock *)(tp->ram_access + ((__u32)64 * 0x400)
  306. - (long)ISCP_BLOCK_SIZE);
  307. /* Allocate System Control Blocks. */
  308. tp->scgb_ptr = (SCGBlock *)smctr_malloc(dev, sizeof(SCGBlock));
  309. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  310. tp->sclb_ptr = (SCLBlock *)smctr_malloc(dev, sizeof(SCLBlock));
  311. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  312. tp->acb_head = (ACBlock *)smctr_malloc(dev,
  313. sizeof(ACBlock)*tp->num_acbs);
  314. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  315. tp->isb_ptr = (ISBlock *)smctr_malloc(dev, sizeof(ISBlock));
  316. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  317. tp->misc_command_data = (__u16 *)smctr_malloc(dev, MISC_DATA_SIZE);
  318. PARAGRAPH_BOUNDRY(tp->sh_mem_used);
  319. /* Allocate transmit FCBs. */
  320. tp->tx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  321. sizeof(FCBlock) * tp->num_tx_fcbs[MAC_QUEUE]);
  322. tp->tx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  323. sizeof(FCBlock) * tp->num_tx_fcbs[NON_MAC_QUEUE]);
  324. tp->tx_fcb_head[BUG_QUEUE] = (FCBlock *)smctr_malloc(dev,
  325. sizeof(FCBlock) * tp->num_tx_fcbs[BUG_QUEUE]);
  326. /* Allocate transmit BDBs. */
  327. tp->tx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  328. sizeof(BDBlock) * tp->num_tx_bdbs[MAC_QUEUE]);
  329. tp->tx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  330. sizeof(BDBlock) * tp->num_tx_bdbs[NON_MAC_QUEUE]);
  331. tp->tx_bdb_head[BUG_QUEUE] = (BDBlock *)smctr_malloc(dev,
  332. sizeof(BDBlock) * tp->num_tx_bdbs[BUG_QUEUE]);
  333. /* Allocate receive FCBs. */
  334. tp->rx_fcb_head[MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  335. sizeof(FCBlock) * tp->num_rx_fcbs[MAC_QUEUE]);
  336. tp->rx_fcb_head[NON_MAC_QUEUE] = (FCBlock *)smctr_malloc(dev,
  337. sizeof(FCBlock) * tp->num_rx_fcbs[NON_MAC_QUEUE]);
  338. /* Allocate receive BDBs. */
  339. tp->rx_bdb_head[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  340. sizeof(BDBlock) * tp->num_rx_bdbs[MAC_QUEUE]);
  341. tp->rx_bdb_end[MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);
  342. tp->rx_bdb_head[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev,
  343. sizeof(BDBlock) * tp->num_rx_bdbs[NON_MAC_QUEUE]);
  344. tp->rx_bdb_end[NON_MAC_QUEUE] = (BDBlock *)smctr_malloc(dev, 0);
  345. /* Allocate MAC transmit buffers.
  346. * MAC Tx Buffers doen't have to be on an ODD Boundry.
  347. */
  348. tp->tx_buff_head[MAC_QUEUE]
  349. = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[MAC_QUEUE]);
  350. tp->tx_buff_curr[MAC_QUEUE] = tp->tx_buff_head[MAC_QUEUE];
  351. tp->tx_buff_end [MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  352. /* Allocate BUG transmit buffers. */
  353. tp->tx_buff_head[BUG_QUEUE]
  354. = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[BUG_QUEUE]);
  355. tp->tx_buff_curr[BUG_QUEUE] = tp->tx_buff_head[BUG_QUEUE];
  356. tp->tx_buff_end[BUG_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  357. /* Allocate MAC receive data buffers.
  358. * MAC Rx buffer doesn't have to be on a 256 byte boundary.
  359. */
  360. tp->rx_buff_head[MAC_QUEUE] = (__u16 *)smctr_malloc(dev,
  361. RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[MAC_QUEUE]);
  362. tp->rx_buff_end[MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  363. /* Allocate Non-MAC transmit buffers.
  364. * ?? For maximum Netware performance, put Tx Buffers on
  365. * ODD Boundry and then restore malloc to Even Boundrys.
  366. */
  367. smctr_malloc(dev, 1L);
  368. tp->tx_buff_head[NON_MAC_QUEUE]
  369. = (__u16 *)smctr_malloc(dev, tp->tx_buff_size[NON_MAC_QUEUE]);
  370. tp->tx_buff_curr[NON_MAC_QUEUE] = tp->tx_buff_head[NON_MAC_QUEUE];
  371. tp->tx_buff_end [NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  372. smctr_malloc(dev, 1L);
  373. /* Allocate Non-MAC receive data buffers.
  374. * To guarantee a minimum of 256 contigous memory to
  375. * UM_Receive_Packet's lookahead pointer, before a page
  376. * change or ring end is encountered, place each rx buffer on
  377. * a 256 byte boundary.
  378. */
  379. smctr_malloc(dev, TO_256_BYTE_BOUNDRY(tp->sh_mem_used));
  380. tp->rx_buff_head[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev,
  381. RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[NON_MAC_QUEUE]);
  382. tp->rx_buff_end[NON_MAC_QUEUE] = (__u16 *)smctr_malloc(dev, 0);
  383. return (0);
  384. }
  385. /* Enter Bypass state. */
  386. static int smctr_bypass_state(struct net_device *dev)
  387. {
  388. int err;
  389. if(smctr_debug > 10)
  390. printk(KERN_DEBUG "%s: smctr_bypass_state\n", dev->name);
  391. err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE, JS_BYPASS_STATE);
  392. return (err);
  393. }
  394. static int smctr_checksum_firmware(struct net_device *dev)
  395. {
  396. struct net_local *tp = netdev_priv(dev);
  397. __u16 i, checksum = 0;
  398. if(smctr_debug > 10)
  399. printk(KERN_DEBUG "%s: smctr_checksum_firmware\n", dev->name);
  400. smctr_enable_adapter_ctrl_store(dev);
  401. for(i = 0; i < CS_RAM_SIZE; i += 2)
  402. checksum += *((__u16 *)(tp->ram_access + i));
  403. tp->microcode_version = *(__u16 *)(tp->ram_access
  404. + CS_RAM_VERSION_OFFSET);
  405. tp->microcode_version >>= 8;
  406. smctr_disable_adapter_ctrl_store(dev);
  407. if(checksum)
  408. return (checksum);
  409. return (0);
  410. }
  411. static int __init smctr_chk_mca(struct net_device *dev)
  412. {
  413. #ifdef CONFIG_MCA_LEGACY
  414. struct net_local *tp = netdev_priv(dev);
  415. int current_slot;
  416. __u8 r1, r2, r3, r4, r5;
  417. current_slot = mca_find_unused_adapter(smctr_posid, 0);
  418. if(current_slot == MCA_NOTFOUND)
  419. return (-ENODEV);
  420. mca_set_adapter_name(current_slot, smctr_name);
  421. mca_mark_as_used(current_slot);
  422. tp->slot_num = current_slot;
  423. r1 = mca_read_stored_pos(tp->slot_num, 2);
  424. r2 = mca_read_stored_pos(tp->slot_num, 3);
  425. if(tp->slot_num)
  426. outb(CNFG_POS_CONTROL_REG, (__u8)((tp->slot_num - 1) | CNFG_SLOT_ENABLE_BIT));
  427. else
  428. outb(CNFG_POS_CONTROL_REG, (__u8)((tp->slot_num) | CNFG_SLOT_ENABLE_BIT));
  429. r1 = inb(CNFG_POS_REG1);
  430. r2 = inb(CNFG_POS_REG0);
  431. tp->bic_type = BIC_594_CHIP;
  432. /* IO */
  433. r2 = mca_read_stored_pos(tp->slot_num, 2);
  434. r2 &= 0xF0;
  435. dev->base_addr = ((__u16)r2 << 8) + (__u16)0x800;
  436. request_region(dev->base_addr, SMCTR_IO_EXTENT, smctr_name);
  437. /* IRQ */
  438. r5 = mca_read_stored_pos(tp->slot_num, 5);
  439. r5 &= 0xC;
  440. switch(r5)
  441. {
  442. case 0:
  443. dev->irq = 3;
  444. break;
  445. case 0x4:
  446. dev->irq = 4;
  447. break;
  448. case 0x8:
  449. dev->irq = 10;
  450. break;
  451. default:
  452. dev->irq = 15;
  453. break;
  454. }
  455. if (request_irq(dev->irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev)) {
  456. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  457. return -ENODEV;
  458. }
  459. /* Get RAM base */
  460. r3 = mca_read_stored_pos(tp->slot_num, 3);
  461. tp->ram_base = ((__u32)(r3 & 0x7) << 13) + 0x0C0000;
  462. if (r3 & 0x8)
  463. tp->ram_base += 0x010000;
  464. if (r3 & 0x80)
  465. tp->ram_base += 0xF00000;
  466. /* Get Ram Size */
  467. r3 &= 0x30;
  468. r3 >>= 4;
  469. tp->ram_usable = (__u16)CNFG_SIZE_8KB << r3;
  470. tp->ram_size = (__u16)CNFG_SIZE_64KB;
  471. tp->board_id |= TOKEN_MEDIA;
  472. r4 = mca_read_stored_pos(tp->slot_num, 4);
  473. tp->rom_base = ((__u32)(r4 & 0x7) << 13) + 0x0C0000;
  474. if (r4 & 0x8)
  475. tp->rom_base += 0x010000;
  476. /* Get ROM size. */
  477. r4 >>= 4;
  478. switch (r4) {
  479. case 0:
  480. tp->rom_size = CNFG_SIZE_8KB;
  481. break;
  482. case 1:
  483. tp->rom_size = CNFG_SIZE_16KB;
  484. break;
  485. case 2:
  486. tp->rom_size = CNFG_SIZE_32KB;
  487. break;
  488. default:
  489. tp->rom_size = ROM_DISABLE;
  490. }
  491. /* Get Media Type. */
  492. r5 = mca_read_stored_pos(tp->slot_num, 5);
  493. r5 &= CNFG_MEDIA_TYPE_MASK;
  494. switch(r5)
  495. {
  496. case (0):
  497. tp->media_type = MEDIA_STP_4;
  498. break;
  499. case (1):
  500. tp->media_type = MEDIA_STP_16;
  501. break;
  502. case (3):
  503. tp->media_type = MEDIA_UTP_16;
  504. break;
  505. default:
  506. tp->media_type = MEDIA_UTP_4;
  507. break;
  508. }
  509. tp->media_menu = 14;
  510. r2 = mca_read_stored_pos(tp->slot_num, 2);
  511. if(!(r2 & 0x02))
  512. tp->mode_bits |= EARLY_TOKEN_REL;
  513. /* Disable slot */
  514. outb(CNFG_POS_CONTROL_REG, 0);
  515. tp->board_id = smctr_get_boardid(dev, 1);
  516. switch(tp->board_id & 0xffff)
  517. {
  518. case WD8115TA:
  519. smctr_model = "8115T/A";
  520. break;
  521. case WD8115T:
  522. if(tp->extra_info & CHIP_REV_MASK)
  523. smctr_model = "8115T rev XE";
  524. else
  525. smctr_model = "8115T rev XD";
  526. break;
  527. default:
  528. smctr_model = "Unknown";
  529. break;
  530. }
  531. return (0);
  532. #else
  533. return (-1);
  534. #endif /* CONFIG_MCA_LEGACY */
  535. }
  536. static int smctr_chg_rx_mask(struct net_device *dev)
  537. {
  538. struct net_local *tp = netdev_priv(dev);
  539. int err = 0;
  540. if(smctr_debug > 10)
  541. printk(KERN_DEBUG "%s: smctr_chg_rx_mask\n", dev->name);
  542. smctr_enable_16bit(dev);
  543. smctr_set_page(dev, (__u8 *)tp->ram_access);
  544. if(tp->mode_bits & LOOPING_MODE_MASK)
  545. tp->config_word0 |= RX_OWN_BIT;
  546. else
  547. tp->config_word0 &= ~RX_OWN_BIT;
  548. if(tp->receive_mask & PROMISCUOUS_MODE)
  549. tp->config_word0 |= PROMISCUOUS_BIT;
  550. else
  551. tp->config_word0 &= ~PROMISCUOUS_BIT;
  552. if(tp->receive_mask & ACCEPT_ERR_PACKETS)
  553. tp->config_word0 |= SAVBAD_BIT;
  554. else
  555. tp->config_word0 &= ~SAVBAD_BIT;
  556. if(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
  557. tp->config_word0 |= RXATMAC;
  558. else
  559. tp->config_word0 &= ~RXATMAC;
  560. if(tp->receive_mask & ACCEPT_MULTI_PROM)
  561. tp->config_word1 |= MULTICAST_ADDRESS_BIT;
  562. else
  563. tp->config_word1 &= ~MULTICAST_ADDRESS_BIT;
  564. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING_SPANNING)
  565. tp->config_word1 |= SOURCE_ROUTING_SPANNING_BITS;
  566. else
  567. {
  568. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING)
  569. tp->config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;
  570. else
  571. tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
  572. }
  573. if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_0,
  574. &tp->config_word0)))
  575. {
  576. return (err);
  577. }
  578. if((err = smctr_issue_write_word_cmd(dev, RW_CONFIG_REGISTER_1,
  579. &tp->config_word1)))
  580. {
  581. return (err);
  582. }
  583. smctr_disable_16bit(dev);
  584. return (0);
  585. }
  586. static int smctr_clear_int(struct net_device *dev)
  587. {
  588. struct net_local *tp = netdev_priv(dev);
  589. outb((tp->trc_mask | CSR_CLRTINT), dev->base_addr + CSR);
  590. return (0);
  591. }
  592. static int smctr_clear_trc_reset(int ioaddr)
  593. {
  594. __u8 r;
  595. r = inb(ioaddr + MSR);
  596. outb(~MSR_RST & r, ioaddr + MSR);
  597. return (0);
  598. }
  599. /*
  600. * The inverse routine to smctr_open().
  601. */
  602. static int smctr_close(struct net_device *dev)
  603. {
  604. struct net_local *tp = netdev_priv(dev);
  605. struct sk_buff *skb;
  606. int err;
  607. netif_stop_queue(dev);
  608. tp->cleanup = 1;
  609. /* Check to see if adapter is already in a closed state. */
  610. if(tp->status != OPEN)
  611. return (0);
  612. smctr_enable_16bit(dev);
  613. smctr_set_page(dev, (__u8 *)tp->ram_access);
  614. if((err = smctr_issue_remove_cmd(dev)))
  615. {
  616. smctr_disable_16bit(dev);
  617. return (err);
  618. }
  619. for(;;)
  620. {
  621. skb = skb_dequeue(&tp->SendSkbQueue);
  622. if(skb == NULL)
  623. break;
  624. tp->QueueSkb++;
  625. dev_kfree_skb(skb);
  626. }
  627. return (0);
  628. }
  629. static int smctr_decode_firmware(struct net_device *dev)
  630. {
  631. struct net_local *tp = netdev_priv(dev);
  632. short bit = 0x80, shift = 12;
  633. DECODE_TREE_NODE *tree;
  634. short branch, tsize;
  635. __u16 buff = 0;
  636. long weight;
  637. __u8 *ucode;
  638. __u16 *mem;
  639. if(smctr_debug > 10)
  640. printk(KERN_DEBUG "%s: smctr_decode_firmware\n", dev->name);
  641. weight = *(long *)(tp->ptr_ucode + WEIGHT_OFFSET);
  642. tsize = *(__u8 *)(tp->ptr_ucode + TREE_SIZE_OFFSET);
  643. tree = (DECODE_TREE_NODE *)(tp->ptr_ucode + TREE_OFFSET);
  644. ucode = (__u8 *)(tp->ptr_ucode + TREE_OFFSET
  645. + (tsize * sizeof(DECODE_TREE_NODE)));
  646. mem = (__u16 *)(tp->ram_access);
  647. while(weight)
  648. {
  649. branch = ROOT;
  650. while((tree + branch)->tag != LEAF && weight)
  651. {
  652. branch = *ucode & bit ? (tree + branch)->llink
  653. : (tree + branch)->rlink;
  654. bit >>= 1;
  655. weight--;
  656. if(bit == 0)
  657. {
  658. bit = 0x80;
  659. ucode++;
  660. }
  661. }
  662. buff |= (tree + branch)->info << shift;
  663. shift -= 4;
  664. if(shift < 0)
  665. {
  666. *(mem++) = SWAP_BYTES(buff);
  667. buff = 0;
  668. shift = 12;
  669. }
  670. }
  671. /* The following assumes the Control Store Memory has
  672. * been initialized to zero. If the last partial word
  673. * is zero, it will not be written.
  674. */
  675. if(buff)
  676. *(mem++) = SWAP_BYTES(buff);
  677. return (0);
  678. }
  679. static int smctr_disable_16bit(struct net_device *dev)
  680. {
  681. return (0);
  682. }
  683. /*
  684. * On Exit, Adapter is:
  685. * 1. TRC is in a reset state and un-initialized.
  686. * 2. Adapter memory is enabled.
  687. * 3. Control Store memory is out of context (-WCSS is 1).
  688. */
  689. static int smctr_disable_adapter_ctrl_store(struct net_device *dev)
  690. {
  691. struct net_local *tp = netdev_priv(dev);
  692. int ioaddr = dev->base_addr;
  693. if(smctr_debug > 10)
  694. printk(KERN_DEBUG "%s: smctr_disable_adapter_ctrl_store\n", dev->name);
  695. tp->trc_mask |= CSR_WCSS;
  696. outb(tp->trc_mask, ioaddr + CSR);
  697. return (0);
  698. }
  699. static int smctr_disable_bic_int(struct net_device *dev)
  700. {
  701. struct net_local *tp = netdev_priv(dev);
  702. int ioaddr = dev->base_addr;
  703. tp->trc_mask = CSR_MSK_ALL | CSR_MSKCBUSY
  704. | CSR_MSKTINT | CSR_WCSS;
  705. outb(tp->trc_mask, ioaddr + CSR);
  706. return (0);
  707. }
  708. static int smctr_enable_16bit(struct net_device *dev)
  709. {
  710. struct net_local *tp = netdev_priv(dev);
  711. __u8 r;
  712. if(tp->adapter_bus == BUS_ISA16_TYPE)
  713. {
  714. r = inb(dev->base_addr + LAAR);
  715. outb((r | LAAR_MEM16ENB), dev->base_addr + LAAR);
  716. }
  717. return (0);
  718. }
  719. /*
  720. * To enable the adapter control store memory:
  721. * 1. Adapter must be in a RESET state.
  722. * 2. Adapter memory must be enabled.
  723. * 3. Control Store Memory is in context (-WCSS is 0).
  724. */
  725. static int smctr_enable_adapter_ctrl_store(struct net_device *dev)
  726. {
  727. struct net_local *tp = netdev_priv(dev);
  728. int ioaddr = dev->base_addr;
  729. if(smctr_debug > 10)
  730. printk(KERN_DEBUG "%s: smctr_enable_adapter_ctrl_store\n", dev->name);
  731. smctr_set_trc_reset(ioaddr);
  732. smctr_enable_adapter_ram(dev);
  733. tp->trc_mask &= ~CSR_WCSS;
  734. outb(tp->trc_mask, ioaddr + CSR);
  735. return (0);
  736. }
  737. static int smctr_enable_adapter_ram(struct net_device *dev)
  738. {
  739. int ioaddr = dev->base_addr;
  740. __u8 r;
  741. if(smctr_debug > 10)
  742. printk(KERN_DEBUG "%s: smctr_enable_adapter_ram\n", dev->name);
  743. r = inb(ioaddr + MSR);
  744. outb(MSR_MEMB | r, ioaddr + MSR);
  745. return (0);
  746. }
  747. static int smctr_enable_bic_int(struct net_device *dev)
  748. {
  749. struct net_local *tp = netdev_priv(dev);
  750. int ioaddr = dev->base_addr;
  751. __u8 r;
  752. switch(tp->bic_type)
  753. {
  754. case (BIC_584_CHIP):
  755. tp->trc_mask = CSR_MSKCBUSY | CSR_WCSS;
  756. outb(tp->trc_mask, ioaddr + CSR);
  757. r = inb(ioaddr + IRR);
  758. outb(r | IRR_IEN, ioaddr + IRR);
  759. break;
  760. case (BIC_594_CHIP):
  761. tp->trc_mask = CSR_MSKCBUSY | CSR_WCSS;
  762. outb(tp->trc_mask, ioaddr + CSR);
  763. r = inb(ioaddr + IMCCR);
  764. outb(r | IMCCR_EIL, ioaddr + IMCCR);
  765. break;
  766. }
  767. return (0);
  768. }
  769. static int __init smctr_chk_isa(struct net_device *dev)
  770. {
  771. struct net_local *tp = netdev_priv(dev);
  772. int ioaddr = dev->base_addr;
  773. __u8 r1, r2, b, chksum = 0;
  774. __u16 r;
  775. int i;
  776. int err = -ENODEV;
  777. if(smctr_debug > 10)
  778. printk(KERN_DEBUG "%s: smctr_chk_isa %#4x\n", dev->name, ioaddr);
  779. if((ioaddr & 0x1F) != 0)
  780. goto out;
  781. /* Grab the region so that no one else tries to probe our ioports. */
  782. if (!request_region(ioaddr, SMCTR_IO_EXTENT, smctr_name)) {
  783. err = -EBUSY;
  784. goto out;
  785. }
  786. /* Checksum SMC node address */
  787. for(i = 0; i < 8; i++)
  788. {
  789. b = inb(ioaddr + LAR0 + i);
  790. chksum += b;
  791. }
  792. if (chksum != NODE_ADDR_CKSUM)
  793. goto out2;
  794. b = inb(ioaddr + BDID);
  795. if(b != BRD_ID_8115T)
  796. {
  797. printk(KERN_ERR "%s: The adapter found is not supported\n", dev->name);
  798. goto out2;
  799. }
  800. /* Check for 8115T Board ID */
  801. r2 = 0;
  802. for(r = 0; r < 8; r++)
  803. {
  804. r1 = inb(ioaddr + 0x8 + r);
  805. r2 += r1;
  806. }
  807. /* value of RegF adds up the sum to 0xFF */
  808. if((r2 != 0xFF) && (r2 != 0xEE))
  809. goto out2;
  810. /* Get adapter ID */
  811. tp->board_id = smctr_get_boardid(dev, 0);
  812. switch(tp->board_id & 0xffff)
  813. {
  814. case WD8115TA:
  815. smctr_model = "8115T/A";
  816. break;
  817. case WD8115T:
  818. if(tp->extra_info & CHIP_REV_MASK)
  819. smctr_model = "8115T rev XE";
  820. else
  821. smctr_model = "8115T rev XD";
  822. break;
  823. default:
  824. smctr_model = "Unknown";
  825. break;
  826. }
  827. /* Store BIC type. */
  828. tp->bic_type = BIC_584_CHIP;
  829. tp->nic_type = NIC_825_CHIP;
  830. /* Copy Ram Size */
  831. tp->ram_usable = CNFG_SIZE_16KB;
  832. tp->ram_size = CNFG_SIZE_64KB;
  833. /* Get 58x Ram Base */
  834. r1 = inb(ioaddr);
  835. r1 &= 0x3F;
  836. r2 = inb(ioaddr + CNFG_LAAR_584);
  837. r2 &= CNFG_LAAR_MASK;
  838. r2 <<= 3;
  839. r2 |= ((r1 & 0x38) >> 3);
  840. tp->ram_base = ((__u32)r2 << 16) + (((__u32)(r1 & 0x7)) << 13);
  841. /* Get 584 Irq */
  842. r1 = 0;
  843. r1 = inb(ioaddr + CNFG_ICR_583);
  844. r1 &= CNFG_ICR_IR2_584;
  845. r2 = inb(ioaddr + CNFG_IRR_583);
  846. r2 &= CNFG_IRR_IRQS; /* 0x60 */
  847. r2 >>= 5;
  848. switch(r2)
  849. {
  850. case 0:
  851. if(r1 == 0)
  852. dev->irq = 2;
  853. else
  854. dev->irq = 10;
  855. break;
  856. case 1:
  857. if(r1 == 0)
  858. dev->irq = 3;
  859. else
  860. dev->irq = 11;
  861. break;
  862. case 2:
  863. if(r1 == 0)
  864. {
  865. if(tp->extra_info & ALTERNATE_IRQ_BIT)
  866. dev->irq = 5;
  867. else
  868. dev->irq = 4;
  869. }
  870. else
  871. dev->irq = 15;
  872. break;
  873. case 3:
  874. if(r1 == 0)
  875. dev->irq = 7;
  876. else
  877. dev->irq = 4;
  878. break;
  879. default:
  880. printk(KERN_ERR "%s: No IRQ found aborting\n", dev->name);
  881. goto out2;
  882. }
  883. if (request_irq(dev->irq, smctr_interrupt, IRQF_SHARED, smctr_name, dev))
  884. goto out2;
  885. /* Get 58x Rom Base */
  886. r1 = inb(ioaddr + CNFG_BIO_583);
  887. r1 &= 0x3E;
  888. r1 |= 0x40;
  889. tp->rom_base = (__u32)r1 << 13;
  890. /* Get 58x Rom Size */
  891. r1 = inb(ioaddr + CNFG_BIO_583);
  892. r1 &= 0xC0;
  893. if(r1 == 0)
  894. tp->rom_size = ROM_DISABLE;
  895. else
  896. {
  897. r1 >>= 6;
  898. tp->rom_size = (__u16)CNFG_SIZE_8KB << r1;
  899. }
  900. /* Get 58x Boot Status */
  901. r1 = inb(ioaddr + CNFG_GP2);
  902. tp->mode_bits &= (~BOOT_STATUS_MASK);
  903. if(r1 & CNFG_GP2_BOOT_NIBBLE)
  904. tp->mode_bits |= BOOT_TYPE_1;
  905. /* Get 58x Zero Wait State */
  906. tp->mode_bits &= (~ZERO_WAIT_STATE_MASK);
  907. r1 = inb(ioaddr + CNFG_IRR_583);
  908. if(r1 & CNFG_IRR_ZWS)
  909. tp->mode_bits |= ZERO_WAIT_STATE_8_BIT;
  910. if(tp->board_id & BOARD_16BIT)
  911. {
  912. r1 = inb(ioaddr + CNFG_LAAR_584);
  913. if(r1 & CNFG_LAAR_ZWS)
  914. tp->mode_bits |= ZERO_WAIT_STATE_16_BIT;
  915. }
  916. /* Get 584 Media Menu */
  917. tp->media_menu = 14;
  918. r1 = inb(ioaddr + CNFG_IRR_583);
  919. tp->mode_bits &= 0xf8ff; /* (~CNFG_INTERFACE_TYPE_MASK) */
  920. if((tp->board_id & TOKEN_MEDIA) == TOKEN_MEDIA)
  921. {
  922. /* Get Advanced Features */
  923. if(((r1 & 0x6) >> 1) == 0x3)
  924. tp->media_type |= MEDIA_UTP_16;
  925. else
  926. {
  927. if(((r1 & 0x6) >> 1) == 0x2)
  928. tp->media_type |= MEDIA_STP_16;
  929. else
  930. {
  931. if(((r1 & 0x6) >> 1) == 0x1)
  932. tp->media_type |= MEDIA_UTP_4;
  933. else
  934. tp->media_type |= MEDIA_STP_4;
  935. }
  936. }
  937. r1 = inb(ioaddr + CNFG_GP2);
  938. if(!(r1 & 0x2) ) /* GP2_ETRD */
  939. tp->mode_bits |= EARLY_TOKEN_REL;
  940. /* see if the chip is corrupted
  941. if(smctr_read_584_chksum(ioaddr))
  942. {
  943. printk(KERN_ERR "%s: EEPROM Checksum Failure\n", dev->name);
  944. free_irq(dev->irq, dev);
  945. goto out2;
  946. }
  947. */
  948. }
  949. return (0);
  950. out2:
  951. release_region(ioaddr, SMCTR_IO_EXTENT);
  952. out:
  953. return err;
  954. }
  955. static int __init smctr_get_boardid(struct net_device *dev, int mca)
  956. {
  957. struct net_local *tp = netdev_priv(dev);
  958. int ioaddr = dev->base_addr;
  959. __u8 r, r1, IdByte;
  960. __u16 BoardIdMask;
  961. tp->board_id = BoardIdMask = 0;
  962. if(mca)
  963. {
  964. BoardIdMask |= (MICROCHANNEL+INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);
  965. tp->extra_info |= (INTERFACE_594_CHIP+RAM_SIZE_64K+NIC_825_BIT+ALTERNATE_IRQ_BIT+SLOT_16BIT);
  966. }
  967. else
  968. {
  969. BoardIdMask|=(INTERFACE_CHIP+TOKEN_MEDIA+PAGED_RAM+BOARD_16BIT);
  970. tp->extra_info |= (INTERFACE_584_CHIP + RAM_SIZE_64K
  971. + NIC_825_BIT + ALTERNATE_IRQ_BIT);
  972. }
  973. if(!mca)
  974. {
  975. r = inb(ioaddr + BID_REG_1);
  976. r &= 0x0c;
  977. outb(r, ioaddr + BID_REG_1);
  978. r = inb(ioaddr + BID_REG_1);
  979. if(r & BID_SIXTEEN_BIT_BIT)
  980. {
  981. tp->extra_info |= SLOT_16BIT;
  982. tp->adapter_bus = BUS_ISA16_TYPE;
  983. }
  984. else
  985. tp->adapter_bus = BUS_ISA8_TYPE;
  986. }
  987. else
  988. tp->adapter_bus = BUS_MCA_TYPE;
  989. /* Get Board Id Byte */
  990. IdByte = inb(ioaddr + BID_BOARD_ID_BYTE);
  991. /* if Major version > 1.0 then
  992. * return;
  993. */
  994. if(IdByte & 0xF8)
  995. return (-1);
  996. r1 = inb(ioaddr + BID_REG_1);
  997. r1 &= BID_ICR_MASK;
  998. r1 |= BID_OTHER_BIT;
  999. outb(r1, ioaddr + BID_REG_1);
  1000. r1 = inb(ioaddr + BID_REG_3);
  1001. r1 &= BID_EAR_MASK;
  1002. r1 |= BID_ENGR_PAGE;
  1003. outb(r1, ioaddr + BID_REG_3);
  1004. r1 = inb(ioaddr + BID_REG_1);
  1005. r1 &= BID_ICR_MASK;
  1006. r1 |= (BID_RLA | BID_OTHER_BIT);
  1007. outb(r1, ioaddr + BID_REG_1);
  1008. r1 = inb(ioaddr + BID_REG_1);
  1009. while(r1 & BID_RECALL_DONE_MASK)
  1010. r1 = inb(ioaddr + BID_REG_1);
  1011. r = inb(ioaddr + BID_LAR_0 + BID_REG_6);
  1012. /* clear chip rev bits */
  1013. tp->extra_info &= ~CHIP_REV_MASK;
  1014. tp->extra_info |= ((r & BID_EEPROM_CHIP_REV_MASK) << 6);
  1015. r1 = inb(ioaddr + BID_REG_1);
  1016. r1 &= BID_ICR_MASK;
  1017. r1 |= BID_OTHER_BIT;
  1018. outb(r1, ioaddr + BID_REG_1);
  1019. r1 = inb(ioaddr + BID_REG_3);
  1020. r1 &= BID_EAR_MASK;
  1021. r1 |= BID_EA6;
  1022. outb(r1, ioaddr + BID_REG_3);
  1023. r1 = inb(ioaddr + BID_REG_1);
  1024. r1 &= BID_ICR_MASK;
  1025. r1 |= BID_RLA;
  1026. outb(r1, ioaddr + BID_REG_1);
  1027. r1 = inb(ioaddr + BID_REG_1);
  1028. while(r1 & BID_RECALL_DONE_MASK)
  1029. r1 = inb(ioaddr + BID_REG_1);
  1030. return (BoardIdMask);
  1031. }
  1032. static int smctr_get_group_address(struct net_device *dev)
  1033. {
  1034. smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_GROUP_ADDR);
  1035. return(smctr_wait_cmd(dev));
  1036. }
  1037. static int smctr_get_functional_address(struct net_device *dev)
  1038. {
  1039. smctr_issue_read_word_cmd(dev, RW_FUNCTIONAL_ADDR);
  1040. return(smctr_wait_cmd(dev));
  1041. }
  1042. /* Calculate number of Non-MAC receive BDB's and data buffers.
  1043. * This function must simulate allocateing shared memory exactly
  1044. * as the allocate_shared_memory function above.
  1045. */
  1046. static unsigned int smctr_get_num_rx_bdbs(struct net_device *dev)
  1047. {
  1048. struct net_local *tp = netdev_priv(dev);
  1049. unsigned int mem_used = 0;
  1050. /* Allocate System Control Blocks. */
  1051. mem_used += sizeof(SCGBlock);
  1052. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1053. mem_used += sizeof(SCLBlock);
  1054. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1055. mem_used += sizeof(ACBlock) * tp->num_acbs;
  1056. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1057. mem_used += sizeof(ISBlock);
  1058. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1059. mem_used += MISC_DATA_SIZE;
  1060. /* Allocate transmit FCB's. */
  1061. mem_used += TO_PARAGRAPH_BOUNDRY(mem_used);
  1062. mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[MAC_QUEUE];
  1063. mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[NON_MAC_QUEUE];
  1064. mem_used += sizeof(FCBlock) * tp->num_tx_fcbs[BUG_QUEUE];
  1065. /* Allocate transmit BDBs. */
  1066. mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[MAC_QUEUE];
  1067. mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[NON_MAC_QUEUE];
  1068. mem_used += sizeof(BDBlock) * tp->num_tx_bdbs[BUG_QUEUE];
  1069. /* Allocate receive FCBs. */
  1070. mem_used += sizeof(FCBlock) * tp->num_rx_fcbs[MAC_QUEUE];
  1071. mem_used += sizeof(FCBlock) * tp->num_rx_fcbs[NON_MAC_QUEUE];
  1072. /* Allocate receive BDBs. */
  1073. mem_used += sizeof(BDBlock) * tp->num_rx_bdbs[MAC_QUEUE];
  1074. /* Allocate MAC transmit buffers.
  1075. * MAC transmit buffers don't have to be on an ODD Boundry.
  1076. */
  1077. mem_used += tp->tx_buff_size[MAC_QUEUE];
  1078. /* Allocate BUG transmit buffers. */
  1079. mem_used += tp->tx_buff_size[BUG_QUEUE];
  1080. /* Allocate MAC receive data buffers.
  1081. * MAC receive buffers don't have to be on a 256 byte boundary.
  1082. */
  1083. mem_used += RX_DATA_BUFFER_SIZE * tp->num_rx_bdbs[MAC_QUEUE];
  1084. /* Allocate Non-MAC transmit buffers.
  1085. * For maximum Netware performance, put Tx Buffers on
  1086. * ODD Boundry,and then restore malloc to Even Boundrys.
  1087. */
  1088. mem_used += 1L;
  1089. mem_used += tp->tx_buff_size[NON_MAC_QUEUE];
  1090. mem_used += 1L;
  1091. /* CALCULATE NUMBER OF NON-MAC RX BDB'S
  1092. * AND NON-MAC RX DATA BUFFERS
  1093. *
  1094. * Make sure the mem_used offset at this point is the
  1095. * same as in allocate_shared memory or the following
  1096. * boundary adjustment will be incorrect (i.e. not allocating
  1097. * the non-mac receive buffers above cannot change the 256
  1098. * byte offset).
  1099. *
  1100. * Since this cannot be guaranteed, adding the full 256 bytes
  1101. * to the amount of shared memory used at this point will guaranteed
  1102. * that the rx data buffers do not overflow shared memory.
  1103. */
  1104. mem_used += 0x100;
  1105. return((0xffff - mem_used) / (RX_DATA_BUFFER_SIZE + sizeof(BDBlock)));
  1106. }
  1107. static int smctr_get_physical_drop_number(struct net_device *dev)
  1108. {
  1109. smctr_issue_read_word_cmd(dev, RW_PHYSICAL_DROP_NUMBER);
  1110. return(smctr_wait_cmd(dev));
  1111. }
  1112. static __u8 * smctr_get_rx_pointer(struct net_device *dev, short queue)
  1113. {
  1114. struct net_local *tp = netdev_priv(dev);
  1115. BDBlock *bdb;
  1116. bdb = (BDBlock *)((__u32)tp->ram_access
  1117. + (__u32)(tp->rx_fcb_curr[queue]->trc_bdb_ptr));
  1118. tp->rx_fcb_curr[queue]->bdb_ptr = bdb;
  1119. return ((__u8 *)bdb->data_block_ptr);
  1120. }
  1121. static int smctr_get_station_id(struct net_device *dev)
  1122. {
  1123. smctr_issue_read_word_cmd(dev, RW_INDIVIDUAL_MAC_ADDRESS);
  1124. return(smctr_wait_cmd(dev));
  1125. }
  1126. /*
  1127. * Get the current statistics. This may be called with the card open
  1128. * or closed.
  1129. */
  1130. static struct net_device_stats *smctr_get_stats(struct net_device *dev)
  1131. {
  1132. struct net_local *tp = netdev_priv(dev);
  1133. return ((struct net_device_stats *)&tp->MacStat);
  1134. }
  1135. static FCBlock *smctr_get_tx_fcb(struct net_device *dev, __u16 queue,
  1136. __u16 bytes_count)
  1137. {
  1138. struct net_local *tp = netdev_priv(dev);
  1139. FCBlock *pFCB;
  1140. BDBlock *pbdb;
  1141. unsigned short alloc_size;
  1142. unsigned short *temp;
  1143. if(smctr_debug > 20)
  1144. printk(KERN_DEBUG "smctr_get_tx_fcb\n");
  1145. /* check if there is enough FCB blocks */
  1146. if(tp->num_tx_fcbs_used[queue] >= tp->num_tx_fcbs[queue])
  1147. return ((FCBlock *)(-1L));
  1148. /* round off the input pkt size to the nearest even number */
  1149. alloc_size = (bytes_count + 1) & 0xfffe;
  1150. /* check if enough mem */
  1151. if((tp->tx_buff_used[queue] + alloc_size) > tp->tx_buff_size[queue])
  1152. return ((FCBlock *)(-1L));
  1153. /* check if past the end ;
  1154. * if exactly enough mem to end of ring, alloc from front.
  1155. * this avoids update of curr when curr = end
  1156. */
  1157. if(((unsigned long)(tp->tx_buff_curr[queue]) + alloc_size)
  1158. >= (unsigned long)(tp->tx_buff_end[queue]))
  1159. {
  1160. /* check if enough memory from ring head */
  1161. alloc_size = alloc_size +
  1162. (__u16)((__u32)tp->tx_buff_end[queue]
  1163. - (__u32)tp->tx_buff_curr[queue]);
  1164. if((tp->tx_buff_used[queue] + alloc_size)
  1165. > tp->tx_buff_size[queue])
  1166. {
  1167. return ((FCBlock *)(-1L));
  1168. }
  1169. /* ring wrap */
  1170. tp->tx_buff_curr[queue] = tp->tx_buff_head[queue];
  1171. }
  1172. tp->tx_buff_used[queue] += alloc_size;
  1173. tp->num_tx_fcbs_used[queue]++;
  1174. tp->tx_fcb_curr[queue]->frame_length = bytes_count;
  1175. tp->tx_fcb_curr[queue]->memory_alloc = alloc_size;
  1176. temp = tp->tx_buff_curr[queue];
  1177. tp->tx_buff_curr[queue]
  1178. = (__u16 *)((__u32)temp + (__u32)((bytes_count + 1) & 0xfffe));
  1179. pbdb = tp->tx_fcb_curr[queue]->bdb_ptr;
  1180. pbdb->buffer_length = bytes_count;
  1181. pbdb->data_block_ptr = temp;
  1182. pbdb->trc_data_block_ptr = TRC_POINTER(temp);
  1183. pFCB = tp->tx_fcb_curr[queue];
  1184. tp->tx_fcb_curr[queue] = tp->tx_fcb_curr[queue]->next_ptr;
  1185. return (pFCB);
  1186. }
  1187. static int smctr_get_upstream_neighbor_addr(struct net_device *dev)
  1188. {
  1189. smctr_issue_read_word_cmd(dev, RW_UPSTREAM_NEIGHBOR_ADDRESS);
  1190. return(smctr_wait_cmd(dev));
  1191. }
  1192. static int smctr_hardware_send_packet(struct net_device *dev,
  1193. struct net_local *tp)
  1194. {
  1195. struct tr_statistics *tstat = &tp->MacStat;
  1196. struct sk_buff *skb;
  1197. FCBlock *fcb;
  1198. if(smctr_debug > 10)
  1199. printk(KERN_DEBUG"%s: smctr_hardware_send_packet\n", dev->name);
  1200. if(tp->status != OPEN)
  1201. return (-1);
  1202. if(tp->monitor_state_ready != 1)
  1203. return (-1);
  1204. for(;;)
  1205. {
  1206. /* Send first buffer from queue */
  1207. skb = skb_dequeue(&tp->SendSkbQueue);
  1208. if(skb == NULL)
  1209. return (-1);
  1210. tp->QueueSkb++;
  1211. if(skb->len < SMC_HEADER_SIZE || skb->len > tp->max_packet_size) return (-1);
  1212. smctr_enable_16bit(dev);
  1213. smctr_set_page(dev, (__u8 *)tp->ram_access);
  1214. if((fcb = smctr_get_tx_fcb(dev, NON_MAC_QUEUE, skb->len))
  1215. == (FCBlock *)(-1L))
  1216. {
  1217. smctr_disable_16bit(dev);
  1218. return (-1);
  1219. }
  1220. smctr_tx_move_frame(dev, skb,
  1221. (__u8 *)fcb->bdb_ptr->data_block_ptr, skb->len);
  1222. smctr_set_page(dev, (__u8 *)fcb);
  1223. smctr_trc_send_packet(dev, fcb, NON_MAC_QUEUE);
  1224. dev_kfree_skb(skb);
  1225. tstat->tx_packets++;
  1226. smctr_disable_16bit(dev);
  1227. }
  1228. return (0);
  1229. }
  1230. static int smctr_init_acbs(struct net_device *dev)
  1231. {
  1232. struct net_local *tp = netdev_priv(dev);
  1233. unsigned int i;
  1234. ACBlock *acb;
  1235. if(smctr_debug > 10)
  1236. printk(KERN_DEBUG "%s: smctr_init_acbs\n", dev->name);
  1237. acb = tp->acb_head;
  1238. acb->cmd_done_status = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);
  1239. acb->cmd_info = ACB_CHAIN_END;
  1240. acb->cmd = 0;
  1241. acb->subcmd = 0;
  1242. acb->data_offset_lo = 0;
  1243. acb->data_offset_hi = 0;
  1244. acb->next_ptr
  1245. = (ACBlock *)(((char *)acb) + sizeof(ACBlock));
  1246. acb->trc_next_ptr = TRC_POINTER(acb->next_ptr);
  1247. for(i = 1; i < tp->num_acbs; i++)
  1248. {
  1249. acb = acb->next_ptr;
  1250. acb->cmd_done_status
  1251. = (ACB_COMMAND_DONE | ACB_COMMAND_SUCCESSFUL);
  1252. acb->cmd_info = ACB_CHAIN_END;
  1253. acb->cmd = 0;
  1254. acb->subcmd = 0;
  1255. acb->data_offset_lo = 0;
  1256. acb->data_offset_hi = 0;
  1257. acb->next_ptr
  1258. = (ACBlock *)(((char *)acb) + sizeof(ACBlock));
  1259. acb->trc_next_ptr = TRC_POINTER(acb->next_ptr);
  1260. }
  1261. acb->next_ptr = tp->acb_head;
  1262. acb->trc_next_ptr = TRC_POINTER(tp->acb_head);
  1263. tp->acb_next = tp->acb_head->next_ptr;
  1264. tp->acb_curr = tp->acb_head->next_ptr;
  1265. tp->num_acbs_used = 0;
  1266. return (0);
  1267. }
  1268. static int smctr_init_adapter(struct net_device *dev)
  1269. {
  1270. struct net_local *tp = netdev_priv(dev);
  1271. int err;
  1272. if(smctr_debug > 10)
  1273. printk(KERN_DEBUG "%s: smctr_init_adapter\n", dev->name);
  1274. tp->status = CLOSED;
  1275. tp->page_offset_mask = (tp->ram_usable * 1024) - 1;
  1276. skb_queue_head_init(&tp->SendSkbQueue);
  1277. tp->QueueSkb = MAX_TX_QUEUE;
  1278. if(!(tp->group_address_0 & 0x0080))
  1279. tp->group_address_0 |= 0x00C0;
  1280. if(!(tp->functional_address_0 & 0x00C0))
  1281. tp->functional_address_0 |= 0x00C0;
  1282. tp->functional_address[0] &= 0xFF7F;
  1283. if(tp->authorized_function_classes == 0)
  1284. tp->authorized_function_classes = 0x7FFF;
  1285. if(tp->authorized_access_priority == 0)
  1286. tp->authorized_access_priority = 0x06;
  1287. smctr_disable_bic_int(dev);
  1288. smctr_set_trc_reset(dev->base_addr);
  1289. smctr_enable_16bit(dev);
  1290. smctr_set_page(dev, (__u8 *)tp->ram_access);
  1291. if(smctr_checksum_firmware(dev))
  1292. {
  1293. printk(KERN_ERR "%s: Previously loaded firmware is missing\n",dev->name); return (-ENOENT);
  1294. }
  1295. if((err = smctr_ram_memory_test(dev)))
  1296. {
  1297. printk(KERN_ERR "%s: RAM memory test failed.\n", dev->name);
  1298. return (-EIO);
  1299. }
  1300. smctr_set_rx_look_ahead(dev);
  1301. smctr_load_node_addr(dev);
  1302. /* Initialize adapter for Internal Self Test. */
  1303. smctr_reset_adapter(dev);
  1304. if((err = smctr_init_card_real(dev)))
  1305. {
  1306. printk(KERN_ERR "%s: Initialization of card failed (%d)\n",
  1307. dev->name, err);
  1308. return (-EINVAL);
  1309. }
  1310. /* This routine clobbers the TRC's internal registers. */
  1311. if((err = smctr_internal_self_test(dev)))
  1312. {
  1313. printk(KERN_ERR "%s: Card failed internal self test (%d)\n",
  1314. dev->name, err);
  1315. return (-EINVAL);
  1316. }
  1317. /* Re-Initialize adapter's internal registers */
  1318. smctr_reset_adapter(dev);
  1319. if((err = smctr_init_card_real(dev)))
  1320. {
  1321. printk(KERN_ERR "%s: Initialization of card failed (%d)\n",
  1322. dev->name, err);
  1323. return (-EINVAL);
  1324. }
  1325. smctr_enable_bic_int(dev);
  1326. if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))
  1327. return (err);
  1328. smctr_disable_16bit(dev);
  1329. return (0);
  1330. }
  1331. static int smctr_init_card_real(struct net_device *dev)
  1332. {
  1333. struct net_local *tp = netdev_priv(dev);
  1334. int err = 0;
  1335. if(smctr_debug > 10)
  1336. printk(KERN_DEBUG "%s: smctr_init_card_real\n", dev->name);
  1337. tp->sh_mem_used = 0;
  1338. tp->num_acbs = NUM_OF_ACBS;
  1339. /* Range Check Max Packet Size */
  1340. if(tp->max_packet_size < 256)
  1341. tp->max_packet_size = 256;
  1342. else
  1343. {
  1344. if(tp->max_packet_size > NON_MAC_TX_BUFFER_MEMORY)
  1345. tp->max_packet_size = NON_MAC_TX_BUFFER_MEMORY;
  1346. }
  1347. tp->num_of_tx_buffs = (NON_MAC_TX_BUFFER_MEMORY
  1348. / tp->max_packet_size) - 1;
  1349. if(tp->num_of_tx_buffs > NUM_NON_MAC_TX_FCBS)
  1350. tp->num_of_tx_buffs = NUM_NON_MAC_TX_FCBS;
  1351. else
  1352. {
  1353. if(tp->num_of_tx_buffs == 0)
  1354. tp->num_of_tx_buffs = 1;
  1355. }
  1356. /* Tx queue constants */
  1357. tp->num_tx_fcbs [BUG_QUEUE] = NUM_BUG_TX_FCBS;
  1358. tp->num_tx_bdbs [BUG_QUEUE] = NUM_BUG_TX_BDBS;
  1359. tp->tx_buff_size [BUG_QUEUE] = BUG_TX_BUFFER_MEMORY;
  1360. tp->tx_buff_used [BUG_QUEUE] = 0;
  1361. tp->tx_queue_status [BUG_QUEUE] = NOT_TRANSMITING;
  1362. tp->num_tx_fcbs [MAC_QUEUE] = NUM_MAC_TX_FCBS;
  1363. tp->num_tx_bdbs [MAC_QUEUE] = NUM_MAC_TX_BDBS;
  1364. tp->tx_buff_size [MAC_QUEUE] = MAC_TX_BUFFER_MEMORY;
  1365. tp->tx_buff_used [MAC_QUEUE] = 0;
  1366. tp->tx_queue_status [MAC_QUEUE] = NOT_TRANSMITING;
  1367. tp->num_tx_fcbs [NON_MAC_QUEUE] = NUM_NON_MAC_TX_FCBS;
  1368. tp->num_tx_bdbs [NON_MAC_QUEUE] = NUM_NON_MAC_TX_BDBS;
  1369. tp->tx_buff_size [NON_MAC_QUEUE] = NON_MAC_TX_BUFFER_MEMORY;
  1370. tp->tx_buff_used [NON_MAC_QUEUE] = 0;
  1371. tp->tx_queue_status [NON_MAC_QUEUE] = NOT_TRANSMITING;
  1372. /* Receive Queue Constants */
  1373. tp->num_rx_fcbs[MAC_QUEUE] = NUM_MAC_RX_FCBS;
  1374. tp->num_rx_bdbs[MAC_QUEUE] = NUM_MAC_RX_BDBS;
  1375. if(tp->extra_info & CHIP_REV_MASK)
  1376. tp->num_rx_fcbs[NON_MAC_QUEUE] = 78; /* 825 Rev. XE */
  1377. else
  1378. tp->num_rx_fcbs[NON_MAC_QUEUE] = 7; /* 825 Rev. XD */
  1379. tp->num_rx_bdbs[NON_MAC_QUEUE] = smctr_get_num_rx_bdbs(dev);
  1380. smctr_alloc_shared_memory(dev);
  1381. smctr_init_shared_memory(dev);
  1382. if((err = smctr_issue_init_timers_cmd(dev)))
  1383. return (err);
  1384. if((err = smctr_issue_init_txrx_cmd(dev)))
  1385. {
  1386. printk(KERN_ERR "%s: Hardware failure\n", dev->name);
  1387. return (err);
  1388. }
  1389. return (0);
  1390. }
  1391. static int smctr_init_rx_bdbs(struct net_device *dev)
  1392. {
  1393. struct net_local *tp = netdev_priv(dev);
  1394. unsigned int i, j;
  1395. BDBlock *bdb;
  1396. __u16 *buf;
  1397. if(smctr_debug > 10)
  1398. printk(KERN_DEBUG "%s: smctr_init_rx_bdbs\n", dev->name);
  1399. for(i = 0; i < NUM_RX_QS_USED; i++)
  1400. {
  1401. bdb = tp->rx_bdb_head[i];
  1402. buf = tp->rx_buff_head[i];
  1403. bdb->info = (BDB_CHAIN_END | BDB_NO_WARNING);
  1404. bdb->buffer_length = RX_DATA_BUFFER_SIZE;
  1405. bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
  1406. bdb->data_block_ptr = buf;
  1407. bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1408. if(i == NON_MAC_QUEUE)
  1409. bdb->trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);
  1410. else
  1411. bdb->trc_data_block_ptr = TRC_POINTER(buf);
  1412. for(j = 1; j < tp->num_rx_bdbs[i]; j++)
  1413. {
  1414. bdb->next_ptr->back_ptr = bdb;
  1415. bdb = bdb->next_ptr;
  1416. buf = (__u16 *)((char *)buf + RX_DATA_BUFFER_SIZE);
  1417. bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
  1418. bdb->buffer_length = RX_DATA_BUFFER_SIZE;
  1419. bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
  1420. bdb->data_block_ptr = buf;
  1421. bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1422. if(i == NON_MAC_QUEUE)
  1423. bdb->trc_data_block_ptr = RX_BUFF_TRC_POINTER(buf);
  1424. else
  1425. bdb->trc_data_block_ptr = TRC_POINTER(buf);
  1426. }
  1427. bdb->next_ptr = tp->rx_bdb_head[i];
  1428. bdb->trc_next_ptr = TRC_POINTER(tp->rx_bdb_head[i]);
  1429. tp->rx_bdb_head[i]->back_ptr = bdb;
  1430. tp->rx_bdb_curr[i] = tp->rx_bdb_head[i]->next_ptr;
  1431. }
  1432. return (0);
  1433. }
  1434. static int smctr_init_rx_fcbs(struct net_device *dev)
  1435. {
  1436. struct net_local *tp = netdev_priv(dev);
  1437. unsigned int i, j;
  1438. FCBlock *fcb;
  1439. for(i = 0; i < NUM_RX_QS_USED; i++)
  1440. {
  1441. fcb = tp->rx_fcb_head[i];
  1442. fcb->frame_status = 0;
  1443. fcb->frame_length = 0;
  1444. fcb->info = FCB_CHAIN_END;
  1445. fcb->next_ptr = (FCBlock *)(((char*)fcb) + sizeof(FCBlock));
  1446. if(i == NON_MAC_QUEUE)
  1447. fcb->trc_next_ptr = RX_FCB_TRC_POINTER(fcb->next_ptr);
  1448. else
  1449. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1450. for(j = 1; j < tp->num_rx_fcbs[i]; j++)
  1451. {
  1452. fcb->next_ptr->back_ptr = fcb;
  1453. fcb = fcb->next_ptr;
  1454. fcb->frame_status = 0;
  1455. fcb->frame_length = 0;
  1456. fcb->info = FCB_WARNING;
  1457. fcb->next_ptr
  1458. = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
  1459. if(i == NON_MAC_QUEUE)
  1460. fcb->trc_next_ptr
  1461. = RX_FCB_TRC_POINTER(fcb->next_ptr);
  1462. else
  1463. fcb->trc_next_ptr
  1464. = TRC_POINTER(fcb->next_ptr);
  1465. }
  1466. fcb->next_ptr = tp->rx_fcb_head[i];
  1467. if(i == NON_MAC_QUEUE)
  1468. fcb->trc_next_ptr = RX_FCB_TRC_POINTER(fcb->next_ptr);
  1469. else
  1470. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1471. tp->rx_fcb_head[i]->back_ptr = fcb;
  1472. tp->rx_fcb_curr[i] = tp->rx_fcb_head[i]->next_ptr;
  1473. }
  1474. return(0);
  1475. }
  1476. static int smctr_init_shared_memory(struct net_device *dev)
  1477. {
  1478. struct net_local *tp = netdev_priv(dev);
  1479. unsigned int i;
  1480. __u32 *iscpb;
  1481. if(smctr_debug > 10)
  1482. printk(KERN_DEBUG "%s: smctr_init_shared_memory\n", dev->name);
  1483. smctr_set_page(dev, (__u8 *)(unsigned int)tp->iscpb_ptr);
  1484. /* Initialize Initial System Configuration Point. (ISCP) */
  1485. iscpb = (__u32 *)PAGE_POINTER(&tp->iscpb_ptr->trc_scgb_ptr);
  1486. *iscpb = (__u32)(SWAP_WORDS(TRC_POINTER(tp->scgb_ptr)));
  1487. smctr_set_page(dev, (__u8 *)tp->ram_access);
  1488. /* Initialize System Configuration Pointers. (SCP) */
  1489. tp->scgb_ptr->config = (SCGB_ADDRESS_POINTER_FORMAT
  1490. | SCGB_MULTI_WORD_CONTROL | SCGB_DATA_FORMAT
  1491. | SCGB_BURST_LENGTH);
  1492. tp->scgb_ptr->trc_sclb_ptr = TRC_POINTER(tp->sclb_ptr);
  1493. tp->scgb_ptr->trc_acb_ptr = TRC_POINTER(tp->acb_head);
  1494. tp->scgb_ptr->trc_isb_ptr = TRC_POINTER(tp->isb_ptr);
  1495. tp->scgb_ptr->isbsiz = (sizeof(ISBlock)) - 2;
  1496. /* Initialize System Control Block. (SCB) */
  1497. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_NOP;
  1498. tp->sclb_ptr->iack_code = 0;
  1499. tp->sclb_ptr->resume_control = 0;
  1500. tp->sclb_ptr->int_mask_control = 0;
  1501. tp->sclb_ptr->int_mask_state = 0;
  1502. /* Initialize Interrupt Status Block. (ISB) */
  1503. for(i = 0; i < NUM_OF_INTERRUPTS; i++)
  1504. {
  1505. tp->isb_ptr->IStatus[i].IType = 0xf0;
  1506. tp->isb_ptr->IStatus[i].ISubtype = 0;
  1507. }
  1508. tp->current_isb_index = 0;
  1509. /* Initialize Action Command Block. (ACB) */
  1510. smctr_init_acbs(dev);
  1511. /* Initialize transmit FCB's and BDB's. */
  1512. smctr_link_tx_fcbs_to_bdbs(dev);
  1513. smctr_init_tx_bdbs(dev);
  1514. smctr_init_tx_fcbs(dev);
  1515. /* Initialize receive FCB's and BDB's. */
  1516. smctr_init_rx_bdbs(dev);
  1517. smctr_init_rx_fcbs(dev);
  1518. return (0);
  1519. }
  1520. static int smctr_init_tx_bdbs(struct net_device *dev)
  1521. {
  1522. struct net_local *tp = netdev_priv(dev);
  1523. unsigned int i, j;
  1524. BDBlock *bdb;
  1525. for(i = 0; i < NUM_TX_QS_USED; i++)
  1526. {
  1527. bdb = tp->tx_bdb_head[i];
  1528. bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
  1529. bdb->next_ptr = (BDBlock *)(((char *)bdb) + sizeof(BDBlock));
  1530. bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1531. for(j = 1; j < tp->num_tx_bdbs[i]; j++)
  1532. {
  1533. bdb->next_ptr->back_ptr = bdb;
  1534. bdb = bdb->next_ptr;
  1535. bdb->info = (BDB_NOT_CHAIN_END | BDB_NO_WARNING);
  1536. bdb->next_ptr
  1537. = (BDBlock *)(((char *)bdb) + sizeof( BDBlock)); bdb->trc_next_ptr = TRC_POINTER(bdb->next_ptr);
  1538. }
  1539. bdb->next_ptr = tp->tx_bdb_head[i];
  1540. bdb->trc_next_ptr = TRC_POINTER(tp->tx_bdb_head[i]);
  1541. tp->tx_bdb_head[i]->back_ptr = bdb;
  1542. }
  1543. return (0);
  1544. }
  1545. static int smctr_init_tx_fcbs(struct net_device *dev)
  1546. {
  1547. struct net_local *tp = netdev_priv(dev);
  1548. unsigned int i, j;
  1549. FCBlock *fcb;
  1550. for(i = 0; i < NUM_TX_QS_USED; i++)
  1551. {
  1552. fcb = tp->tx_fcb_head[i];
  1553. fcb->frame_status = 0;
  1554. fcb->frame_length = 0;
  1555. fcb->info = FCB_CHAIN_END;
  1556. fcb->next_ptr = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
  1557. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1558. for(j = 1; j < tp->num_tx_fcbs[i]; j++)
  1559. {
  1560. fcb->next_ptr->back_ptr = fcb;
  1561. fcb = fcb->next_ptr;
  1562. fcb->frame_status = 0;
  1563. fcb->frame_length = 0;
  1564. fcb->info = FCB_CHAIN_END;
  1565. fcb->next_ptr
  1566. = (FCBlock *)(((char *)fcb) + sizeof(FCBlock));
  1567. fcb->trc_next_ptr = TRC_POINTER(fcb->next_ptr);
  1568. }
  1569. fcb->next_ptr = tp->tx_fcb_head[i];
  1570. fcb->trc_next_ptr = TRC_POINTER(tp->tx_fcb_head[i]);
  1571. tp->tx_fcb_head[i]->back_ptr = fcb;
  1572. tp->tx_fcb_end[i] = tp->tx_fcb_head[i]->next_ptr;
  1573. tp->tx_fcb_curr[i] = tp->tx_fcb_head[i]->next_ptr;
  1574. tp->num_tx_fcbs_used[i] = 0;
  1575. }
  1576. return (0);
  1577. }
  1578. static int smctr_internal_self_test(struct net_device *dev)
  1579. {
  1580. struct net_local *tp = netdev_priv(dev);
  1581. int err;
  1582. if((err = smctr_issue_test_internal_rom_cmd(dev)))
  1583. return (err);
  1584. if((err = smctr_wait_cmd(dev)))
  1585. return (err);
  1586. if(tp->acb_head->cmd_done_status & 0xff)
  1587. return (-1);
  1588. if((err = smctr_issue_test_hic_cmd(dev)))
  1589. return (err);
  1590. if((err = smctr_wait_cmd(dev)))
  1591. return (err);
  1592. if(tp->acb_head->cmd_done_status & 0xff)
  1593. return (-1);
  1594. if((err = smctr_issue_test_mac_reg_cmd(dev)))
  1595. return (err);
  1596. if((err = smctr_wait_cmd(dev)))
  1597. return (err);
  1598. if(tp->acb_head->cmd_done_status & 0xff)
  1599. return (-1);
  1600. return (0);
  1601. }
  1602. /*
  1603. * The typical workload of the driver: Handle the network interface interrupts.
  1604. */
  1605. static irqreturn_t smctr_interrupt(int irq, void *dev_id)
  1606. {
  1607. struct net_device *dev = dev_id;
  1608. struct net_local *tp;
  1609. int ioaddr;
  1610. __u16 interrupt_unmask_bits = 0, interrupt_ack_code = 0xff00;
  1611. __u16 err1, err = NOT_MY_INTERRUPT;
  1612. __u8 isb_type, isb_subtype;
  1613. __u16 isb_index;
  1614. ioaddr = dev->base_addr;
  1615. tp = netdev_priv(dev);
  1616. if(tp->status == NOT_INITIALIZED)
  1617. return IRQ_NONE;
  1618. spin_lock(&tp->lock);
  1619. smctr_disable_bic_int(dev);
  1620. smctr_enable_16bit(dev);
  1621. smctr_clear_int(dev);
  1622. /* First read the LSB */
  1623. while((tp->isb_ptr->IStatus[tp->current_isb_index].IType & 0xf0) == 0)
  1624. {
  1625. isb_index = tp->current_isb_index;
  1626. isb_type = tp->isb_ptr->IStatus[isb_index].IType;
  1627. isb_subtype = tp->isb_ptr->IStatus[isb_index].ISubtype;
  1628. (tp->current_isb_index)++;
  1629. if(tp->current_isb_index == NUM_OF_INTERRUPTS)
  1630. tp->current_isb_index = 0;
  1631. if(isb_type >= 0x10)
  1632. {
  1633. smctr_disable_16bit(dev);
  1634. spin_unlock(&tp->lock);
  1635. return IRQ_HANDLED;
  1636. }
  1637. err = HARDWARE_FAILED;
  1638. interrupt_ack_code = isb_index;
  1639. tp->isb_ptr->IStatus[isb_index].IType |= 0xf0;
  1640. interrupt_unmask_bits |= (1 << (__u16)isb_type);
  1641. switch(isb_type)
  1642. {
  1643. case ISB_IMC_MAC_TYPE_3:
  1644. smctr_disable_16bit(dev);
  1645. switch(isb_subtype)
  1646. {
  1647. case 0:
  1648. tp->monitor_state = MS_MONITOR_FSM_INACTIVE;
  1649. break;
  1650. case 1:
  1651. tp->monitor_state = MS_REPEAT_BEACON_STATE;
  1652. break;
  1653. case 2:
  1654. tp->monitor_state = MS_REPEAT_CLAIM_TOKEN_STATE;
  1655. break;
  1656. case 3:
  1657. tp->monitor_state = MS_TRANSMIT_CLAIM_TOKEN_STATE; break;
  1658. case 4:
  1659. tp->monitor_state = MS_STANDBY_MONITOR_STATE;
  1660. break;
  1661. case 5:
  1662. tp->monitor_state = MS_TRANSMIT_BEACON_STATE;
  1663. break;
  1664. case 6:
  1665. tp->monitor_state = MS_ACTIVE_MONITOR_STATE;
  1666. break;
  1667. case 7:
  1668. tp->monitor_state = MS_TRANSMIT_RING_PURGE_STATE;
  1669. break;
  1670. case 8: /* diagnostic state */
  1671. break;
  1672. case 9:
  1673. tp->monitor_state = MS_BEACON_TEST_STATE;
  1674. if(smctr_lobe_media_test(dev))
  1675. {
  1676. tp->ring_status_flags = RING_STATUS_CHANGED;
  1677. tp->ring_status = AUTO_REMOVAL_ERROR;
  1678. smctr_ring_status_chg(dev);
  1679. smctr_bypass_state(dev);
  1680. }
  1681. else
  1682. smctr_issue_insert_cmd(dev);
  1683. break;
  1684. /* case 0x0a-0xff, illegal states */
  1685. default:
  1686. break;
  1687. }
  1688. tp->ring_status_flags = MONITOR_STATE_CHANGED;
  1689. err = smctr_ring_status_chg(dev);
  1690. smctr_enable_16bit(dev);
  1691. break;
  1692. /* Type 0x02 - MAC Error Counters Interrupt
  1693. * One or more MAC Error Counter is half full
  1694. * MAC Error Counters
  1695. * Lost_FR_Error_Counter
  1696. * RCV_Congestion_Counter
  1697. * FR_copied_Error_Counter
  1698. * FREQ_Error_Counter
  1699. * Token_Error_Counter
  1700. * Line_Error_Counter
  1701. * Internal_Error_Count
  1702. */
  1703. case ISB_IMC_MAC_ERROR_COUNTERS:
  1704. /* Read 802.5 Error Counters */
  1705. err = smctr_issue_read_ring_status_cmd(dev);
  1706. break;
  1707. /* Type 0x04 - MAC Type 2 Interrupt
  1708. * HOST needs to enqueue MAC Frame for transmission
  1709. * SubType Bit 15 - RQ_INIT_PDU( Request Initialization) * Changed from RQ_INIT_PDU to
  1710. * TRC_Status_Changed_Indicate
  1711. */
  1712. case ISB_IMC_MAC_TYPE_2:
  1713. err = smctr_issue_read_ring_status_cmd(dev);
  1714. break;
  1715. /* Type 0x05 - TX Frame Interrupt (FI). */
  1716. case ISB_IMC_TX_FRAME:
  1717. /* BUG QUEUE for TRC stuck receive BUG */
  1718. if(isb_subtype & TX_PENDING_PRIORITY_2)
  1719. {
  1720. if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)
  1721. break;
  1722. }
  1723. /* NON-MAC frames only */
  1724. if(isb_subtype & TX_PENDING_PRIORITY_1)
  1725. {
  1726. if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)
  1727. break;
  1728. }
  1729. /* MAC frames only */
  1730. if(isb_subtype & TX_PENDING_PRIORITY_0)
  1731. err = smctr_tx_complete(dev, MAC_QUEUE); break;
  1732. /* Type 0x06 - TX END OF QUEUE (FE) */
  1733. case ISB_IMC_END_OF_TX_QUEUE:
  1734. /* BUG queue */
  1735. if(isb_subtype & TX_PENDING_PRIORITY_2)
  1736. {
  1737. /* ok to clear Receive FIFO overrun
  1738. * imask send_BUG now completes.
  1739. */
  1740. interrupt_unmask_bits |= 0x800;
  1741. tp->tx_queue_status[BUG_QUEUE] = NOT_TRANSMITING;
  1742. if((err = smctr_tx_complete(dev, BUG_QUEUE)) != SUCCESS)
  1743. break;
  1744. if((err = smctr_restart_tx_chain(dev, BUG_QUEUE)) != SUCCESS)
  1745. break;
  1746. }
  1747. /* NON-MAC queue only */
  1748. if(isb_subtype & TX_PENDING_PRIORITY_1)
  1749. {
  1750. tp->tx_queue_status[NON_MAC_QUEUE] = NOT_TRANSMITING;
  1751. if((err = smctr_tx_complete(dev, NON_MAC_QUEUE)) != SUCCESS)
  1752. break;
  1753. if((err = smctr_restart_tx_chain(dev, NON_MAC_QUEUE)) != SUCCESS)
  1754. break;
  1755. }
  1756. /* MAC queue only */
  1757. if(isb_subtype & TX_PENDING_PRIORITY_0)
  1758. {
  1759. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  1760. if((err = smctr_tx_complete(dev, MAC_QUEUE)) != SUCCESS)
  1761. break;
  1762. err = smctr_restart_tx_chain(dev, MAC_QUEUE);
  1763. }
  1764. break;
  1765. /* Type 0x07 - NON-MAC RX Resource Interrupt
  1766. * Subtype bit 12 - (BW) BDB warning
  1767. * Subtype bit 13 - (FW) FCB warning
  1768. * Subtype bit 14 - (BE) BDB End of chain
  1769. * Subtype bit 15 - (FE) FCB End of chain
  1770. */
  1771. case ISB_IMC_NON_MAC_RX_RESOURCE:
  1772. tp->rx_fifo_overrun_count = 0;
  1773. tp->receive_queue_number = NON_MAC_QUEUE;
  1774. err1 = smctr_rx_frame(dev);
  1775. if(isb_subtype & NON_MAC_RX_RESOURCE_FE)
  1776. {
  1777. if((err = smctr_issue_resume_rx_fcb_cmd( dev, NON_MAC_QUEUE)) != SUCCESS) break;
  1778. if(tp->ptr_rx_fcb_overruns)
  1779. (*tp->ptr_rx_fcb_overruns)++;
  1780. }
  1781. if(isb_subtype & NON_MAC_RX_RESOURCE_BE)
  1782. {
  1783. if((err = smctr_issue_resume_rx_bdb_cmd( dev, NON_MAC_QUEUE)) != SUCCESS) break;
  1784. if(tp->ptr_rx_bdb_overruns)
  1785. (*tp->ptr_rx_bdb_overruns)++;
  1786. }
  1787. err = err1;
  1788. break;
  1789. /* Type 0x08 - MAC RX Resource Interrupt
  1790. * Subtype bit 12 - (BW) BDB warning
  1791. * Subtype bit 13 - (FW) FCB warning
  1792. * Subtype bit 14 - (BE) BDB End of chain
  1793. * Subtype bit 15 - (FE) FCB End of chain
  1794. */
  1795. case ISB_IMC_MAC_RX_RESOURCE:
  1796. tp->receive_queue_number = MAC_QUEUE;
  1797. err1 = smctr_rx_frame(dev);
  1798. if(isb_subtype & MAC_RX_RESOURCE_FE)
  1799. {
  1800. if((err = smctr_issue_resume_rx_fcb_cmd( dev, MAC_QUEUE)) != SUCCESS)
  1801. break;
  1802. if(tp->ptr_rx_fcb_overruns)
  1803. (*tp->ptr_rx_fcb_overruns)++;
  1804. }
  1805. if(isb_subtype & MAC_RX_RESOURCE_BE)
  1806. {
  1807. if((err = smctr_issue_resume_rx_bdb_cmd( dev, MAC_QUEUE)) != SUCCESS)
  1808. break;
  1809. if(tp->ptr_rx_bdb_overruns)
  1810. (*tp->ptr_rx_bdb_overruns)++;
  1811. }
  1812. err = err1;
  1813. break;
  1814. /* Type 0x09 - NON_MAC RX Frame Interrupt */
  1815. case ISB_IMC_NON_MAC_RX_FRAME:
  1816. tp->rx_fifo_overrun_count = 0;
  1817. tp->receive_queue_number = NON_MAC_QUEUE;
  1818. err = smctr_rx_frame(dev);
  1819. break;
  1820. /* Type 0x0A - MAC RX Frame Interrupt */
  1821. case ISB_IMC_MAC_RX_FRAME:
  1822. tp->receive_queue_number = MAC_QUEUE;
  1823. err = smctr_rx_frame(dev);
  1824. break;
  1825. /* Type 0x0B - TRC status
  1826. * TRC has encountered an error condition
  1827. * subtype bit 14 - transmit FIFO underrun
  1828. * subtype bit 15 - receive FIFO overrun
  1829. */
  1830. case ISB_IMC_TRC_FIFO_STATUS:
  1831. if(isb_subtype & TRC_FIFO_STATUS_TX_UNDERRUN)
  1832. {
  1833. if(tp->ptr_tx_fifo_underruns)
  1834. (*tp->ptr_tx_fifo_underruns)++;
  1835. }
  1836. if(isb_subtype & TRC_FIFO_STATUS_RX_OVERRUN)
  1837. {
  1838. /* update overrun stuck receive counter
  1839. * if >= 3, has to clear it by sending
  1840. * back to back frames. We pick
  1841. * DAT(duplicate address MAC frame)
  1842. */
  1843. tp->rx_fifo_overrun_count++;
  1844. if(tp->rx_fifo_overrun_count >= 3)
  1845. {
  1846. tp->rx_fifo_overrun_count = 0;
  1847. /* delay clearing fifo overrun
  1848. * imask till send_BUG tx
  1849. * complete posted
  1850. */
  1851. interrupt_unmask_bits &= (~0x800);
  1852. printk(KERN_CRIT "Jay please send bug\n");// smctr_send_bug(dev);
  1853. }
  1854. if(tp->ptr_rx_fifo_overruns)
  1855. (*tp->ptr_rx_fifo_overruns)++;
  1856. }
  1857. err = SUCCESS;
  1858. break;
  1859. /* Type 0x0C - Action Command Status Interrupt
  1860. * Subtype bit 14 - CB end of command chain (CE)
  1861. * Subtype bit 15 - CB command interrupt (CI)
  1862. */
  1863. case ISB_IMC_COMMAND_STATUS:
  1864. err = SUCCESS;
  1865. if(tp->acb_head->cmd == ACB_CMD_HIC_NOP)
  1866. {
  1867. printk(KERN_ERR "i1\n");
  1868. smctr_disable_16bit(dev);
  1869. /* XXXXXXXXXXXXXXXXX */
  1870. /* err = UM_Interrupt(dev); */
  1871. smctr_enable_16bit(dev);
  1872. }
  1873. else
  1874. {
  1875. if((tp->acb_head->cmd
  1876. == ACB_CMD_READ_TRC_STATUS)
  1877. && (tp->acb_head->subcmd
  1878. == RW_TRC_STATUS_BLOCK))
  1879. {
  1880. if(tp->ptr_bcn_type != 0)
  1881. {
  1882. *(tp->ptr_bcn_type)
  1883. = (__u32)((SBlock *)tp->misc_command_data)->BCN_Type;
  1884. }
  1885. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & ERROR_COUNTERS_CHANGED)
  1886. {
  1887. smctr_update_err_stats(dev);
  1888. }
  1889. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & TI_NDIS_RING_STATUS_CHANGED)
  1890. {
  1891. tp->ring_status
  1892. = ((SBlock*)tp->misc_command_data)->TI_NDIS_Ring_Status;
  1893. smctr_disable_16bit(dev);
  1894. err = smctr_ring_status_chg(dev);
  1895. smctr_enable_16bit(dev);
  1896. if((tp->ring_status & REMOVE_RECEIVED)
  1897. && (tp->config_word0 & NO_AUTOREMOVE))
  1898. {
  1899. smctr_issue_remove_cmd(dev);
  1900. }
  1901. if(err != SUCCESS)
  1902. {
  1903. tp->acb_pending = 0;
  1904. break;
  1905. }
  1906. }
  1907. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & UNA_CHANGED)
  1908. {
  1909. if(tp->ptr_una)
  1910. {
  1911. tp->ptr_una[0] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[0]);
  1912. tp->ptr_una[1] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[1]);
  1913. tp->ptr_una[2] = SWAP_BYTES(((SBlock *)tp->misc_command_data)->UNA[2]);
  1914. }
  1915. }
  1916. if(((SBlock *)tp->misc_command_data)->Status_CHG_Indicate & READY_TO_SEND_RQ_INIT) {
  1917. err = smctr_send_rq_init(dev);
  1918. }
  1919. }
  1920. }
  1921. tp->acb_pending = 0;
  1922. break;
  1923. /* Type 0x0D - MAC Type 1 interrupt
  1924. * Subtype -- 00 FR_BCN received at S12
  1925. * 01 FR_BCN received at S21
  1926. * 02 FR_DAT(DA=MA, A<>0) received at S21
  1927. * 03 TSM_EXP at S21
  1928. * 04 FR_REMOVE received at S42
  1929. * 05 TBR_EXP, BR_FLAG_SET at S42
  1930. * 06 TBT_EXP at S53
  1931. */
  1932. case ISB_IMC_MAC_TYPE_1:
  1933. if(isb_subtype > 8)
  1934. {
  1935. err = HARDWARE_FAILED;
  1936. break;
  1937. }
  1938. err = SUCCESS;
  1939. switch(isb_subtype)
  1940. {
  1941. case 0:
  1942. tp->join_state = JS_BYPASS_STATE;
  1943. if(tp->status != CLOSED)
  1944. {
  1945. tp->status = CLOSED;
  1946. err = smctr_status_chg(dev);
  1947. }
  1948. break;
  1949. case 1:
  1950. tp->join_state = JS_LOBE_TEST_STATE;
  1951. break;
  1952. case 2:
  1953. tp->join_state = JS_DETECT_MONITOR_PRESENT_STATE;
  1954. break;
  1955. case 3:
  1956. tp->join_state = JS_AWAIT_NEW_MONITOR_STATE;
  1957. break;
  1958. case 4:
  1959. tp->join_state = JS_DUPLICATE_ADDRESS_TEST_STATE;
  1960. break;
  1961. case 5:
  1962. tp->join_state = JS_NEIGHBOR_NOTIFICATION_STATE;
  1963. break;
  1964. case 6:
  1965. tp->join_state = JS_REQUEST_INITIALIZATION_STATE;
  1966. break;
  1967. case 7:
  1968. tp->join_state = JS_JOIN_COMPLETE_STATE;
  1969. tp->status = OPEN;
  1970. err = smctr_status_chg(dev);
  1971. break;
  1972. case 8:
  1973. tp->join_state = JS_BYPASS_WAIT_STATE;
  1974. break;
  1975. }
  1976. break ;
  1977. /* Type 0x0E - TRC Initialization Sequence Interrupt
  1978. * Subtype -- 00-FF Initializatin sequence complete
  1979. */
  1980. case ISB_IMC_TRC_INTRNL_TST_STATUS:
  1981. tp->status = INITIALIZED;
  1982. smctr_disable_16bit(dev);
  1983. err = smctr_status_chg(dev);
  1984. smctr_enable_16bit(dev);
  1985. break;
  1986. /* other interrupt types, illegal */
  1987. default:
  1988. break;
  1989. }
  1990. if(err != SUCCESS)
  1991. break;
  1992. }
  1993. /* Checking the ack code instead of the unmask bits here is because :
  1994. * while fixing the stuck receive, DAT frame are sent and mask off
  1995. * FIFO overrun interrupt temporarily (interrupt_unmask_bits = 0)
  1996. * but we still want to issue ack to ISB
  1997. */
  1998. if(!(interrupt_ack_code & 0xff00))
  1999. smctr_issue_int_ack(dev, interrupt_ack_code, interrupt_unmask_bits);
  2000. smctr_disable_16bit(dev);
  2001. smctr_enable_bic_int(dev);
  2002. spin_unlock(&tp->lock);
  2003. return IRQ_HANDLED;
  2004. }
  2005. static int smctr_issue_enable_int_cmd(struct net_device *dev,
  2006. __u16 interrupt_enable_mask)
  2007. {
  2008. struct net_local *tp = netdev_priv(dev);
  2009. int err;
  2010. if((err = smctr_wait_while_cbusy(dev)))
  2011. return (err);
  2012. tp->sclb_ptr->int_mask_control = interrupt_enable_mask;
  2013. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;
  2014. smctr_set_ctrl_attention(dev);
  2015. return (0);
  2016. }
  2017. static int smctr_issue_int_ack(struct net_device *dev, __u16 iack_code, __u16 ibits)
  2018. {
  2019. struct net_local *tp = netdev_priv(dev);
  2020. if(smctr_wait_while_cbusy(dev))
  2021. return (-1);
  2022. tp->sclb_ptr->int_mask_control = ibits;
  2023. tp->sclb_ptr->iack_code = iack_code << 1; /* use the offset from base */ tp->sclb_ptr->resume_control = 0;
  2024. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_IACK_CODE_VALID | SCLB_CMD_CLEAR_INTERRUPT_MASK;
  2025. smctr_set_ctrl_attention(dev);
  2026. return (0);
  2027. }
  2028. static int smctr_issue_init_timers_cmd(struct net_device *dev)
  2029. {
  2030. struct net_local *tp = netdev_priv(dev);
  2031. unsigned int i;
  2032. int err;
  2033. __u16 *pTimer_Struc = (__u16 *)tp->misc_command_data;
  2034. if((err = smctr_wait_while_cbusy(dev)))
  2035. return (err);
  2036. if((err = smctr_wait_cmd(dev)))
  2037. return (err);
  2038. tp->config_word0 = THDREN | DMA_TRIGGER | USETPT | NO_AUTOREMOVE;
  2039. tp->config_word1 = 0;
  2040. if((tp->media_type == MEDIA_STP_16)
  2041. || (tp->media_type == MEDIA_UTP_16)
  2042. || (tp->media_type == MEDIA_STP_16_UTP_16))
  2043. {
  2044. tp->config_word0 |= FREQ_16MB_BIT;
  2045. }
  2046. if(tp->mode_bits & EARLY_TOKEN_REL)
  2047. tp->config_word0 |= ETREN;
  2048. if(tp->mode_bits & LOOPING_MODE_MASK)
  2049. tp->config_word0 |= RX_OWN_BIT;
  2050. else
  2051. tp->config_word0 &= ~RX_OWN_BIT;
  2052. if(tp->receive_mask & PROMISCUOUS_MODE)
  2053. tp->config_word0 |= PROMISCUOUS_BIT;
  2054. else
  2055. tp->config_word0 &= ~PROMISCUOUS_BIT;
  2056. if(tp->receive_mask & ACCEPT_ERR_PACKETS)
  2057. tp->config_word0 |= SAVBAD_BIT;
  2058. else
  2059. tp->config_word0 &= ~SAVBAD_BIT;
  2060. if(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
  2061. tp->config_word0 |= RXATMAC;
  2062. else
  2063. tp->config_word0 &= ~RXATMAC;
  2064. if(tp->receive_mask & ACCEPT_MULTI_PROM)
  2065. tp->config_word1 |= MULTICAST_ADDRESS_BIT;
  2066. else
  2067. tp->config_word1 &= ~MULTICAST_ADDRESS_BIT;
  2068. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING_SPANNING)
  2069. tp->config_word1 |= SOURCE_ROUTING_SPANNING_BITS;
  2070. else
  2071. {
  2072. if(tp->receive_mask & ACCEPT_SOURCE_ROUTING)
  2073. tp->config_word1 |= SOURCE_ROUTING_EXPLORER_BIT;
  2074. else
  2075. tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
  2076. }
  2077. if((tp->media_type == MEDIA_STP_16)
  2078. || (tp->media_type == MEDIA_UTP_16)
  2079. || (tp->media_type == MEDIA_STP_16_UTP_16))
  2080. {
  2081. tp->config_word1 |= INTERFRAME_SPACING_16;
  2082. }
  2083. else
  2084. tp->config_word1 |= INTERFRAME_SPACING_4;
  2085. *pTimer_Struc++ = tp->config_word0;
  2086. *pTimer_Struc++ = tp->config_word1;
  2087. if((tp->media_type == MEDIA_STP_4)
  2088. || (tp->media_type == MEDIA_UTP_4)
  2089. || (tp->media_type == MEDIA_STP_4_UTP_4))
  2090. {
  2091. *pTimer_Struc++ = 0x00FA; /* prescale */
  2092. *pTimer_Struc++ = 0x2710; /* TPT_limit */
  2093. *pTimer_Struc++ = 0x2710; /* TQP_limit */
  2094. *pTimer_Struc++ = 0x0A28; /* TNT_limit */
  2095. *pTimer_Struc++ = 0x3E80; /* TBT_limit */
  2096. *pTimer_Struc++ = 0x3A98; /* TSM_limit */
  2097. *pTimer_Struc++ = 0x1B58; /* TAM_limit */
  2098. *pTimer_Struc++ = 0x00C8; /* TBR_limit */
  2099. *pTimer_Struc++ = 0x07D0; /* TER_limit */
  2100. *pTimer_Struc++ = 0x000A; /* TGT_limit */
  2101. *pTimer_Struc++ = 0x1162; /* THT_limit */
  2102. *pTimer_Struc++ = 0x07D0; /* TRR_limit */
  2103. *pTimer_Struc++ = 0x1388; /* TVX_limit */
  2104. *pTimer_Struc++ = 0x0000; /* reserved */
  2105. }
  2106. else
  2107. {
  2108. *pTimer_Struc++ = 0x03E8; /* prescale */
  2109. *pTimer_Struc++ = 0x9C40; /* TPT_limit */
  2110. *pTimer_Struc++ = 0x9C40; /* TQP_limit */
  2111. *pTimer_Struc++ = 0x0A28; /* TNT_limit */
  2112. *pTimer_Struc++ = 0x3E80; /* TBT_limit */
  2113. *pTimer_Struc++ = 0x3A98; /* TSM_limit */
  2114. *pTimer_Struc++ = 0x1B58; /* TAM_limit */
  2115. *pTimer_Struc++ = 0x00C8; /* TBR_limit */
  2116. *pTimer_Struc++ = 0x07D0; /* TER_limit */
  2117. *pTimer_Struc++ = 0x000A; /* TGT_limit */
  2118. *pTimer_Struc++ = 0x4588; /* THT_limit */
  2119. *pTimer_Struc++ = 0x1F40; /* TRR_limit */
  2120. *pTimer_Struc++ = 0x4E20; /* TVX_limit */
  2121. *pTimer_Struc++ = 0x0000; /* reserved */
  2122. }
  2123. /* Set node address. */
  2124. *pTimer_Struc++ = dev->dev_addr[0] << 8
  2125. | (dev->dev_addr[1] & 0xFF);
  2126. *pTimer_Struc++ = dev->dev_addr[2] << 8
  2127. | (dev->dev_addr[3] & 0xFF);
  2128. *pTimer_Struc++ = dev->dev_addr[4] << 8
  2129. | (dev->dev_addr[5] & 0xFF);
  2130. /* Set group address. */
  2131. *pTimer_Struc++ = tp->group_address_0 << 8
  2132. | tp->group_address_0 >> 8;
  2133. *pTimer_Struc++ = tp->group_address[0] << 8
  2134. | tp->group_address[0] >> 8;
  2135. *pTimer_Struc++ = tp->group_address[1] << 8
  2136. | tp->group_address[1] >> 8;
  2137. /* Set functional address. */
  2138. *pTimer_Struc++ = tp->functional_address_0 << 8
  2139. | tp->functional_address_0 >> 8;
  2140. *pTimer_Struc++ = tp->functional_address[0] << 8
  2141. | tp->functional_address[0] >> 8;
  2142. *pTimer_Struc++ = tp->functional_address[1] << 8
  2143. | tp->functional_address[1] >> 8;
  2144. /* Set Bit-Wise group address. */
  2145. *pTimer_Struc++ = tp->bitwise_group_address[0] << 8
  2146. | tp->bitwise_group_address[0] >> 8;
  2147. *pTimer_Struc++ = tp->bitwise_group_address[1] << 8
  2148. | tp->bitwise_group_address[1] >> 8;
  2149. /* Set ring number address. */
  2150. *pTimer_Struc++ = tp->source_ring_number;
  2151. *pTimer_Struc++ = tp->target_ring_number;
  2152. /* Physical drop number. */
  2153. *pTimer_Struc++ = (unsigned short)0;
  2154. *pTimer_Struc++ = (unsigned short)0;
  2155. /* Product instance ID. */
  2156. for(i = 0; i < 9; i++)
  2157. *pTimer_Struc++ = (unsigned short)0;
  2158. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TRC_TIMERS, 0);
  2159. return (err);
  2160. }
  2161. static int smctr_issue_init_txrx_cmd(struct net_device *dev)
  2162. {
  2163. struct net_local *tp = netdev_priv(dev);
  2164. unsigned int i;
  2165. int err;
  2166. void **txrx_ptrs = (void *)tp->misc_command_data;
  2167. if((err = smctr_wait_while_cbusy(dev)))
  2168. return (err);
  2169. if((err = smctr_wait_cmd(dev)))
  2170. {
  2171. printk(KERN_ERR "%s: Hardware failure\n", dev->name);
  2172. return (err);
  2173. }
  2174. /* Initialize Transmit Queue Pointers that are used, to point to
  2175. * a single FCB.
  2176. */
  2177. for(i = 0; i < NUM_TX_QS_USED; i++)
  2178. *txrx_ptrs++ = (void *)TRC_POINTER(tp->tx_fcb_head[i]);
  2179. /* Initialize Transmit Queue Pointers that are NOT used to ZERO. */
  2180. for(; i < MAX_TX_QS; i++)
  2181. *txrx_ptrs++ = (void *)0;
  2182. /* Initialize Receive Queue Pointers (MAC and Non-MAC) that are
  2183. * used, to point to a single FCB and a BDB chain of buffers.
  2184. */
  2185. for(i = 0; i < NUM_RX_QS_USED; i++)
  2186. {
  2187. *txrx_ptrs++ = (void *)TRC_POINTER(tp->rx_fcb_head[i]);
  2188. *txrx_ptrs++ = (void *)TRC_POINTER(tp->rx_bdb_head[i]);
  2189. }
  2190. /* Initialize Receive Queue Pointers that are NOT used to ZERO. */
  2191. for(; i < MAX_RX_QS; i++)
  2192. {
  2193. *txrx_ptrs++ = (void *)0;
  2194. *txrx_ptrs++ = (void *)0;
  2195. }
  2196. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_INIT_TX_RX, 0);
  2197. return (err);
  2198. }
  2199. static int smctr_issue_insert_cmd(struct net_device *dev)
  2200. {
  2201. int err;
  2202. err = smctr_setup_single_cmd(dev, ACB_CMD_INSERT, ACB_SUB_CMD_NOP);
  2203. return (err);
  2204. }
  2205. static int smctr_issue_read_ring_status_cmd(struct net_device *dev)
  2206. {
  2207. int err;
  2208. if((err = smctr_wait_while_cbusy(dev)))
  2209. return (err);
  2210. if((err = smctr_wait_cmd(dev)))
  2211. return (err);
  2212. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_READ_TRC_STATUS,
  2213. RW_TRC_STATUS_BLOCK);
  2214. return (err);
  2215. }
  2216. static int smctr_issue_read_word_cmd(struct net_device *dev, __u16 aword_cnt)
  2217. {
  2218. int err;
  2219. if((err = smctr_wait_while_cbusy(dev)))
  2220. return (err);
  2221. if((err = smctr_wait_cmd(dev)))
  2222. return (err);
  2223. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_READ_VALUE,
  2224. aword_cnt);
  2225. return (err);
  2226. }
  2227. static int smctr_issue_remove_cmd(struct net_device *dev)
  2228. {
  2229. struct net_local *tp = netdev_priv(dev);
  2230. int err;
  2231. if((err = smctr_wait_while_cbusy(dev)))
  2232. return (err);
  2233. tp->sclb_ptr->resume_control = 0;
  2234. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_CMD_REMOVE;
  2235. smctr_set_ctrl_attention(dev);
  2236. return (0);
  2237. }
  2238. static int smctr_issue_resume_acb_cmd(struct net_device *dev)
  2239. {
  2240. struct net_local *tp = netdev_priv(dev);
  2241. int err;
  2242. if((err = smctr_wait_while_cbusy(dev)))
  2243. return (err);
  2244. tp->sclb_ptr->resume_control = SCLB_RC_ACB;
  2245. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
  2246. tp->acb_pending = 1;
  2247. smctr_set_ctrl_attention(dev);
  2248. return (0);
  2249. }
  2250. static int smctr_issue_resume_rx_bdb_cmd(struct net_device *dev, __u16 queue)
  2251. {
  2252. struct net_local *tp = netdev_priv(dev);
  2253. int err;
  2254. if((err = smctr_wait_while_cbusy(dev)))
  2255. return (err);
  2256. if(queue == MAC_QUEUE)
  2257. tp->sclb_ptr->resume_control = SCLB_RC_RX_MAC_BDB;
  2258. else
  2259. tp->sclb_ptr->resume_control = SCLB_RC_RX_NON_MAC_BDB;
  2260. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
  2261. smctr_set_ctrl_attention(dev);
  2262. return (0);
  2263. }
  2264. static int smctr_issue_resume_rx_fcb_cmd(struct net_device *dev, __u16 queue)
  2265. {
  2266. struct net_local *tp = netdev_priv(dev);
  2267. if(smctr_debug > 10)
  2268. printk(KERN_DEBUG "%s: smctr_issue_resume_rx_fcb_cmd\n", dev->name);
  2269. if(smctr_wait_while_cbusy(dev))
  2270. return (-1);
  2271. if(queue == MAC_QUEUE)
  2272. tp->sclb_ptr->resume_control = SCLB_RC_RX_MAC_FCB;
  2273. else
  2274. tp->sclb_ptr->resume_control = SCLB_RC_RX_NON_MAC_FCB;
  2275. tp->sclb_ptr->valid_command = SCLB_VALID | SCLB_RESUME_CONTROL_VALID;
  2276. smctr_set_ctrl_attention(dev);
  2277. return (0);
  2278. }
  2279. static int smctr_issue_resume_tx_fcb_cmd(struct net_device *dev, __u16 queue)
  2280. {
  2281. struct net_local *tp = netdev_priv(dev);
  2282. if(smctr_debug > 10)
  2283. printk(KERN_DEBUG "%s: smctr_issue_resume_tx_fcb_cmd\n", dev->name);
  2284. if(smctr_wait_while_cbusy(dev))
  2285. return (-1);
  2286. tp->sclb_ptr->resume_control = (SCLB_RC_TFCB0 << queue);
  2287. tp->sclb_ptr->valid_command = SCLB_RESUME_CONTROL_VALID | SCLB_VALID;
  2288. smctr_set_ctrl_attention(dev);
  2289. return (0);
  2290. }
  2291. static int smctr_issue_test_internal_rom_cmd(struct net_device *dev)
  2292. {
  2293. int err;
  2294. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2295. TRC_INTERNAL_ROM_TEST);
  2296. return (err);
  2297. }
  2298. static int smctr_issue_test_hic_cmd(struct net_device *dev)
  2299. {
  2300. int err;
  2301. err = smctr_setup_single_cmd(dev, ACB_CMD_HIC_TEST,
  2302. TRC_HOST_INTERFACE_REG_TEST);
  2303. return (err);
  2304. }
  2305. static int smctr_issue_test_mac_reg_cmd(struct net_device *dev)
  2306. {
  2307. int err;
  2308. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2309. TRC_MAC_REGISTERS_TEST);
  2310. return (err);
  2311. }
  2312. static int smctr_issue_trc_loopback_cmd(struct net_device *dev)
  2313. {
  2314. int err;
  2315. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2316. TRC_INTERNAL_LOOPBACK);
  2317. return (err);
  2318. }
  2319. static int smctr_issue_tri_loopback_cmd(struct net_device *dev)
  2320. {
  2321. int err;
  2322. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2323. TRC_TRI_LOOPBACK);
  2324. return (err);
  2325. }
  2326. static int smctr_issue_write_byte_cmd(struct net_device *dev,
  2327. short aword_cnt, void *byte)
  2328. {
  2329. struct net_local *tp = netdev_priv(dev);
  2330. unsigned int iword, ibyte;
  2331. int err;
  2332. if((err = smctr_wait_while_cbusy(dev)))
  2333. return (err);
  2334. if((err = smctr_wait_cmd(dev)))
  2335. return (err);
  2336. for(iword = 0, ibyte = 0; iword < (unsigned int)(aword_cnt & 0xff);
  2337. iword++, ibyte += 2)
  2338. {
  2339. tp->misc_command_data[iword] = (*((__u8 *)byte + ibyte) << 8)
  2340. | (*((__u8 *)byte + ibyte + 1));
  2341. }
  2342. return (smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,
  2343. aword_cnt));
  2344. }
  2345. static int smctr_issue_write_word_cmd(struct net_device *dev,
  2346. short aword_cnt, void *word)
  2347. {
  2348. struct net_local *tp = netdev_priv(dev);
  2349. unsigned int i, err;
  2350. if((err = smctr_wait_while_cbusy(dev)))
  2351. return (err);
  2352. if((err = smctr_wait_cmd(dev)))
  2353. return (err);
  2354. for(i = 0; i < (unsigned int)(aword_cnt & 0xff); i++)
  2355. tp->misc_command_data[i] = *((__u16 *)word + i);
  2356. err = smctr_setup_single_cmd_w_data(dev, ACB_CMD_MCT_WRITE_VALUE,
  2357. aword_cnt);
  2358. return (err);
  2359. }
  2360. static int smctr_join_complete_state(struct net_device *dev)
  2361. {
  2362. int err;
  2363. err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,
  2364. JS_JOIN_COMPLETE_STATE);
  2365. return (err);
  2366. }
  2367. static int smctr_link_tx_fcbs_to_bdbs(struct net_device *dev)
  2368. {
  2369. struct net_local *tp = netdev_priv(dev);
  2370. unsigned int i, j;
  2371. FCBlock *fcb;
  2372. BDBlock *bdb;
  2373. for(i = 0; i < NUM_TX_QS_USED; i++)
  2374. {
  2375. fcb = tp->tx_fcb_head[i];
  2376. bdb = tp->tx_bdb_head[i];
  2377. for(j = 0; j < tp->num_tx_fcbs[i]; j++)
  2378. {
  2379. fcb->bdb_ptr = bdb;
  2380. fcb->trc_bdb_ptr = TRC_POINTER(bdb);
  2381. fcb = (FCBlock *)((char *)fcb + sizeof(FCBlock));
  2382. bdb = (BDBlock *)((char *)bdb + sizeof(BDBlock));
  2383. }
  2384. }
  2385. return (0);
  2386. }
  2387. static int smctr_load_firmware(struct net_device *dev)
  2388. {
  2389. struct net_local *tp = netdev_priv(dev);
  2390. __u16 i, checksum = 0;
  2391. int err = 0;
  2392. if(smctr_debug > 10)
  2393. printk(KERN_DEBUG "%s: smctr_load_firmware\n", dev->name);
  2394. tp->ptr_ucode = smctr_code;
  2395. tp->num_of_tx_buffs = 4;
  2396. tp->mode_bits |= UMAC;
  2397. tp->receive_mask = 0;
  2398. tp->max_packet_size = 4177;
  2399. /* Can only upload the firmware once per adapter reset. */
  2400. if(tp->microcode_version != 0)
  2401. return (UCODE_PRESENT);
  2402. /* Verify the firmware exists and is there in the right amount. */
  2403. if((tp->ptr_ucode == 0L)
  2404. || (*(tp->ptr_ucode + UCODE_VERSION_OFFSET) < UCODE_VERSION))
  2405. {
  2406. return (UCODE_NOT_PRESENT);
  2407. }
  2408. /* UCODE_SIZE is not included in Checksum. */
  2409. for(i = 0; i < *((__u16 *)(tp->ptr_ucode + UCODE_SIZE_OFFSET)); i += 2)
  2410. checksum += *((__u16 *)(tp->ptr_ucode + 2 + i));
  2411. if(checksum)
  2412. return (UCODE_NOT_PRESENT);
  2413. /* At this point we have a valid firmware image, lets kick it on up. */
  2414. smctr_enable_adapter_ram(dev);
  2415. smctr_enable_16bit(dev);
  2416. smctr_set_page(dev, (__u8 *)tp->ram_access);
  2417. if((smctr_checksum_firmware(dev))
  2418. || (*(tp->ptr_ucode + UCODE_VERSION_OFFSET)
  2419. > tp->microcode_version))
  2420. {
  2421. smctr_enable_adapter_ctrl_store(dev);
  2422. /* Zero out ram space for firmware. */
  2423. for(i = 0; i < CS_RAM_SIZE; i += 2)
  2424. *((__u16 *)(tp->ram_access + i)) = 0;
  2425. smctr_decode_firmware(dev);
  2426. tp->microcode_version = *(tp->ptr_ucode + UCODE_VERSION_OFFSET); *((__u16 *)(tp->ram_access + CS_RAM_VERSION_OFFSET))
  2427. = (tp->microcode_version << 8);
  2428. *((__u16 *)(tp->ram_access + CS_RAM_CHECKSUM_OFFSET))
  2429. = ~(tp->microcode_version << 8) + 1;
  2430. smctr_disable_adapter_ctrl_store(dev);
  2431. if(smctr_checksum_firmware(dev))
  2432. err = HARDWARE_FAILED;
  2433. }
  2434. else
  2435. err = UCODE_PRESENT;
  2436. smctr_disable_16bit(dev);
  2437. return (err);
  2438. }
  2439. static int smctr_load_node_addr(struct net_device *dev)
  2440. {
  2441. int ioaddr = dev->base_addr;
  2442. unsigned int i;
  2443. __u8 r;
  2444. for(i = 0; i < 6; i++)
  2445. {
  2446. r = inb(ioaddr + LAR0 + i);
  2447. dev->dev_addr[i] = (char)r;
  2448. }
  2449. dev->addr_len = 6;
  2450. return (0);
  2451. }
  2452. /* Lobe Media Test.
  2453. * During the transmission of the initial 1500 lobe media MAC frames,
  2454. * the phase lock loop in the 805 chip may lock, and then un-lock, causing
  2455. * the 825 to go into a PURGE state. When performing a PURGE, the MCT
  2456. * microcode will not transmit any frames given to it by the host, and
  2457. * will consequently cause a timeout.
  2458. *
  2459. * NOTE 1: If the monitor_state is MS_BEACON_TEST_STATE, all transmit
  2460. * queues other then the one used for the lobe_media_test should be
  2461. * disabled.!?
  2462. *
  2463. * NOTE 2: If the monitor_state is MS_BEACON_TEST_STATE and the receive_mask
  2464. * has any multi-cast or promiscous bits set, the receive_mask needs to
  2465. * be changed to clear the multi-cast or promiscous mode bits, the lobe_test
  2466. * run, and then the receive mask set back to its original value if the test
  2467. * is successful.
  2468. */
  2469. static int smctr_lobe_media_test(struct net_device *dev)
  2470. {
  2471. struct net_local *tp = netdev_priv(dev);
  2472. unsigned int i, perror = 0;
  2473. unsigned short saved_rcv_mask;
  2474. if(smctr_debug > 10)
  2475. printk(KERN_DEBUG "%s: smctr_lobe_media_test\n", dev->name);
  2476. /* Clear receive mask for lobe test. */
  2477. saved_rcv_mask = tp->receive_mask;
  2478. tp->receive_mask = 0;
  2479. smctr_chg_rx_mask(dev);
  2480. /* Setup the lobe media test. */
  2481. smctr_lobe_media_test_cmd(dev);
  2482. if(smctr_wait_cmd(dev))
  2483. {
  2484. smctr_reset_adapter(dev);
  2485. tp->status = CLOSED;
  2486. return (LOBE_MEDIA_TEST_FAILED);
  2487. }
  2488. /* Tx lobe media test frames. */
  2489. for(i = 0; i < 1500; ++i)
  2490. {
  2491. if(smctr_send_lobe_media_test(dev))
  2492. {
  2493. if(perror)
  2494. {
  2495. smctr_reset_adapter(dev);
  2496. tp->state = CLOSED;
  2497. return (LOBE_MEDIA_TEST_FAILED);
  2498. }
  2499. else
  2500. {
  2501. perror = 1;
  2502. if(smctr_lobe_media_test_cmd(dev))
  2503. {
  2504. smctr_reset_adapter(dev);
  2505. tp->state = CLOSED;
  2506. return (LOBE_MEDIA_TEST_FAILED);
  2507. }
  2508. }
  2509. }
  2510. }
  2511. if(smctr_send_dat(dev))
  2512. {
  2513. if(smctr_send_dat(dev))
  2514. {
  2515. smctr_reset_adapter(dev);
  2516. tp->state = CLOSED;
  2517. return (LOBE_MEDIA_TEST_FAILED);
  2518. }
  2519. }
  2520. /* Check if any frames received during test. */
  2521. if((tp->rx_fcb_curr[MAC_QUEUE]->frame_status)
  2522. || (tp->rx_fcb_curr[NON_MAC_QUEUE]->frame_status))
  2523. {
  2524. smctr_reset_adapter(dev);
  2525. tp->state = CLOSED;
  2526. return (LOBE_MEDIA_TEST_FAILED);
  2527. }
  2528. /* Set receive mask to "Promisc" mode. */
  2529. tp->receive_mask = saved_rcv_mask;
  2530. smctr_chg_rx_mask(dev);
  2531. return (0);
  2532. }
  2533. static int smctr_lobe_media_test_cmd(struct net_device *dev)
  2534. {
  2535. struct net_local *tp = netdev_priv(dev);
  2536. int err;
  2537. if(smctr_debug > 10)
  2538. printk(KERN_DEBUG "%s: smctr_lobe_media_test_cmd\n", dev->name);
  2539. /* Change to lobe media test state. */
  2540. if(tp->monitor_state != MS_BEACON_TEST_STATE)
  2541. {
  2542. smctr_lobe_media_test_state(dev);
  2543. if(smctr_wait_cmd(dev))
  2544. {
  2545. printk(KERN_ERR "Lobe Failed test state\n");
  2546. return (LOBE_MEDIA_TEST_FAILED);
  2547. }
  2548. }
  2549. err = smctr_setup_single_cmd(dev, ACB_CMD_MCT_TEST,
  2550. TRC_LOBE_MEDIA_TEST);
  2551. return (err);
  2552. }
  2553. static int smctr_lobe_media_test_state(struct net_device *dev)
  2554. {
  2555. int err;
  2556. err = smctr_setup_single_cmd(dev, ACB_CMD_CHANGE_JOIN_STATE,
  2557. JS_LOBE_TEST_STATE);
  2558. return (err);
  2559. }
  2560. static int smctr_make_8025_hdr(struct net_device *dev,
  2561. MAC_HEADER *rmf, MAC_HEADER *tmf, __u16 ac_fc)
  2562. {
  2563. tmf->ac = MSB(ac_fc); /* msb is access control */
  2564. tmf->fc = LSB(ac_fc); /* lsb is frame control */
  2565. tmf->sa[0] = dev->dev_addr[0];
  2566. tmf->sa[1] = dev->dev_addr[1];
  2567. tmf->sa[2] = dev->dev_addr[2];
  2568. tmf->sa[3] = dev->dev_addr[3];
  2569. tmf->sa[4] = dev->dev_addr[4];
  2570. tmf->sa[5] = dev->dev_addr[5];
  2571. switch(tmf->vc)
  2572. {
  2573. /* Send RQ_INIT to RPS */
  2574. case RQ_INIT:
  2575. tmf->da[0] = 0xc0;
  2576. tmf->da[1] = 0x00;
  2577. tmf->da[2] = 0x00;
  2578. tmf->da[3] = 0x00;
  2579. tmf->da[4] = 0x00;
  2580. tmf->da[5] = 0x02;
  2581. break;
  2582. /* Send RPT_TX_FORWARD to CRS */
  2583. case RPT_TX_FORWARD:
  2584. tmf->da[0] = 0xc0;
  2585. tmf->da[1] = 0x00;
  2586. tmf->da[2] = 0x00;
  2587. tmf->da[3] = 0x00;
  2588. tmf->da[4] = 0x00;
  2589. tmf->da[5] = 0x10;
  2590. break;
  2591. /* Everything else goes to sender */
  2592. default:
  2593. tmf->da[0] = rmf->sa[0];
  2594. tmf->da[1] = rmf->sa[1];
  2595. tmf->da[2] = rmf->sa[2];
  2596. tmf->da[3] = rmf->sa[3];
  2597. tmf->da[4] = rmf->sa[4];
  2598. tmf->da[5] = rmf->sa[5];
  2599. break;
  2600. }
  2601. return (0);
  2602. }
  2603. static int smctr_make_access_pri(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2604. {
  2605. struct net_local *tp = netdev_priv(dev);
  2606. tsv->svi = AUTHORIZED_ACCESS_PRIORITY;
  2607. tsv->svl = S_AUTHORIZED_ACCESS_PRIORITY;
  2608. tsv->svv[0] = MSB(tp->authorized_access_priority);
  2609. tsv->svv[1] = LSB(tp->authorized_access_priority);
  2610. return (0);
  2611. }
  2612. static int smctr_make_addr_mod(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2613. {
  2614. tsv->svi = ADDRESS_MODIFER;
  2615. tsv->svl = S_ADDRESS_MODIFER;
  2616. tsv->svv[0] = 0;
  2617. tsv->svv[1] = 0;
  2618. return (0);
  2619. }
  2620. static int smctr_make_auth_funct_class(struct net_device *dev,
  2621. MAC_SUB_VECTOR *tsv)
  2622. {
  2623. struct net_local *tp = netdev_priv(dev);
  2624. tsv->svi = AUTHORIZED_FUNCTION_CLASS;
  2625. tsv->svl = S_AUTHORIZED_FUNCTION_CLASS;
  2626. tsv->svv[0] = MSB(tp->authorized_function_classes);
  2627. tsv->svv[1] = LSB(tp->authorized_function_classes);
  2628. return (0);
  2629. }
  2630. static int smctr_make_corr(struct net_device *dev,
  2631. MAC_SUB_VECTOR *tsv, __u16 correlator)
  2632. {
  2633. tsv->svi = CORRELATOR;
  2634. tsv->svl = S_CORRELATOR;
  2635. tsv->svv[0] = MSB(correlator);
  2636. tsv->svv[1] = LSB(correlator);
  2637. return (0);
  2638. }
  2639. static int smctr_make_funct_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2640. {
  2641. struct net_local *tp = netdev_priv(dev);
  2642. smctr_get_functional_address(dev);
  2643. tsv->svi = FUNCTIONAL_ADDRESS;
  2644. tsv->svl = S_FUNCTIONAL_ADDRESS;
  2645. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2646. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2647. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2648. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2649. return (0);
  2650. }
  2651. static int smctr_make_group_addr(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2652. {
  2653. struct net_local *tp = netdev_priv(dev);
  2654. smctr_get_group_address(dev);
  2655. tsv->svi = GROUP_ADDRESS;
  2656. tsv->svl = S_GROUP_ADDRESS;
  2657. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2658. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2659. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2660. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2661. /* Set Group Address Sub-vector to all zeros if only the
  2662. * Group Address/Functional Address Indicator is set.
  2663. */
  2664. if(tsv->svv[0] == 0x80 && tsv->svv[1] == 0x00
  2665. && tsv->svv[2] == 0x00 && tsv->svv[3] == 0x00)
  2666. tsv->svv[0] = 0x00;
  2667. return (0);
  2668. }
  2669. static int smctr_make_phy_drop_num(struct net_device *dev,
  2670. MAC_SUB_VECTOR *tsv)
  2671. {
  2672. struct net_local *tp = netdev_priv(dev);
  2673. smctr_get_physical_drop_number(dev);
  2674. tsv->svi = PHYSICAL_DROP;
  2675. tsv->svl = S_PHYSICAL_DROP;
  2676. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2677. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2678. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2679. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2680. return (0);
  2681. }
  2682. static int smctr_make_product_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2683. {
  2684. int i;
  2685. tsv->svi = PRODUCT_INSTANCE_ID;
  2686. tsv->svl = S_PRODUCT_INSTANCE_ID;
  2687. for(i = 0; i < 18; i++)
  2688. tsv->svv[i] = 0xF0;
  2689. return (0);
  2690. }
  2691. static int smctr_make_station_id(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2692. {
  2693. struct net_local *tp = netdev_priv(dev);
  2694. smctr_get_station_id(dev);
  2695. tsv->svi = STATION_IDENTIFER;
  2696. tsv->svl = S_STATION_IDENTIFER;
  2697. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2698. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2699. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2700. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2701. tsv->svv[4] = MSB(tp->misc_command_data[2]);
  2702. tsv->svv[5] = LSB(tp->misc_command_data[2]);
  2703. return (0);
  2704. }
  2705. static int smctr_make_ring_station_status(struct net_device *dev,
  2706. MAC_SUB_VECTOR * tsv)
  2707. {
  2708. tsv->svi = RING_STATION_STATUS;
  2709. tsv->svl = S_RING_STATION_STATUS;
  2710. tsv->svv[0] = 0;
  2711. tsv->svv[1] = 0;
  2712. tsv->svv[2] = 0;
  2713. tsv->svv[3] = 0;
  2714. tsv->svv[4] = 0;
  2715. tsv->svv[5] = 0;
  2716. return (0);
  2717. }
  2718. static int smctr_make_ring_station_version(struct net_device *dev,
  2719. MAC_SUB_VECTOR *tsv)
  2720. {
  2721. struct net_local *tp = netdev_priv(dev);
  2722. tsv->svi = RING_STATION_VERSION_NUMBER;
  2723. tsv->svl = S_RING_STATION_VERSION_NUMBER;
  2724. tsv->svv[0] = 0xe2; /* EBCDIC - S */
  2725. tsv->svv[1] = 0xd4; /* EBCDIC - M */
  2726. tsv->svv[2] = 0xc3; /* EBCDIC - C */
  2727. tsv->svv[3] = 0x40; /* EBCDIC - */
  2728. tsv->svv[4] = 0xe5; /* EBCDIC - V */
  2729. tsv->svv[5] = 0xF0 + (tp->microcode_version >> 4);
  2730. tsv->svv[6] = 0xF0 + (tp->microcode_version & 0x0f);
  2731. tsv->svv[7] = 0x40; /* EBCDIC - */
  2732. tsv->svv[8] = 0xe7; /* EBCDIC - X */
  2733. if(tp->extra_info & CHIP_REV_MASK)
  2734. tsv->svv[9] = 0xc5; /* EBCDIC - E */
  2735. else
  2736. tsv->svv[9] = 0xc4; /* EBCDIC - D */
  2737. return (0);
  2738. }
  2739. static int smctr_make_tx_status_code(struct net_device *dev,
  2740. MAC_SUB_VECTOR *tsv, __u16 tx_fstatus)
  2741. {
  2742. tsv->svi = TRANSMIT_STATUS_CODE;
  2743. tsv->svl = S_TRANSMIT_STATUS_CODE;
  2744. tsv->svv[0] = ((tx_fstatus & 0x0100 >> 6) || IBM_PASS_SOURCE_ADDR);
  2745. /* Stripped frame status of Transmitted Frame */
  2746. tsv->svv[1] = tx_fstatus & 0xff;
  2747. return (0);
  2748. }
  2749. static int smctr_make_upstream_neighbor_addr(struct net_device *dev,
  2750. MAC_SUB_VECTOR *tsv)
  2751. {
  2752. struct net_local *tp = netdev_priv(dev);
  2753. smctr_get_upstream_neighbor_addr(dev);
  2754. tsv->svi = UPSTREAM_NEIGHBOR_ADDRESS;
  2755. tsv->svl = S_UPSTREAM_NEIGHBOR_ADDRESS;
  2756. tsv->svv[0] = MSB(tp->misc_command_data[0]);
  2757. tsv->svv[1] = LSB(tp->misc_command_data[0]);
  2758. tsv->svv[2] = MSB(tp->misc_command_data[1]);
  2759. tsv->svv[3] = LSB(tp->misc_command_data[1]);
  2760. tsv->svv[4] = MSB(tp->misc_command_data[2]);
  2761. tsv->svv[5] = LSB(tp->misc_command_data[2]);
  2762. return (0);
  2763. }
  2764. static int smctr_make_wrap_data(struct net_device *dev, MAC_SUB_VECTOR *tsv)
  2765. {
  2766. tsv->svi = WRAP_DATA;
  2767. tsv->svl = S_WRAP_DATA;
  2768. return (0);
  2769. }
  2770. /*
  2771. * Open/initialize the board. This is called sometime after
  2772. * booting when the 'ifconfig' program is run.
  2773. *
  2774. * This routine should set everything up anew at each open, even
  2775. * registers that "should" only need to be set once at boot, so that
  2776. * there is non-reboot way to recover if something goes wrong.
  2777. */
  2778. static int smctr_open(struct net_device *dev)
  2779. {
  2780. int err;
  2781. if(smctr_debug > 10)
  2782. printk(KERN_DEBUG "%s: smctr_open\n", dev->name);
  2783. err = smctr_init_adapter(dev);
  2784. if(err < 0)
  2785. return (err);
  2786. return (err);
  2787. }
  2788. /* Interrupt driven open of Token card. */
  2789. static int smctr_open_tr(struct net_device *dev)
  2790. {
  2791. struct net_local *tp = netdev_priv(dev);
  2792. unsigned long flags;
  2793. int err;
  2794. if(smctr_debug > 10)
  2795. printk(KERN_DEBUG "%s: smctr_open_tr\n", dev->name);
  2796. /* Now we can actually open the adapter. */
  2797. if(tp->status == OPEN)
  2798. return (0);
  2799. if(tp->status != INITIALIZED)
  2800. return (-1);
  2801. /* FIXME: it would work a lot better if we masked the irq sources
  2802. on the card here, then we could skip the locking and poll nicely */
  2803. spin_lock_irqsave(&tp->lock, flags);
  2804. smctr_set_page(dev, (__u8 *)tp->ram_access);
  2805. if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)MAC_QUEUE)))
  2806. goto out;
  2807. if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)MAC_QUEUE)))
  2808. goto out;
  2809. if((err = smctr_issue_resume_rx_fcb_cmd(dev, (short)NON_MAC_QUEUE)))
  2810. goto out;
  2811. if((err = smctr_issue_resume_rx_bdb_cmd(dev, (short)NON_MAC_QUEUE)))
  2812. goto out;
  2813. tp->status = CLOSED;
  2814. /* Insert into the Ring or Enter Loopback Mode. */
  2815. if((tp->mode_bits & LOOPING_MODE_MASK) == LOOPBACK_MODE_1)
  2816. {
  2817. tp->status = CLOSED;
  2818. if(!(err = smctr_issue_trc_loopback_cmd(dev)))
  2819. {
  2820. if(!(err = smctr_wait_cmd(dev)))
  2821. tp->status = OPEN;
  2822. }
  2823. smctr_status_chg(dev);
  2824. }
  2825. else
  2826. {
  2827. if((tp->mode_bits & LOOPING_MODE_MASK) == LOOPBACK_MODE_2)
  2828. {
  2829. tp->status = CLOSED;
  2830. if(!(err = smctr_issue_tri_loopback_cmd(dev)))
  2831. {
  2832. if(!(err = smctr_wait_cmd(dev)))
  2833. tp->status = OPEN;
  2834. }
  2835. smctr_status_chg(dev);
  2836. }
  2837. else
  2838. {
  2839. if((tp->mode_bits & LOOPING_MODE_MASK)
  2840. == LOOPBACK_MODE_3)
  2841. {
  2842. tp->status = CLOSED;
  2843. if(!(err = smctr_lobe_media_test_cmd(dev)))
  2844. {
  2845. if(!(err = smctr_wait_cmd(dev)))
  2846. tp->status = OPEN;
  2847. }
  2848. smctr_status_chg(dev);
  2849. }
  2850. else
  2851. {
  2852. if(!(err = smctr_lobe_media_test(dev)))
  2853. err = smctr_issue_insert_cmd(dev);
  2854. else
  2855. {
  2856. if(err == LOBE_MEDIA_TEST_FAILED)
  2857. printk(KERN_WARNING "%s: Lobe Media Test Failure - Check cable?\n", dev->name);
  2858. }
  2859. }
  2860. }
  2861. }
  2862. out:
  2863. spin_unlock_irqrestore(&tp->lock, flags);
  2864. return (err);
  2865. }
  2866. /* Check for a network adapter of this type,
  2867. * and return device structure if one exists.
  2868. */
  2869. struct net_device __init *smctr_probe(int unit)
  2870. {
  2871. struct net_device *dev = alloc_trdev(sizeof(struct net_local));
  2872. static const unsigned ports[] = {
  2873. 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0, 0x300,
  2874. 0x320, 0x340, 0x360, 0x380, 0
  2875. };
  2876. const unsigned *port;
  2877. int err = 0;
  2878. if (!dev)
  2879. return ERR_PTR(-ENOMEM);
  2880. SET_MODULE_OWNER(dev);
  2881. if (unit >= 0) {
  2882. sprintf(dev->name, "tr%d", unit);
  2883. netdev_boot_setup_check(dev);
  2884. }
  2885. if (dev->base_addr > 0x1ff) /* Check a single specified location. */
  2886. err = smctr_probe1(dev, dev->base_addr);
  2887. else if(dev->base_addr != 0) /* Don't probe at all. */
  2888. err =-ENXIO;
  2889. else {
  2890. for (port = ports; *port; port++) {
  2891. err = smctr_probe1(dev, *port);
  2892. if (!err)
  2893. break;
  2894. }
  2895. }
  2896. if (err)
  2897. goto out;
  2898. err = register_netdev(dev);
  2899. if (err)
  2900. goto out1;
  2901. return dev;
  2902. out1:
  2903. #ifdef CONFIG_MCA_LEGACY
  2904. { struct net_local *tp = netdev_priv(dev);
  2905. if (tp->slot_num)
  2906. mca_mark_as_unused(tp->slot_num);
  2907. }
  2908. #endif
  2909. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  2910. free_irq(dev->irq, dev);
  2911. out:
  2912. free_netdev(dev);
  2913. return ERR_PTR(err);
  2914. }
  2915. static int __init smctr_probe1(struct net_device *dev, int ioaddr)
  2916. {
  2917. static unsigned version_printed;
  2918. struct net_local *tp = netdev_priv(dev);
  2919. int err;
  2920. __u32 *ram;
  2921. if(smctr_debug && version_printed++ == 0)
  2922. printk(version);
  2923. spin_lock_init(&tp->lock);
  2924. dev->base_addr = ioaddr;
  2925. /* Actually detect an adapter now. */
  2926. err = smctr_chk_isa(dev);
  2927. if(err < 0)
  2928. {
  2929. if ((err = smctr_chk_mca(dev)) < 0) {
  2930. err = -ENODEV;
  2931. goto out;
  2932. }
  2933. }
  2934. tp = netdev_priv(dev);
  2935. dev->mem_start = tp->ram_base;
  2936. dev->mem_end = dev->mem_start + 0x10000;
  2937. ram = (__u32 *)phys_to_virt(dev->mem_start);
  2938. tp->ram_access = *(__u32 *)&ram;
  2939. tp->status = NOT_INITIALIZED;
  2940. err = smctr_load_firmware(dev);
  2941. if(err != UCODE_PRESENT && err != SUCCESS)
  2942. {
  2943. printk(KERN_ERR "%s: Firmware load failed (%d)\n", dev->name, err);
  2944. err = -EIO;
  2945. goto out;
  2946. }
  2947. /* Allow user to specify ring speed on module insert. */
  2948. if(ringspeed == 4)
  2949. tp->media_type = MEDIA_UTP_4;
  2950. else
  2951. tp->media_type = MEDIA_UTP_16;
  2952. printk(KERN_INFO "%s: %s %s at Io %#4x, Irq %d, Rom %#4x, Ram %#4x.\n",
  2953. dev->name, smctr_name, smctr_model,
  2954. (unsigned int)dev->base_addr,
  2955. dev->irq, tp->rom_base, tp->ram_base);
  2956. dev->open = smctr_open;
  2957. dev->stop = smctr_close;
  2958. dev->hard_start_xmit = smctr_send_packet;
  2959. dev->tx_timeout = smctr_timeout;
  2960. dev->watchdog_timeo = HZ;
  2961. dev->get_stats = smctr_get_stats;
  2962. dev->set_multicast_list = &smctr_set_multicast_list;
  2963. return (0);
  2964. out:
  2965. return err;
  2966. }
  2967. static int smctr_process_rx_packet(MAC_HEADER *rmf, __u16 size,
  2968. struct net_device *dev, __u16 rx_status)
  2969. {
  2970. struct net_local *tp = netdev_priv(dev);
  2971. struct sk_buff *skb;
  2972. __u16 rcode, correlator;
  2973. int err = 0;
  2974. __u8 xframe = 1;
  2975. __u16 tx_fstatus;
  2976. rmf->vl = SWAP_BYTES(rmf->vl);
  2977. if(rx_status & FCB_RX_STATUS_DA_MATCHED)
  2978. {
  2979. switch(rmf->vc)
  2980. {
  2981. /* Received MAC Frames Processed by RS. */
  2982. case INIT:
  2983. if((rcode = smctr_rcv_init(dev, rmf, &correlator)) == HARDWARE_FAILED)
  2984. {
  2985. return (rcode);
  2986. }
  2987. if((err = smctr_send_rsp(dev, rmf, rcode,
  2988. correlator)))
  2989. {
  2990. return (err);
  2991. }
  2992. break;
  2993. case CHG_PARM:
  2994. if((rcode = smctr_rcv_chg_param(dev, rmf,
  2995. &correlator)) ==HARDWARE_FAILED)
  2996. {
  2997. return (rcode);
  2998. }
  2999. if((err = smctr_send_rsp(dev, rmf, rcode,
  3000. correlator)))
  3001. {
  3002. return (err);
  3003. }
  3004. break;
  3005. case RQ_ADDR:
  3006. if((rcode = smctr_rcv_rq_addr_state_attch(dev,
  3007. rmf, &correlator)) != POSITIVE_ACK)
  3008. {
  3009. if(rcode == HARDWARE_FAILED)
  3010. return (rcode);
  3011. else
  3012. return (smctr_send_rsp(dev, rmf,
  3013. rcode, correlator));
  3014. }
  3015. if((err = smctr_send_rpt_addr(dev, rmf,
  3016. correlator)))
  3017. {
  3018. return (err);
  3019. }
  3020. break;
  3021. case RQ_ATTCH:
  3022. if((rcode = smctr_rcv_rq_addr_state_attch(dev,
  3023. rmf, &correlator)) != POSITIVE_ACK)
  3024. {
  3025. if(rcode == HARDWARE_FAILED)
  3026. return (rcode);
  3027. else
  3028. return (smctr_send_rsp(dev, rmf,
  3029. rcode,
  3030. correlator));
  3031. }
  3032. if((err = smctr_send_rpt_attch(dev, rmf,
  3033. correlator)))
  3034. {
  3035. return (err);
  3036. }
  3037. break;
  3038. case RQ_STATE:
  3039. if((rcode = smctr_rcv_rq_addr_state_attch(dev,
  3040. rmf, &correlator)) != POSITIVE_ACK)
  3041. {
  3042. if(rcode == HARDWARE_FAILED)
  3043. return (rcode);
  3044. else
  3045. return (smctr_send_rsp(dev, rmf,
  3046. rcode,
  3047. correlator));
  3048. }
  3049. if((err = smctr_send_rpt_state(dev, rmf,
  3050. correlator)))
  3051. {
  3052. return (err);
  3053. }
  3054. break;
  3055. case TX_FORWARD:
  3056. if((rcode = smctr_rcv_tx_forward(dev, rmf))
  3057. != POSITIVE_ACK)
  3058. {
  3059. if(rcode == HARDWARE_FAILED)
  3060. return (rcode);
  3061. else
  3062. return (smctr_send_rsp(dev, rmf,
  3063. rcode,
  3064. correlator));
  3065. }
  3066. if((err = smctr_send_tx_forward(dev, rmf,
  3067. &tx_fstatus)) == HARDWARE_FAILED)
  3068. {
  3069. return (err);
  3070. }
  3071. if(err == A_FRAME_WAS_FORWARDED)
  3072. {
  3073. if((err = smctr_send_rpt_tx_forward(dev,
  3074. rmf, tx_fstatus))
  3075. == HARDWARE_FAILED)
  3076. {
  3077. return (err);
  3078. }
  3079. }
  3080. break;
  3081. /* Received MAC Frames Processed by CRS/REM/RPS. */
  3082. case RSP:
  3083. case RQ_INIT:
  3084. case RPT_NEW_MON:
  3085. case RPT_SUA_CHG:
  3086. case RPT_ACTIVE_ERR:
  3087. case RPT_NN_INCMP:
  3088. case RPT_ERROR:
  3089. case RPT_ATTCH:
  3090. case RPT_STATE:
  3091. case RPT_ADDR:
  3092. break;
  3093. /* Rcvd Att. MAC Frame (if RXATMAC set) or UNKNOWN */
  3094. default:
  3095. xframe = 0;
  3096. if(!(tp->receive_mask & ACCEPT_ATT_MAC_FRAMES))
  3097. {
  3098. rcode = smctr_rcv_unknown(dev, rmf,
  3099. &correlator);
  3100. if((err = smctr_send_rsp(dev, rmf,rcode,
  3101. correlator)))
  3102. {
  3103. return (err);
  3104. }
  3105. }
  3106. break;
  3107. }
  3108. }
  3109. else
  3110. {
  3111. /* 1. DA doesn't match (Promiscuous Mode).
  3112. * 2. Parse for Extended MAC Frame Type.
  3113. */
  3114. switch(rmf->vc)
  3115. {
  3116. case RSP:
  3117. case INIT:
  3118. case RQ_INIT:
  3119. case RQ_ADDR:
  3120. case RQ_ATTCH:
  3121. case RQ_STATE:
  3122. case CHG_PARM:
  3123. case RPT_ADDR:
  3124. case RPT_ERROR:
  3125. case RPT_ATTCH:
  3126. case RPT_STATE:
  3127. case RPT_NEW_MON:
  3128. case RPT_SUA_CHG:
  3129. case RPT_NN_INCMP:
  3130. case RPT_ACTIVE_ERR:
  3131. break;
  3132. default:
  3133. xframe = 0;
  3134. break;
  3135. }
  3136. }
  3137. /* NOTE: UNKNOWN MAC frames will NOT be passed up unless
  3138. * ACCEPT_ATT_MAC_FRAMES is set.
  3139. */
  3140. if(((tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
  3141. && (xframe == (__u8)0))
  3142. || ((tp->receive_mask & ACCEPT_EXT_MAC_FRAMES)
  3143. && (xframe == (__u8)1)))
  3144. {
  3145. rmf->vl = SWAP_BYTES(rmf->vl);
  3146. if (!(skb = dev_alloc_skb(size)))
  3147. return -ENOMEM;
  3148. skb->len = size;
  3149. /* Slide data into a sleek skb. */
  3150. skb_put(skb, skb->len);
  3151. memcpy(skb->data, rmf, skb->len);
  3152. /* Update Counters */
  3153. tp->MacStat.rx_packets++;
  3154. tp->MacStat.rx_bytes += skb->len;
  3155. /* Kick the packet on up. */
  3156. skb->dev = dev;
  3157. skb->protocol = tr_type_trans(skb, dev);
  3158. netif_rx(skb);
  3159. dev->last_rx = jiffies;
  3160. err = 0;
  3161. }
  3162. return (err);
  3163. }
  3164. /* Adapter RAM test. Incremental word ODD boundary data test. */
  3165. static int smctr_ram_memory_test(struct net_device *dev)
  3166. {
  3167. struct net_local *tp = netdev_priv(dev);
  3168. __u16 page, pages_of_ram, start_pattern = 0, word_pattern = 0,
  3169. word_read = 0, err_word = 0, err_pattern = 0;
  3170. unsigned int err_offset;
  3171. __u32 j, pword;
  3172. __u8 err = 0;
  3173. if(smctr_debug > 10)
  3174. printk(KERN_DEBUG "%s: smctr_ram_memory_test\n", dev->name);
  3175. start_pattern = 0x0001;
  3176. pages_of_ram = tp->ram_size / tp->ram_usable;
  3177. pword = tp->ram_access;
  3178. /* Incremental word ODD boundary test. */
  3179. for(page = 0; (page < pages_of_ram) && (~err);
  3180. page++, start_pattern += 0x8000)
  3181. {
  3182. smctr_set_page(dev, (__u8 *)(tp->ram_access
  3183. + (page * tp->ram_usable * 1024) + 1));
  3184. word_pattern = start_pattern;
  3185. for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1; j += 2)
  3186. *(__u16 *)(pword + j) = word_pattern++;
  3187. word_pattern = start_pattern;
  3188. for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1
  3189. && (~err); j += 2, word_pattern++)
  3190. {
  3191. word_read = *(__u16 *)(pword + j);
  3192. if(word_read != word_pattern)
  3193. {
  3194. err = (__u8)1;
  3195. err_offset = j;
  3196. err_word = word_read;
  3197. err_pattern = word_pattern;
  3198. return (RAM_TEST_FAILED);
  3199. }
  3200. }
  3201. }
  3202. /* Zero out memory. */
  3203. for(page = 0; page < pages_of_ram && (~err); page++)
  3204. {
  3205. smctr_set_page(dev, (__u8 *)(tp->ram_access
  3206. + (page * tp->ram_usable * 1024)));
  3207. word_pattern = 0;
  3208. for(j = 0; j < (__u32)tp->ram_usable * 1024; j +=2)
  3209. *(__u16 *)(pword + j) = word_pattern;
  3210. for(j =0; j < (__u32)tp->ram_usable * 1024
  3211. && (~err); j += 2)
  3212. {
  3213. word_read = *(__u16 *)(pword + j);
  3214. if(word_read != word_pattern)
  3215. {
  3216. err = (__u8)1;
  3217. err_offset = j;
  3218. err_word = word_read;
  3219. err_pattern = word_pattern;
  3220. return (RAM_TEST_FAILED);
  3221. }
  3222. }
  3223. }
  3224. smctr_set_page(dev, (__u8 *)tp->ram_access);
  3225. return (0);
  3226. }
  3227. static int smctr_rcv_chg_param(struct net_device *dev, MAC_HEADER *rmf,
  3228. __u16 *correlator)
  3229. {
  3230. MAC_SUB_VECTOR *rsv;
  3231. signed short vlen;
  3232. __u16 rcode = POSITIVE_ACK;
  3233. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3234. /* This Frame can only come from a CRS */
  3235. if((rmf->dc_sc & SC_MASK) != SC_CRS)
  3236. return(E_INAPPROPRIATE_SOURCE_CLASS);
  3237. /* Remove MVID Length from total length. */
  3238. vlen = (signed short)rmf->vl - 4;
  3239. /* Point to First SVID */
  3240. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3241. /* Search for Appropriate SVID's. */
  3242. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3243. {
  3244. switch(rsv->svi)
  3245. {
  3246. case CORRELATOR:
  3247. svectors |= F_CORRELATOR;
  3248. rcode = smctr_set_corr(dev, rsv, correlator);
  3249. break;
  3250. case LOCAL_RING_NUMBER:
  3251. svectors |= F_LOCAL_RING_NUMBER;
  3252. rcode = smctr_set_local_ring_num(dev, rsv);
  3253. break;
  3254. case ASSIGN_PHYSICAL_DROP:
  3255. svectors |= F_ASSIGN_PHYSICAL_DROP;
  3256. rcode = smctr_set_phy_drop(dev, rsv);
  3257. break;
  3258. case ERROR_TIMER_VALUE:
  3259. svectors |= F_ERROR_TIMER_VALUE;
  3260. rcode = smctr_set_error_timer_value(dev, rsv);
  3261. break;
  3262. case AUTHORIZED_FUNCTION_CLASS:
  3263. svectors |= F_AUTHORIZED_FUNCTION_CLASS;
  3264. rcode = smctr_set_auth_funct_class(dev, rsv);
  3265. break;
  3266. case AUTHORIZED_ACCESS_PRIORITY:
  3267. svectors |= F_AUTHORIZED_ACCESS_PRIORITY;
  3268. rcode = smctr_set_auth_access_pri(dev, rsv);
  3269. break;
  3270. default:
  3271. rcode = E_SUB_VECTOR_UNKNOWN;
  3272. break;
  3273. }
  3274. /* Let Sender Know if SUM of SV length's is
  3275. * larger then length in MVID length field
  3276. */
  3277. if((vlen -= rsv->svl) < 0)
  3278. rcode = E_VECTOR_LENGTH_ERROR;
  3279. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3280. }
  3281. if(rcode == POSITIVE_ACK)
  3282. {
  3283. /* Let Sender Know if MVID length field
  3284. * is larger then SUM of SV length's
  3285. */
  3286. if(vlen != 0)
  3287. rcode = E_VECTOR_LENGTH_ERROR;
  3288. else
  3289. {
  3290. /* Let Sender Know if Expected SVID Missing */
  3291. if((svectors & R_CHG_PARM) ^ R_CHG_PARM)
  3292. rcode = E_MISSING_SUB_VECTOR;
  3293. }
  3294. }
  3295. return (rcode);
  3296. }
  3297. static int smctr_rcv_init(struct net_device *dev, MAC_HEADER *rmf,
  3298. __u16 *correlator)
  3299. {
  3300. MAC_SUB_VECTOR *rsv;
  3301. signed short vlen;
  3302. __u16 rcode = POSITIVE_ACK;
  3303. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3304. /* This Frame can only come from a RPS */
  3305. if((rmf->dc_sc & SC_MASK) != SC_RPS)
  3306. return (E_INAPPROPRIATE_SOURCE_CLASS);
  3307. /* Remove MVID Length from total length. */
  3308. vlen = (signed short)rmf->vl - 4;
  3309. /* Point to First SVID */
  3310. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3311. /* Search for Appropriate SVID's */
  3312. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3313. {
  3314. switch(rsv->svi)
  3315. {
  3316. case CORRELATOR:
  3317. svectors |= F_CORRELATOR;
  3318. rcode = smctr_set_corr(dev, rsv, correlator);
  3319. break;
  3320. case LOCAL_RING_NUMBER:
  3321. svectors |= F_LOCAL_RING_NUMBER;
  3322. rcode = smctr_set_local_ring_num(dev, rsv);
  3323. break;
  3324. case ASSIGN_PHYSICAL_DROP:
  3325. svectors |= F_ASSIGN_PHYSICAL_DROP;
  3326. rcode = smctr_set_phy_drop(dev, rsv);
  3327. break;
  3328. case ERROR_TIMER_VALUE:
  3329. svectors |= F_ERROR_TIMER_VALUE;
  3330. rcode = smctr_set_error_timer_value(dev, rsv);
  3331. break;
  3332. default:
  3333. rcode = E_SUB_VECTOR_UNKNOWN;
  3334. break;
  3335. }
  3336. /* Let Sender Know if SUM of SV length's is
  3337. * larger then length in MVID length field
  3338. */
  3339. if((vlen -= rsv->svl) < 0)
  3340. rcode = E_VECTOR_LENGTH_ERROR;
  3341. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3342. }
  3343. if(rcode == POSITIVE_ACK)
  3344. {
  3345. /* Let Sender Know if MVID length field
  3346. * is larger then SUM of SV length's
  3347. */
  3348. if(vlen != 0)
  3349. rcode = E_VECTOR_LENGTH_ERROR;
  3350. else
  3351. {
  3352. /* Let Sender Know if Expected SV Missing */
  3353. if((svectors & R_INIT) ^ R_INIT)
  3354. rcode = E_MISSING_SUB_VECTOR;
  3355. }
  3356. }
  3357. return (rcode);
  3358. }
  3359. static int smctr_rcv_tx_forward(struct net_device *dev, MAC_HEADER *rmf)
  3360. {
  3361. MAC_SUB_VECTOR *rsv;
  3362. signed short vlen;
  3363. __u16 rcode = POSITIVE_ACK;
  3364. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3365. /* This Frame can only come from a CRS */
  3366. if((rmf->dc_sc & SC_MASK) != SC_CRS)
  3367. return (E_INAPPROPRIATE_SOURCE_CLASS);
  3368. /* Remove MVID Length from total length */
  3369. vlen = (signed short)rmf->vl - 4;
  3370. /* Point to First SVID */
  3371. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3372. /* Search for Appropriate SVID's */
  3373. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3374. {
  3375. switch(rsv->svi)
  3376. {
  3377. case FRAME_FORWARD:
  3378. svectors |= F_FRAME_FORWARD;
  3379. rcode = smctr_set_frame_forward(dev, rsv,
  3380. rmf->dc_sc);
  3381. break;
  3382. default:
  3383. rcode = E_SUB_VECTOR_UNKNOWN;
  3384. break;
  3385. }
  3386. /* Let Sender Know if SUM of SV length's is
  3387. * larger then length in MVID length field
  3388. */
  3389. if((vlen -= rsv->svl) < 0)
  3390. rcode = E_VECTOR_LENGTH_ERROR;
  3391. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3392. }
  3393. if(rcode == POSITIVE_ACK)
  3394. {
  3395. /* Let Sender Know if MVID length field
  3396. * is larger then SUM of SV length's
  3397. */
  3398. if(vlen != 0)
  3399. rcode = E_VECTOR_LENGTH_ERROR;
  3400. else
  3401. {
  3402. /* Let Sender Know if Expected SV Missing */
  3403. if((svectors & R_TX_FORWARD) ^ R_TX_FORWARD)
  3404. rcode = E_MISSING_SUB_VECTOR;
  3405. }
  3406. }
  3407. return (rcode);
  3408. }
  3409. static int smctr_rcv_rq_addr_state_attch(struct net_device *dev,
  3410. MAC_HEADER *rmf, __u16 *correlator)
  3411. {
  3412. MAC_SUB_VECTOR *rsv;
  3413. signed short vlen;
  3414. __u16 rcode = POSITIVE_ACK;
  3415. unsigned int svectors = F_NO_SUB_VECTORS_FOUND;
  3416. /* Remove MVID Length from total length */
  3417. vlen = (signed short)rmf->vl - 4;
  3418. /* Point to First SVID */
  3419. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3420. /* Search for Appropriate SVID's */
  3421. while((vlen > 0) && (rcode == POSITIVE_ACK))
  3422. {
  3423. switch(rsv->svi)
  3424. {
  3425. case CORRELATOR:
  3426. svectors |= F_CORRELATOR;
  3427. rcode = smctr_set_corr(dev, rsv, correlator);
  3428. break;
  3429. default:
  3430. rcode = E_SUB_VECTOR_UNKNOWN;
  3431. break;
  3432. }
  3433. /* Let Sender Know if SUM of SV length's is
  3434. * larger then length in MVID length field
  3435. */
  3436. if((vlen -= rsv->svl) < 0)
  3437. rcode = E_VECTOR_LENGTH_ERROR;
  3438. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3439. }
  3440. if(rcode == POSITIVE_ACK)
  3441. {
  3442. /* Let Sender Know if MVID length field
  3443. * is larger then SUM of SV length's
  3444. */
  3445. if(vlen != 0)
  3446. rcode = E_VECTOR_LENGTH_ERROR;
  3447. else
  3448. {
  3449. /* Let Sender Know if Expected SVID Missing */
  3450. if((svectors & R_RQ_ATTCH_STATE_ADDR)
  3451. ^ R_RQ_ATTCH_STATE_ADDR)
  3452. rcode = E_MISSING_SUB_VECTOR;
  3453. }
  3454. }
  3455. return (rcode);
  3456. }
  3457. static int smctr_rcv_unknown(struct net_device *dev, MAC_HEADER *rmf,
  3458. __u16 *correlator)
  3459. {
  3460. MAC_SUB_VECTOR *rsv;
  3461. signed short vlen;
  3462. *correlator = 0;
  3463. /* Remove MVID Length from total length */
  3464. vlen = (signed short)rmf->vl - 4;
  3465. /* Point to First SVID */
  3466. rsv = (MAC_SUB_VECTOR *)((__u32)rmf + sizeof(MAC_HEADER));
  3467. /* Search for CORRELATOR for RSP to UNKNOWN */
  3468. while((vlen > 0) && (*correlator == 0))
  3469. {
  3470. switch(rsv->svi)
  3471. {
  3472. case CORRELATOR:
  3473. smctr_set_corr(dev, rsv, correlator);
  3474. break;
  3475. default:
  3476. break;
  3477. }
  3478. vlen -= rsv->svl;
  3479. rsv = (MAC_SUB_VECTOR *)((__u32)rsv + rsv->svl);
  3480. }
  3481. return (E_UNRECOGNIZED_VECTOR_ID);
  3482. }
  3483. /*
  3484. * Reset the 825 NIC and exit w:
  3485. * 1. The NIC reset cleared (non-reset state), halted and un-initialized.
  3486. * 2. TINT masked.
  3487. * 3. CBUSY masked.
  3488. * 4. TINT clear.
  3489. * 5. CBUSY clear.
  3490. */
  3491. static int smctr_reset_adapter(struct net_device *dev)
  3492. {
  3493. struct net_local *tp = netdev_priv(dev);
  3494. int ioaddr = dev->base_addr;
  3495. /* Reseting the NIC will put it in a halted and un-initialized state. */ smctr_set_trc_reset(ioaddr);
  3496. mdelay(200); /* ~2 ms */
  3497. smctr_clear_trc_reset(ioaddr);
  3498. mdelay(200); /* ~2 ms */
  3499. /* Remove any latched interrupts that occurred prior to reseting the
  3500. * adapter or possibily caused by line glitches due to the reset.
  3501. */
  3502. outb(tp->trc_mask | CSR_CLRTINT | CSR_CLRCBUSY, ioaddr + CSR);
  3503. return (0);
  3504. }
  3505. static int smctr_restart_tx_chain(struct net_device *dev, short queue)
  3506. {
  3507. struct net_local *tp = netdev_priv(dev);
  3508. int err = 0;
  3509. if(smctr_debug > 10)
  3510. printk(KERN_DEBUG "%s: smctr_restart_tx_chain\n", dev->name);
  3511. if(tp->num_tx_fcbs_used[queue] != 0
  3512. && tp->tx_queue_status[queue] == NOT_TRANSMITING)
  3513. {
  3514. tp->tx_queue_status[queue] = TRANSMITING;
  3515. err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
  3516. }
  3517. return (err);
  3518. }
  3519. static int smctr_ring_status_chg(struct net_device *dev)
  3520. {
  3521. struct net_local *tp = netdev_priv(dev);
  3522. if(smctr_debug > 10)
  3523. printk(KERN_DEBUG "%s: smctr_ring_status_chg\n", dev->name);
  3524. /* Check for ring_status_flag: whenever MONITOR_STATE_BIT
  3525. * Bit is set, check value of monitor_state, only then we
  3526. * enable and start transmit/receive timeout (if and only
  3527. * if it is MS_ACTIVE_MONITOR_STATE or MS_STANDBY_MONITOR_STATE)
  3528. */
  3529. if(tp->ring_status_flags == MONITOR_STATE_CHANGED)
  3530. {
  3531. if((tp->monitor_state == MS_ACTIVE_MONITOR_STATE)
  3532. || (tp->monitor_state == MS_STANDBY_MONITOR_STATE))
  3533. {
  3534. tp->monitor_state_ready = 1;
  3535. }
  3536. else
  3537. {
  3538. /* if adapter is NOT in either active monitor
  3539. * or standby monitor state => Disable
  3540. * transmit/receive timeout.
  3541. */
  3542. tp->monitor_state_ready = 0;
  3543. /* Ring speed problem, switching to auto mode. */
  3544. if(tp->monitor_state == MS_MONITOR_FSM_INACTIVE
  3545. && !tp->cleanup)
  3546. {
  3547. printk(KERN_INFO "%s: Incorrect ring speed switching.\n",
  3548. dev->name);
  3549. smctr_set_ring_speed(dev);
  3550. }
  3551. }
  3552. }
  3553. if(!(tp->ring_status_flags & RING_STATUS_CHANGED))
  3554. return (0);
  3555. switch(tp->ring_status)
  3556. {
  3557. case RING_RECOVERY:
  3558. printk(KERN_INFO "%s: Ring Recovery\n", dev->name);
  3559. tp->current_ring_status |= RING_RECOVERY;
  3560. break;
  3561. case SINGLE_STATION:
  3562. printk(KERN_INFO "%s: Single Statinon\n", dev->name);
  3563. tp->current_ring_status |= SINGLE_STATION;
  3564. break;
  3565. case COUNTER_OVERFLOW:
  3566. printk(KERN_INFO "%s: Counter Overflow\n", dev->name);
  3567. tp->current_ring_status |= COUNTER_OVERFLOW;
  3568. break;
  3569. case REMOVE_RECEIVED:
  3570. printk(KERN_INFO "%s: Remove Received\n", dev->name);
  3571. tp->current_ring_status |= REMOVE_RECEIVED;
  3572. break;
  3573. case AUTO_REMOVAL_ERROR:
  3574. printk(KERN_INFO "%s: Auto Remove Error\n", dev->name);
  3575. tp->current_ring_status |= AUTO_REMOVAL_ERROR;
  3576. break;
  3577. case LOBE_WIRE_FAULT:
  3578. printk(KERN_INFO "%s: Lobe Wire Fault\n", dev->name);
  3579. tp->current_ring_status |= LOBE_WIRE_FAULT;
  3580. break;
  3581. case TRANSMIT_BEACON:
  3582. printk(KERN_INFO "%s: Transmit Beacon\n", dev->name);
  3583. tp->current_ring_status |= TRANSMIT_BEACON;
  3584. break;
  3585. case SOFT_ERROR:
  3586. printk(KERN_INFO "%s: Soft Error\n", dev->name);
  3587. tp->current_ring_status |= SOFT_ERROR;
  3588. break;
  3589. case HARD_ERROR:
  3590. printk(KERN_INFO "%s: Hard Error\n", dev->name);
  3591. tp->current_ring_status |= HARD_ERROR;
  3592. break;
  3593. case SIGNAL_LOSS:
  3594. printk(KERN_INFO "%s: Signal Loss\n", dev->name);
  3595. tp->current_ring_status |= SIGNAL_LOSS;
  3596. break;
  3597. default:
  3598. printk(KERN_INFO "%s: Unknown ring status change\n",
  3599. dev->name);
  3600. break;
  3601. }
  3602. return (0);
  3603. }
  3604. static int smctr_rx_frame(struct net_device *dev)
  3605. {
  3606. struct net_local *tp = netdev_priv(dev);
  3607. __u16 queue, status, rx_size, err = 0;
  3608. __u8 *pbuff;
  3609. if(smctr_debug > 10)
  3610. printk(KERN_DEBUG "%s: smctr_rx_frame\n", dev->name);
  3611. queue = tp->receive_queue_number;
  3612. while((status = tp->rx_fcb_curr[queue]->frame_status) != SUCCESS)
  3613. {
  3614. err = HARDWARE_FAILED;
  3615. if(((status & 0x007f) == 0)
  3616. || ((tp->receive_mask & ACCEPT_ERR_PACKETS) != 0))
  3617. {
  3618. /* frame length less the CRC (4 bytes) + FS (1 byte) */
  3619. rx_size = tp->rx_fcb_curr[queue]->frame_length - 5;
  3620. pbuff = smctr_get_rx_pointer(dev, queue);
  3621. smctr_set_page(dev, pbuff);
  3622. smctr_disable_16bit(dev);
  3623. /* pbuff points to addr within one page */
  3624. pbuff = (__u8 *)PAGE_POINTER(pbuff);
  3625. if(queue == NON_MAC_QUEUE)
  3626. {
  3627. struct sk_buff *skb;
  3628. skb = dev_alloc_skb(rx_size);
  3629. if (skb) {
  3630. skb_put(skb, rx_size);
  3631. memcpy(skb->data, pbuff, rx_size);
  3632. /* Update Counters */
  3633. tp->MacStat.rx_packets++;
  3634. tp->MacStat.rx_bytes += skb->len;
  3635. /* Kick the packet on up. */
  3636. skb->dev = dev;
  3637. skb->protocol = tr_type_trans(skb, dev);
  3638. netif_rx(skb);
  3639. dev->last_rx = jiffies;
  3640. } else {
  3641. }
  3642. }
  3643. else
  3644. smctr_process_rx_packet((MAC_HEADER *)pbuff,
  3645. rx_size, dev, status);
  3646. }
  3647. smctr_enable_16bit(dev);
  3648. smctr_set_page(dev, (__u8 *)tp->ram_access);
  3649. smctr_update_rx_chain(dev, queue);
  3650. if(err != SUCCESS)
  3651. break;
  3652. }
  3653. return (err);
  3654. }
  3655. static int smctr_send_dat(struct net_device *dev)
  3656. {
  3657. struct net_local *tp = netdev_priv(dev);
  3658. unsigned int i, err;
  3659. MAC_HEADER *tmf;
  3660. FCBlock *fcb;
  3661. if(smctr_debug > 10)
  3662. printk(KERN_DEBUG "%s: smctr_send_dat\n", dev->name);
  3663. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE,
  3664. sizeof(MAC_HEADER))) == (FCBlock *)(-1L))
  3665. {
  3666. return (OUT_OF_RESOURCES);
  3667. }
  3668. /* Initialize DAT Data Fields. */
  3669. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3670. tmf->ac = MSB(AC_FC_DAT);
  3671. tmf->fc = LSB(AC_FC_DAT);
  3672. for(i = 0; i < 6; i++)
  3673. {
  3674. tmf->sa[i] = dev->dev_addr[i];
  3675. tmf->da[i] = dev->dev_addr[i];
  3676. }
  3677. tmf->vc = DAT;
  3678. tmf->dc_sc = DC_RS | SC_RS;
  3679. tmf->vl = 4;
  3680. tmf->vl = SWAP_BYTES(tmf->vl);
  3681. /* Start Transmit. */
  3682. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  3683. return (err);
  3684. /* Wait for Transmit to Complete */
  3685. for(i = 0; i < 10000; i++)
  3686. {
  3687. if(fcb->frame_status & FCB_COMMAND_DONE)
  3688. break;
  3689. mdelay(1);
  3690. }
  3691. /* Check if GOOD frame Tx'ed. */
  3692. if(!(fcb->frame_status & FCB_COMMAND_DONE)
  3693. || fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
  3694. {
  3695. return (INITIALIZE_FAILED);
  3696. }
  3697. /* De-allocated Tx FCB and Frame Buffer
  3698. * The FCB must be de-allocated manually if executing with
  3699. * interrupts disabled, other wise the ISR (LM_Service_Events)
  3700. * will de-allocate it when the interrupt occurs.
  3701. */
  3702. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  3703. smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
  3704. return (0);
  3705. }
  3706. static void smctr_timeout(struct net_device *dev)
  3707. {
  3708. /*
  3709. * If we get here, some higher level has decided we are broken.
  3710. * There should really be a "kick me" function call instead.
  3711. *
  3712. * Resetting the token ring adapter takes a long time so just
  3713. * fake transmission time and go on trying. Our own timeout
  3714. * routine is in sktr_timer_chk()
  3715. */
  3716. dev->trans_start = jiffies;
  3717. netif_wake_queue(dev);
  3718. }
  3719. /*
  3720. * Gets skb from system, queues it and checks if it can be sent
  3721. */
  3722. static int smctr_send_packet(struct sk_buff *skb, struct net_device *dev)
  3723. {
  3724. struct net_local *tp = netdev_priv(dev);
  3725. if(smctr_debug > 10)
  3726. printk(KERN_DEBUG "%s: smctr_send_packet\n", dev->name);
  3727. /*
  3728. * Block a transmit overlap
  3729. */
  3730. netif_stop_queue(dev);
  3731. if(tp->QueueSkb == 0)
  3732. return (1); /* Return with tbusy set: queue full */
  3733. tp->QueueSkb--;
  3734. skb_queue_tail(&tp->SendSkbQueue, skb);
  3735. smctr_hardware_send_packet(dev, tp);
  3736. if(tp->QueueSkb > 0)
  3737. netif_wake_queue(dev);
  3738. return (0);
  3739. }
  3740. static int smctr_send_lobe_media_test(struct net_device *dev)
  3741. {
  3742. struct net_local *tp = netdev_priv(dev);
  3743. MAC_SUB_VECTOR *tsv;
  3744. MAC_HEADER *tmf;
  3745. FCBlock *fcb;
  3746. __u32 i;
  3747. int err;
  3748. if(smctr_debug > 15)
  3749. printk(KERN_DEBUG "%s: smctr_send_lobe_media_test\n", dev->name);
  3750. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(struct trh_hdr)
  3751. + S_WRAP_DATA + S_WRAP_DATA)) == (FCBlock *)(-1L))
  3752. {
  3753. return (OUT_OF_RESOURCES);
  3754. }
  3755. /* Initialize DAT Data Fields. */
  3756. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3757. tmf->ac = MSB(AC_FC_LOBE_MEDIA_TEST);
  3758. tmf->fc = LSB(AC_FC_LOBE_MEDIA_TEST);
  3759. for(i = 0; i < 6; i++)
  3760. {
  3761. tmf->da[i] = 0;
  3762. tmf->sa[i] = dev->dev_addr[i];
  3763. }
  3764. tmf->vc = LOBE_MEDIA_TEST;
  3765. tmf->dc_sc = DC_RS | SC_RS;
  3766. tmf->vl = 4;
  3767. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3768. smctr_make_wrap_data(dev, tsv);
  3769. tmf->vl += tsv->svl;
  3770. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3771. smctr_make_wrap_data(dev, tsv);
  3772. tmf->vl += tsv->svl;
  3773. /* Start Transmit. */
  3774. tmf->vl = SWAP_BYTES(tmf->vl);
  3775. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  3776. return (err);
  3777. /* Wait for Transmit to Complete. (10 ms). */
  3778. for(i=0; i < 10000; i++)
  3779. {
  3780. if(fcb->frame_status & FCB_COMMAND_DONE)
  3781. break;
  3782. mdelay(1);
  3783. }
  3784. /* Check if GOOD frame Tx'ed */
  3785. if(!(fcb->frame_status & FCB_COMMAND_DONE)
  3786. || fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
  3787. {
  3788. return (LOBE_MEDIA_TEST_FAILED);
  3789. }
  3790. /* De-allocated Tx FCB and Frame Buffer
  3791. * The FCB must be de-allocated manually if executing with
  3792. * interrupts disabled, other wise the ISR (LM_Service_Events)
  3793. * will de-allocate it when the interrupt occurs.
  3794. */
  3795. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  3796. smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
  3797. return (0);
  3798. }
  3799. static int smctr_send_rpt_addr(struct net_device *dev, MAC_HEADER *rmf,
  3800. __u16 correlator)
  3801. {
  3802. MAC_HEADER *tmf;
  3803. MAC_SUB_VECTOR *tsv;
  3804. FCBlock *fcb;
  3805. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3806. + S_CORRELATOR + S_PHYSICAL_DROP + S_UPSTREAM_NEIGHBOR_ADDRESS
  3807. + S_ADDRESS_MODIFER + S_GROUP_ADDRESS + S_FUNCTIONAL_ADDRESS))
  3808. == (FCBlock *)(-1L))
  3809. {
  3810. return (0);
  3811. }
  3812. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3813. tmf->vc = RPT_ADDR;
  3814. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3815. tmf->vl = 4;
  3816. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ADDR);
  3817. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3818. smctr_make_corr(dev, tsv, correlator);
  3819. tmf->vl += tsv->svl;
  3820. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3821. smctr_make_phy_drop_num(dev, tsv);
  3822. tmf->vl += tsv->svl;
  3823. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3824. smctr_make_upstream_neighbor_addr(dev, tsv);
  3825. tmf->vl += tsv->svl;
  3826. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3827. smctr_make_addr_mod(dev, tsv);
  3828. tmf->vl += tsv->svl;
  3829. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3830. smctr_make_group_addr(dev, tsv);
  3831. tmf->vl += tsv->svl;
  3832. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3833. smctr_make_funct_addr(dev, tsv);
  3834. tmf->vl += tsv->svl;
  3835. /* Subtract out MVID and MVL which is
  3836. * include in both vl and MAC_HEADER
  3837. */
  3838. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3839. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3840. */
  3841. tmf->vl = SWAP_BYTES(tmf->vl);
  3842. return (smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3843. }
  3844. static int smctr_send_rpt_attch(struct net_device *dev, MAC_HEADER *rmf,
  3845. __u16 correlator)
  3846. {
  3847. MAC_HEADER *tmf;
  3848. MAC_SUB_VECTOR *tsv;
  3849. FCBlock *fcb;
  3850. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3851. + S_CORRELATOR + S_PRODUCT_INSTANCE_ID + S_FUNCTIONAL_ADDRESS
  3852. + S_AUTHORIZED_FUNCTION_CLASS + S_AUTHORIZED_ACCESS_PRIORITY))
  3853. == (FCBlock *)(-1L))
  3854. {
  3855. return (0);
  3856. }
  3857. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3858. tmf->vc = RPT_ATTCH;
  3859. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3860. tmf->vl = 4;
  3861. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_ATTCH);
  3862. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3863. smctr_make_corr(dev, tsv, correlator);
  3864. tmf->vl += tsv->svl;
  3865. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3866. smctr_make_product_id(dev, tsv);
  3867. tmf->vl += tsv->svl;
  3868. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3869. smctr_make_funct_addr(dev, tsv);
  3870. tmf->vl += tsv->svl;
  3871. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3872. smctr_make_auth_funct_class(dev, tsv);
  3873. tmf->vl += tsv->svl;
  3874. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3875. smctr_make_access_pri(dev, tsv);
  3876. tmf->vl += tsv->svl;
  3877. /* Subtract out MVID and MVL which is
  3878. * include in both vl and MAC_HEADER
  3879. */
  3880. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3881. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3882. */
  3883. tmf->vl = SWAP_BYTES(tmf->vl);
  3884. return (smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3885. }
  3886. static int smctr_send_rpt_state(struct net_device *dev, MAC_HEADER *rmf,
  3887. __u16 correlator)
  3888. {
  3889. MAC_HEADER *tmf;
  3890. MAC_SUB_VECTOR *tsv;
  3891. FCBlock *fcb;
  3892. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3893. + S_CORRELATOR + S_RING_STATION_VERSION_NUMBER
  3894. + S_RING_STATION_STATUS + S_STATION_IDENTIFER))
  3895. == (FCBlock *)(-1L))
  3896. {
  3897. return (0);
  3898. }
  3899. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3900. tmf->vc = RPT_STATE;
  3901. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3902. tmf->vl = 4;
  3903. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_STATE);
  3904. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3905. smctr_make_corr(dev, tsv, correlator);
  3906. tmf->vl += tsv->svl;
  3907. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3908. smctr_make_ring_station_version(dev, tsv);
  3909. tmf->vl += tsv->svl;
  3910. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3911. smctr_make_ring_station_status(dev, tsv);
  3912. tmf->vl += tsv->svl;
  3913. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3914. smctr_make_station_id(dev, tsv);
  3915. tmf->vl += tsv->svl;
  3916. /* Subtract out MVID and MVL which is
  3917. * include in both vl and MAC_HEADER
  3918. */
  3919. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3920. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3921. */
  3922. tmf->vl = SWAP_BYTES(tmf->vl);
  3923. return (smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3924. }
  3925. static int smctr_send_rpt_tx_forward(struct net_device *dev,
  3926. MAC_HEADER *rmf, __u16 tx_fstatus)
  3927. {
  3928. MAC_HEADER *tmf;
  3929. MAC_SUB_VECTOR *tsv;
  3930. FCBlock *fcb;
  3931. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3932. + S_TRANSMIT_STATUS_CODE)) == (FCBlock *)(-1L))
  3933. {
  3934. return (0);
  3935. }
  3936. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3937. tmf->vc = RPT_TX_FORWARD;
  3938. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3939. tmf->vl = 4;
  3940. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RPT_TX_FORWARD);
  3941. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3942. smctr_make_tx_status_code(dev, tsv, tx_fstatus);
  3943. tmf->vl += tsv->svl;
  3944. /* Subtract out MVID and MVL which is
  3945. * include in both vl and MAC_HEADER
  3946. */
  3947. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3948. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  3949. */
  3950. tmf->vl = SWAP_BYTES(tmf->vl);
  3951. return(smctr_trc_send_packet(dev, fcb, MAC_QUEUE));
  3952. }
  3953. static int smctr_send_rsp(struct net_device *dev, MAC_HEADER *rmf,
  3954. __u16 rcode, __u16 correlator)
  3955. {
  3956. MAC_HEADER *tmf;
  3957. MAC_SUB_VECTOR *tsv;
  3958. FCBlock *fcb;
  3959. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3960. + S_CORRELATOR + S_RESPONSE_CODE)) == (FCBlock *)(-1L))
  3961. {
  3962. return (0);
  3963. }
  3964. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3965. tmf->vc = RSP;
  3966. tmf->dc_sc = (rmf->dc_sc & SC_MASK) << 4;
  3967. tmf->vl = 4;
  3968. smctr_make_8025_hdr(dev, rmf, tmf, AC_FC_RSP);
  3969. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3970. smctr_make_corr(dev, tsv, correlator);
  3971. return (0);
  3972. }
  3973. static int smctr_send_rq_init(struct net_device *dev)
  3974. {
  3975. struct net_local *tp = netdev_priv(dev);
  3976. MAC_HEADER *tmf;
  3977. MAC_SUB_VECTOR *tsv;
  3978. FCBlock *fcb;
  3979. unsigned int i, count = 0;
  3980. __u16 fstatus;
  3981. int err;
  3982. do {
  3983. if(((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, sizeof(MAC_HEADER)
  3984. + S_PRODUCT_INSTANCE_ID + S_UPSTREAM_NEIGHBOR_ADDRESS
  3985. + S_RING_STATION_VERSION_NUMBER + S_ADDRESS_MODIFER))
  3986. == (FCBlock *)(-1L)))
  3987. {
  3988. return (0);
  3989. }
  3990. tmf = (MAC_HEADER *)fcb->bdb_ptr->data_block_ptr;
  3991. tmf->vc = RQ_INIT;
  3992. tmf->dc_sc = DC_RPS | SC_RS;
  3993. tmf->vl = 4;
  3994. smctr_make_8025_hdr(dev, NULL, tmf, AC_FC_RQ_INIT);
  3995. tsv = (MAC_SUB_VECTOR *)((__u32)tmf + sizeof(MAC_HEADER));
  3996. smctr_make_product_id(dev, tsv);
  3997. tmf->vl += tsv->svl;
  3998. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  3999. smctr_make_upstream_neighbor_addr(dev, tsv);
  4000. tmf->vl += tsv->svl;
  4001. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  4002. smctr_make_ring_station_version(dev, tsv);
  4003. tmf->vl += tsv->svl;
  4004. tsv = (MAC_SUB_VECTOR *)((__u32)tsv + tsv->svl);
  4005. smctr_make_addr_mod(dev, tsv);
  4006. tmf->vl += tsv->svl;
  4007. /* Subtract out MVID and MVL which is
  4008. * include in both vl and MAC_HEADER
  4009. */
  4010. /* fcb->frame_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  4011. fcb->bdb_ptr->buffer_length = tmf->vl + sizeof(MAC_HEADER) - 4;
  4012. */
  4013. tmf->vl = SWAP_BYTES(tmf->vl);
  4014. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  4015. return (err);
  4016. /* Wait for Transmit to Complete */
  4017. for(i = 0; i < 10000; i++)
  4018. {
  4019. if(fcb->frame_status & FCB_COMMAND_DONE)
  4020. break;
  4021. mdelay(1);
  4022. }
  4023. /* Check if GOOD frame Tx'ed */
  4024. fstatus = fcb->frame_status;
  4025. if(!(fstatus & FCB_COMMAND_DONE))
  4026. return (HARDWARE_FAILED);
  4027. if(!(fstatus & FCB_TX_STATUS_E))
  4028. count++;
  4029. /* De-allocated Tx FCB and Frame Buffer
  4030. * The FCB must be de-allocated manually if executing with
  4031. * interrupts disabled, other wise the ISR (LM_Service_Events)
  4032. * will de-allocate it when the interrupt occurs.
  4033. */
  4034. tp->tx_queue_status[MAC_QUEUE] = NOT_TRANSMITING;
  4035. smctr_update_tx_chain(dev, fcb, MAC_QUEUE);
  4036. } while(count < 4 && ((fstatus & FCB_TX_AC_BITS) ^ FCB_TX_AC_BITS));
  4037. return (smctr_join_complete_state(dev));
  4038. }
  4039. static int smctr_send_tx_forward(struct net_device *dev, MAC_HEADER *rmf,
  4040. __u16 *tx_fstatus)
  4041. {
  4042. struct net_local *tp = netdev_priv(dev);
  4043. FCBlock *fcb;
  4044. unsigned int i;
  4045. int err;
  4046. /* Check if this is the END POINT of the Transmit Forward Chain. */
  4047. if(rmf->vl <= 18)
  4048. return (0);
  4049. /* Allocate Transmit FCB only by requesting 0 bytes
  4050. * of data buffer.
  4051. */
  4052. if((fcb = smctr_get_tx_fcb(dev, MAC_QUEUE, 0)) == (FCBlock *)(-1L))
  4053. return (0);
  4054. /* Set pointer to Transmit Frame Buffer to the data
  4055. * portion of the received TX Forward frame, making
  4056. * sure to skip over the Vector Code (vc) and Vector
  4057. * length (vl).
  4058. */
  4059. fcb->bdb_ptr->trc_data_block_ptr = TRC_POINTER((__u32)rmf
  4060. + sizeof(MAC_HEADER) + 2);
  4061. fcb->bdb_ptr->data_block_ptr = (__u16 *)((__u32)rmf
  4062. + sizeof(MAC_HEADER) + 2);
  4063. fcb->frame_length = rmf->vl - 4 - 2;
  4064. fcb->bdb_ptr->buffer_length = rmf->vl - 4 - 2;
  4065. if((err = smctr_trc_send_packet(dev, fcb, MAC_QUEUE)))
  4066. return (err);
  4067. /* Wait for Transmit to Complete */
  4068. for(i = 0; i < 10000; i++)
  4069. {
  4070. if(fcb->frame_status & FCB_COMMAND_DONE)
  4071. break;
  4072. mdelay(1);
  4073. }
  4074. /* Check if GOOD frame Tx'ed */
  4075. if(!(fcb->frame_status & FCB_COMMAND_DONE))
  4076. {
  4077. if((err = smctr_issue_resume_tx_fcb_cmd(dev, MAC_QUEUE)))
  4078. return (err);
  4079. for(i = 0; i < 10000; i++)
  4080. {
  4081. if(fcb->frame_status & FCB_COMMAND_DONE)
  4082. break;
  4083. mdelay(1);
  4084. }
  4085. if(!(fcb->frame_status & FCB_COMMAND_DONE))
  4086. return (HARDWARE_FAILED);
  4087. }
  4088. *tx_fstatus = fcb->frame_status;
  4089. return (A_FRAME_WAS_FORWARDED);
  4090. }
  4091. static int smctr_set_auth_access_pri(struct net_device *dev,
  4092. MAC_SUB_VECTOR *rsv)
  4093. {
  4094. struct net_local *tp = netdev_priv(dev);
  4095. if(rsv->svl != S_AUTHORIZED_ACCESS_PRIORITY)
  4096. return (E_SUB_VECTOR_LENGTH_ERROR);
  4097. tp->authorized_access_priority = (rsv->svv[0] << 8 | rsv->svv[1]);
  4098. return (POSITIVE_ACK);
  4099. }
  4100. static int smctr_set_auth_funct_class(struct net_device *dev,
  4101. MAC_SUB_VECTOR *rsv)
  4102. {
  4103. struct net_local *tp = netdev_priv(dev);
  4104. if(rsv->svl != S_AUTHORIZED_FUNCTION_CLASS)
  4105. return (E_SUB_VECTOR_LENGTH_ERROR);
  4106. tp->authorized_function_classes = (rsv->svv[0] << 8 | rsv->svv[1]);
  4107. return (POSITIVE_ACK);
  4108. }
  4109. static int smctr_set_corr(struct net_device *dev, MAC_SUB_VECTOR *rsv,
  4110. __u16 *correlator)
  4111. {
  4112. if(rsv->svl != S_CORRELATOR)
  4113. return (E_SUB_VECTOR_LENGTH_ERROR);
  4114. *correlator = (rsv->svv[0] << 8 | rsv->svv[1]);
  4115. return (POSITIVE_ACK);
  4116. }
  4117. static int smctr_set_error_timer_value(struct net_device *dev,
  4118. MAC_SUB_VECTOR *rsv)
  4119. {
  4120. __u16 err_tval;
  4121. int err;
  4122. if(rsv->svl != S_ERROR_TIMER_VALUE)
  4123. return (E_SUB_VECTOR_LENGTH_ERROR);
  4124. err_tval = (rsv->svv[0] << 8 | rsv->svv[1])*10;
  4125. smctr_issue_write_word_cmd(dev, RW_TER_THRESHOLD, &err_tval);
  4126. if((err = smctr_wait_cmd(dev)))
  4127. return (err);
  4128. return (POSITIVE_ACK);
  4129. }
  4130. static int smctr_set_frame_forward(struct net_device *dev,
  4131. MAC_SUB_VECTOR *rsv, __u8 dc_sc)
  4132. {
  4133. if((rsv->svl < 2) || (rsv->svl > S_FRAME_FORWARD))
  4134. return (E_SUB_VECTOR_LENGTH_ERROR);
  4135. if((dc_sc & DC_MASK) != DC_CRS)
  4136. {
  4137. if(rsv->svl >= 2 && rsv->svl < 20)
  4138. return (E_TRANSMIT_FORWARD_INVALID);
  4139. if((rsv->svv[0] != 0) || (rsv->svv[1] != 0))
  4140. return (E_TRANSMIT_FORWARD_INVALID);
  4141. }
  4142. return (POSITIVE_ACK);
  4143. }
  4144. static int smctr_set_local_ring_num(struct net_device *dev,
  4145. MAC_SUB_VECTOR *rsv)
  4146. {
  4147. struct net_local *tp = netdev_priv(dev);
  4148. if(rsv->svl != S_LOCAL_RING_NUMBER)
  4149. return (E_SUB_VECTOR_LENGTH_ERROR);
  4150. if(tp->ptr_local_ring_num)
  4151. *(__u16 *)(tp->ptr_local_ring_num)
  4152. = (rsv->svv[0] << 8 | rsv->svv[1]);
  4153. return (POSITIVE_ACK);
  4154. }
  4155. static unsigned short smctr_set_ctrl_attention(struct net_device *dev)
  4156. {
  4157. struct net_local *tp = netdev_priv(dev);
  4158. int ioaddr = dev->base_addr;
  4159. if(tp->bic_type == BIC_585_CHIP)
  4160. outb((tp->trc_mask | HWR_CA), ioaddr + HWR);
  4161. else
  4162. {
  4163. outb((tp->trc_mask | CSR_CA), ioaddr + CSR);
  4164. outb(tp->trc_mask, ioaddr + CSR);
  4165. }
  4166. return (0);
  4167. }
  4168. static void smctr_set_multicast_list(struct net_device *dev)
  4169. {
  4170. if(smctr_debug > 10)
  4171. printk(KERN_DEBUG "%s: smctr_set_multicast_list\n", dev->name);
  4172. return;
  4173. }
  4174. static int smctr_set_page(struct net_device *dev, __u8 *buf)
  4175. {
  4176. struct net_local *tp = netdev_priv(dev);
  4177. __u8 amask;
  4178. __u32 tptr;
  4179. tptr = (__u32)buf - (__u32)tp->ram_access;
  4180. amask = (__u8)((tptr & PR_PAGE_MASK) >> 8);
  4181. outb(amask, dev->base_addr + PR);
  4182. return (0);
  4183. }
  4184. static int smctr_set_phy_drop(struct net_device *dev, MAC_SUB_VECTOR *rsv)
  4185. {
  4186. int err;
  4187. if(rsv->svl != S_PHYSICAL_DROP)
  4188. return (E_SUB_VECTOR_LENGTH_ERROR);
  4189. smctr_issue_write_byte_cmd(dev, RW_PHYSICAL_DROP_NUMBER, &rsv->svv[0]);
  4190. if((err = smctr_wait_cmd(dev)))
  4191. return (err);
  4192. return (POSITIVE_ACK);
  4193. }
  4194. /* Reset the ring speed to the opposite of what it was. This auto-pilot
  4195. * mode requires a complete reset and re-init of the adapter.
  4196. */
  4197. static int smctr_set_ring_speed(struct net_device *dev)
  4198. {
  4199. struct net_local *tp = netdev_priv(dev);
  4200. int err;
  4201. if(tp->media_type == MEDIA_UTP_16)
  4202. tp->media_type = MEDIA_UTP_4;
  4203. else
  4204. tp->media_type = MEDIA_UTP_16;
  4205. smctr_enable_16bit(dev);
  4206. /* Re-Initialize adapter's internal registers */
  4207. smctr_reset_adapter(dev);
  4208. if((err = smctr_init_card_real(dev)))
  4209. return (err);
  4210. smctr_enable_bic_int(dev);
  4211. if((err = smctr_issue_enable_int_cmd(dev, TRC_INTERRUPT_ENABLE_MASK)))
  4212. return (err);
  4213. smctr_disable_16bit(dev);
  4214. return (0);
  4215. }
  4216. static int smctr_set_rx_look_ahead(struct net_device *dev)
  4217. {
  4218. struct net_local *tp = netdev_priv(dev);
  4219. __u16 sword, rword;
  4220. if(smctr_debug > 10)
  4221. printk(KERN_DEBUG "%s: smctr_set_rx_look_ahead_flag\n", dev->name);
  4222. tp->adapter_flags &= ~(FORCED_16BIT_MODE);
  4223. tp->adapter_flags |= RX_VALID_LOOKAHEAD;
  4224. if(tp->adapter_bus == BUS_ISA16_TYPE)
  4225. {
  4226. sword = *((__u16 *)(tp->ram_access));
  4227. *((__u16 *)(tp->ram_access)) = 0x1234;
  4228. smctr_disable_16bit(dev);
  4229. rword = *((__u16 *)(tp->ram_access));
  4230. smctr_enable_16bit(dev);
  4231. if(rword != 0x1234)
  4232. tp->adapter_flags |= FORCED_16BIT_MODE;
  4233. *((__u16 *)(tp->ram_access)) = sword;
  4234. }
  4235. return (0);
  4236. }
  4237. static int smctr_set_trc_reset(int ioaddr)
  4238. {
  4239. __u8 r;
  4240. r = inb(ioaddr + MSR);
  4241. outb(MSR_RST | r, ioaddr + MSR);
  4242. return (0);
  4243. }
  4244. /*
  4245. * This function can be called if the adapter is busy or not.
  4246. */
  4247. static int smctr_setup_single_cmd(struct net_device *dev,
  4248. __u16 command, __u16 subcommand)
  4249. {
  4250. struct net_local *tp = netdev_priv(dev);
  4251. unsigned int err;
  4252. if(smctr_debug > 10)
  4253. printk(KERN_DEBUG "%s: smctr_setup_single_cmd\n", dev->name);
  4254. if((err = smctr_wait_while_cbusy(dev)))
  4255. return (err);
  4256. if((err = (unsigned int)smctr_wait_cmd(dev)))
  4257. return (err);
  4258. tp->acb_head->cmd_done_status = 0;
  4259. tp->acb_head->cmd = command;
  4260. tp->acb_head->subcmd = subcommand;
  4261. err = smctr_issue_resume_acb_cmd(dev);
  4262. return (err);
  4263. }
  4264. /*
  4265. * This function can not be called with the adapter busy.
  4266. */
  4267. static int smctr_setup_single_cmd_w_data(struct net_device *dev,
  4268. __u16 command, __u16 subcommand)
  4269. {
  4270. struct net_local *tp = netdev_priv(dev);
  4271. tp->acb_head->cmd_done_status = ACB_COMMAND_NOT_DONE;
  4272. tp->acb_head->cmd = command;
  4273. tp->acb_head->subcmd = subcommand;
  4274. tp->acb_head->data_offset_lo
  4275. = (__u16)TRC_POINTER(tp->misc_command_data);
  4276. return(smctr_issue_resume_acb_cmd(dev));
  4277. }
  4278. static char *smctr_malloc(struct net_device *dev, __u16 size)
  4279. {
  4280. struct net_local *tp = netdev_priv(dev);
  4281. char *m;
  4282. m = (char *)(tp->ram_access + tp->sh_mem_used);
  4283. tp->sh_mem_used += (__u32)size;
  4284. return (m);
  4285. }
  4286. static int smctr_status_chg(struct net_device *dev)
  4287. {
  4288. struct net_local *tp = netdev_priv(dev);
  4289. if(smctr_debug > 10)
  4290. printk(KERN_DEBUG "%s: smctr_status_chg\n", dev->name);
  4291. switch(tp->status)
  4292. {
  4293. case OPEN:
  4294. break;
  4295. case CLOSED:
  4296. break;
  4297. /* Interrupt driven open() completion. XXX */
  4298. case INITIALIZED:
  4299. tp->group_address_0 = 0;
  4300. tp->group_address[0] = 0;
  4301. tp->group_address[1] = 0;
  4302. tp->functional_address_0 = 0;
  4303. tp->functional_address[0] = 0;
  4304. tp->functional_address[1] = 0;
  4305. smctr_open_tr(dev);
  4306. break;
  4307. default:
  4308. printk(KERN_INFO "%s: status change unknown %x\n",
  4309. dev->name, tp->status);
  4310. break;
  4311. }
  4312. return (0);
  4313. }
  4314. static int smctr_trc_send_packet(struct net_device *dev, FCBlock *fcb,
  4315. __u16 queue)
  4316. {
  4317. struct net_local *tp = netdev_priv(dev);
  4318. int err = 0;
  4319. if(smctr_debug > 10)
  4320. printk(KERN_DEBUG "%s: smctr_trc_send_packet\n", dev->name);
  4321. fcb->info = FCB_CHAIN_END | FCB_ENABLE_TFS;
  4322. if(tp->num_tx_fcbs[queue] != 1)
  4323. fcb->back_ptr->info = FCB_INTERRUPT_ENABLE | FCB_ENABLE_TFS;
  4324. if(tp->tx_queue_status[queue] == NOT_TRANSMITING)
  4325. {
  4326. tp->tx_queue_status[queue] = TRANSMITING;
  4327. err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
  4328. }
  4329. return (err);
  4330. }
  4331. static __u16 smctr_tx_complete(struct net_device *dev, __u16 queue)
  4332. {
  4333. struct net_local *tp = netdev_priv(dev);
  4334. __u16 status, err = 0;
  4335. int cstatus;
  4336. if(smctr_debug > 10)
  4337. printk(KERN_DEBUG "%s: smctr_tx_complete\n", dev->name);
  4338. while((status = tp->tx_fcb_end[queue]->frame_status) != SUCCESS)
  4339. {
  4340. if(status & 0x7e00 )
  4341. {
  4342. err = HARDWARE_FAILED;
  4343. break;
  4344. }
  4345. if((err = smctr_update_tx_chain(dev, tp->tx_fcb_end[queue],
  4346. queue)) != SUCCESS)
  4347. break;
  4348. smctr_disable_16bit(dev);
  4349. if(tp->mode_bits & UMAC)
  4350. {
  4351. if(!(status & (FCB_TX_STATUS_AR1 | FCB_TX_STATUS_AR2)))
  4352. cstatus = NO_SUCH_DESTINATION;
  4353. else
  4354. {
  4355. if(!(status & (FCB_TX_STATUS_CR1 | FCB_TX_STATUS_CR2)))
  4356. cstatus = DEST_OUT_OF_RESOURCES;
  4357. else
  4358. {
  4359. if(status & FCB_TX_STATUS_E)
  4360. cstatus = MAX_COLLISIONS;
  4361. else
  4362. cstatus = SUCCESS;
  4363. }
  4364. }
  4365. }
  4366. else
  4367. cstatus = SUCCESS;
  4368. if(queue == BUG_QUEUE)
  4369. err = SUCCESS;
  4370. smctr_enable_16bit(dev);
  4371. if(err != SUCCESS)
  4372. break;
  4373. }
  4374. return (err);
  4375. }
  4376. static unsigned short smctr_tx_move_frame(struct net_device *dev,
  4377. struct sk_buff *skb, __u8 *pbuff, unsigned int bytes)
  4378. {
  4379. struct net_local *tp = netdev_priv(dev);
  4380. unsigned int ram_usable;
  4381. __u32 flen, len, offset = 0;
  4382. __u8 *frag, *page;
  4383. if(smctr_debug > 10)
  4384. printk(KERN_DEBUG "%s: smctr_tx_move_frame\n", dev->name);
  4385. ram_usable = ((unsigned int)tp->ram_usable) << 10;
  4386. frag = skb->data;
  4387. flen = skb->len;
  4388. while(flen > 0 && bytes > 0)
  4389. {
  4390. smctr_set_page(dev, pbuff);
  4391. offset = SMC_PAGE_OFFSET(pbuff);
  4392. if(offset + flen > ram_usable)
  4393. len = ram_usable - offset;
  4394. else
  4395. len = flen;
  4396. if(len > bytes)
  4397. len = bytes;
  4398. page = (char *) (offset + tp->ram_access);
  4399. memcpy(page, frag, len);
  4400. flen -=len;
  4401. bytes -= len;
  4402. frag += len;
  4403. pbuff += len;
  4404. }
  4405. return (0);
  4406. }
  4407. /* Update the error statistic counters for this adapter. */
  4408. static int smctr_update_err_stats(struct net_device *dev)
  4409. {
  4410. struct net_local *tp = netdev_priv(dev);
  4411. struct tr_statistics *tstat = &tp->MacStat;
  4412. if(tstat->internal_errors)
  4413. tstat->internal_errors
  4414. += *(tp->misc_command_data + 0) & 0x00ff;
  4415. if(tstat->line_errors)
  4416. tstat->line_errors += *(tp->misc_command_data + 0) >> 8;
  4417. if(tstat->A_C_errors)
  4418. tstat->A_C_errors += *(tp->misc_command_data + 1) & 0x00ff;
  4419. if(tstat->burst_errors)
  4420. tstat->burst_errors += *(tp->misc_command_data + 1) >> 8;
  4421. if(tstat->abort_delimiters)
  4422. tstat->abort_delimiters += *(tp->misc_command_data + 2) >> 8;
  4423. if(tstat->recv_congest_count)
  4424. tstat->recv_congest_count
  4425. += *(tp->misc_command_data + 3) & 0x00ff;
  4426. if(tstat->lost_frames)
  4427. tstat->lost_frames
  4428. += *(tp->misc_command_data + 3) >> 8;
  4429. if(tstat->frequency_errors)
  4430. tstat->frequency_errors += *(tp->misc_command_data + 4) & 0x00ff;
  4431. if(tstat->frame_copied_errors)
  4432. tstat->frame_copied_errors
  4433. += *(tp->misc_command_data + 4) >> 8;
  4434. if(tstat->token_errors)
  4435. tstat->token_errors += *(tp->misc_command_data + 5) >> 8;
  4436. return (0);
  4437. }
  4438. static int smctr_update_rx_chain(struct net_device *dev, __u16 queue)
  4439. {
  4440. struct net_local *tp = netdev_priv(dev);
  4441. FCBlock *fcb;
  4442. BDBlock *bdb;
  4443. __u16 size, len;
  4444. fcb = tp->rx_fcb_curr[queue];
  4445. len = fcb->frame_length;
  4446. fcb->frame_status = 0;
  4447. fcb->info = FCB_CHAIN_END;
  4448. fcb->back_ptr->info = FCB_WARNING;
  4449. tp->rx_fcb_curr[queue] = tp->rx_fcb_curr[queue]->next_ptr;
  4450. /* update RX BDBs */
  4451. size = (len >> RX_BDB_SIZE_SHIFT);
  4452. if(len & RX_DATA_BUFFER_SIZE_MASK)
  4453. size += sizeof(BDBlock);
  4454. size &= (~RX_BDB_SIZE_MASK);
  4455. /* check if wrap around */
  4456. bdb = (BDBlock *)((__u32)(tp->rx_bdb_curr[queue]) + (__u32)(size));
  4457. if((__u32)bdb >= (__u32)tp->rx_bdb_end[queue])
  4458. {
  4459. bdb = (BDBlock *)((__u32)(tp->rx_bdb_head[queue])
  4460. + (__u32)(bdb) - (__u32)(tp->rx_bdb_end[queue]));
  4461. }
  4462. bdb->back_ptr->info = BDB_CHAIN_END;
  4463. tp->rx_bdb_curr[queue]->back_ptr->info = BDB_NOT_CHAIN_END;
  4464. tp->rx_bdb_curr[queue] = bdb;
  4465. return (0);
  4466. }
  4467. static int smctr_update_tx_chain(struct net_device *dev, FCBlock *fcb,
  4468. __u16 queue)
  4469. {
  4470. struct net_local *tp = netdev_priv(dev);
  4471. if(smctr_debug > 20)
  4472. printk(KERN_DEBUG "smctr_update_tx_chain\n");
  4473. if(tp->num_tx_fcbs_used[queue] <= 0)
  4474. return (HARDWARE_FAILED);
  4475. else
  4476. {
  4477. if(tp->tx_buff_used[queue] < fcb->memory_alloc)
  4478. {
  4479. tp->tx_buff_used[queue] = 0;
  4480. return (HARDWARE_FAILED);
  4481. }
  4482. tp->tx_buff_used[queue] -= fcb->memory_alloc;
  4483. /* if all transmit buffer are cleared
  4484. * need to set the tx_buff_curr[] to tx_buff_head[]
  4485. * otherwise, tx buffer will be segregate and cannot
  4486. * accommodate and buffer greater than (curr - head) and
  4487. * (end - curr) since we do not allow wrap around allocation.
  4488. */
  4489. if(tp->tx_buff_used[queue] == 0)
  4490. tp->tx_buff_curr[queue] = tp->tx_buff_head[queue];
  4491. tp->num_tx_fcbs_used[queue]--;
  4492. fcb->frame_status = 0;
  4493. tp->tx_fcb_end[queue] = fcb->next_ptr;
  4494. netif_wake_queue(dev);
  4495. return (0);
  4496. }
  4497. }
  4498. static int smctr_wait_cmd(struct net_device *dev)
  4499. {
  4500. struct net_local *tp = netdev_priv(dev);
  4501. unsigned int loop_count = 0x20000;
  4502. if(smctr_debug > 10)
  4503. printk(KERN_DEBUG "%s: smctr_wait_cmd\n", dev->name);
  4504. while(loop_count)
  4505. {
  4506. if(tp->acb_head->cmd_done_status & ACB_COMMAND_DONE)
  4507. break;
  4508. udelay(1);
  4509. loop_count--;
  4510. }
  4511. if(loop_count == 0)
  4512. return(HARDWARE_FAILED);
  4513. if(tp->acb_head->cmd_done_status & 0xff)
  4514. return(HARDWARE_FAILED);
  4515. return (0);
  4516. }
  4517. static int smctr_wait_while_cbusy(struct net_device *dev)
  4518. {
  4519. struct net_local *tp = netdev_priv(dev);
  4520. unsigned int timeout = 0x20000;
  4521. int ioaddr = dev->base_addr;
  4522. __u8 r;
  4523. if(tp->bic_type == BIC_585_CHIP)
  4524. {
  4525. while(timeout)
  4526. {
  4527. r = inb(ioaddr + HWR);
  4528. if((r & HWR_CBUSY) == 0)
  4529. break;
  4530. timeout--;
  4531. }
  4532. }
  4533. else
  4534. {
  4535. while(timeout)
  4536. {
  4537. r = inb(ioaddr + CSR);
  4538. if((r & CSR_CBUSY) == 0)
  4539. break;
  4540. timeout--;
  4541. }
  4542. }
  4543. if(timeout)
  4544. return (0);
  4545. else
  4546. return (HARDWARE_FAILED);
  4547. }
  4548. #ifdef MODULE
  4549. static struct net_device* dev_smctr[SMCTR_MAX_ADAPTERS];
  4550. static int io[SMCTR_MAX_ADAPTERS];
  4551. static int irq[SMCTR_MAX_ADAPTERS];
  4552. MODULE_LICENSE("GPL");
  4553. module_param_array(io, int, NULL, 0);
  4554. module_param_array(irq, int, NULL, 0);
  4555. module_param(ringspeed, int, 0);
  4556. static struct net_device * __init setup_card(int n)
  4557. {
  4558. struct net_device *dev = alloc_trdev(sizeof(struct net_local));
  4559. int err;
  4560. if (!dev)
  4561. return ERR_PTR(-ENOMEM);
  4562. dev->irq = irq[n];
  4563. err = smctr_probe1(dev, io[n]);
  4564. if (err)
  4565. goto out;
  4566. err = register_netdev(dev);
  4567. if (err)
  4568. goto out1;
  4569. return dev;
  4570. out1:
  4571. #ifdef CONFIG_MCA_LEGACY
  4572. { struct net_local *tp = netdev_priv(dev);
  4573. if (tp->slot_num)
  4574. mca_mark_as_unused(tp->slot_num);
  4575. }
  4576. #endif
  4577. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  4578. free_irq(dev->irq, dev);
  4579. out:
  4580. free_netdev(dev);
  4581. return ERR_PTR(err);
  4582. }
  4583. int __init init_module(void)
  4584. {
  4585. int i, found = 0;
  4586. struct net_device *dev;
  4587. for(i = 0; i < SMCTR_MAX_ADAPTERS; i++) {
  4588. dev = io[0]? setup_card(i) : smctr_probe(-1);
  4589. if (!IS_ERR(dev)) {
  4590. ++found;
  4591. dev_smctr[i] = dev;
  4592. }
  4593. }
  4594. return found ? 0 : -ENODEV;
  4595. }
  4596. void cleanup_module(void)
  4597. {
  4598. int i;
  4599. for(i = 0; i < SMCTR_MAX_ADAPTERS; i++) {
  4600. struct net_device *dev = dev_smctr[i];
  4601. if (dev) {
  4602. unregister_netdev(dev);
  4603. #ifdef CONFIG_MCA_LEGACY
  4604. { struct net_local *tp = netdev_priv(dev);
  4605. if (tp->slot_num)
  4606. mca_mark_as_unused(tp->slot_num);
  4607. }
  4608. #endif
  4609. release_region(dev->base_addr, SMCTR_IO_EXTENT);
  4610. if (dev->irq)
  4611. free_irq(dev->irq, dev);
  4612. free_netdev(dev);
  4613. }
  4614. }
  4615. }
  4616. #endif /* MODULE */