saa9730.c 31 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146
  1. /*
  2. * Copyright (C) 2000, 2005 MIPS Technologies, Inc. All rights reserved.
  3. * Authors: Carsten Langgaard <carstenl@mips.com>
  4. * Maciej W. Rozycki <macro@mips.com>
  5. * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
  6. *
  7. * This program is free software; you can distribute it and/or modify it
  8. * under the terms of the GNU General Public License (Version 2) as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14. * for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  19. *
  20. * SAA9730 ethernet driver.
  21. *
  22. * Changes:
  23. * Angelo Dell'Aera <buffer@antifork.org> : Conversion to the new PCI API
  24. * (pci_driver).
  25. * Conversion to spinlocks.
  26. * Error handling fixes.
  27. */
  28. #include <linux/init.h>
  29. #include <linux/netdevice.h>
  30. #include <linux/delay.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/module.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/pci.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/types.h>
  37. #include <asm/addrspace.h>
  38. #include <asm/io.h>
  39. #include <asm/mips-boards/prom.h>
  40. #include "saa9730.h"
  41. #ifdef LAN_SAA9730_DEBUG
  42. int lan_saa9730_debug = LAN_SAA9730_DEBUG;
  43. #else
  44. int lan_saa9730_debug;
  45. #endif
  46. #define DRV_MODULE_NAME "saa9730"
  47. static struct pci_device_id saa9730_pci_tbl[] = {
  48. { PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
  49. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
  50. { 0, }
  51. };
  52. MODULE_DEVICE_TABLE(pci, saa9730_pci_tbl);
  53. /* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
  54. static unsigned int pci_irq_line;
  55. static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
  56. {
  57. outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
  58. &lp->evm_saa9730_regs->InterruptBlock1);
  59. outl(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
  60. &lp->evm_saa9730_regs->InterruptStatus1);
  61. outl(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
  62. EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
  63. }
  64. static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
  65. {
  66. outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
  67. &lp->evm_saa9730_regs->InterruptBlock1);
  68. outl(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
  69. &lp->evm_saa9730_regs->InterruptEnable1);
  70. }
  71. static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
  72. {
  73. outl(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
  74. }
  75. static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
  76. {
  77. outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
  78. &lp->evm_saa9730_regs->InterruptBlock1);
  79. }
  80. static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
  81. {
  82. outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
  83. &lp->evm_saa9730_regs->InterruptBlock1);
  84. }
  85. static void __attribute_used__ show_saa9730_regs(struct lan_saa9730_private *lp)
  86. {
  87. int i, j;
  88. printk("TxmBufferA = %p\n", lp->TxmBuffer[0][0]);
  89. printk("TxmBufferB = %p\n", lp->TxmBuffer[1][0]);
  90. printk("RcvBufferA = %p\n", lp->RcvBuffer[0][0]);
  91. printk("RcvBufferB = %p\n", lp->RcvBuffer[1][0]);
  92. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  93. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  94. printk("TxmBuffer[%d][%d] = %x\n", i, j,
  95. le32_to_cpu(*(unsigned int *)
  96. lp->TxmBuffer[i][j]));
  97. }
  98. }
  99. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  100. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  101. printk("RcvBuffer[%d][%d] = %x\n", i, j,
  102. le32_to_cpu(*(unsigned int *)
  103. lp->RcvBuffer[i][j]));
  104. }
  105. }
  106. printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
  107. readl(&lp->evm_saa9730_regs->InterruptBlock1));
  108. printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
  109. readl(&lp->evm_saa9730_regs->InterruptStatus1));
  110. printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
  111. readl(&lp->evm_saa9730_regs->InterruptEnable1));
  112. printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
  113. readl(&lp->lan_saa9730_regs->Ok2Use));
  114. printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
  115. printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
  116. printk("lp->PendingTxmBufferIndex = %x\n",
  117. lp->PendingTxmBufferIndex);
  118. printk("lp->PendingTxmPacketIndex = %x\n",
  119. lp->PendingTxmPacketIndex);
  120. printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
  121. readl(&lp->lan_saa9730_regs->LanDmaCtl));
  122. printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
  123. readl(&lp->lan_saa9730_regs->DmaStatus));
  124. printk("lp->lan_saa9730_regs->CamCtl = %x\n",
  125. readl(&lp->lan_saa9730_regs->CamCtl));
  126. printk("lp->lan_saa9730_regs->TxCtl = %x\n",
  127. readl(&lp->lan_saa9730_regs->TxCtl));
  128. printk("lp->lan_saa9730_regs->TxStatus = %x\n",
  129. readl(&lp->lan_saa9730_regs->TxStatus));
  130. printk("lp->lan_saa9730_regs->RxCtl = %x\n",
  131. readl(&lp->lan_saa9730_regs->RxCtl));
  132. printk("lp->lan_saa9730_regs->RxStatus = %x\n",
  133. readl(&lp->lan_saa9730_regs->RxStatus));
  134. for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
  135. outl(i, &lp->lan_saa9730_regs->CamAddress);
  136. printk("lp->lan_saa9730_regs->CamData = %x\n",
  137. readl(&lp->lan_saa9730_regs->CamData));
  138. }
  139. printk("lp->stats.tx_packets = %lx\n", lp->stats.tx_packets);
  140. printk("lp->stats.tx_errors = %lx\n", lp->stats.tx_errors);
  141. printk("lp->stats.tx_aborted_errors = %lx\n",
  142. lp->stats.tx_aborted_errors);
  143. printk("lp->stats.tx_window_errors = %lx\n",
  144. lp->stats.tx_window_errors);
  145. printk("lp->stats.tx_carrier_errors = %lx\n",
  146. lp->stats.tx_carrier_errors);
  147. printk("lp->stats.tx_fifo_errors = %lx\n",
  148. lp->stats.tx_fifo_errors);
  149. printk("lp->stats.tx_heartbeat_errors = %lx\n",
  150. lp->stats.tx_heartbeat_errors);
  151. printk("lp->stats.collisions = %lx\n", lp->stats.collisions);
  152. printk("lp->stats.rx_packets = %lx\n", lp->stats.rx_packets);
  153. printk("lp->stats.rx_errors = %lx\n", lp->stats.rx_errors);
  154. printk("lp->stats.rx_dropped = %lx\n", lp->stats.rx_dropped);
  155. printk("lp->stats.rx_crc_errors = %lx\n", lp->stats.rx_crc_errors);
  156. printk("lp->stats.rx_frame_errors = %lx\n",
  157. lp->stats.rx_frame_errors);
  158. printk("lp->stats.rx_fifo_errors = %lx\n",
  159. lp->stats.rx_fifo_errors);
  160. printk("lp->stats.rx_length_errors = %lx\n",
  161. lp->stats.rx_length_errors);
  162. printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
  163. readl(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
  164. printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
  165. readl(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
  166. printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
  167. readl(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
  168. printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
  169. readl(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
  170. printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
  171. readl(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
  172. printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
  173. readl(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
  174. }
  175. static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
  176. {
  177. int i, j;
  178. /* Init RX buffers */
  179. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  180. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  181. *(unsigned int *) lp->RcvBuffer[i][j] =
  182. cpu_to_le32(RXSF_READY <<
  183. RX_STAT_CTL_OWNER_SHF);
  184. }
  185. }
  186. /* Init TX buffers */
  187. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  188. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  189. *(unsigned int *) lp->TxmBuffer[i][j] =
  190. cpu_to_le32(TXSF_EMPTY <<
  191. TX_STAT_CTL_OWNER_SHF);
  192. }
  193. }
  194. }
  195. static void lan_saa9730_free_buffers(struct pci_dev *pdev,
  196. struct lan_saa9730_private *lp)
  197. {
  198. pci_free_consistent(pdev, lp->buffer_size, lp->buffer_start,
  199. lp->dma_addr);
  200. }
  201. static int lan_saa9730_allocate_buffers(struct pci_dev *pdev,
  202. struct lan_saa9730_private *lp)
  203. {
  204. void *Pa;
  205. unsigned int i, j, rxoffset, txoffset;
  206. int ret;
  207. /* Initialize buffer space */
  208. lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
  209. lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;
  210. /* Initialize Rx Buffer Index */
  211. lp->NextRcvPacketIndex = 0;
  212. lp->NextRcvBufferIndex = 0;
  213. /* Set current buffer index & next available packet index */
  214. lp->NextTxmPacketIndex = 0;
  215. lp->NextTxmBufferIndex = 0;
  216. lp->PendingTxmPacketIndex = 0;
  217. lp->PendingTxmBufferIndex = 0;
  218. /*
  219. * Allocate all RX and TX packets in one chunk.
  220. * The Rx and Tx packets must be PACKET_SIZE aligned.
  221. */
  222. lp->buffer_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
  223. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
  224. LAN_SAA9730_PACKET_SIZE;
  225. lp->buffer_start = pci_alloc_consistent(pdev, lp->buffer_size,
  226. &lp->dma_addr);
  227. if (!lp->buffer_start) {
  228. ret = -ENOMEM;
  229. goto out;
  230. }
  231. Pa = (void *)ALIGN((unsigned long)lp->buffer_start,
  232. LAN_SAA9730_PACKET_SIZE);
  233. rxoffset = Pa - lp->buffer_start;
  234. /* Init RX buffers */
  235. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  236. for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
  237. *(unsigned int *) Pa =
  238. cpu_to_le32(RXSF_READY <<
  239. RX_STAT_CTL_OWNER_SHF);
  240. lp->RcvBuffer[i][j] = Pa;
  241. Pa += LAN_SAA9730_PACKET_SIZE;
  242. }
  243. }
  244. txoffset = Pa - lp->buffer_start;
  245. /* Init TX buffers */
  246. for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
  247. for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
  248. *(unsigned int *) Pa =
  249. cpu_to_le32(TXSF_EMPTY <<
  250. TX_STAT_CTL_OWNER_SHF);
  251. lp->TxmBuffer[i][j] = Pa;
  252. Pa += LAN_SAA9730_PACKET_SIZE;
  253. }
  254. }
  255. /*
  256. * Set rx buffer A and rx buffer B to point to the first two buffer
  257. * spaces.
  258. */
  259. outl(lp->dma_addr + rxoffset,
  260. &lp->lan_saa9730_regs->RxBuffA);
  261. outl(lp->dma_addr + rxoffset +
  262. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE,
  263. &lp->lan_saa9730_regs->RxBuffB);
  264. /*
  265. * Set txm_buf_a and txm_buf_b to point to the first two buffer
  266. * space
  267. */
  268. outl(lp->dma_addr + txoffset,
  269. &lp->lan_saa9730_regs->TxBuffA);
  270. outl(lp->dma_addr + txoffset +
  271. LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE,
  272. &lp->lan_saa9730_regs->TxBuffB);
  273. /* Set packet number */
  274. outl((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
  275. (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
  276. (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
  277. (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
  278. &lp->lan_saa9730_regs->PacketCount);
  279. return 0;
  280. out:
  281. return ret;
  282. }
  283. static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
  284. {
  285. unsigned int i;
  286. unsigned char *NetworkAddress;
  287. NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];
  288. for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
  289. /* First set address to where data is written */
  290. outl(i, &lp->lan_saa9730_regs->CamAddress);
  291. outl((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16)
  292. | (NetworkAddress[2] << 8) | NetworkAddress[3],
  293. &lp->lan_saa9730_regs->CamData);
  294. NetworkAddress += 4;
  295. }
  296. return 0;
  297. }
  298. static int lan_saa9730_cam_init(struct net_device *dev)
  299. {
  300. struct lan_saa9730_private *lp = netdev_priv(dev);
  301. unsigned int i;
  302. /* Copy MAC-address into all entries. */
  303. for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
  304. memcpy((unsigned char *) lp->PhysicalAddress[i],
  305. (unsigned char *) dev->dev_addr, 6);
  306. }
  307. return 0;
  308. }
  309. static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
  310. {
  311. int i, l;
  312. /* Check link status, spin here till station is not busy. */
  313. i = 0;
  314. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
  315. i++;
  316. if (i > 100) {
  317. printk("Error: lan_saa9730_mii_init: timeout\n");
  318. return -1;
  319. }
  320. mdelay(1); /* wait 1 ms. */
  321. }
  322. /* Now set the control and address register. */
  323. outl(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
  324. &lp->lan_saa9730_regs->StationMgmtCtl);
  325. /* check link status, spin here till station is not busy */
  326. i = 0;
  327. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
  328. i++;
  329. if (i > 100) {
  330. printk("Error: lan_saa9730_mii_init: timeout\n");
  331. return -1;
  332. }
  333. mdelay(1); /* wait 1 ms. */
  334. }
  335. /* Wait for 1 ms. */
  336. mdelay(1);
  337. /* Check the link status. */
  338. if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
  339. PHY_STATUS_LINK_UP) {
  340. /* Link is up. */
  341. return 0;
  342. } else {
  343. /* Link is down, reset the PHY first. */
  344. /* set PHY address = 'CONTROL' */
  345. outl(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
  346. &lp->lan_saa9730_regs->StationMgmtCtl);
  347. /* Wait for 1 ms. */
  348. mdelay(1);
  349. /* set 'CONTROL' = force reset and renegotiate */
  350. outl(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
  351. PHY_CONTROL_RESTART_AUTO_NEG,
  352. &lp->lan_saa9730_regs->StationMgmtData);
  353. /* Wait for 50 ms. */
  354. mdelay(50);
  355. /* set 'BUSY' to start operation */
  356. outl(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
  357. PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);
  358. /* await completion */
  359. i = 0;
  360. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
  361. MD_CA_BUSY) {
  362. i++;
  363. if (i > 100) {
  364. printk
  365. ("Error: lan_saa9730_mii_init: timeout\n");
  366. return -1;
  367. }
  368. mdelay(1); /* wait 1 ms. */
  369. }
  370. /* Wait for 1 ms. */
  371. mdelay(1);
  372. for (l = 0; l < 2; l++) {
  373. /* set PHY address = 'STATUS' */
  374. outl(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
  375. PHY_STATUS,
  376. &lp->lan_saa9730_regs->StationMgmtCtl);
  377. /* await completion */
  378. i = 0;
  379. while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
  380. MD_CA_BUSY) {
  381. i++;
  382. if (i > 100) {
  383. printk
  384. ("Error: lan_saa9730_mii_init: timeout\n");
  385. return -1;
  386. }
  387. mdelay(1); /* wait 1 ms. */
  388. }
  389. /* wait for 3 sec. */
  390. mdelay(3000);
  391. /* check the link status */
  392. if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
  393. PHY_STATUS_LINK_UP) {
  394. /* link is up */
  395. break;
  396. }
  397. }
  398. }
  399. return 0;
  400. }
  401. static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
  402. {
  403. /* Initialize DMA control register. */
  404. outl((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
  405. (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
  406. (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
  407. | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
  408. DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
  409. &lp->lan_saa9730_regs->LanDmaCtl);
  410. /* Initial MAC control register. */
  411. outl((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
  412. &lp->lan_saa9730_regs->MacCtl);
  413. /* Initialize CAM control register. */
  414. outl(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
  415. &lp->lan_saa9730_regs->CamCtl);
  416. /*
  417. * Initialize CAM enable register, only turn on first entry, should
  418. * contain own addr.
  419. */
  420. outl(0x0001, &lp->lan_saa9730_regs->CamEnable);
  421. /* Initialize Tx control register */
  422. outl(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);
  423. /* Initialize Rcv control register */
  424. outl(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);
  425. /* Reset DMA engine */
  426. outl(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
  427. return 0;
  428. }
  429. static int lan_saa9730_stop(struct lan_saa9730_private *lp)
  430. {
  431. int i;
  432. /* Stop DMA first */
  433. outl(readl(&lp->lan_saa9730_regs->LanDmaCtl) &
  434. ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
  435. &lp->lan_saa9730_regs->LanDmaCtl);
  436. /* Set the SW Reset bits in DMA and MAC control registers */
  437. outl(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
  438. outl(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
  439. &lp->lan_saa9730_regs->MacCtl);
  440. /*
  441. * Wait for MAC reset to have finished. The reset bit is auto cleared
  442. * when the reset is done.
  443. */
  444. i = 0;
  445. while (readl(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
  446. i++;
  447. if (i > 100) {
  448. printk
  449. ("Error: lan_sa9730_stop: MAC reset timeout\n");
  450. return -1;
  451. }
  452. mdelay(1); /* wait 1 ms. */
  453. }
  454. return 0;
  455. }
  456. static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
  457. {
  458. /* Stop lan controller. */
  459. lan_saa9730_stop(lp);
  460. outl(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
  461. &lp->lan_saa9730_regs->Timeout);
  462. return 0;
  463. }
  464. static int lan_saa9730_start(struct lan_saa9730_private *lp)
  465. {
  466. lan_saa9730_buffer_init(lp);
  467. /* Initialize Rx Buffer Index */
  468. lp->NextRcvPacketIndex = 0;
  469. lp->NextRcvBufferIndex = 0;
  470. /* Set current buffer index & next available packet index */
  471. lp->NextTxmPacketIndex = 0;
  472. lp->NextTxmBufferIndex = 0;
  473. lp->PendingTxmPacketIndex = 0;
  474. lp->PendingTxmBufferIndex = 0;
  475. outl(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
  476. DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);
  477. /* For Tx, turn on MAC then DMA */
  478. outl(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
  479. &lp->lan_saa9730_regs->TxCtl);
  480. /* For Rx, turn on DMA then MAC */
  481. outl(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
  482. &lp->lan_saa9730_regs->RxCtl);
  483. /* Set Ok2Use to let hardware own the buffers. */
  484. outl(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use);
  485. return 0;
  486. }
  487. static int lan_saa9730_restart(struct lan_saa9730_private *lp)
  488. {
  489. lan_saa9730_stop(lp);
  490. lan_saa9730_start(lp);
  491. return 0;
  492. }
  493. static int lan_saa9730_tx(struct net_device *dev)
  494. {
  495. struct lan_saa9730_private *lp = netdev_priv(dev);
  496. unsigned int *pPacket;
  497. unsigned int tx_status;
  498. if (lan_saa9730_debug > 5)
  499. printk("lan_saa9730_tx interrupt\n");
  500. /* Clear interrupt. */
  501. outl(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus);
  502. while (1) {
  503. pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex]
  504. [lp->PendingTxmPacketIndex];
  505. /* Get status of first packet transmitted. */
  506. tx_status = le32_to_cpu(*pPacket);
  507. /* Check ownership. */
  508. if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
  509. (TXSF_HWDONE << TX_STAT_CTL_OWNER_SHF)) break;
  510. /* Check for error. */
  511. if (tx_status & TX_STAT_CTL_ERROR_MSK) {
  512. if (lan_saa9730_debug > 1)
  513. printk("lan_saa9730_tx: tx error = %x\n",
  514. tx_status);
  515. lp->stats.tx_errors++;
  516. if (tx_status &
  517. (TX_STATUS_EX_COLL << TX_STAT_CTL_STATUS_SHF))
  518. lp->stats.tx_aborted_errors++;
  519. if (tx_status &
  520. (TX_STATUS_LATE_COLL << TX_STAT_CTL_STATUS_SHF))
  521. lp->stats.tx_window_errors++;
  522. if (tx_status &
  523. (TX_STATUS_L_CARR << TX_STAT_CTL_STATUS_SHF))
  524. lp->stats.tx_carrier_errors++;
  525. if (tx_status &
  526. (TX_STATUS_UNDER << TX_STAT_CTL_STATUS_SHF))
  527. lp->stats.tx_fifo_errors++;
  528. if (tx_status &
  529. (TX_STATUS_SQ_ERR << TX_STAT_CTL_STATUS_SHF))
  530. lp->stats.tx_heartbeat_errors++;
  531. lp->stats.collisions +=
  532. tx_status & TX_STATUS_TX_COLL_MSK;
  533. }
  534. /* Free buffer. */
  535. *pPacket =
  536. cpu_to_le32(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF);
  537. /* Update pending index pointer. */
  538. lp->PendingTxmPacketIndex++;
  539. if (lp->PendingTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
  540. lp->PendingTxmPacketIndex = 0;
  541. lp->PendingTxmBufferIndex ^= 1;
  542. }
  543. }
  544. /* The tx buffer is no longer full. */
  545. netif_wake_queue(dev);
  546. return 0;
  547. }
  548. static int lan_saa9730_rx(struct net_device *dev)
  549. {
  550. struct lan_saa9730_private *lp = netdev_priv(dev);
  551. int len = 0;
  552. struct sk_buff *skb = 0;
  553. unsigned int rx_status;
  554. int BufferIndex;
  555. int PacketIndex;
  556. unsigned int *pPacket;
  557. unsigned char *pData;
  558. if (lan_saa9730_debug > 5)
  559. printk("lan_saa9730_rx interrupt\n");
  560. /* Clear receive interrupts. */
  561. outl(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
  562. DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus);
  563. /* Address next packet */
  564. BufferIndex = lp->NextRcvBufferIndex;
  565. PacketIndex = lp->NextRcvPacketIndex;
  566. pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
  567. rx_status = le32_to_cpu(*pPacket);
  568. /* Process each packet. */
  569. while ((rx_status & RX_STAT_CTL_OWNER_MSK) ==
  570. (RXSF_HWDONE << RX_STAT_CTL_OWNER_SHF)) {
  571. /* Check the rx status. */
  572. if (rx_status & (RX_STATUS_GOOD << RX_STAT_CTL_STATUS_SHF)) {
  573. /* Received packet is good. */
  574. len = (rx_status & RX_STAT_CTL_LENGTH_MSK) >>
  575. RX_STAT_CTL_LENGTH_SHF;
  576. pData = (unsigned char *) pPacket;
  577. pData += 4;
  578. skb = dev_alloc_skb(len + 2);
  579. if (skb == 0) {
  580. printk
  581. ("%s: Memory squeeze, deferring packet.\n",
  582. dev->name);
  583. lp->stats.rx_dropped++;
  584. } else {
  585. lp->stats.rx_bytes += len;
  586. lp->stats.rx_packets++;
  587. skb->dev = dev;
  588. skb_reserve(skb, 2); /* 16 byte align */
  589. skb_put(skb, len); /* make room */
  590. eth_copy_and_sum(skb,
  591. (unsigned char *) pData,
  592. len, 0);
  593. skb->protocol = eth_type_trans(skb, dev);
  594. netif_rx(skb);
  595. dev->last_rx = jiffies;
  596. }
  597. } else {
  598. /* We got an error packet. */
  599. if (lan_saa9730_debug > 2)
  600. printk
  601. ("lan_saa9730_rx: We got an error packet = %x\n",
  602. rx_status);
  603. lp->stats.rx_errors++;
  604. if (rx_status &
  605. (RX_STATUS_CRC_ERR << RX_STAT_CTL_STATUS_SHF))
  606. lp->stats.rx_crc_errors++;
  607. if (rx_status &
  608. (RX_STATUS_ALIGN_ERR << RX_STAT_CTL_STATUS_SHF))
  609. lp->stats.rx_frame_errors++;
  610. if (rx_status &
  611. (RX_STATUS_OVERFLOW << RX_STAT_CTL_STATUS_SHF))
  612. lp->stats.rx_fifo_errors++;
  613. if (rx_status &
  614. (RX_STATUS_LONG_ERR << RX_STAT_CTL_STATUS_SHF))
  615. lp->stats.rx_length_errors++;
  616. }
  617. /* Indicate we have processed the buffer. */
  618. *pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF);
  619. /* Make sure A or B is available to hardware as appropriate. */
  620. outl(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A,
  621. &lp->lan_saa9730_regs->Ok2Use);
  622. /* Go to next packet in sequence. */
  623. lp->NextRcvPacketIndex++;
  624. if (lp->NextRcvPacketIndex >= LAN_SAA9730_RCV_Q_SIZE) {
  625. lp->NextRcvPacketIndex = 0;
  626. lp->NextRcvBufferIndex ^= 1;
  627. }
  628. /* Address next packet */
  629. BufferIndex = lp->NextRcvBufferIndex;
  630. PacketIndex = lp->NextRcvPacketIndex;
  631. pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
  632. rx_status = le32_to_cpu(*pPacket);
  633. }
  634. return 0;
  635. }
  636. static irqreturn_t lan_saa9730_interrupt(const int irq, void *dev_id)
  637. {
  638. struct net_device *dev = dev_id;
  639. struct lan_saa9730_private *lp = netdev_priv(dev);
  640. if (lan_saa9730_debug > 5)
  641. printk("lan_saa9730_interrupt\n");
  642. /* Disable the EVM LAN interrupt. */
  643. evm_saa9730_block_lan_int(lp);
  644. /* Clear the EVM LAN interrupt. */
  645. evm_saa9730_clear_lan_int(lp);
  646. /* Service pending transmit interrupts. */
  647. if (readl(&lp->lan_saa9730_regs->DmaStatus) & DMA_STATUS_MAC_TX_INT)
  648. lan_saa9730_tx(dev);
  649. /* Service pending receive interrupts. */
  650. if (readl(&lp->lan_saa9730_regs->DmaStatus) &
  651. (DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
  652. DMA_STATUS_RX_TO_INT)) lan_saa9730_rx(dev);
  653. /* Enable the EVM LAN interrupt. */
  654. evm_saa9730_unblock_lan_int(lp);
  655. return IRQ_HANDLED;
  656. }
  657. static int lan_saa9730_open(struct net_device *dev)
  658. {
  659. struct lan_saa9730_private *lp = netdev_priv(dev);
  660. /* Associate IRQ with lan_saa9730_interrupt */
  661. if (request_irq(dev->irq, &lan_saa9730_interrupt, 0, "SAA9730 Eth",
  662. dev)) {
  663. printk("lan_saa9730_open: Can't get irq %d\n", dev->irq);
  664. return -EAGAIN;
  665. }
  666. /* Enable the Lan interrupt in the event manager. */
  667. evm_saa9730_enable_lan_int(lp);
  668. /* Start the LAN controller */
  669. if (lan_saa9730_start(lp))
  670. return -1;
  671. netif_start_queue(dev);
  672. return 0;
  673. }
  674. static int lan_saa9730_write(struct lan_saa9730_private *lp,
  675. struct sk_buff *skb, int skblen)
  676. {
  677. unsigned char *pbData = skb->data;
  678. unsigned int len = skblen;
  679. unsigned char *pbPacketData;
  680. unsigned int tx_status;
  681. int BufferIndex;
  682. int PacketIndex;
  683. if (lan_saa9730_debug > 5)
  684. printk("lan_saa9730_write: skb=%p\n", skb);
  685. BufferIndex = lp->NextTxmBufferIndex;
  686. PacketIndex = lp->NextTxmPacketIndex;
  687. tx_status = le32_to_cpu(*(unsigned int *)lp->TxmBuffer[BufferIndex]
  688. [PacketIndex]);
  689. if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
  690. (TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF)) {
  691. if (lan_saa9730_debug > 4)
  692. printk
  693. ("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
  694. tx_status);
  695. return -1;
  696. }
  697. lp->NextTxmPacketIndex++;
  698. if (lp->NextTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
  699. lp->NextTxmPacketIndex = 0;
  700. lp->NextTxmBufferIndex ^= 1;
  701. }
  702. pbPacketData = lp->TxmBuffer[BufferIndex][PacketIndex];
  703. pbPacketData += 4;
  704. /* copy the bits */
  705. memcpy(pbPacketData, pbData, len);
  706. /* Set transmit status for hardware */
  707. *(unsigned int *)lp->TxmBuffer[BufferIndex][PacketIndex] =
  708. cpu_to_le32((TXSF_READY << TX_STAT_CTL_OWNER_SHF) |
  709. (TX_STAT_CTL_INT_AFTER_TX <<
  710. TX_STAT_CTL_FRAME_SHF) |
  711. (len << TX_STAT_CTL_LENGTH_SHF));
  712. /* Make sure A or B is available to hardware as appropriate. */
  713. outl(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A,
  714. &lp->lan_saa9730_regs->Ok2Use);
  715. return 0;
  716. }
  717. static void lan_saa9730_tx_timeout(struct net_device *dev)
  718. {
  719. struct lan_saa9730_private *lp = netdev_priv(dev);
  720. /* Transmitter timeout, serious problems */
  721. lp->stats.tx_errors++;
  722. printk("%s: transmit timed out, reset\n", dev->name);
  723. /*show_saa9730_regs(lp); */
  724. lan_saa9730_restart(lp);
  725. dev->trans_start = jiffies;
  726. netif_wake_queue(dev);
  727. }
  728. static int lan_saa9730_start_xmit(struct sk_buff *skb,
  729. struct net_device *dev)
  730. {
  731. struct lan_saa9730_private *lp = netdev_priv(dev);
  732. unsigned long flags;
  733. int skblen;
  734. int len;
  735. if (lan_saa9730_debug > 4)
  736. printk("Send packet: skb=%p\n", skb);
  737. skblen = skb->len;
  738. spin_lock_irqsave(&lp->lock, flags);
  739. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  740. if (lan_saa9730_write(lp, skb, skblen)) {
  741. spin_unlock_irqrestore(&lp->lock, flags);
  742. printk("Error when writing packet to controller: skb=%p\n", skb);
  743. netif_stop_queue(dev);
  744. return -1;
  745. }
  746. lp->stats.tx_bytes += len;
  747. lp->stats.tx_packets++;
  748. dev->trans_start = jiffies;
  749. netif_wake_queue(dev);
  750. dev_kfree_skb(skb);
  751. spin_unlock_irqrestore(&lp->lock, flags);
  752. return 0;
  753. }
  754. static int lan_saa9730_close(struct net_device *dev)
  755. {
  756. struct lan_saa9730_private *lp = netdev_priv(dev);
  757. if (lan_saa9730_debug > 1)
  758. printk("lan_saa9730_close:\n");
  759. netif_stop_queue(dev);
  760. /* Disable the Lan interrupt in the event manager. */
  761. evm_saa9730_disable_lan_int(lp);
  762. /* Stop the controller */
  763. if (lan_saa9730_stop(lp))
  764. return -1;
  765. free_irq(dev->irq, (void *) dev);
  766. return 0;
  767. }
  768. static struct net_device_stats *lan_saa9730_get_stats(struct net_device
  769. *dev)
  770. {
  771. struct lan_saa9730_private *lp = netdev_priv(dev);
  772. return &lp->stats;
  773. }
  774. static void lan_saa9730_set_multicast(struct net_device *dev)
  775. {
  776. struct lan_saa9730_private *lp = netdev_priv(dev);
  777. /* Stop the controller */
  778. lan_saa9730_stop(lp);
  779. if (dev->flags & IFF_PROMISC) {
  780. /* accept all packets */
  781. outl(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC |
  782. CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC,
  783. &lp->lan_saa9730_regs->CamCtl);
  784. } else {
  785. if (dev->flags & IFF_ALLMULTI) {
  786. /* accept all multicast packets */
  787. outl(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC |
  788. CAM_CONTROL_BROAD_ACC,
  789. &lp->lan_saa9730_regs->CamCtl);
  790. } else {
  791. /*
  792. * Will handle the multicast stuff later. -carstenl
  793. */
  794. }
  795. }
  796. lan_saa9730_restart(lp);
  797. }
  798. static void __devexit saa9730_remove_one(struct pci_dev *pdev)
  799. {
  800. struct net_device *dev = pci_get_drvdata(pdev);
  801. struct lan_saa9730_private *lp = netdev_priv(dev);
  802. if (dev) {
  803. unregister_netdev(dev);
  804. lan_saa9730_free_buffers(pdev, lp);
  805. iounmap(lp->lan_saa9730_regs);
  806. iounmap(lp->evm_saa9730_regs);
  807. free_netdev(dev);
  808. pci_release_regions(pdev);
  809. pci_disable_device(pdev);
  810. pci_set_drvdata(pdev, NULL);
  811. }
  812. }
  813. static int lan_saa9730_init(struct net_device *dev, struct pci_dev *pdev,
  814. unsigned long ioaddr, int irq)
  815. {
  816. struct lan_saa9730_private *lp = netdev_priv(dev);
  817. unsigned char ethernet_addr[6];
  818. int ret;
  819. if (get_ethernet_addr(ethernet_addr)) {
  820. ret = -ENODEV;
  821. goto out;
  822. }
  823. memcpy(dev->dev_addr, ethernet_addr, 6);
  824. dev->base_addr = ioaddr;
  825. dev->irq = irq;
  826. lp->pci_dev = pdev;
  827. /* Set SAA9730 LAN base address. */
  828. lp->lan_saa9730_regs = ioremap(ioaddr + SAA9730_LAN_REGS_ADDR,
  829. SAA9730_LAN_REGS_SIZE);
  830. if (!lp->lan_saa9730_regs) {
  831. ret = -ENOMEM;
  832. goto out;
  833. }
  834. /* Set SAA9730 EVM base address. */
  835. lp->evm_saa9730_regs = ioremap(ioaddr + SAA9730_EVM_REGS_ADDR,
  836. SAA9730_EVM_REGS_SIZE);
  837. if (!lp->evm_saa9730_regs) {
  838. ret = -ENOMEM;
  839. goto out_iounmap_lan;
  840. }
  841. /* Allocate LAN RX/TX frame buffer space. */
  842. if ((ret = lan_saa9730_allocate_buffers(pdev, lp)))
  843. goto out_iounmap;
  844. /* Stop LAN controller. */
  845. if ((ret = lan_saa9730_stop(lp)))
  846. goto out_free_consistent;
  847. /* Initialize CAM registers. */
  848. if ((ret = lan_saa9730_cam_init(dev)))
  849. goto out_free_consistent;
  850. /* Initialize MII registers. */
  851. if ((ret = lan_saa9730_mii_init(lp)))
  852. goto out_free_consistent;
  853. /* Initialize control registers. */
  854. if ((ret = lan_saa9730_control_init(lp)))
  855. goto out_free_consistent;
  856. /* Load CAM registers. */
  857. if ((ret = lan_saa9730_cam_load(lp)))
  858. goto out_free_consistent;
  859. /* Initialize DMA context registers. */
  860. if ((ret = lan_saa9730_dma_init(lp)))
  861. goto out_free_consistent;
  862. spin_lock_init(&lp->lock);
  863. dev->open = lan_saa9730_open;
  864. dev->hard_start_xmit = lan_saa9730_start_xmit;
  865. dev->stop = lan_saa9730_close;
  866. dev->get_stats = lan_saa9730_get_stats;
  867. dev->set_multicast_list = lan_saa9730_set_multicast;
  868. dev->tx_timeout = lan_saa9730_tx_timeout;
  869. dev->watchdog_timeo = (HZ >> 1);
  870. dev->dma = 0;
  871. ret = register_netdev (dev);
  872. if (ret)
  873. goto out_free_consistent;
  874. return 0;
  875. out_free_consistent:
  876. lan_saa9730_free_buffers(pdev, lp);
  877. out_iounmap:
  878. iounmap(lp->evm_saa9730_regs);
  879. out_iounmap_lan:
  880. iounmap(lp->lan_saa9730_regs);
  881. out:
  882. return ret;
  883. }
  884. static int __devinit saa9730_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  885. {
  886. struct net_device *dev = NULL;
  887. unsigned long pci_ioaddr;
  888. int err;
  889. if (lan_saa9730_debug > 1)
  890. printk("saa9730.c: PCI bios is present, checking for devices...\n");
  891. err = pci_enable_device(pdev);
  892. if (err) {
  893. printk(KERN_ERR "Cannot enable PCI device, aborting.\n");
  894. goto out;
  895. }
  896. err = pci_request_regions(pdev, DRV_MODULE_NAME);
  897. if (err) {
  898. printk(KERN_ERR "Cannot obtain PCI resources, aborting.\n");
  899. goto out_disable_pdev;
  900. }
  901. pci_irq_line = pdev->irq;
  902. /* LAN base address in located at BAR 1. */
  903. pci_ioaddr = pci_resource_start(pdev, 1);
  904. pci_set_master(pdev);
  905. printk("Found SAA9730 (PCI) at %lx, irq %d.\n",
  906. pci_ioaddr, pci_irq_line);
  907. dev = alloc_etherdev(sizeof(struct lan_saa9730_private));
  908. if (!dev)
  909. goto out_disable_pdev;
  910. err = lan_saa9730_init(dev, pdev, pci_ioaddr, pci_irq_line);
  911. if (err) {
  912. printk("LAN init failed");
  913. goto out_free_netdev;
  914. }
  915. pci_set_drvdata(pdev, dev);
  916. SET_NETDEV_DEV(dev, &pdev->dev);
  917. return 0;
  918. out_free_netdev:
  919. free_netdev(dev);
  920. out_disable_pdev:
  921. pci_disable_device(pdev);
  922. out:
  923. pci_set_drvdata(pdev, NULL);
  924. return err;
  925. }
  926. static struct pci_driver saa9730_driver = {
  927. .name = DRV_MODULE_NAME,
  928. .id_table = saa9730_pci_tbl,
  929. .probe = saa9730_init_one,
  930. .remove = __devexit_p(saa9730_remove_one),
  931. };
  932. static int __init saa9730_init(void)
  933. {
  934. return pci_register_driver(&saa9730_driver);
  935. }
  936. static void __exit saa9730_cleanup(void)
  937. {
  938. pci_unregister_driver(&saa9730_driver);
  939. }
  940. module_init(saa9730_init);
  941. module_exit(saa9730_cleanup);
  942. MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
  943. MODULE_DESCRIPTION("Philips SAA9730 ethernet driver");
  944. MODULE_LICENSE("GPL");