yam.c 31 KB

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  1. /*****************************************************************************/
  2. /*
  3. * yam.c -- YAM radio modem driver.
  4. *
  5. * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr)
  6. * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Please note that the GPL allows you to use the driver, NOT the radio.
  23. * In order to use the radio, you need a license from the communications
  24. * authority of your country.
  25. *
  26. *
  27. * History:
  28. * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3
  29. * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration
  30. * 0.2 F6FBB 08.06.98 Added delay after FPGA programming
  31. * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2
  32. * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistance
  33. * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics
  34. * 0.6 F6FBB 25.08.98 Added 1200Bds format
  35. * 0.7 F6FBB 12.09.98 Added to the kernel configuration
  36. * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug
  37. * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ"
  38. * using dev_kfree_skb_any(). (important in 2.4 kernel)
  39. *
  40. */
  41. /*****************************************************************************/
  42. #include <linux/module.h>
  43. #include <linux/types.h>
  44. #include <linux/net.h>
  45. #include <linux/in.h>
  46. #include <linux/if.h>
  47. #include <linux/slab.h>
  48. #include <linux/errno.h>
  49. #include <linux/bitops.h>
  50. #include <asm/io.h>
  51. #include <asm/system.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/ioport.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/if_arp.h>
  56. #include <linux/etherdevice.h>
  57. #include <linux/skbuff.h>
  58. #include <net/ax25.h>
  59. #include <linux/kernel.h>
  60. #include <linux/proc_fs.h>
  61. #include <linux/seq_file.h>
  62. #include <asm/uaccess.h>
  63. #include <linux/init.h>
  64. #include <linux/yam.h>
  65. #include "yam9600.h"
  66. #include "yam1200.h"
  67. /* --------------------------------------------------------------------- */
  68. static const char yam_drvname[] = "yam";
  69. static char yam_drvinfo[] __initdata = KERN_INFO "YAM driver version 0.8 by F1OAT/F6FBB\n";
  70. /* --------------------------------------------------------------------- */
  71. #define YAM_9600 1
  72. #define YAM_1200 2
  73. #define NR_PORTS 4
  74. #define YAM_MAGIC 0xF10A7654
  75. /* Transmitter states */
  76. #define TX_OFF 0
  77. #define TX_HEAD 1
  78. #define TX_DATA 2
  79. #define TX_CRC1 3
  80. #define TX_CRC2 4
  81. #define TX_TAIL 5
  82. #define YAM_MAX_FRAME 1024
  83. #define DEFAULT_BITRATE 9600 /* bps */
  84. #define DEFAULT_HOLDD 10 /* sec */
  85. #define DEFAULT_TXD 300 /* ms */
  86. #define DEFAULT_TXTAIL 10 /* ms */
  87. #define DEFAULT_SLOT 100 /* ms */
  88. #define DEFAULT_PERS 64 /* 0->255 */
  89. struct yam_port {
  90. int magic;
  91. int bitrate;
  92. int baudrate;
  93. int iobase;
  94. int irq;
  95. int dupmode;
  96. struct net_device *dev;
  97. /* Stats section */
  98. struct net_device_stats stats;
  99. int nb_rxint;
  100. int nb_mdint;
  101. /* Parameters section */
  102. int txd; /* tx delay */
  103. int holdd; /* duplex ptt delay */
  104. int txtail; /* txtail delay */
  105. int slot; /* slottime */
  106. int pers; /* persistence */
  107. /* Tx section */
  108. int tx_state;
  109. int tx_count;
  110. int slotcnt;
  111. unsigned char tx_buf[YAM_MAX_FRAME];
  112. int tx_len;
  113. int tx_crcl, tx_crch;
  114. struct sk_buff_head send_queue; /* Packets awaiting transmission */
  115. /* Rx section */
  116. int dcd;
  117. unsigned char rx_buf[YAM_MAX_FRAME];
  118. int rx_len;
  119. int rx_crcl, rx_crch;
  120. };
  121. struct yam_mcs {
  122. unsigned char bits[YAM_FPGA_SIZE];
  123. int bitrate;
  124. struct yam_mcs *next;
  125. };
  126. static struct net_device *yam_devs[NR_PORTS];
  127. static struct yam_mcs *yam_data;
  128. static char ax25_bcast[7] =
  129. {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1};
  130. static char ax25_test[7] =
  131. {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1};
  132. static DEFINE_TIMER(yam_timer, NULL, 0, 0);
  133. /* --------------------------------------------------------------------- */
  134. #define RBR(iobase) (iobase+0)
  135. #define THR(iobase) (iobase+0)
  136. #define IER(iobase) (iobase+1)
  137. #define IIR(iobase) (iobase+2)
  138. #define FCR(iobase) (iobase+2)
  139. #define LCR(iobase) (iobase+3)
  140. #define MCR(iobase) (iobase+4)
  141. #define LSR(iobase) (iobase+5)
  142. #define MSR(iobase) (iobase+6)
  143. #define SCR(iobase) (iobase+7)
  144. #define DLL(iobase) (iobase+0)
  145. #define DLM(iobase) (iobase+1)
  146. #define YAM_EXTENT 8
  147. /* Interrupt Identification Register Bit Masks */
  148. #define IIR_NOPEND 1
  149. #define IIR_MSR 0
  150. #define IIR_TX 2
  151. #define IIR_RX 4
  152. #define IIR_LSR 6
  153. #define IIR_TIMEOUT 12 /* Fifo mode only */
  154. #define IIR_MASK 0x0F
  155. /* Interrupt Enable Register Bit Masks */
  156. #define IER_RX 1 /* enable rx interrupt */
  157. #define IER_TX 2 /* enable tx interrupt */
  158. #define IER_LSR 4 /* enable line status interrupts */
  159. #define IER_MSR 8 /* enable modem status interrupts */
  160. /* Modem Control Register Bit Masks */
  161. #define MCR_DTR 0x01 /* DTR output */
  162. #define MCR_RTS 0x02 /* RTS output */
  163. #define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */
  164. #define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */
  165. #define MCR_LOOP 0x10 /* Loopback enable */
  166. /* Modem Status Register Bit Masks */
  167. #define MSR_DCTS 0x01 /* Delta CTS input */
  168. #define MSR_DDSR 0x02 /* Delta DSR */
  169. #define MSR_DRIN 0x04 /* Delta RI */
  170. #define MSR_DDCD 0x08 /* Delta DCD */
  171. #define MSR_CTS 0x10 /* CTS input */
  172. #define MSR_DSR 0x20 /* DSR input */
  173. #define MSR_RING 0x40 /* RI input */
  174. #define MSR_DCD 0x80 /* DCD input */
  175. /* line status register bit mask */
  176. #define LSR_RXC 0x01
  177. #define LSR_OE 0x02
  178. #define LSR_PE 0x04
  179. #define LSR_FE 0x08
  180. #define LSR_BREAK 0x10
  181. #define LSR_THRE 0x20
  182. #define LSR_TSRE 0x40
  183. /* Line Control Register Bit Masks */
  184. #define LCR_DLAB 0x80
  185. #define LCR_BREAK 0x40
  186. #define LCR_PZERO 0x28
  187. #define LCR_PEVEN 0x18
  188. #define LCR_PODD 0x08
  189. #define LCR_STOP1 0x00
  190. #define LCR_STOP2 0x04
  191. #define LCR_BIT5 0x00
  192. #define LCR_BIT6 0x02
  193. #define LCR_BIT7 0x01
  194. #define LCR_BIT8 0x03
  195. /* YAM Modem <-> UART Port mapping */
  196. #define TX_RDY MSR_DCTS /* transmitter ready to send */
  197. #define RX_DCD MSR_DCD /* carrier detect */
  198. #define RX_FLAG MSR_RING /* hdlc flag received */
  199. #define FPGA_DONE MSR_DSR /* FPGA is configured */
  200. #define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */
  201. #define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */
  202. #define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */
  203. #define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */
  204. #define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */
  205. /*************************************************************************
  206. * CRC Tables
  207. ************************************************************************/
  208. static const unsigned char chktabl[256] =
  209. {0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e,
  210. 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64,
  211. 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e,
  212. 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50,
  213. 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e,
  214. 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44,
  215. 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e,
  216. 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38,
  217. 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e,
  218. 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24,
  219. 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e,
  220. 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10,
  221. 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e,
  222. 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04,
  223. 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e,
  224. 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9,
  225. 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1,
  226. 0x78};
  227. static const unsigned char chktabh[256] =
  228. {0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9,
  229. 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb,
  230. 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb,
  231. 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f,
  232. 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed,
  233. 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf,
  234. 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef,
  235. 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07,
  236. 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1,
  237. 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3,
  238. 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3,
  239. 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87,
  240. 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5,
  241. 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7,
  242. 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7,
  243. 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f,
  244. 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e,
  245. 0x0f};
  246. /*************************************************************************
  247. * FPGA functions
  248. ************************************************************************/
  249. static void delay(int ms)
  250. {
  251. unsigned long timeout = jiffies + ((ms * HZ) / 1000);
  252. while (time_before(jiffies, timeout))
  253. cpu_relax();
  254. }
  255. /*
  256. * reset FPGA
  257. */
  258. static void fpga_reset(int iobase)
  259. {
  260. outb(0, IER(iobase));
  261. outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
  262. outb(1, DLL(iobase));
  263. outb(0, DLM(iobase));
  264. outb(LCR_BIT5, LCR(iobase));
  265. inb(LSR(iobase));
  266. inb(MSR(iobase));
  267. /* turn off FPGA supply voltage */
  268. outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
  269. delay(100);
  270. /* turn on FPGA supply voltage again */
  271. outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
  272. delay(100);
  273. }
  274. /*
  275. * send one byte to FPGA
  276. */
  277. static int fpga_write(int iobase, unsigned char wrd)
  278. {
  279. unsigned char bit;
  280. int k;
  281. unsigned long timeout = jiffies + HZ / 10;
  282. for (k = 0; k < 8; k++) {
  283. bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR;
  284. outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));
  285. wrd <<= 1;
  286. outb(0xfc, THR(iobase));
  287. while ((inb(LSR(iobase)) & LSR_TSRE) == 0)
  288. if (time_after(jiffies, timeout))
  289. return -1;
  290. }
  291. return 0;
  292. }
  293. static unsigned char *add_mcs(unsigned char *bits, int bitrate)
  294. {
  295. struct yam_mcs *p;
  296. /* If it already exists, replace the bit data */
  297. p = yam_data;
  298. while (p) {
  299. if (p->bitrate == bitrate) {
  300. memcpy(p->bits, bits, YAM_FPGA_SIZE);
  301. return p->bits;
  302. }
  303. p = p->next;
  304. }
  305. /* Allocate a new mcs */
  306. if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
  307. printk(KERN_WARNING "YAM: no memory to allocate mcs\n");
  308. return NULL;
  309. }
  310. memcpy(p->bits, bits, YAM_FPGA_SIZE);
  311. p->bitrate = bitrate;
  312. p->next = yam_data;
  313. yam_data = p;
  314. return p->bits;
  315. }
  316. static unsigned char *get_mcs(int bitrate)
  317. {
  318. struct yam_mcs *p;
  319. p = yam_data;
  320. while (p) {
  321. if (p->bitrate == bitrate)
  322. return p->bits;
  323. p = p->next;
  324. }
  325. /* Load predefined mcs data */
  326. switch (bitrate) {
  327. case 1200:
  328. return add_mcs(bits_1200, bitrate);
  329. default:
  330. return add_mcs(bits_9600, bitrate);
  331. }
  332. }
  333. /*
  334. * download bitstream to FPGA
  335. * data is contained in bits[] array in yam1200.h resp. yam9600.h
  336. */
  337. static int fpga_download(int iobase, int bitrate)
  338. {
  339. int i, rc;
  340. unsigned char *pbits;
  341. pbits = get_mcs(bitrate);
  342. if (pbits == NULL)
  343. return -1;
  344. fpga_reset(iobase);
  345. for (i = 0; i < YAM_FPGA_SIZE; i++) {
  346. if (fpga_write(iobase, pbits[i])) {
  347. printk(KERN_ERR "yam: error in write cycle\n");
  348. return -1; /* write... */
  349. }
  350. }
  351. fpga_write(iobase, 0xFF);
  352. rc = inb(MSR(iobase)); /* check DONE signal */
  353. /* Needed for some hardwares */
  354. delay(50);
  355. return (rc & MSR_DSR) ? 0 : -1;
  356. }
  357. /************************************************************************
  358. * Serial port init
  359. ************************************************************************/
  360. static void yam_set_uart(struct net_device *dev)
  361. {
  362. struct yam_port *yp = netdev_priv(dev);
  363. int divisor = 115200 / yp->baudrate;
  364. outb(0, IER(dev->base_addr));
  365. outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
  366. outb(divisor, DLL(dev->base_addr));
  367. outb(0, DLM(dev->base_addr));
  368. outb(LCR_BIT8, LCR(dev->base_addr));
  369. outb(PTT_OFF, MCR(dev->base_addr));
  370. outb(0x00, FCR(dev->base_addr));
  371. /* Flush pending irq */
  372. inb(RBR(dev->base_addr));
  373. inb(MSR(dev->base_addr));
  374. /* Enable rx irq */
  375. outb(ENABLE_RTXINT, IER(dev->base_addr));
  376. }
  377. /* --------------------------------------------------------------------- */
  378. enum uart {
  379. c_uart_unknown, c_uart_8250,
  380. c_uart_16450, c_uart_16550, c_uart_16550A
  381. };
  382. static const char *uart_str[] =
  383. {"unknown", "8250", "16450", "16550", "16550A"};
  384. static enum uart yam_check_uart(unsigned int iobase)
  385. {
  386. unsigned char b1, b2, b3;
  387. enum uart u;
  388. enum uart uart_tab[] =
  389. {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};
  390. b1 = inb(MCR(iobase));
  391. outb(b1 | 0x10, MCR(iobase)); /* loopback mode */
  392. b2 = inb(MSR(iobase));
  393. outb(0x1a, MCR(iobase));
  394. b3 = inb(MSR(iobase)) & 0xf0;
  395. outb(b1, MCR(iobase)); /* restore old values */
  396. outb(b2, MSR(iobase));
  397. if (b3 != 0x90)
  398. return c_uart_unknown;
  399. inb(RBR(iobase));
  400. inb(RBR(iobase));
  401. outb(0x01, FCR(iobase)); /* enable FIFOs */
  402. u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
  403. if (u == c_uart_16450) {
  404. outb(0x5a, SCR(iobase));
  405. b1 = inb(SCR(iobase));
  406. outb(0xa5, SCR(iobase));
  407. b2 = inb(SCR(iobase));
  408. if ((b1 != 0x5a) || (b2 != 0xa5))
  409. u = c_uart_8250;
  410. }
  411. return u;
  412. }
  413. /******************************************************************************
  414. * Rx Section
  415. ******************************************************************************/
  416. static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
  417. {
  418. if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) {
  419. int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */
  420. struct sk_buff *skb;
  421. if ((yp->rx_crch & yp->rx_crcl) != 0xFF) {
  422. /* Bad crc */
  423. } else {
  424. if (!(skb = dev_alloc_skb(pkt_len))) {
  425. printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name);
  426. ++yp->stats.rx_dropped;
  427. } else {
  428. unsigned char *cp;
  429. cp = skb_put(skb, pkt_len);
  430. *cp++ = 0; /* KISS kludge */
  431. memcpy(cp, yp->rx_buf, pkt_len - 1);
  432. skb->protocol = ax25_type_trans(skb, dev);
  433. netif_rx(skb);
  434. dev->last_rx = jiffies;
  435. ++yp->stats.rx_packets;
  436. }
  437. }
  438. }
  439. yp->rx_len = 0;
  440. yp->rx_crcl = 0x21;
  441. yp->rx_crch = 0xf3;
  442. }
  443. static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb)
  444. {
  445. if (yp->rx_len < YAM_MAX_FRAME) {
  446. unsigned char c = yp->rx_crcl;
  447. yp->rx_crcl = (chktabl[c] ^ yp->rx_crch);
  448. yp->rx_crch = (chktabh[c] ^ rxb);
  449. yp->rx_buf[yp->rx_len++] = rxb;
  450. }
  451. }
  452. /********************************************************************************
  453. * TX Section
  454. ********************************************************************************/
  455. static void ptt_on(struct net_device *dev)
  456. {
  457. outb(PTT_ON, MCR(dev->base_addr));
  458. }
  459. static void ptt_off(struct net_device *dev)
  460. {
  461. outb(PTT_OFF, MCR(dev->base_addr));
  462. }
  463. static int yam_send_packet(struct sk_buff *skb, struct net_device *dev)
  464. {
  465. struct yam_port *yp = netdev_priv(dev);
  466. skb_queue_tail(&yp->send_queue, skb);
  467. dev->trans_start = jiffies;
  468. return 0;
  469. }
  470. static void yam_start_tx(struct net_device *dev, struct yam_port *yp)
  471. {
  472. if ((yp->tx_state == TX_TAIL) || (yp->txd == 0))
  473. yp->tx_count = 1;
  474. else
  475. yp->tx_count = (yp->bitrate * yp->txd) / 8000;
  476. yp->tx_state = TX_HEAD;
  477. ptt_on(dev);
  478. }
  479. static unsigned short random_seed;
  480. static inline unsigned short random_num(void)
  481. {
  482. random_seed = 28629 * random_seed + 157;
  483. return random_seed;
  484. }
  485. static void yam_arbitrate(struct net_device *dev)
  486. {
  487. struct yam_port *yp = netdev_priv(dev);
  488. if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF ||
  489. skb_queue_empty(&yp->send_queue))
  490. return;
  491. /* tx_state is TX_OFF and there is data to send */
  492. if (yp->dupmode) {
  493. /* Full duplex mode, don't wait */
  494. yam_start_tx(dev, yp);
  495. return;
  496. }
  497. if (yp->dcd) {
  498. /* DCD on, wait slotime ... */
  499. yp->slotcnt = yp->slot / 10;
  500. return;
  501. }
  502. /* Is slottime passed ? */
  503. if ((--yp->slotcnt) > 0)
  504. return;
  505. yp->slotcnt = yp->slot / 10;
  506. /* is random > persist ? */
  507. if ((random_num() % 256) > yp->pers)
  508. return;
  509. yam_start_tx(dev, yp);
  510. }
  511. static void yam_dotimer(unsigned long dummy)
  512. {
  513. int i;
  514. for (i = 0; i < NR_PORTS; i++) {
  515. struct net_device *dev = yam_devs[i];
  516. if (dev && netif_running(dev))
  517. yam_arbitrate(dev);
  518. }
  519. yam_timer.expires = jiffies + HZ / 100;
  520. add_timer(&yam_timer);
  521. }
  522. static void yam_tx_byte(struct net_device *dev, struct yam_port *yp)
  523. {
  524. struct sk_buff *skb;
  525. unsigned char b, temp;
  526. switch (yp->tx_state) {
  527. case TX_OFF:
  528. break;
  529. case TX_HEAD:
  530. if (--yp->tx_count <= 0) {
  531. if (!(skb = skb_dequeue(&yp->send_queue))) {
  532. ptt_off(dev);
  533. yp->tx_state = TX_OFF;
  534. break;
  535. }
  536. yp->tx_state = TX_DATA;
  537. if (skb->data[0] != 0) {
  538. /* do_kiss_params(s, skb->data, skb->len); */
  539. dev_kfree_skb_any(skb);
  540. break;
  541. }
  542. yp->tx_len = skb->len - 1; /* strip KISS byte */
  543. if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) {
  544. dev_kfree_skb_any(skb);
  545. break;
  546. }
  547. memcpy(yp->tx_buf, skb->data + 1, yp->tx_len);
  548. dev_kfree_skb_any(skb);
  549. yp->tx_count = 0;
  550. yp->tx_crcl = 0x21;
  551. yp->tx_crch = 0xf3;
  552. yp->tx_state = TX_DATA;
  553. }
  554. break;
  555. case TX_DATA:
  556. b = yp->tx_buf[yp->tx_count++];
  557. outb(b, THR(dev->base_addr));
  558. temp = yp->tx_crcl;
  559. yp->tx_crcl = chktabl[temp] ^ yp->tx_crch;
  560. yp->tx_crch = chktabh[temp] ^ b;
  561. if (yp->tx_count >= yp->tx_len) {
  562. yp->tx_state = TX_CRC1;
  563. }
  564. break;
  565. case TX_CRC1:
  566. yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch;
  567. yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff;
  568. outb(yp->tx_crcl, THR(dev->base_addr));
  569. yp->tx_state = TX_CRC2;
  570. break;
  571. case TX_CRC2:
  572. outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr));
  573. if (skb_queue_empty(&yp->send_queue)) {
  574. yp->tx_count = (yp->bitrate * yp->txtail) / 8000;
  575. if (yp->dupmode == 2)
  576. yp->tx_count += (yp->bitrate * yp->holdd) / 8;
  577. if (yp->tx_count == 0)
  578. yp->tx_count = 1;
  579. yp->tx_state = TX_TAIL;
  580. } else {
  581. yp->tx_count = 1;
  582. yp->tx_state = TX_HEAD;
  583. }
  584. ++yp->stats.tx_packets;
  585. break;
  586. case TX_TAIL:
  587. if (--yp->tx_count <= 0) {
  588. yp->tx_state = TX_OFF;
  589. ptt_off(dev);
  590. }
  591. break;
  592. }
  593. }
  594. /***********************************************************************************
  595. * ISR routine
  596. ************************************************************************************/
  597. static irqreturn_t yam_interrupt(int irq, void *dev_id)
  598. {
  599. struct net_device *dev;
  600. struct yam_port *yp;
  601. unsigned char iir;
  602. int counter = 100;
  603. int i;
  604. int handled = 0;
  605. for (i = 0; i < NR_PORTS; i++) {
  606. dev = yam_devs[i];
  607. yp = netdev_priv(dev);
  608. if (!netif_running(dev))
  609. continue;
  610. while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
  611. unsigned char msr = inb(MSR(dev->base_addr));
  612. unsigned char lsr = inb(LSR(dev->base_addr));
  613. unsigned char rxb;
  614. handled = 1;
  615. if (lsr & LSR_OE)
  616. ++yp->stats.rx_fifo_errors;
  617. yp->dcd = (msr & RX_DCD) ? 1 : 0;
  618. if (--counter <= 0) {
  619. printk(KERN_ERR "%s: too many irq iir=%d\n",
  620. dev->name, iir);
  621. goto out;
  622. }
  623. if (msr & TX_RDY) {
  624. ++yp->nb_mdint;
  625. yam_tx_byte(dev, yp);
  626. }
  627. if (lsr & LSR_RXC) {
  628. ++yp->nb_rxint;
  629. rxb = inb(RBR(dev->base_addr));
  630. if (msr & RX_FLAG)
  631. yam_rx_flag(dev, yp);
  632. else
  633. yam_rx_byte(dev, yp, rxb);
  634. }
  635. }
  636. }
  637. out:
  638. return IRQ_RETVAL(handled);
  639. }
  640. #ifdef CONFIG_PROC_FS
  641. static void *yam_seq_start(struct seq_file *seq, loff_t *pos)
  642. {
  643. return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
  644. }
  645. static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos)
  646. {
  647. ++*pos;
  648. return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
  649. }
  650. static void yam_seq_stop(struct seq_file *seq, void *v)
  651. {
  652. }
  653. static int yam_seq_show(struct seq_file *seq, void *v)
  654. {
  655. struct net_device *dev = v;
  656. const struct yam_port *yp = netdev_priv(dev);
  657. seq_printf(seq, "Device %s\n", dev->name);
  658. seq_printf(seq, " Up %d\n", netif_running(dev));
  659. seq_printf(seq, " Speed %u\n", yp->bitrate);
  660. seq_printf(seq, " IoBase 0x%x\n", yp->iobase);
  661. seq_printf(seq, " BaudRate %u\n", yp->baudrate);
  662. seq_printf(seq, " IRQ %u\n", yp->irq);
  663. seq_printf(seq, " TxState %u\n", yp->tx_state);
  664. seq_printf(seq, " Duplex %u\n", yp->dupmode);
  665. seq_printf(seq, " HoldDly %u\n", yp->holdd);
  666. seq_printf(seq, " TxDelay %u\n", yp->txd);
  667. seq_printf(seq, " TxTail %u\n", yp->txtail);
  668. seq_printf(seq, " SlotTime %u\n", yp->slot);
  669. seq_printf(seq, " Persist %u\n", yp->pers);
  670. seq_printf(seq, " TxFrames %lu\n", yp->stats.tx_packets);
  671. seq_printf(seq, " RxFrames %lu\n", yp->stats.rx_packets);
  672. seq_printf(seq, " TxInt %u\n", yp->nb_mdint);
  673. seq_printf(seq, " RxInt %u\n", yp->nb_rxint);
  674. seq_printf(seq, " RxOver %lu\n", yp->stats.rx_fifo_errors);
  675. seq_printf(seq, "\n");
  676. return 0;
  677. }
  678. static struct seq_operations yam_seqops = {
  679. .start = yam_seq_start,
  680. .next = yam_seq_next,
  681. .stop = yam_seq_stop,
  682. .show = yam_seq_show,
  683. };
  684. static int yam_info_open(struct inode *inode, struct file *file)
  685. {
  686. return seq_open(file, &yam_seqops);
  687. }
  688. static struct file_operations yam_info_fops = {
  689. .owner = THIS_MODULE,
  690. .open = yam_info_open,
  691. .read = seq_read,
  692. .llseek = seq_lseek,
  693. .release = seq_release,
  694. };
  695. #endif
  696. /* --------------------------------------------------------------------- */
  697. static struct net_device_stats *yam_get_stats(struct net_device *dev)
  698. {
  699. struct yam_port *yp;
  700. if (!dev)
  701. return NULL;
  702. yp = netdev_priv(dev);
  703. if (yp->magic != YAM_MAGIC)
  704. return NULL;
  705. /*
  706. * Get the current statistics. This may be called with the
  707. * card open or closed.
  708. */
  709. return &yp->stats;
  710. }
  711. /* --------------------------------------------------------------------- */
  712. static int yam_open(struct net_device *dev)
  713. {
  714. struct yam_port *yp = netdev_priv(dev);
  715. enum uart u;
  716. int i;
  717. int ret=0;
  718. printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq);
  719. if (!dev || !yp->bitrate)
  720. return -ENXIO;
  721. if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT ||
  722. dev->irq < 2 || dev->irq > 15) {
  723. return -ENXIO;
  724. }
  725. if (!request_region(dev->base_addr, YAM_EXTENT, dev->name))
  726. {
  727. printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr);
  728. return -EACCES;
  729. }
  730. if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) {
  731. printk(KERN_ERR "%s: cannot find uart type\n", dev->name);
  732. ret = -EIO;
  733. goto out_release_base;
  734. }
  735. if (fpga_download(dev->base_addr, yp->bitrate)) {
  736. printk(KERN_ERR "%s: cannot init FPGA\n", dev->name);
  737. ret = -EIO;
  738. goto out_release_base;
  739. }
  740. outb(0, IER(dev->base_addr));
  741. if (request_irq(dev->irq, yam_interrupt, IRQF_DISABLED | IRQF_SHARED, dev->name, dev)) {
  742. printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq);
  743. ret = -EBUSY;
  744. goto out_release_base;
  745. }
  746. yam_set_uart(dev);
  747. netif_start_queue(dev);
  748. yp->slotcnt = yp->slot / 10;
  749. /* Reset overruns for all ports - FPGA programming makes overruns */
  750. for (i = 0; i < NR_PORTS; i++) {
  751. struct net_device *dev = yam_devs[i];
  752. struct yam_port *yp = netdev_priv(dev);
  753. inb(LSR(dev->base_addr));
  754. yp->stats.rx_fifo_errors = 0;
  755. }
  756. printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq,
  757. uart_str[u]);
  758. return 0;
  759. out_release_base:
  760. release_region(dev->base_addr, YAM_EXTENT);
  761. return ret;
  762. }
  763. /* --------------------------------------------------------------------- */
  764. static int yam_close(struct net_device *dev)
  765. {
  766. struct sk_buff *skb;
  767. struct yam_port *yp = netdev_priv(dev);
  768. if (!dev)
  769. return -EINVAL;
  770. /*
  771. * disable interrupts
  772. */
  773. outb(0, IER(dev->base_addr));
  774. outb(1, MCR(dev->base_addr));
  775. /* Remove IRQ handler if last */
  776. free_irq(dev->irq,dev);
  777. release_region(dev->base_addr, YAM_EXTENT);
  778. netif_stop_queue(dev);
  779. while ((skb = skb_dequeue(&yp->send_queue)))
  780. dev_kfree_skb(skb);
  781. printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n",
  782. yam_drvname, dev->base_addr, dev->irq);
  783. return 0;
  784. }
  785. /* --------------------------------------------------------------------- */
  786. static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  787. {
  788. struct yam_port *yp = netdev_priv(dev);
  789. struct yamdrv_ioctl_cfg yi;
  790. struct yamdrv_ioctl_mcs *ym;
  791. int ioctl_cmd;
  792. if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int)))
  793. return -EFAULT;
  794. if (yp->magic != YAM_MAGIC)
  795. return -EINVAL;
  796. if (!capable(CAP_NET_ADMIN))
  797. return -EPERM;
  798. if (cmd != SIOCDEVPRIVATE)
  799. return -EINVAL;
  800. switch (ioctl_cmd) {
  801. case SIOCYAMRESERVED:
  802. return -EINVAL; /* unused */
  803. case SIOCYAMSMCS:
  804. if (netif_running(dev))
  805. return -EINVAL; /* Cannot change this parameter when up */
  806. if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL)
  807. return -ENOBUFS;
  808. ym->bitrate = 9600;
  809. if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) {
  810. kfree(ym);
  811. return -EFAULT;
  812. }
  813. if (ym->bitrate > YAM_MAXBITRATE) {
  814. kfree(ym);
  815. return -EINVAL;
  816. }
  817. add_mcs(ym->bits, ym->bitrate);
  818. kfree(ym);
  819. break;
  820. case SIOCYAMSCFG:
  821. if (!capable(CAP_SYS_RAWIO))
  822. return -EPERM;
  823. if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg)))
  824. return -EFAULT;
  825. if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev))
  826. return -EINVAL; /* Cannot change this parameter when up */
  827. if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev))
  828. return -EINVAL; /* Cannot change this parameter when up */
  829. if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev))
  830. return -EINVAL; /* Cannot change this parameter when up */
  831. if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev))
  832. return -EINVAL; /* Cannot change this parameter when up */
  833. if (yi.cfg.mask & YAM_IOBASE) {
  834. yp->iobase = yi.cfg.iobase;
  835. dev->base_addr = yi.cfg.iobase;
  836. }
  837. if (yi.cfg.mask & YAM_IRQ) {
  838. if (yi.cfg.irq > 15)
  839. return -EINVAL;
  840. yp->irq = yi.cfg.irq;
  841. dev->irq = yi.cfg.irq;
  842. }
  843. if (yi.cfg.mask & YAM_BITRATE) {
  844. if (yi.cfg.bitrate > YAM_MAXBITRATE)
  845. return -EINVAL;
  846. yp->bitrate = yi.cfg.bitrate;
  847. }
  848. if (yi.cfg.mask & YAM_BAUDRATE) {
  849. if (yi.cfg.baudrate > YAM_MAXBAUDRATE)
  850. return -EINVAL;
  851. yp->baudrate = yi.cfg.baudrate;
  852. }
  853. if (yi.cfg.mask & YAM_MODE) {
  854. if (yi.cfg.mode > YAM_MAXMODE)
  855. return -EINVAL;
  856. yp->dupmode = yi.cfg.mode;
  857. }
  858. if (yi.cfg.mask & YAM_HOLDDLY) {
  859. if (yi.cfg.holddly > YAM_MAXHOLDDLY)
  860. return -EINVAL;
  861. yp->holdd = yi.cfg.holddly;
  862. }
  863. if (yi.cfg.mask & YAM_TXDELAY) {
  864. if (yi.cfg.txdelay > YAM_MAXTXDELAY)
  865. return -EINVAL;
  866. yp->txd = yi.cfg.txdelay;
  867. }
  868. if (yi.cfg.mask & YAM_TXTAIL) {
  869. if (yi.cfg.txtail > YAM_MAXTXTAIL)
  870. return -EINVAL;
  871. yp->txtail = yi.cfg.txtail;
  872. }
  873. if (yi.cfg.mask & YAM_PERSIST) {
  874. if (yi.cfg.persist > YAM_MAXPERSIST)
  875. return -EINVAL;
  876. yp->pers = yi.cfg.persist;
  877. }
  878. if (yi.cfg.mask & YAM_SLOTTIME) {
  879. if (yi.cfg.slottime > YAM_MAXSLOTTIME)
  880. return -EINVAL;
  881. yp->slot = yi.cfg.slottime;
  882. yp->slotcnt = yp->slot / 10;
  883. }
  884. break;
  885. case SIOCYAMGCFG:
  886. yi.cfg.mask = 0xffffffff;
  887. yi.cfg.iobase = yp->iobase;
  888. yi.cfg.irq = yp->irq;
  889. yi.cfg.bitrate = yp->bitrate;
  890. yi.cfg.baudrate = yp->baudrate;
  891. yi.cfg.mode = yp->dupmode;
  892. yi.cfg.txdelay = yp->txd;
  893. yi.cfg.holddly = yp->holdd;
  894. yi.cfg.txtail = yp->txtail;
  895. yi.cfg.persist = yp->pers;
  896. yi.cfg.slottime = yp->slot;
  897. if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg)))
  898. return -EFAULT;
  899. break;
  900. default:
  901. return -EINVAL;
  902. }
  903. return 0;
  904. }
  905. /* --------------------------------------------------------------------- */
  906. static int yam_set_mac_address(struct net_device *dev, void *addr)
  907. {
  908. struct sockaddr *sa = (struct sockaddr *) addr;
  909. /* addr is an AX.25 shifted ASCII mac address */
  910. memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
  911. return 0;
  912. }
  913. /* --------------------------------------------------------------------- */
  914. static void yam_setup(struct net_device *dev)
  915. {
  916. struct yam_port *yp = netdev_priv(dev);
  917. yp->magic = YAM_MAGIC;
  918. yp->bitrate = DEFAULT_BITRATE;
  919. yp->baudrate = DEFAULT_BITRATE * 2;
  920. yp->iobase = 0;
  921. yp->irq = 0;
  922. yp->dupmode = 0;
  923. yp->holdd = DEFAULT_HOLDD;
  924. yp->txd = DEFAULT_TXD;
  925. yp->txtail = DEFAULT_TXTAIL;
  926. yp->slot = DEFAULT_SLOT;
  927. yp->pers = DEFAULT_PERS;
  928. yp->dev = dev;
  929. dev->base_addr = yp->iobase;
  930. dev->irq = yp->irq;
  931. dev->open = yam_open;
  932. dev->stop = yam_close;
  933. dev->do_ioctl = yam_ioctl;
  934. dev->hard_start_xmit = yam_send_packet;
  935. dev->get_stats = yam_get_stats;
  936. skb_queue_head_init(&yp->send_queue);
  937. dev->hard_header = ax25_hard_header;
  938. dev->rebuild_header = ax25_rebuild_header;
  939. dev->set_mac_address = yam_set_mac_address;
  940. dev->type = ARPHRD_AX25;
  941. dev->hard_header_len = AX25_MAX_HEADER_LEN;
  942. dev->mtu = AX25_MTU;
  943. dev->addr_len = AX25_ADDR_LEN;
  944. memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN);
  945. memcpy(dev->dev_addr, ax25_test, AX25_ADDR_LEN);
  946. }
  947. static int __init yam_init_driver(void)
  948. {
  949. struct net_device *dev;
  950. int i, err;
  951. char name[IFNAMSIZ];
  952. printk(yam_drvinfo);
  953. for (i = 0; i < NR_PORTS; i++) {
  954. sprintf(name, "yam%d", i);
  955. dev = alloc_netdev(sizeof(struct yam_port), name,
  956. yam_setup);
  957. if (!dev) {
  958. printk(KERN_ERR "yam: cannot allocate net device %s\n",
  959. dev->name);
  960. err = -ENOMEM;
  961. goto error;
  962. }
  963. err = register_netdev(dev);
  964. if (err) {
  965. printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name);
  966. goto error;
  967. }
  968. yam_devs[i] = dev;
  969. }
  970. yam_timer.function = yam_dotimer;
  971. yam_timer.expires = jiffies + HZ / 100;
  972. add_timer(&yam_timer);
  973. proc_net_fops_create("yam", S_IRUGO, &yam_info_fops);
  974. return 0;
  975. error:
  976. while (--i >= 0) {
  977. unregister_netdev(yam_devs[i]);
  978. free_netdev(yam_devs[i]);
  979. }
  980. return err;
  981. }
  982. /* --------------------------------------------------------------------- */
  983. static void __exit yam_cleanup_driver(void)
  984. {
  985. struct yam_mcs *p;
  986. int i;
  987. del_timer(&yam_timer);
  988. for (i = 0; i < NR_PORTS; i++) {
  989. struct net_device *dev = yam_devs[i];
  990. if (dev) {
  991. unregister_netdev(dev);
  992. free_netdev(dev);
  993. }
  994. }
  995. while (yam_data) {
  996. p = yam_data;
  997. yam_data = yam_data->next;
  998. kfree(p);
  999. }
  1000. proc_net_remove("yam");
  1001. }
  1002. /* --------------------------------------------------------------------- */
  1003. MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
  1004. MODULE_DESCRIPTION("Yam amateur radio modem driver");
  1005. MODULE_LICENSE("GPL");
  1006. module_init(yam_init_driver);
  1007. module_exit(yam_cleanup_driver);
  1008. /* --------------------------------------------------------------------- */