mac-scc.c 13 KB

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  1. /*
  2. * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * 2005 (c) MontaVista Software, Inc.
  8. * Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * This file is licensed under the terms of the GNU General Public License
  11. * version 2. This program is licensed "as is" without any warranty of any
  12. * kind, whether express or implied.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/sched.h>
  18. #include <linux/string.h>
  19. #include <linux/ptrace.h>
  20. #include <linux/errno.h>
  21. #include <linux/ioport.h>
  22. #include <linux/slab.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/pci.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/mii.h>
  32. #include <linux/ethtool.h>
  33. #include <linux/bitops.h>
  34. #include <linux/fs.h>
  35. #include <linux/platform_device.h>
  36. #include <asm/irq.h>
  37. #include <asm/uaccess.h>
  38. #ifdef CONFIG_8xx
  39. #include <asm/8xx_immap.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/mpc8xx.h>
  42. #include <asm/commproc.h>
  43. #endif
  44. #include "fs_enet.h"
  45. /*************************************************/
  46. #if defined(CONFIG_CPM1)
  47. /* for a 8xx __raw_xxx's are sufficient */
  48. #define __fs_out32(addr, x) __raw_writel(x, addr)
  49. #define __fs_out16(addr, x) __raw_writew(x, addr)
  50. #define __fs_out8(addr, x) __raw_writeb(x, addr)
  51. #define __fs_in32(addr) __raw_readl(addr)
  52. #define __fs_in16(addr) __raw_readw(addr)
  53. #define __fs_in8(addr) __raw_readb(addr)
  54. #else
  55. /* for others play it safe */
  56. #define __fs_out32(addr, x) out_be32(addr, x)
  57. #define __fs_out16(addr, x) out_be16(addr, x)
  58. #define __fs_in32(addr) in_be32(addr)
  59. #define __fs_in16(addr) in_be16(addr)
  60. #endif
  61. /* write, read, set bits, clear bits */
  62. #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
  63. #define R32(_p, _m) __fs_in32(&(_p)->_m)
  64. #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
  65. #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
  66. #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
  67. #define R16(_p, _m) __fs_in16(&(_p)->_m)
  68. #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
  69. #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
  70. #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
  71. #define R8(_p, _m) __fs_in8(&(_p)->_m)
  72. #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
  73. #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
  74. #define SCC_MAX_MULTICAST_ADDRS 64
  75. /*
  76. * Delay to wait for SCC reset command to complete (in us)
  77. */
  78. #define SCC_RESET_DELAY 50
  79. #define MAX_CR_CMD_LOOPS 10000
  80. static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
  81. {
  82. cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm;
  83. u32 v, ch;
  84. int i = 0;
  85. ch = fep->scc.idx << 2;
  86. v = mk_cr_cmd(ch, op);
  87. W16(cpmp, cp_cpcr, v | CPM_CR_FLG);
  88. for (i = 0; i < MAX_CR_CMD_LOOPS; i++)
  89. if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0)
  90. break;
  91. if (i >= MAX_CR_CMD_LOOPS) {
  92. printk(KERN_ERR "%s(): Not able to issue CPM command\n",
  93. __FUNCTION__);
  94. return 1;
  95. }
  96. return 0;
  97. }
  98. static int do_pd_setup(struct fs_enet_private *fep)
  99. {
  100. struct platform_device *pdev = to_platform_device(fep->dev);
  101. struct resource *r;
  102. /* Fill out IRQ field */
  103. fep->interrupt = platform_get_irq_byname(pdev, "interrupt");
  104. if (fep->interrupt < 0)
  105. return -EINVAL;
  106. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
  107. fep->scc.sccp = (void *)r->start;
  108. if (fep->scc.sccp == NULL)
  109. return -EINVAL;
  110. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram");
  111. fep->scc.ep = (void *)r->start;
  112. if (fep->scc.ep == NULL)
  113. return -EINVAL;
  114. return 0;
  115. }
  116. #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB)
  117. #define SCC_RX_EVENT (SCCE_ENET_RXF)
  118. #define SCC_TX_EVENT (SCCE_ENET_TXB)
  119. #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
  120. static int setup_data(struct net_device *dev)
  121. {
  122. struct fs_enet_private *fep = netdev_priv(dev);
  123. const struct fs_platform_info *fpi = fep->fpi;
  124. fep->scc.idx = fs_get_scc_index(fpi->fs_no);
  125. if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */
  126. return -EINVAL;
  127. do_pd_setup(fep);
  128. fep->scc.hthi = 0;
  129. fep->scc.htlo = 0;
  130. fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK;
  131. fep->ev_rx = SCC_RX_EVENT;
  132. fep->ev_tx = SCC_TX_EVENT;
  133. fep->ev_err = SCC_ERR_EVENT_MSK;
  134. return 0;
  135. }
  136. static int allocate_bd(struct net_device *dev)
  137. {
  138. struct fs_enet_private *fep = netdev_priv(dev);
  139. const struct fs_platform_info *fpi = fep->fpi;
  140. fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
  141. sizeof(cbd_t), 8);
  142. if (IS_DPERR(fep->ring_mem_addr))
  143. return -ENOMEM;
  144. fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
  145. return 0;
  146. }
  147. static void free_bd(struct net_device *dev)
  148. {
  149. struct fs_enet_private *fep = netdev_priv(dev);
  150. if (fep->ring_base)
  151. cpm_dpfree(fep->ring_mem_addr);
  152. }
  153. static void cleanup_data(struct net_device *dev)
  154. {
  155. /* nothing */
  156. }
  157. static void set_promiscuous_mode(struct net_device *dev)
  158. {
  159. struct fs_enet_private *fep = netdev_priv(dev);
  160. scc_t *sccp = fep->scc.sccp;
  161. S16(sccp, scc_psmr, SCC_PSMR_PRO);
  162. }
  163. static void set_multicast_start(struct net_device *dev)
  164. {
  165. struct fs_enet_private *fep = netdev_priv(dev);
  166. scc_enet_t *ep = fep->scc.ep;
  167. W16(ep, sen_gaddr1, 0);
  168. W16(ep, sen_gaddr2, 0);
  169. W16(ep, sen_gaddr3, 0);
  170. W16(ep, sen_gaddr4, 0);
  171. }
  172. static void set_multicast_one(struct net_device *dev, const u8 * mac)
  173. {
  174. struct fs_enet_private *fep = netdev_priv(dev);
  175. scc_enet_t *ep = fep->scc.ep;
  176. u16 taddrh, taddrm, taddrl;
  177. taddrh = ((u16) mac[5] << 8) | mac[4];
  178. taddrm = ((u16) mac[3] << 8) | mac[2];
  179. taddrl = ((u16) mac[1] << 8) | mac[0];
  180. W16(ep, sen_taddrh, taddrh);
  181. W16(ep, sen_taddrm, taddrm);
  182. W16(ep, sen_taddrl, taddrl);
  183. scc_cr_cmd(fep, CPM_CR_SET_GADDR);
  184. }
  185. static void set_multicast_finish(struct net_device *dev)
  186. {
  187. struct fs_enet_private *fep = netdev_priv(dev);
  188. scc_t *sccp = fep->scc.sccp;
  189. scc_enet_t *ep = fep->scc.ep;
  190. /* clear promiscuous always */
  191. C16(sccp, scc_psmr, SCC_PSMR_PRO);
  192. /* if all multi or too many multicasts; just enable all */
  193. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  194. dev->mc_count > SCC_MAX_MULTICAST_ADDRS) {
  195. W16(ep, sen_gaddr1, 0xffff);
  196. W16(ep, sen_gaddr2, 0xffff);
  197. W16(ep, sen_gaddr3, 0xffff);
  198. W16(ep, sen_gaddr4, 0xffff);
  199. }
  200. }
  201. static void set_multicast_list(struct net_device *dev)
  202. {
  203. struct dev_mc_list *pmc;
  204. if ((dev->flags & IFF_PROMISC) == 0) {
  205. set_multicast_start(dev);
  206. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next)
  207. set_multicast_one(dev, pmc->dmi_addr);
  208. set_multicast_finish(dev);
  209. } else
  210. set_promiscuous_mode(dev);
  211. }
  212. /*
  213. * This function is called to start or restart the FEC during a link
  214. * change. This only happens when switching between half and full
  215. * duplex.
  216. */
  217. static void restart(struct net_device *dev)
  218. {
  219. struct fs_enet_private *fep = netdev_priv(dev);
  220. scc_t *sccp = fep->scc.sccp;
  221. scc_enet_t *ep = fep->scc.ep;
  222. const struct fs_platform_info *fpi = fep->fpi;
  223. u16 paddrh, paddrm, paddrl;
  224. const unsigned char *mac;
  225. int i;
  226. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  227. /* clear everything (slow & steady does it) */
  228. for (i = 0; i < sizeof(*ep); i++)
  229. __fs_out8((char *)ep + i, 0);
  230. /* point to bds */
  231. W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
  232. W16(ep, sen_genscc.scc_tbase,
  233. fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
  234. /* Initialize function code registers for big-endian.
  235. */
  236. W8(ep, sen_genscc.scc_rfcr, SCC_EB);
  237. W8(ep, sen_genscc.scc_tfcr, SCC_EB);
  238. /* Set maximum bytes per receive buffer.
  239. * This appears to be an Ethernet frame size, not the buffer
  240. * fragment size. It must be a multiple of four.
  241. */
  242. W16(ep, sen_genscc.scc_mrblr, 0x5f0);
  243. /* Set CRC preset and mask.
  244. */
  245. W32(ep, sen_cpres, 0xffffffff);
  246. W32(ep, sen_cmask, 0xdebb20e3);
  247. W32(ep, sen_crcec, 0); /* CRC Error counter */
  248. W32(ep, sen_alec, 0); /* alignment error counter */
  249. W32(ep, sen_disfc, 0); /* discard frame counter */
  250. W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
  251. W16(ep, sen_retlim, 15); /* Retry limit threshold */
  252. W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
  253. W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
  254. W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
  255. W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
  256. /* Clear hash tables.
  257. */
  258. W16(ep, sen_gaddr1, 0);
  259. W16(ep, sen_gaddr2, 0);
  260. W16(ep, sen_gaddr3, 0);
  261. W16(ep, sen_gaddr4, 0);
  262. W16(ep, sen_iaddr1, 0);
  263. W16(ep, sen_iaddr2, 0);
  264. W16(ep, sen_iaddr3, 0);
  265. W16(ep, sen_iaddr4, 0);
  266. /* set address
  267. */
  268. mac = dev->dev_addr;
  269. paddrh = ((u16) mac[5] << 8) | mac[4];
  270. paddrm = ((u16) mac[3] << 8) | mac[2];
  271. paddrl = ((u16) mac[1] << 8) | mac[0];
  272. W16(ep, sen_paddrh, paddrh);
  273. W16(ep, sen_paddrm, paddrm);
  274. W16(ep, sen_paddrl, paddrl);
  275. W16(ep, sen_pper, 0);
  276. W16(ep, sen_taddrl, 0);
  277. W16(ep, sen_taddrm, 0);
  278. W16(ep, sen_taddrh, 0);
  279. fs_init_bds(dev);
  280. scc_cr_cmd(fep, CPM_CR_INIT_TRX);
  281. W16(sccp, scc_scce, 0xffff);
  282. /* Enable interrupts we wish to service.
  283. */
  284. W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
  285. /* Set GSMR_H to enable all normal operating modes.
  286. * Set GSMR_L to enable Ethernet to MC68160.
  287. */
  288. W32(sccp, scc_gsmrh, 0);
  289. W32(sccp, scc_gsmrl,
  290. SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
  291. SCC_GSMRL_MODE_ENET);
  292. /* Set sync/delimiters.
  293. */
  294. W16(sccp, scc_dsr, 0xd555);
  295. /* Set processing mode. Use Ethernet CRC, catch broadcast, and
  296. * start frame search 22 bit times after RENA.
  297. */
  298. W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
  299. /* Set full duplex mode if needed */
  300. if (fep->phydev->duplex)
  301. S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
  302. S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  303. }
  304. static void stop(struct net_device *dev)
  305. {
  306. struct fs_enet_private *fep = netdev_priv(dev);
  307. scc_t *sccp = fep->scc.sccp;
  308. int i;
  309. for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
  310. udelay(1);
  311. if (i == SCC_RESET_DELAY)
  312. printk(KERN_WARNING DRV_MODULE_NAME
  313. ": %s SCC timeout on graceful transmit stop\n",
  314. dev->name);
  315. W16(sccp, scc_sccm, 0);
  316. C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  317. fs_cleanup_bds(dev);
  318. }
  319. static void pre_request_irq(struct net_device *dev, int irq)
  320. {
  321. immap_t *immap = fs_enet_immap;
  322. u32 siel;
  323. /* SIU interrupt */
  324. if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) {
  325. siel = in_be32(&immap->im_siu_conf.sc_siel);
  326. if ((irq & 1) == 0)
  327. siel |= (0x80000000 >> irq);
  328. else
  329. siel &= ~(0x80000000 >> (irq & ~1));
  330. out_be32(&immap->im_siu_conf.sc_siel, siel);
  331. }
  332. }
  333. static void post_free_irq(struct net_device *dev, int irq)
  334. {
  335. /* nothing */
  336. }
  337. static void napi_clear_rx_event(struct net_device *dev)
  338. {
  339. struct fs_enet_private *fep = netdev_priv(dev);
  340. scc_t *sccp = fep->scc.sccp;
  341. W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK);
  342. }
  343. static void napi_enable_rx(struct net_device *dev)
  344. {
  345. struct fs_enet_private *fep = netdev_priv(dev);
  346. scc_t *sccp = fep->scc.sccp;
  347. S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  348. }
  349. static void napi_disable_rx(struct net_device *dev)
  350. {
  351. struct fs_enet_private *fep = netdev_priv(dev);
  352. scc_t *sccp = fep->scc.sccp;
  353. C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK);
  354. }
  355. static void rx_bd_done(struct net_device *dev)
  356. {
  357. /* nothing */
  358. }
  359. static void tx_kickstart(struct net_device *dev)
  360. {
  361. /* nothing */
  362. }
  363. static u32 get_int_events(struct net_device *dev)
  364. {
  365. struct fs_enet_private *fep = netdev_priv(dev);
  366. scc_t *sccp = fep->scc.sccp;
  367. return (u32) R16(sccp, scc_scce);
  368. }
  369. static void clear_int_events(struct net_device *dev, u32 int_events)
  370. {
  371. struct fs_enet_private *fep = netdev_priv(dev);
  372. scc_t *sccp = fep->scc.sccp;
  373. W16(sccp, scc_scce, int_events & 0xffff);
  374. }
  375. static void ev_error(struct net_device *dev, u32 int_events)
  376. {
  377. printk(KERN_WARNING DRV_MODULE_NAME
  378. ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events);
  379. }
  380. static int get_regs(struct net_device *dev, void *p, int *sizep)
  381. {
  382. struct fs_enet_private *fep = netdev_priv(dev);
  383. if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t))
  384. return -EINVAL;
  385. memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
  386. p = (char *)p + sizeof(scc_t);
  387. memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t));
  388. return 0;
  389. }
  390. static int get_regs_len(struct net_device *dev)
  391. {
  392. return sizeof(scc_t) + sizeof(scc_enet_t);
  393. }
  394. static void tx_restart(struct net_device *dev)
  395. {
  396. struct fs_enet_private *fep = netdev_priv(dev);
  397. scc_cr_cmd(fep, CPM_CR_RESTART_TX);
  398. }
  399. /*************************************************************************/
  400. const struct fs_ops fs_scc_ops = {
  401. .setup_data = setup_data,
  402. .cleanup_data = cleanup_data,
  403. .set_multicast_list = set_multicast_list,
  404. .restart = restart,
  405. .stop = stop,
  406. .pre_request_irq = pre_request_irq,
  407. .post_free_irq = post_free_irq,
  408. .napi_clear_rx_event = napi_clear_rx_event,
  409. .napi_enable_rx = napi_enable_rx,
  410. .napi_disable_rx = napi_disable_rx,
  411. .rx_bd_done = rx_bd_done,
  412. .tx_kickstart = tx_kickstart,
  413. .get_int_events = get_int_events,
  414. .clear_int_events = clear_int_events,
  415. .ev_error = ev_error,
  416. .get_regs = get_regs,
  417. .get_regs_len = get_regs_len,
  418. .tx_restart = tx_restart,
  419. .allocate_bd = allocate_bd,
  420. .free_bd = free_bd,
  421. };