fec_main.c 29 KB

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  1. /*
  2. * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
  8. * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
  9. *
  10. * Released under the GPL
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/sched.h>
  16. #include <linux/string.h>
  17. #include <linux/ptrace.h>
  18. #include <linux/errno.h>
  19. #include <linux/ioport.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/pci.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/skbuff.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/bitops.h>
  32. #include <linux/dma-mapping.h>
  33. #include <asm/8xx_immap.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/mpc8xx.h>
  36. #include <asm/irq.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/commproc.h>
  39. #include "fec_8xx.h"
  40. /*************************************************/
  41. #define FEC_MAX_MULTICAST_ADDRS 64
  42. /*************************************************/
  43. static char version[] __devinitdata =
  44. DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
  45. MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
  46. MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver");
  47. MODULE_LICENSE("GPL");
  48. int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */
  49. module_param(fec_8xx_debug, int, 0);
  50. MODULE_PARM_DESC(fec_8xx_debug,
  51. "FEC 8xx bitmapped debugging message enable value");
  52. /*************************************************/
  53. /*
  54. * Delay to wait for FEC reset command to complete (in us)
  55. */
  56. #define FEC_RESET_DELAY 50
  57. /*****************************************************************************************/
  58. static void fec_whack_reset(fec_t * fecp)
  59. {
  60. int i;
  61. /*
  62. * Whack a reset. We should wait for this.
  63. */
  64. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
  65. for (i = 0;
  66. (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
  67. i++)
  68. udelay(1);
  69. if (i == FEC_RESET_DELAY)
  70. printk(KERN_WARNING "FEC Reset timeout!\n");
  71. }
  72. /****************************************************************************/
  73. /*
  74. * Transmitter timeout.
  75. */
  76. #define TX_TIMEOUT (2*HZ)
  77. /****************************************************************************/
  78. /*
  79. * Returns the CRC needed when filling in the hash table for
  80. * multicast group filtering
  81. * pAddr must point to a MAC address (6 bytes)
  82. */
  83. static __u32 fec_mulicast_calc_crc(char *pAddr)
  84. {
  85. u8 byte;
  86. int byte_count;
  87. int bit_count;
  88. __u32 crc = 0xffffffff;
  89. u8 msb;
  90. for (byte_count = 0; byte_count < 6; byte_count++) {
  91. byte = pAddr[byte_count];
  92. for (bit_count = 0; bit_count < 8; bit_count++) {
  93. msb = crc >> 31;
  94. crc <<= 1;
  95. if (msb ^ (byte & 0x1)) {
  96. crc ^= FEC_CRC_POLY;
  97. }
  98. byte >>= 1;
  99. }
  100. }
  101. return (crc);
  102. }
  103. /*
  104. * Set or clear the multicast filter for this adaptor.
  105. * Skeleton taken from sunlance driver.
  106. * The CPM Ethernet implementation allows Multicast as well as individual
  107. * MAC address filtering. Some of the drivers check to make sure it is
  108. * a group multicast address, and discard those that are not. I guess I
  109. * will do the same for now, but just remove the test if you want
  110. * individual filtering as well (do the upper net layers want or support
  111. * this kind of feature?).
  112. */
  113. static void fec_set_multicast_list(struct net_device *dev)
  114. {
  115. struct fec_enet_private *fep = netdev_priv(dev);
  116. fec_t *fecp = fep->fecp;
  117. struct dev_mc_list *pmc;
  118. __u32 crc;
  119. int temp;
  120. __u32 csrVal;
  121. int hash_index;
  122. __u32 hthi, htlo;
  123. unsigned long flags;
  124. if ((dev->flags & IFF_PROMISC) != 0) {
  125. spin_lock_irqsave(&fep->lock, flags);
  126. FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
  127. spin_unlock_irqrestore(&fep->lock, flags);
  128. /*
  129. * Log any net taps.
  130. */
  131. printk(KERN_WARNING DRV_MODULE_NAME
  132. ": %s: Promiscuous mode enabled.\n", dev->name);
  133. return;
  134. }
  135. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  136. dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
  137. /*
  138. * Catch all multicast addresses, set the filter to all 1's.
  139. */
  140. hthi = 0xffffffffU;
  141. htlo = 0xffffffffU;
  142. } else {
  143. hthi = 0;
  144. htlo = 0;
  145. /*
  146. * Now populate the hash table
  147. */
  148. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) {
  149. crc = fec_mulicast_calc_crc(pmc->dmi_addr);
  150. temp = (crc & 0x3f) >> 1;
  151. hash_index = ((temp & 0x01) << 4) |
  152. ((temp & 0x02) << 2) |
  153. ((temp & 0x04)) |
  154. ((temp & 0x08) >> 2) |
  155. ((temp & 0x10) >> 4);
  156. csrVal = (1 << hash_index);
  157. if (crc & 1)
  158. hthi |= csrVal;
  159. else
  160. htlo |= csrVal;
  161. }
  162. }
  163. spin_lock_irqsave(&fep->lock, flags);
  164. FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
  165. FW(fecp, hash_table_high, hthi);
  166. FW(fecp, hash_table_low, htlo);
  167. spin_unlock_irqrestore(&fep->lock, flags);
  168. }
  169. static int fec_set_mac_address(struct net_device *dev, void *addr)
  170. {
  171. struct sockaddr *mac = addr;
  172. struct fec_enet_private *fep = netdev_priv(dev);
  173. struct fec *fecp = fep->fecp;
  174. int i;
  175. __u32 addrhi, addrlo;
  176. unsigned long flags;
  177. /* Get pointer to SCC area in parameter RAM. */
  178. for (i = 0; i < 6; i++)
  179. dev->dev_addr[i] = mac->sa_data[i];
  180. /*
  181. * Set station address.
  182. */
  183. addrhi = ((__u32) dev->dev_addr[0] << 24) |
  184. ((__u32) dev->dev_addr[1] << 16) |
  185. ((__u32) dev->dev_addr[2] << 8) |
  186. (__u32) dev->dev_addr[3];
  187. addrlo = ((__u32) dev->dev_addr[4] << 24) |
  188. ((__u32) dev->dev_addr[5] << 16);
  189. spin_lock_irqsave(&fep->lock, flags);
  190. FW(fecp, addr_low, addrhi);
  191. FW(fecp, addr_high, addrlo);
  192. spin_unlock_irqrestore(&fep->lock, flags);
  193. return 0;
  194. }
  195. /*
  196. * This function is called to start or restart the FEC during a link
  197. * change. This only happens when switching between half and full
  198. * duplex.
  199. */
  200. void fec_restart(struct net_device *dev, int duplex, int speed)
  201. {
  202. #ifdef CONFIG_DUET
  203. immap_t *immap = (immap_t *) IMAP_ADDR;
  204. __u32 cptr;
  205. #endif
  206. struct fec_enet_private *fep = netdev_priv(dev);
  207. struct fec *fecp = fep->fecp;
  208. const struct fec_platform_info *fpi = fep->fpi;
  209. cbd_t *bdp;
  210. struct sk_buff *skb;
  211. int i;
  212. __u32 addrhi, addrlo;
  213. fec_whack_reset(fep->fecp);
  214. /*
  215. * Set station address.
  216. */
  217. addrhi = ((__u32) dev->dev_addr[0] << 24) |
  218. ((__u32) dev->dev_addr[1] << 16) |
  219. ((__u32) dev->dev_addr[2] << 8) |
  220. (__u32) dev->dev_addr[3];
  221. addrlo = ((__u32) dev->dev_addr[4] << 24) |
  222. ((__u32) dev->dev_addr[5] << 16);
  223. FW(fecp, addr_low, addrhi);
  224. FW(fecp, addr_high, addrlo);
  225. /*
  226. * Reset all multicast.
  227. */
  228. FW(fecp, hash_table_high, 0);
  229. FW(fecp, hash_table_low, 0);
  230. /*
  231. * Set maximum receive buffer size.
  232. */
  233. FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
  234. FW(fecp, r_hash, PKT_MAXBUF_SIZE);
  235. /*
  236. * Set receive and transmit descriptor base.
  237. */
  238. FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base)));
  239. FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base)));
  240. fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
  241. fep->tx_free = fep->tx_ring;
  242. fep->cur_rx = fep->rx_bd_base;
  243. /*
  244. * Reset SKB receive buffers
  245. */
  246. for (i = 0; i < fep->rx_ring; i++) {
  247. if ((skb = fep->rx_skbuff[i]) == NULL)
  248. continue;
  249. fep->rx_skbuff[i] = NULL;
  250. dev_kfree_skb(skb);
  251. }
  252. /*
  253. * Initialize the receive buffer descriptors.
  254. */
  255. for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
  256. skb = dev_alloc_skb(ENET_RX_FRSIZE);
  257. if (skb == NULL) {
  258. printk(KERN_WARNING DRV_MODULE_NAME
  259. ": %s Memory squeeze, unable to allocate skb\n",
  260. dev->name);
  261. fep->stats.rx_dropped++;
  262. break;
  263. }
  264. fep->rx_skbuff[i] = skb;
  265. skb->dev = dev;
  266. CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
  267. L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
  268. DMA_FROM_DEVICE));
  269. CBDW_DATLEN(bdp, 0); /* zero */
  270. CBDW_SC(bdp, BD_ENET_RX_EMPTY |
  271. ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
  272. }
  273. /*
  274. * if we failed, fillup remainder
  275. */
  276. for (; i < fep->rx_ring; i++, bdp++) {
  277. fep->rx_skbuff[i] = NULL;
  278. CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
  279. }
  280. /*
  281. * Reset SKB transmit buffers.
  282. */
  283. for (i = 0; i < fep->tx_ring; i++) {
  284. if ((skb = fep->tx_skbuff[i]) == NULL)
  285. continue;
  286. fep->tx_skbuff[i] = NULL;
  287. dev_kfree_skb(skb);
  288. }
  289. /*
  290. * ...and the same for transmit.
  291. */
  292. for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
  293. fep->tx_skbuff[i] = NULL;
  294. CBDW_BUFADDR(bdp, virt_to_bus(NULL));
  295. CBDW_DATLEN(bdp, 0);
  296. CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
  297. }
  298. /*
  299. * Enable big endian and don't care about SDMA FC.
  300. */
  301. FW(fecp, fun_code, 0x78000000);
  302. /*
  303. * Set MII speed.
  304. */
  305. FW(fecp, mii_speed, fep->fec_phy_speed);
  306. /*
  307. * Clear any outstanding interrupt.
  308. */
  309. FW(fecp, ievent, 0xffc0);
  310. FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
  311. /*
  312. * adjust to speed (only for DUET & RMII)
  313. */
  314. #ifdef CONFIG_DUET
  315. cptr = in_be32(&immap->im_cpm.cp_cptr);
  316. switch (fpi->fec_no) {
  317. case 0:
  318. /*
  319. * check if in RMII mode
  320. */
  321. if ((cptr & 0x100) == 0)
  322. break;
  323. if (speed == 10)
  324. cptr |= 0x0000010;
  325. else if (speed == 100)
  326. cptr &= ~0x0000010;
  327. break;
  328. case 1:
  329. /*
  330. * check if in RMII mode
  331. */
  332. if ((cptr & 0x80) == 0)
  333. break;
  334. if (speed == 10)
  335. cptr |= 0x0000008;
  336. else if (speed == 100)
  337. cptr &= ~0x0000008;
  338. break;
  339. default:
  340. break;
  341. }
  342. out_be32(&immap->im_cpm.cp_cptr, cptr);
  343. #endif
  344. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  345. /*
  346. * adjust to duplex mode
  347. */
  348. if (duplex) {
  349. FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
  350. FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
  351. } else {
  352. FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
  353. FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
  354. }
  355. /*
  356. * Enable interrupts we wish to service.
  357. */
  358. FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
  359. FEC_ENET_RXF | FEC_ENET_RXB);
  360. /*
  361. * And last, enable the transmit and receive processing.
  362. */
  363. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  364. FW(fecp, r_des_active, 0x01000000);
  365. }
  366. void fec_stop(struct net_device *dev)
  367. {
  368. struct fec_enet_private *fep = netdev_priv(dev);
  369. fec_t *fecp = fep->fecp;
  370. struct sk_buff *skb;
  371. int i;
  372. if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
  373. return; /* already down */
  374. FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
  375. for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
  376. i < FEC_RESET_DELAY; i++)
  377. udelay(1);
  378. if (i == FEC_RESET_DELAY)
  379. printk(KERN_WARNING DRV_MODULE_NAME
  380. ": %s FEC timeout on graceful transmit stop\n",
  381. dev->name);
  382. /*
  383. * Disable FEC. Let only MII interrupts.
  384. */
  385. FW(fecp, imask, 0);
  386. FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN);
  387. /*
  388. * Reset SKB transmit buffers.
  389. */
  390. for (i = 0; i < fep->tx_ring; i++) {
  391. if ((skb = fep->tx_skbuff[i]) == NULL)
  392. continue;
  393. fep->tx_skbuff[i] = NULL;
  394. dev_kfree_skb(skb);
  395. }
  396. /*
  397. * Reset SKB receive buffers
  398. */
  399. for (i = 0; i < fep->rx_ring; i++) {
  400. if ((skb = fep->rx_skbuff[i]) == NULL)
  401. continue;
  402. fep->rx_skbuff[i] = NULL;
  403. dev_kfree_skb(skb);
  404. }
  405. }
  406. /* common receive function */
  407. static int fec_enet_rx_common(struct net_device *dev, int *budget)
  408. {
  409. struct fec_enet_private *fep = netdev_priv(dev);
  410. fec_t *fecp = fep->fecp;
  411. const struct fec_platform_info *fpi = fep->fpi;
  412. cbd_t *bdp;
  413. struct sk_buff *skb, *skbn, *skbt;
  414. int received = 0;
  415. __u16 pkt_len, sc;
  416. int curidx;
  417. int rx_work_limit;
  418. if (fpi->use_napi) {
  419. rx_work_limit = min(dev->quota, *budget);
  420. if (!netif_running(dev))
  421. return 0;
  422. }
  423. /*
  424. * First, grab all of the stats for the incoming packet.
  425. * These get messed up if we get called due to a busy condition.
  426. */
  427. bdp = fep->cur_rx;
  428. /* clear RX status bits for napi*/
  429. if (fpi->use_napi)
  430. FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB);
  431. while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
  432. curidx = bdp - fep->rx_bd_base;
  433. /*
  434. * Since we have allocated space to hold a complete frame,
  435. * the last indicator should be set.
  436. */
  437. if ((sc & BD_ENET_RX_LAST) == 0)
  438. printk(KERN_WARNING DRV_MODULE_NAME
  439. ": %s rcv is not +last\n",
  440. dev->name);
  441. /*
  442. * Check for errors.
  443. */
  444. if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
  445. BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
  446. fep->stats.rx_errors++;
  447. /* Frame too long or too short. */
  448. if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
  449. fep->stats.rx_length_errors++;
  450. /* Frame alignment */
  451. if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
  452. fep->stats.rx_frame_errors++;
  453. /* CRC Error */
  454. if (sc & BD_ENET_RX_CR)
  455. fep->stats.rx_crc_errors++;
  456. /* FIFO overrun */
  457. if (sc & BD_ENET_RX_OV)
  458. fep->stats.rx_crc_errors++;
  459. skbn = fep->rx_skbuff[curidx];
  460. BUG_ON(skbn == NULL);
  461. } else {
  462. /* napi, got packet but no quota */
  463. if (fpi->use_napi && --rx_work_limit < 0)
  464. break;
  465. skb = fep->rx_skbuff[curidx];
  466. BUG_ON(skb == NULL);
  467. /*
  468. * Process the incoming frame.
  469. */
  470. fep->stats.rx_packets++;
  471. pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
  472. fep->stats.rx_bytes += pkt_len + 4;
  473. if (pkt_len <= fpi->rx_copybreak) {
  474. /* +2 to make IP header L1 cache aligned */
  475. skbn = dev_alloc_skb(pkt_len + 2);
  476. if (skbn != NULL) {
  477. skb_reserve(skbn, 2); /* align IP header */
  478. memcpy(skbn->data, skb->data, pkt_len);
  479. /* swap */
  480. skbt = skb;
  481. skb = skbn;
  482. skbn = skbt;
  483. }
  484. } else
  485. skbn = dev_alloc_skb(ENET_RX_FRSIZE);
  486. if (skbn != NULL) {
  487. skb->dev = dev;
  488. skb_put(skb, pkt_len); /* Make room */
  489. skb->protocol = eth_type_trans(skb, dev);
  490. received++;
  491. if (!fpi->use_napi)
  492. netif_rx(skb);
  493. else
  494. netif_receive_skb(skb);
  495. } else {
  496. printk(KERN_WARNING DRV_MODULE_NAME
  497. ": %s Memory squeeze, dropping packet.\n",
  498. dev->name);
  499. fep->stats.rx_dropped++;
  500. skbn = skb;
  501. }
  502. }
  503. fep->rx_skbuff[curidx] = skbn;
  504. CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data,
  505. L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
  506. DMA_FROM_DEVICE));
  507. CBDW_DATLEN(bdp, 0);
  508. CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
  509. /*
  510. * Update BD pointer to next entry.
  511. */
  512. if ((sc & BD_ENET_RX_WRAP) == 0)
  513. bdp++;
  514. else
  515. bdp = fep->rx_bd_base;
  516. /*
  517. * Doing this here will keep the FEC running while we process
  518. * incoming frames. On a heavily loaded network, we should be
  519. * able to keep up at the expense of system resources.
  520. */
  521. FW(fecp, r_des_active, 0x01000000);
  522. }
  523. fep->cur_rx = bdp;
  524. if (fpi->use_napi) {
  525. dev->quota -= received;
  526. *budget -= received;
  527. if (rx_work_limit < 0)
  528. return 1; /* not done */
  529. /* done */
  530. netif_rx_complete(dev);
  531. /* enable RX interrupt bits */
  532. FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  533. }
  534. return 0;
  535. }
  536. static void fec_enet_tx(struct net_device *dev)
  537. {
  538. struct fec_enet_private *fep = netdev_priv(dev);
  539. cbd_t *bdp;
  540. struct sk_buff *skb;
  541. int dirtyidx, do_wake;
  542. __u16 sc;
  543. spin_lock(&fep->lock);
  544. bdp = fep->dirty_tx;
  545. do_wake = 0;
  546. while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
  547. dirtyidx = bdp - fep->tx_bd_base;
  548. if (fep->tx_free == fep->tx_ring)
  549. break;
  550. skb = fep->tx_skbuff[dirtyidx];
  551. /*
  552. * Check for errors.
  553. */
  554. if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
  555. BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
  556. fep->stats.tx_errors++;
  557. if (sc & BD_ENET_TX_HB) /* No heartbeat */
  558. fep->stats.tx_heartbeat_errors++;
  559. if (sc & BD_ENET_TX_LC) /* Late collision */
  560. fep->stats.tx_window_errors++;
  561. if (sc & BD_ENET_TX_RL) /* Retrans limit */
  562. fep->stats.tx_aborted_errors++;
  563. if (sc & BD_ENET_TX_UN) /* Underrun */
  564. fep->stats.tx_fifo_errors++;
  565. if (sc & BD_ENET_TX_CSL) /* Carrier lost */
  566. fep->stats.tx_carrier_errors++;
  567. } else
  568. fep->stats.tx_packets++;
  569. if (sc & BD_ENET_TX_READY)
  570. printk(KERN_WARNING DRV_MODULE_NAME
  571. ": %s HEY! Enet xmit interrupt and TX_READY.\n",
  572. dev->name);
  573. /*
  574. * Deferred means some collisions occurred during transmit,
  575. * but we eventually sent the packet OK.
  576. */
  577. if (sc & BD_ENET_TX_DEF)
  578. fep->stats.collisions++;
  579. /*
  580. * Free the sk buffer associated with this last transmit.
  581. */
  582. dev_kfree_skb_irq(skb);
  583. fep->tx_skbuff[dirtyidx] = NULL;
  584. /*
  585. * Update pointer to next buffer descriptor to be transmitted.
  586. */
  587. if ((sc & BD_ENET_TX_WRAP) == 0)
  588. bdp++;
  589. else
  590. bdp = fep->tx_bd_base;
  591. /*
  592. * Since we have freed up a buffer, the ring is no longer
  593. * full.
  594. */
  595. if (!fep->tx_free++)
  596. do_wake = 1;
  597. }
  598. fep->dirty_tx = bdp;
  599. spin_unlock(&fep->lock);
  600. if (do_wake && netif_queue_stopped(dev))
  601. netif_wake_queue(dev);
  602. }
  603. /*
  604. * The interrupt handler.
  605. * This is called from the MPC core interrupt.
  606. */
  607. static irqreturn_t
  608. fec_enet_interrupt(int irq, void *dev_id)
  609. {
  610. struct net_device *dev = dev_id;
  611. struct fec_enet_private *fep;
  612. const struct fec_platform_info *fpi;
  613. fec_t *fecp;
  614. __u32 int_events;
  615. __u32 int_events_napi;
  616. if (unlikely(dev == NULL))
  617. return IRQ_NONE;
  618. fep = netdev_priv(dev);
  619. fecp = fep->fecp;
  620. fpi = fep->fpi;
  621. /*
  622. * Get the interrupt events that caused us to be here.
  623. */
  624. while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) {
  625. if (!fpi->use_napi)
  626. FW(fecp, ievent, int_events);
  627. else {
  628. int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB);
  629. FW(fecp, ievent, int_events_napi);
  630. }
  631. if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
  632. FEC_ENET_BABT | FEC_ENET_EBERR)) != 0)
  633. printk(KERN_WARNING DRV_MODULE_NAME
  634. ": %s FEC ERROR(s) 0x%x\n",
  635. dev->name, int_events);
  636. if ((int_events & FEC_ENET_RXF) != 0) {
  637. if (!fpi->use_napi)
  638. fec_enet_rx_common(dev, NULL);
  639. else {
  640. if (netif_rx_schedule_prep(dev)) {
  641. /* disable rx interrupts */
  642. FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  643. __netif_rx_schedule(dev);
  644. } else {
  645. printk(KERN_ERR DRV_MODULE_NAME
  646. ": %s driver bug! interrupt while in poll!\n",
  647. dev->name);
  648. FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  649. }
  650. }
  651. }
  652. if ((int_events & FEC_ENET_TXF) != 0)
  653. fec_enet_tx(dev);
  654. }
  655. return IRQ_HANDLED;
  656. }
  657. /* This interrupt occurs when the PHY detects a link change. */
  658. static irqreturn_t
  659. fec_mii_link_interrupt(int irq, void *dev_id)
  660. {
  661. struct net_device *dev = dev_id;
  662. struct fec_enet_private *fep;
  663. const struct fec_platform_info *fpi;
  664. if (unlikely(dev == NULL))
  665. return IRQ_NONE;
  666. fep = netdev_priv(dev);
  667. fpi = fep->fpi;
  668. if (!fpi->use_mdio)
  669. return IRQ_NONE;
  670. /*
  671. * Acknowledge the interrupt if possible. If we have not
  672. * found the PHY yet we can't process or acknowledge the
  673. * interrupt now. Instead we ignore this interrupt for now,
  674. * which we can do since it is edge triggered. It will be
  675. * acknowledged later by fec_enet_open().
  676. */
  677. if (!fep->phy)
  678. return IRQ_NONE;
  679. fec_mii_ack_int(dev);
  680. fec_mii_link_status_change_check(dev, 0);
  681. return IRQ_HANDLED;
  682. }
  683. /**********************************************************************************/
  684. static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
  685. {
  686. struct fec_enet_private *fep = netdev_priv(dev);
  687. fec_t *fecp = fep->fecp;
  688. cbd_t *bdp;
  689. int curidx;
  690. unsigned long flags;
  691. spin_lock_irqsave(&fep->tx_lock, flags);
  692. /*
  693. * Fill in a Tx ring entry
  694. */
  695. bdp = fep->cur_tx;
  696. if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
  697. netif_stop_queue(dev);
  698. spin_unlock_irqrestore(&fep->tx_lock, flags);
  699. /*
  700. * Ooops. All transmit buffers are full. Bail out.
  701. * This should not happen, since the tx queue should be stopped.
  702. */
  703. printk(KERN_WARNING DRV_MODULE_NAME
  704. ": %s tx queue full!.\n", dev->name);
  705. return 1;
  706. }
  707. curidx = bdp - fep->tx_bd_base;
  708. /*
  709. * Clear all of the status flags.
  710. */
  711. CBDC_SC(bdp, BD_ENET_TX_STATS);
  712. /*
  713. * Save skb pointer.
  714. */
  715. fep->tx_skbuff[curidx] = skb;
  716. fep->stats.tx_bytes += skb->len;
  717. /*
  718. * Push the data cache so the CPM does not get stale memory data.
  719. */
  720. CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
  721. skb->len, DMA_TO_DEVICE));
  722. CBDW_DATLEN(bdp, skb->len);
  723. dev->trans_start = jiffies;
  724. /*
  725. * If this was the last BD in the ring, start at the beginning again.
  726. */
  727. if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
  728. fep->cur_tx++;
  729. else
  730. fep->cur_tx = fep->tx_bd_base;
  731. if (!--fep->tx_free)
  732. netif_stop_queue(dev);
  733. /*
  734. * Trigger transmission start
  735. */
  736. CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR |
  737. BD_ENET_TX_LAST | BD_ENET_TX_TC);
  738. FW(fecp, x_des_active, 0x01000000);
  739. spin_unlock_irqrestore(&fep->tx_lock, flags);
  740. return 0;
  741. }
  742. static void fec_timeout(struct net_device *dev)
  743. {
  744. struct fec_enet_private *fep = netdev_priv(dev);
  745. fep->stats.tx_errors++;
  746. if (fep->tx_free)
  747. netif_wake_queue(dev);
  748. /* check link status again */
  749. fec_mii_link_status_change_check(dev, 0);
  750. }
  751. static int fec_enet_open(struct net_device *dev)
  752. {
  753. struct fec_enet_private *fep = netdev_priv(dev);
  754. const struct fec_platform_info *fpi = fep->fpi;
  755. unsigned long flags;
  756. /* Install our interrupt handler. */
  757. if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) {
  758. printk(KERN_ERR DRV_MODULE_NAME
  759. ": %s Could not allocate FEC IRQ!", dev->name);
  760. return -EINVAL;
  761. }
  762. /* Install our phy interrupt handler */
  763. if (fpi->phy_irq != -1 &&
  764. request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy",
  765. dev) != 0) {
  766. printk(KERN_ERR DRV_MODULE_NAME
  767. ": %s Could not allocate PHY IRQ!", dev->name);
  768. free_irq(fpi->fec_irq, dev);
  769. return -EINVAL;
  770. }
  771. if (fpi->use_mdio) {
  772. fec_mii_startup(dev);
  773. netif_carrier_off(dev);
  774. fec_mii_link_status_change_check(dev, 1);
  775. } else {
  776. spin_lock_irqsave(&fep->lock, flags);
  777. fec_restart(dev, 1, 100); /* XXX this sucks */
  778. spin_unlock_irqrestore(&fep->lock, flags);
  779. netif_carrier_on(dev);
  780. netif_start_queue(dev);
  781. }
  782. return 0;
  783. }
  784. static int fec_enet_close(struct net_device *dev)
  785. {
  786. struct fec_enet_private *fep = netdev_priv(dev);
  787. const struct fec_platform_info *fpi = fep->fpi;
  788. unsigned long flags;
  789. netif_stop_queue(dev);
  790. netif_carrier_off(dev);
  791. if (fpi->use_mdio)
  792. fec_mii_shutdown(dev);
  793. spin_lock_irqsave(&fep->lock, flags);
  794. fec_stop(dev);
  795. spin_unlock_irqrestore(&fep->lock, flags);
  796. /* release any irqs */
  797. if (fpi->phy_irq != -1)
  798. free_irq(fpi->phy_irq, dev);
  799. free_irq(fpi->fec_irq, dev);
  800. return 0;
  801. }
  802. static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
  803. {
  804. struct fec_enet_private *fep = netdev_priv(dev);
  805. return &fep->stats;
  806. }
  807. static int fec_enet_poll(struct net_device *dev, int *budget)
  808. {
  809. return fec_enet_rx_common(dev, budget);
  810. }
  811. /*************************************************************************/
  812. static void fec_get_drvinfo(struct net_device *dev,
  813. struct ethtool_drvinfo *info)
  814. {
  815. strcpy(info->driver, DRV_MODULE_NAME);
  816. strcpy(info->version, DRV_MODULE_VERSION);
  817. }
  818. static int fec_get_regs_len(struct net_device *dev)
  819. {
  820. return sizeof(fec_t);
  821. }
  822. static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs,
  823. void *p)
  824. {
  825. struct fec_enet_private *fep = netdev_priv(dev);
  826. unsigned long flags;
  827. if (regs->len < sizeof(fec_t))
  828. return;
  829. regs->version = 0;
  830. spin_lock_irqsave(&fep->lock, flags);
  831. memcpy_fromio(p, fep->fecp, sizeof(fec_t));
  832. spin_unlock_irqrestore(&fep->lock, flags);
  833. }
  834. static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  835. {
  836. struct fec_enet_private *fep = netdev_priv(dev);
  837. unsigned long flags;
  838. int rc;
  839. spin_lock_irqsave(&fep->lock, flags);
  840. rc = mii_ethtool_gset(&fep->mii_if, cmd);
  841. spin_unlock_irqrestore(&fep->lock, flags);
  842. return rc;
  843. }
  844. static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  845. {
  846. struct fec_enet_private *fep = netdev_priv(dev);
  847. unsigned long flags;
  848. int rc;
  849. spin_lock_irqsave(&fep->lock, flags);
  850. rc = mii_ethtool_sset(&fep->mii_if, cmd);
  851. spin_unlock_irqrestore(&fep->lock, flags);
  852. return rc;
  853. }
  854. static int fec_nway_reset(struct net_device *dev)
  855. {
  856. struct fec_enet_private *fep = netdev_priv(dev);
  857. return mii_nway_restart(&fep->mii_if);
  858. }
  859. static __u32 fec_get_msglevel(struct net_device *dev)
  860. {
  861. struct fec_enet_private *fep = netdev_priv(dev);
  862. return fep->msg_enable;
  863. }
  864. static void fec_set_msglevel(struct net_device *dev, __u32 value)
  865. {
  866. struct fec_enet_private *fep = netdev_priv(dev);
  867. fep->msg_enable = value;
  868. }
  869. static const struct ethtool_ops fec_ethtool_ops = {
  870. .get_drvinfo = fec_get_drvinfo,
  871. .get_regs_len = fec_get_regs_len,
  872. .get_settings = fec_get_settings,
  873. .set_settings = fec_set_settings,
  874. .nway_reset = fec_nway_reset,
  875. .get_link = ethtool_op_get_link,
  876. .get_msglevel = fec_get_msglevel,
  877. .set_msglevel = fec_set_msglevel,
  878. .get_tx_csum = ethtool_op_get_tx_csum,
  879. .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
  880. .get_sg = ethtool_op_get_sg,
  881. .set_sg = ethtool_op_set_sg,
  882. .get_regs = fec_get_regs,
  883. };
  884. static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  885. {
  886. struct fec_enet_private *fep = netdev_priv(dev);
  887. struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
  888. unsigned long flags;
  889. int rc;
  890. if (!netif_running(dev))
  891. return -EINVAL;
  892. spin_lock_irqsave(&fep->lock, flags);
  893. rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
  894. spin_unlock_irqrestore(&fep->lock, flags);
  895. return rc;
  896. }
  897. int fec_8xx_init_one(const struct fec_platform_info *fpi,
  898. struct net_device **devp)
  899. {
  900. immap_t *immap = (immap_t *) IMAP_ADDR;
  901. static int fec_8xx_version_printed = 0;
  902. struct net_device *dev = NULL;
  903. struct fec_enet_private *fep = NULL;
  904. fec_t *fecp = NULL;
  905. int i;
  906. int err = 0;
  907. int registered = 0;
  908. __u32 siel;
  909. *devp = NULL;
  910. switch (fpi->fec_no) {
  911. case 0:
  912. fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
  913. break;
  914. #ifdef CONFIG_DUET
  915. case 1:
  916. fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2;
  917. break;
  918. #endif
  919. default:
  920. return -EINVAL;
  921. }
  922. if (fec_8xx_version_printed++ == 0)
  923. printk(KERN_INFO "%s", version);
  924. i = sizeof(*fep) + (sizeof(struct sk_buff **) *
  925. (fpi->rx_ring + fpi->tx_ring));
  926. dev = alloc_etherdev(i);
  927. if (!dev) {
  928. err = -ENOMEM;
  929. goto err;
  930. }
  931. SET_MODULE_OWNER(dev);
  932. fep = netdev_priv(dev);
  933. /* partial reset of FEC */
  934. fec_whack_reset(fecp);
  935. /* point rx_skbuff, tx_skbuff */
  936. fep->rx_skbuff = (struct sk_buff **)&fep[1];
  937. fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
  938. fep->fecp = fecp;
  939. fep->fpi = fpi;
  940. /* init locks */
  941. spin_lock_init(&fep->lock);
  942. spin_lock_init(&fep->tx_lock);
  943. /*
  944. * Set the Ethernet address.
  945. */
  946. for (i = 0; i < 6; i++)
  947. dev->dev_addr[i] = fpi->macaddr[i];
  948. fep->ring_base = dma_alloc_coherent(NULL,
  949. (fpi->tx_ring + fpi->rx_ring) *
  950. sizeof(cbd_t), &fep->ring_mem_addr,
  951. GFP_KERNEL);
  952. if (fep->ring_base == NULL) {
  953. printk(KERN_ERR DRV_MODULE_NAME
  954. ": %s dma alloc failed.\n", dev->name);
  955. err = -ENOMEM;
  956. goto err;
  957. }
  958. /*
  959. * Set receive and transmit descriptor base.
  960. */
  961. fep->rx_bd_base = fep->ring_base;
  962. fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
  963. /* initialize ring size variables */
  964. fep->tx_ring = fpi->tx_ring;
  965. fep->rx_ring = fpi->rx_ring;
  966. /* SIU interrupt */
  967. if (fpi->phy_irq != -1 &&
  968. (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) {
  969. siel = in_be32(&immap->im_siu_conf.sc_siel);
  970. if ((fpi->phy_irq & 1) == 0)
  971. siel |= (0x80000000 >> fpi->phy_irq);
  972. else
  973. siel &= ~(0x80000000 >> (fpi->phy_irq & ~1));
  974. out_be32(&immap->im_siu_conf.sc_siel, siel);
  975. }
  976. /*
  977. * The FEC Ethernet specific entries in the device structure.
  978. */
  979. dev->open = fec_enet_open;
  980. dev->hard_start_xmit = fec_enet_start_xmit;
  981. dev->tx_timeout = fec_timeout;
  982. dev->watchdog_timeo = TX_TIMEOUT;
  983. dev->stop = fec_enet_close;
  984. dev->get_stats = fec_enet_get_stats;
  985. dev->set_multicast_list = fec_set_multicast_list;
  986. dev->set_mac_address = fec_set_mac_address;
  987. if (fpi->use_napi) {
  988. dev->poll = fec_enet_poll;
  989. dev->weight = fpi->napi_weight;
  990. }
  991. dev->ethtool_ops = &fec_ethtool_ops;
  992. dev->do_ioctl = fec_ioctl;
  993. fep->fec_phy_speed =
  994. ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
  995. init_timer(&fep->phy_timer_list);
  996. /* partial reset of FEC so that only MII works */
  997. FW(fecp, mii_speed, fep->fec_phy_speed);
  998. FW(fecp, ievent, 0xffc0);
  999. FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
  1000. FW(fecp, imask, 0);
  1001. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  1002. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  1003. netif_carrier_off(dev);
  1004. err = register_netdev(dev);
  1005. if (err != 0)
  1006. goto err;
  1007. registered = 1;
  1008. if (fpi->use_mdio) {
  1009. fep->mii_if.dev = dev;
  1010. fep->mii_if.mdio_read = fec_mii_read;
  1011. fep->mii_if.mdio_write = fec_mii_write;
  1012. fep->mii_if.phy_id_mask = 0x1f;
  1013. fep->mii_if.reg_num_mask = 0x1f;
  1014. fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
  1015. }
  1016. *devp = dev;
  1017. return 0;
  1018. err:
  1019. if (dev != NULL) {
  1020. if (fecp != NULL)
  1021. fec_whack_reset(fecp);
  1022. if (registered)
  1023. unregister_netdev(dev);
  1024. if (fep != NULL) {
  1025. if (fep->ring_base)
  1026. dma_free_coherent(NULL,
  1027. (fpi->tx_ring +
  1028. fpi->rx_ring) *
  1029. sizeof(cbd_t), fep->ring_base,
  1030. fep->ring_mem_addr);
  1031. }
  1032. free_netdev(dev);
  1033. }
  1034. return err;
  1035. }
  1036. int fec_8xx_cleanup_one(struct net_device *dev)
  1037. {
  1038. struct fec_enet_private *fep = netdev_priv(dev);
  1039. fec_t *fecp = fep->fecp;
  1040. const struct fec_platform_info *fpi = fep->fpi;
  1041. fec_whack_reset(fecp);
  1042. unregister_netdev(dev);
  1043. dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
  1044. fep->ring_base, fep->ring_mem_addr);
  1045. free_netdev(dev);
  1046. return 0;
  1047. }
  1048. /**************************************************************************************/
  1049. /**************************************************************************************/
  1050. /**************************************************************************************/
  1051. static int __init fec_8xx_init(void)
  1052. {
  1053. return fec_8xx_platform_init();
  1054. }
  1055. static void __exit fec_8xx_cleanup(void)
  1056. {
  1057. fec_8xx_platform_cleanup();
  1058. }
  1059. /**************************************************************************************/
  1060. /**************************************************************************************/
  1061. /**************************************************************************************/
  1062. module_init(fec_8xx_init);
  1063. module_exit(fec_8xx_cleanup);