declance.c 32 KB

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  1. /*
  2. * Lance ethernet driver for the MIPS processor based
  3. * DECstation family
  4. *
  5. *
  6. * adopted from sunlance.c by Richard van den Berg
  7. *
  8. * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
  9. *
  10. * additional sources:
  11. * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
  12. * Revision 1.2
  13. *
  14. * History:
  15. *
  16. * v0.001: The kernel accepts the code and it shows the hardware address.
  17. *
  18. * v0.002: Removed most sparc stuff, left only some module and dma stuff.
  19. *
  20. * v0.003: Enhanced base address calculation from proposals by
  21. * Harald Koerfgen and Thomas Riemer.
  22. *
  23. * v0.004: lance-regs is pointing at the right addresses, added prom
  24. * check. First start of address mapping and DMA.
  25. *
  26. * v0.005: started to play around with LANCE-DMA. This driver will not
  27. * work for non IOASIC lances. HK
  28. *
  29. * v0.006: added pointer arrays to lance_private and setup routine for
  30. * them in dec_lance_init. HK
  31. *
  32. * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
  33. * access the init block. This looks like one (short) word at a
  34. * time, but the smallest amount the IOASIC can transfer is a
  35. * (long) word. So we have a 2-2 padding here. Changed
  36. * lance_init_block accordingly. The 16-16 padding for the buffers
  37. * seems to be correct. HK
  38. *
  39. * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
  40. *
  41. * v0.009: Module support fixes, multiple interfaces support, various
  42. * bits. macro
  43. */
  44. #include <linux/crc32.h>
  45. #include <linux/delay.h>
  46. #include <linux/errno.h>
  47. #include <linux/if_ether.h>
  48. #include <linux/init.h>
  49. #include <linux/kernel.h>
  50. #include <linux/module.h>
  51. #include <linux/netdevice.h>
  52. #include <linux/etherdevice.h>
  53. #include <linux/spinlock.h>
  54. #include <linux/stddef.h>
  55. #include <linux/string.h>
  56. #include <asm/addrspace.h>
  57. #include <asm/system.h>
  58. #include <asm/dec/interrupts.h>
  59. #include <asm/dec/ioasic.h>
  60. #include <asm/dec/ioasic_addrs.h>
  61. #include <asm/dec/kn01.h>
  62. #include <asm/dec/machtype.h>
  63. #include <asm/dec/system.h>
  64. #include <asm/dec/tc.h>
  65. static char version[] __devinitdata =
  66. "declance.c: v0.009 by Linux MIPS DECstation task force\n";
  67. MODULE_AUTHOR("Linux MIPS DECstation task force");
  68. MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
  69. MODULE_LICENSE("GPL");
  70. /*
  71. * card types
  72. */
  73. #define ASIC_LANCE 1
  74. #define PMAD_LANCE 2
  75. #define PMAX_LANCE 3
  76. #define LE_CSR0 0
  77. #define LE_CSR1 1
  78. #define LE_CSR2 2
  79. #define LE_CSR3 3
  80. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  81. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  82. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  83. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  84. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  85. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  86. #define LE_C0_RINT 0x0400 /* Received interrupt */
  87. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  88. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  89. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  90. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  91. #define LE_C0_RXON 0x0020 /* Receiver on */
  92. #define LE_C0_TXON 0x0010 /* Transmitter on */
  93. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  94. #define LE_C0_STOP 0x0004 /* Stop the card */
  95. #define LE_C0_STRT 0x0002 /* Start the card */
  96. #define LE_C0_INIT 0x0001 /* Init the card */
  97. #define LE_C3_BSWP 0x4 /* SWAP */
  98. #define LE_C3_ACON 0x2 /* ALE Control */
  99. #define LE_C3_BCON 0x1 /* Byte control */
  100. /* Receive message descriptor 1 */
  101. #define LE_R1_OWN 0x80 /* Who owns the entry */
  102. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  103. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  104. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  105. #define LE_R1_CRC 0x08 /* CRC error */
  106. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  107. #define LE_R1_SOP 0x02 /* Start of packet */
  108. #define LE_R1_EOP 0x01 /* End of packet */
  109. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  110. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  111. #define LE_T1_ERR 0x40 /* Error summary */
  112. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  113. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  114. #define LE_T1_EDEF 0x04 /* Error: deferred */
  115. #define LE_T1_SOP 0x02 /* Start of packet */
  116. #define LE_T1_EOP 0x01 /* End of packet */
  117. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  118. #define LE_T3_BUF 0x8000 /* Buffer error */
  119. #define LE_T3_UFL 0x4000 /* Error underflow */
  120. #define LE_T3_LCOL 0x1000 /* Error late collision */
  121. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  122. #define LE_T3_RTY 0x0400 /* Error retry */
  123. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  124. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  125. #ifndef LANCE_LOG_TX_BUFFERS
  126. #define LANCE_LOG_TX_BUFFERS 4
  127. #define LANCE_LOG_RX_BUFFERS 4
  128. #endif
  129. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  130. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  131. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  132. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  133. #define PKT_BUF_SZ 1536
  134. #define RX_BUFF_SIZE PKT_BUF_SZ
  135. #define TX_BUFF_SIZE PKT_BUF_SZ
  136. #undef TEST_HITS
  137. #define ZERO 0
  138. /* The DS2000/3000 have a linear 64 KB buffer.
  139. * The PMAD-AA has 128 kb buffer on-board.
  140. *
  141. * The IOASIC LANCE devices use a shared memory region. This region as seen
  142. * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
  143. * The LANCE sees this as a 64 KB long continuous memory region.
  144. *
  145. * The LANCE's DMA address is used as an index in this buffer and DMA takes
  146. * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
  147. * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
  148. * by a 16 byte gap :-(.
  149. */
  150. struct lance_rx_desc {
  151. unsigned short rmd0; /* low address of packet */
  152. short gap0;
  153. unsigned char rmd1_hadr; /* high address of packet */
  154. unsigned char rmd1_bits; /* descriptor bits */
  155. short gap1;
  156. short length; /* 2s complement (negative!)
  157. of buffer length */
  158. short gap2;
  159. unsigned short mblength; /* actual number of bytes received */
  160. short gap3;
  161. };
  162. struct lance_tx_desc {
  163. unsigned short tmd0; /* low address of packet */
  164. short gap0;
  165. unsigned char tmd1_hadr; /* high address of packet */
  166. unsigned char tmd1_bits; /* descriptor bits */
  167. short gap1;
  168. short length; /* 2s complement (negative!)
  169. of buffer length */
  170. short gap2;
  171. unsigned short misc;
  172. short gap3;
  173. };
  174. /* First part of the LANCE initialization block, described in databook. */
  175. struct lance_init_block {
  176. unsigned short mode; /* pre-set mode (reg. 15) */
  177. short gap0;
  178. unsigned char phys_addr[12]; /* physical ethernet address
  179. only 0, 1, 4, 5, 8, 9 are valid
  180. 2, 3, 6, 7, 10, 11 are gaps */
  181. unsigned short filter[8]; /* multicast filter
  182. only 0, 2, 4, 6 are valid
  183. 1, 3, 5, 7 are gaps */
  184. /* Receive and transmit ring base, along with extra bits. */
  185. unsigned short rx_ptr; /* receive descriptor addr */
  186. short gap1;
  187. unsigned short rx_len; /* receive len and high addr */
  188. short gap2;
  189. unsigned short tx_ptr; /* transmit descriptor addr */
  190. short gap3;
  191. unsigned short tx_len; /* transmit len and high addr */
  192. short gap4;
  193. short gap5[8];
  194. /* The buffer descriptors */
  195. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  196. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  197. };
  198. #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
  199. #define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
  200. #define libdesc_offset(rt, elem) \
  201. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  202. /*
  203. * This works *only* for the ring descriptors
  204. */
  205. #define LANCE_ADDR(x) (CPHYSADDR(x) >> 1)
  206. struct lance_private {
  207. struct net_device *next;
  208. int type;
  209. int slot;
  210. int dma_irq;
  211. volatile struct lance_regs *ll;
  212. volatile struct lance_init_block *init_block;
  213. spinlock_t lock;
  214. int rx_new, tx_new;
  215. int rx_old, tx_old;
  216. struct net_device_stats stats;
  217. unsigned short busmaster_regval;
  218. struct timer_list multicast_timer;
  219. /* Pointers to the ring buffers as seen from the CPU */
  220. char *rx_buf_ptr_cpu[RX_RING_SIZE];
  221. char *tx_buf_ptr_cpu[TX_RING_SIZE];
  222. /* Pointers to the ring buffers as seen from the LANCE */
  223. char *rx_buf_ptr_lnc[RX_RING_SIZE];
  224. char *tx_buf_ptr_lnc[TX_RING_SIZE];
  225. };
  226. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  227. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  228. lp->tx_old - lp->tx_new-1)
  229. /* The lance control ports are at an absolute address, machine and tc-slot
  230. * dependent.
  231. * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
  232. * so we have to give the structure an extra member making rap pointing
  233. * at the right address
  234. */
  235. struct lance_regs {
  236. volatile unsigned short rdp; /* register data port */
  237. unsigned short pad;
  238. volatile unsigned short rap; /* register address port */
  239. };
  240. int dec_lance_debug = 2;
  241. static struct net_device *root_lance_dev;
  242. static inline void writereg(volatile unsigned short *regptr, short value)
  243. {
  244. *regptr = value;
  245. iob();
  246. }
  247. /* Load the CSR registers */
  248. static void load_csrs(struct lance_private *lp)
  249. {
  250. volatile struct lance_regs *ll = lp->ll;
  251. int leptr;
  252. /* The address space as seen from the LANCE
  253. * begins at address 0. HK
  254. */
  255. leptr = 0;
  256. writereg(&ll->rap, LE_CSR1);
  257. writereg(&ll->rdp, (leptr & 0xFFFF));
  258. writereg(&ll->rap, LE_CSR2);
  259. writereg(&ll->rdp, leptr >> 16);
  260. writereg(&ll->rap, LE_CSR3);
  261. writereg(&ll->rdp, lp->busmaster_regval);
  262. /* Point back to csr0 */
  263. writereg(&ll->rap, LE_CSR0);
  264. }
  265. /*
  266. * Our specialized copy routines
  267. *
  268. */
  269. void cp_to_buf(const int type, void *to, const void *from, int len)
  270. {
  271. unsigned short *tp, *fp, clen;
  272. unsigned char *rtp, *rfp;
  273. if (type == PMAX_LANCE) {
  274. clen = len >> 1;
  275. tp = (unsigned short *) to;
  276. fp = (unsigned short *) from;
  277. while (clen--) {
  278. *tp++ = *fp++;
  279. tp++;
  280. }
  281. clen = len & 1;
  282. rtp = (unsigned char *) tp;
  283. rfp = (unsigned char *) fp;
  284. while (clen--) {
  285. *rtp++ = *rfp++;
  286. }
  287. } else {
  288. /*
  289. * copy 16 Byte chunks
  290. */
  291. clen = len >> 4;
  292. tp = (unsigned short *) to;
  293. fp = (unsigned short *) from;
  294. while (clen--) {
  295. *tp++ = *fp++;
  296. *tp++ = *fp++;
  297. *tp++ = *fp++;
  298. *tp++ = *fp++;
  299. *tp++ = *fp++;
  300. *tp++ = *fp++;
  301. *tp++ = *fp++;
  302. *tp++ = *fp++;
  303. tp += 8;
  304. }
  305. /*
  306. * do the rest, if any.
  307. */
  308. clen = len & 15;
  309. rtp = (unsigned char *) tp;
  310. rfp = (unsigned char *) fp;
  311. while (clen--) {
  312. *rtp++ = *rfp++;
  313. }
  314. }
  315. iob();
  316. }
  317. void cp_from_buf(const int type, void *to, const void *from, int len)
  318. {
  319. unsigned short *tp, *fp, clen;
  320. unsigned char *rtp, *rfp;
  321. if (type == PMAX_LANCE) {
  322. clen = len >> 1;
  323. tp = (unsigned short *) to;
  324. fp = (unsigned short *) from;
  325. while (clen--) {
  326. *tp++ = *fp++;
  327. fp++;
  328. }
  329. clen = len & 1;
  330. rtp = (unsigned char *) tp;
  331. rfp = (unsigned char *) fp;
  332. while (clen--) {
  333. *rtp++ = *rfp++;
  334. }
  335. } else {
  336. /*
  337. * copy 16 Byte chunks
  338. */
  339. clen = len >> 4;
  340. tp = (unsigned short *) to;
  341. fp = (unsigned short *) from;
  342. while (clen--) {
  343. *tp++ = *fp++;
  344. *tp++ = *fp++;
  345. *tp++ = *fp++;
  346. *tp++ = *fp++;
  347. *tp++ = *fp++;
  348. *tp++ = *fp++;
  349. *tp++ = *fp++;
  350. *tp++ = *fp++;
  351. fp += 8;
  352. }
  353. /*
  354. * do the rest, if any.
  355. */
  356. clen = len & 15;
  357. rtp = (unsigned char *) tp;
  358. rfp = (unsigned char *) fp;
  359. while (clen--) {
  360. *rtp++ = *rfp++;
  361. }
  362. }
  363. }
  364. /* Setup the Lance Rx and Tx rings */
  365. static void lance_init_ring(struct net_device *dev)
  366. {
  367. struct lance_private *lp = netdev_priv(dev);
  368. volatile struct lance_init_block *ib;
  369. int leptr;
  370. int i;
  371. ib = (struct lance_init_block *) (dev->mem_start);
  372. /* Lock out other processes while setting up hardware */
  373. netif_stop_queue(dev);
  374. lp->rx_new = lp->tx_new = 0;
  375. lp->rx_old = lp->tx_old = 0;
  376. /* Copy the ethernet address to the lance init block.
  377. * XXX bit 0 of the physical address registers has to be zero
  378. */
  379. ib->phys_addr[0] = dev->dev_addr[0];
  380. ib->phys_addr[1] = dev->dev_addr[1];
  381. ib->phys_addr[4] = dev->dev_addr[2];
  382. ib->phys_addr[5] = dev->dev_addr[3];
  383. ib->phys_addr[8] = dev->dev_addr[4];
  384. ib->phys_addr[9] = dev->dev_addr[5];
  385. /* Setup the initialization block */
  386. /* Setup rx descriptor pointer */
  387. leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
  388. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  389. ib->rx_ptr = leptr;
  390. if (ZERO)
  391. printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
  392. /* Setup tx descriptor pointer */
  393. leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
  394. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  395. ib->tx_ptr = leptr;
  396. if (ZERO)
  397. printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
  398. if (ZERO)
  399. printk("TX rings:\n");
  400. /* Setup the Tx ring entries */
  401. for (i = 0; i < TX_RING_SIZE; i++) {
  402. leptr = (int) lp->tx_buf_ptr_lnc[i];
  403. ib->btx_ring[i].tmd0 = leptr;
  404. ib->btx_ring[i].tmd1_hadr = leptr >> 16;
  405. ib->btx_ring[i].tmd1_bits = 0;
  406. ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
  407. ib->btx_ring[i].misc = 0;
  408. if (i < 3 && ZERO)
  409. printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
  410. }
  411. /* Setup the Rx ring entries */
  412. if (ZERO)
  413. printk("RX rings:\n");
  414. for (i = 0; i < RX_RING_SIZE; i++) {
  415. leptr = (int) lp->rx_buf_ptr_lnc[i];
  416. ib->brx_ring[i].rmd0 = leptr;
  417. ib->brx_ring[i].rmd1_hadr = leptr >> 16;
  418. ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
  419. ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
  420. ib->brx_ring[i].mblength = 0;
  421. if (i < 3 && ZERO)
  422. printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
  423. }
  424. iob();
  425. }
  426. static int init_restart_lance(struct lance_private *lp)
  427. {
  428. volatile struct lance_regs *ll = lp->ll;
  429. int i;
  430. writereg(&ll->rap, LE_CSR0);
  431. writereg(&ll->rdp, LE_C0_INIT);
  432. /* Wait for the lance to complete initialization */
  433. for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
  434. udelay(10);
  435. }
  436. if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
  437. printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
  438. return -1;
  439. }
  440. if ((ll->rdp & LE_C0_ERR)) {
  441. printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
  442. return -1;
  443. }
  444. writereg(&ll->rdp, LE_C0_IDON);
  445. writereg(&ll->rdp, LE_C0_STRT);
  446. writereg(&ll->rdp, LE_C0_INEA);
  447. return 0;
  448. }
  449. static int lance_rx(struct net_device *dev)
  450. {
  451. struct lance_private *lp = netdev_priv(dev);
  452. volatile struct lance_init_block *ib;
  453. volatile struct lance_rx_desc *rd = 0;
  454. unsigned char bits;
  455. int len = 0;
  456. struct sk_buff *skb = 0;
  457. ib = (struct lance_init_block *) (dev->mem_start);
  458. #ifdef TEST_HITS
  459. {
  460. int i;
  461. printk("[");
  462. for (i = 0; i < RX_RING_SIZE; i++) {
  463. if (i == lp->rx_new)
  464. printk("%s", ib->brx_ring[i].rmd1_bits &
  465. LE_R1_OWN ? "_" : "X");
  466. else
  467. printk("%s", ib->brx_ring[i].rmd1_bits &
  468. LE_R1_OWN ? "." : "1");
  469. }
  470. printk("]");
  471. }
  472. #endif
  473. for (rd = &ib->brx_ring[lp->rx_new];
  474. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  475. rd = &ib->brx_ring[lp->rx_new]) {
  476. /* We got an incomplete frame? */
  477. if ((bits & LE_R1_POK) != LE_R1_POK) {
  478. lp->stats.rx_over_errors++;
  479. lp->stats.rx_errors++;
  480. } else if (bits & LE_R1_ERR) {
  481. /* Count only the end frame as a rx error,
  482. * not the beginning
  483. */
  484. if (bits & LE_R1_BUF)
  485. lp->stats.rx_fifo_errors++;
  486. if (bits & LE_R1_CRC)
  487. lp->stats.rx_crc_errors++;
  488. if (bits & LE_R1_OFL)
  489. lp->stats.rx_over_errors++;
  490. if (bits & LE_R1_FRA)
  491. lp->stats.rx_frame_errors++;
  492. if (bits & LE_R1_EOP)
  493. lp->stats.rx_errors++;
  494. } else {
  495. len = (rd->mblength & 0xfff) - 4;
  496. skb = dev_alloc_skb(len + 2);
  497. if (skb == 0) {
  498. printk("%s: Memory squeeze, deferring packet.\n",
  499. dev->name);
  500. lp->stats.rx_dropped++;
  501. rd->mblength = 0;
  502. rd->rmd1_bits = LE_R1_OWN;
  503. lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
  504. return 0;
  505. }
  506. lp->stats.rx_bytes += len;
  507. skb->dev = dev;
  508. skb_reserve(skb, 2); /* 16 byte align */
  509. skb_put(skb, len); /* make room */
  510. cp_from_buf(lp->type, skb->data,
  511. (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
  512. len);
  513. skb->protocol = eth_type_trans(skb, dev);
  514. netif_rx(skb);
  515. dev->last_rx = jiffies;
  516. lp->stats.rx_packets++;
  517. }
  518. /* Return the packet to the pool */
  519. rd->mblength = 0;
  520. rd->length = -RX_BUFF_SIZE | 0xf000;
  521. rd->rmd1_bits = LE_R1_OWN;
  522. lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
  523. }
  524. return 0;
  525. }
  526. static void lance_tx(struct net_device *dev)
  527. {
  528. struct lance_private *lp = netdev_priv(dev);
  529. volatile struct lance_init_block *ib;
  530. volatile struct lance_regs *ll = lp->ll;
  531. volatile struct lance_tx_desc *td;
  532. int i, j;
  533. int status;
  534. ib = (struct lance_init_block *) (dev->mem_start);
  535. j = lp->tx_old;
  536. spin_lock(&lp->lock);
  537. for (i = j; i != lp->tx_new; i = j) {
  538. td = &ib->btx_ring[i];
  539. /* If we hit a packet not owned by us, stop */
  540. if (td->tmd1_bits & LE_T1_OWN)
  541. break;
  542. if (td->tmd1_bits & LE_T1_ERR) {
  543. status = td->misc;
  544. lp->stats.tx_errors++;
  545. if (status & LE_T3_RTY)
  546. lp->stats.tx_aborted_errors++;
  547. if (status & LE_T3_LCOL)
  548. lp->stats.tx_window_errors++;
  549. if (status & LE_T3_CLOS) {
  550. lp->stats.tx_carrier_errors++;
  551. printk("%s: Carrier Lost\n", dev->name);
  552. /* Stop the lance */
  553. writereg(&ll->rap, LE_CSR0);
  554. writereg(&ll->rdp, LE_C0_STOP);
  555. lance_init_ring(dev);
  556. load_csrs(lp);
  557. init_restart_lance(lp);
  558. goto out;
  559. }
  560. /* Buffer errors and underflows turn off the
  561. * transmitter, restart the adapter.
  562. */
  563. if (status & (LE_T3_BUF | LE_T3_UFL)) {
  564. lp->stats.tx_fifo_errors++;
  565. printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  566. dev->name);
  567. /* Stop the lance */
  568. writereg(&ll->rap, LE_CSR0);
  569. writereg(&ll->rdp, LE_C0_STOP);
  570. lance_init_ring(dev);
  571. load_csrs(lp);
  572. init_restart_lance(lp);
  573. goto out;
  574. }
  575. } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
  576. /*
  577. * So we don't count the packet more than once.
  578. */
  579. td->tmd1_bits &= ~(LE_T1_POK);
  580. /* One collision before packet was sent. */
  581. if (td->tmd1_bits & LE_T1_EONE)
  582. lp->stats.collisions++;
  583. /* More than one collision, be optimistic. */
  584. if (td->tmd1_bits & LE_T1_EMORE)
  585. lp->stats.collisions += 2;
  586. lp->stats.tx_packets++;
  587. }
  588. j = (j + 1) & TX_RING_MOD_MASK;
  589. }
  590. lp->tx_old = j;
  591. out:
  592. if (netif_queue_stopped(dev) &&
  593. TX_BUFFS_AVAIL > 0)
  594. netif_wake_queue(dev);
  595. spin_unlock(&lp->lock);
  596. }
  597. static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id)
  598. {
  599. struct net_device *dev = dev_id;
  600. printk("%s: DMA error\n", dev->name);
  601. return IRQ_HANDLED;
  602. }
  603. static irqreturn_t lance_interrupt(const int irq, void *dev_id)
  604. {
  605. struct net_device *dev = dev_id;
  606. struct lance_private *lp = netdev_priv(dev);
  607. volatile struct lance_regs *ll = lp->ll;
  608. int csr0;
  609. writereg(&ll->rap, LE_CSR0);
  610. csr0 = ll->rdp;
  611. /* Acknowledge all the interrupt sources ASAP */
  612. writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
  613. if ((csr0 & LE_C0_ERR)) {
  614. /* Clear the error condition */
  615. writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  616. LE_C0_CERR | LE_C0_MERR);
  617. }
  618. if (csr0 & LE_C0_RINT)
  619. lance_rx(dev);
  620. if (csr0 & LE_C0_TINT)
  621. lance_tx(dev);
  622. if (csr0 & LE_C0_BABL)
  623. lp->stats.tx_errors++;
  624. if (csr0 & LE_C0_MISS)
  625. lp->stats.rx_errors++;
  626. if (csr0 & LE_C0_MERR) {
  627. printk("%s: Memory error, status %04x\n", dev->name, csr0);
  628. writereg(&ll->rdp, LE_C0_STOP);
  629. lance_init_ring(dev);
  630. load_csrs(lp);
  631. init_restart_lance(lp);
  632. netif_wake_queue(dev);
  633. }
  634. writereg(&ll->rdp, LE_C0_INEA);
  635. writereg(&ll->rdp, LE_C0_INEA);
  636. return IRQ_HANDLED;
  637. }
  638. struct net_device *last_dev = 0;
  639. static int lance_open(struct net_device *dev)
  640. {
  641. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  642. struct lance_private *lp = netdev_priv(dev);
  643. volatile struct lance_regs *ll = lp->ll;
  644. int status = 0;
  645. last_dev = dev;
  646. /* Stop the Lance */
  647. writereg(&ll->rap, LE_CSR0);
  648. writereg(&ll->rdp, LE_C0_STOP);
  649. /* Set mode and clear multicast filter only at device open,
  650. * so that lance_init_ring() called at any error will not
  651. * forget multicast filters.
  652. *
  653. * BTW it is common bug in all lance drivers! --ANK
  654. */
  655. ib->mode = 0;
  656. ib->filter [0] = 0;
  657. ib->filter [2] = 0;
  658. ib->filter [4] = 0;
  659. ib->filter [6] = 0;
  660. lance_init_ring(dev);
  661. load_csrs(lp);
  662. netif_start_queue(dev);
  663. /* Associate IRQ with lance_interrupt */
  664. if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
  665. printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
  666. return -EAGAIN;
  667. }
  668. if (lp->dma_irq >= 0) {
  669. unsigned long flags;
  670. if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
  671. "lance error", dev)) {
  672. free_irq(dev->irq, dev);
  673. printk("%s: Can't get DMA IRQ %d\n", dev->name,
  674. lp->dma_irq);
  675. return -EAGAIN;
  676. }
  677. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  678. fast_mb();
  679. /* Enable I/O ASIC LANCE DMA. */
  680. ioasic_write(IO_REG_SSR,
  681. ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
  682. fast_mb();
  683. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  684. }
  685. status = init_restart_lance(lp);
  686. return status;
  687. }
  688. static int lance_close(struct net_device *dev)
  689. {
  690. struct lance_private *lp = netdev_priv(dev);
  691. volatile struct lance_regs *ll = lp->ll;
  692. netif_stop_queue(dev);
  693. del_timer_sync(&lp->multicast_timer);
  694. /* Stop the card */
  695. writereg(&ll->rap, LE_CSR0);
  696. writereg(&ll->rdp, LE_C0_STOP);
  697. if (lp->dma_irq >= 0) {
  698. unsigned long flags;
  699. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  700. fast_mb();
  701. /* Disable I/O ASIC LANCE DMA. */
  702. ioasic_write(IO_REG_SSR,
  703. ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
  704. fast_iob();
  705. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  706. free_irq(lp->dma_irq, dev);
  707. }
  708. free_irq(dev->irq, dev);
  709. return 0;
  710. }
  711. static inline int lance_reset(struct net_device *dev)
  712. {
  713. struct lance_private *lp = netdev_priv(dev);
  714. volatile struct lance_regs *ll = lp->ll;
  715. int status;
  716. /* Stop the lance */
  717. writereg(&ll->rap, LE_CSR0);
  718. writereg(&ll->rdp, LE_C0_STOP);
  719. lance_init_ring(dev);
  720. load_csrs(lp);
  721. dev->trans_start = jiffies;
  722. status = init_restart_lance(lp);
  723. return status;
  724. }
  725. static void lance_tx_timeout(struct net_device *dev)
  726. {
  727. struct lance_private *lp = netdev_priv(dev);
  728. volatile struct lance_regs *ll = lp->ll;
  729. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  730. dev->name, ll->rdp);
  731. lance_reset(dev);
  732. netif_wake_queue(dev);
  733. }
  734. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  735. {
  736. struct lance_private *lp = netdev_priv(dev);
  737. volatile struct lance_regs *ll = lp->ll;
  738. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  739. int entry, skblen, len;
  740. skblen = skb->len;
  741. len = skblen;
  742. if (len < ETH_ZLEN) {
  743. if (skb_padto(skb, ETH_ZLEN))
  744. return 0;
  745. len = ETH_ZLEN;
  746. }
  747. lp->stats.tx_bytes += len;
  748. entry = lp->tx_new & TX_RING_MOD_MASK;
  749. ib->btx_ring[entry].length = (-len);
  750. ib->btx_ring[entry].misc = 0;
  751. cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
  752. skblen);
  753. /* Clear the slack of the packet, do I need this? */
  754. /* For a firewall it's a good idea - AC */
  755. /*
  756. if (len != skblen)
  757. memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
  758. */
  759. /* Now, give the packet to the lance */
  760. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  761. lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
  762. if (TX_BUFFS_AVAIL <= 0)
  763. netif_stop_queue(dev);
  764. /* Kick the lance: transmit now */
  765. writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
  766. spin_unlock_irq(&lp->lock);
  767. dev->trans_start = jiffies;
  768. dev_kfree_skb(skb);
  769. return 0;
  770. }
  771. static struct net_device_stats *lance_get_stats(struct net_device *dev)
  772. {
  773. struct lance_private *lp = netdev_priv(dev);
  774. return &lp->stats;
  775. }
  776. static void lance_load_multicast(struct net_device *dev)
  777. {
  778. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  779. volatile u16 *mcast_table = (u16 *) & ib->filter;
  780. struct dev_mc_list *dmi = dev->mc_list;
  781. char *addrs;
  782. int i;
  783. u32 crc;
  784. /* set all multicast bits */
  785. if (dev->flags & IFF_ALLMULTI) {
  786. ib->filter[0] = 0xffff;
  787. ib->filter[2] = 0xffff;
  788. ib->filter[4] = 0xffff;
  789. ib->filter[6] = 0xffff;
  790. return;
  791. }
  792. /* clear the multicast filter */
  793. ib->filter[0] = 0;
  794. ib->filter[2] = 0;
  795. ib->filter[4] = 0;
  796. ib->filter[6] = 0;
  797. /* Add addresses */
  798. for (i = 0; i < dev->mc_count; i++) {
  799. addrs = dmi->dmi_addr;
  800. dmi = dmi->next;
  801. /* multicast address? */
  802. if (!(*addrs & 1))
  803. continue;
  804. crc = ether_crc_le(ETH_ALEN, addrs);
  805. crc = crc >> 26;
  806. mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
  807. }
  808. return;
  809. }
  810. static void lance_set_multicast(struct net_device *dev)
  811. {
  812. struct lance_private *lp = netdev_priv(dev);
  813. volatile struct lance_init_block *ib;
  814. volatile struct lance_regs *ll = lp->ll;
  815. ib = (struct lance_init_block *) (dev->mem_start);
  816. if (!netif_running(dev))
  817. return;
  818. if (lp->tx_old != lp->tx_new) {
  819. mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
  820. netif_wake_queue(dev);
  821. return;
  822. }
  823. netif_stop_queue(dev);
  824. writereg(&ll->rap, LE_CSR0);
  825. writereg(&ll->rdp, LE_C0_STOP);
  826. lance_init_ring(dev);
  827. if (dev->flags & IFF_PROMISC) {
  828. ib->mode |= LE_MO_PROM;
  829. } else {
  830. ib->mode &= ~LE_MO_PROM;
  831. lance_load_multicast(dev);
  832. }
  833. load_csrs(lp);
  834. init_restart_lance(lp);
  835. netif_wake_queue(dev);
  836. }
  837. static void lance_set_multicast_retry(unsigned long _opaque)
  838. {
  839. struct net_device *dev = (struct net_device *) _opaque;
  840. lance_set_multicast(dev);
  841. }
  842. static int __init dec_lance_init(const int type, const int slot)
  843. {
  844. static unsigned version_printed;
  845. static const char fmt[] = "declance%d";
  846. char name[10];
  847. struct net_device *dev;
  848. struct lance_private *lp;
  849. volatile struct lance_regs *ll;
  850. int i, ret;
  851. unsigned long esar_base;
  852. unsigned char *esar;
  853. if (dec_lance_debug && version_printed++ == 0)
  854. printk(version);
  855. i = 0;
  856. dev = root_lance_dev;
  857. while (dev) {
  858. i++;
  859. lp = (struct lance_private *)dev->priv;
  860. dev = lp->next;
  861. }
  862. snprintf(name, sizeof(name), fmt, i);
  863. dev = alloc_etherdev(sizeof(struct lance_private));
  864. if (!dev) {
  865. printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
  866. name);
  867. ret = -ENOMEM;
  868. goto err_out;
  869. }
  870. /*
  871. * alloc_etherdev ensures the data structures used by the LANCE
  872. * are aligned.
  873. */
  874. lp = netdev_priv(dev);
  875. spin_lock_init(&lp->lock);
  876. lp->type = type;
  877. lp->slot = slot;
  878. switch (type) {
  879. #ifdef CONFIG_TC
  880. case ASIC_LANCE:
  881. dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
  882. /* buffer space for the on-board LANCE shared memory */
  883. /*
  884. * FIXME: ugly hack!
  885. */
  886. dev->mem_start = CKSEG1ADDR(0x00020000);
  887. dev->mem_end = dev->mem_start + 0x00020000;
  888. dev->irq = dec_interrupt[DEC_IRQ_LANCE];
  889. esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
  890. /* Workaround crash with booting KN04 2.1k from Disk */
  891. memset((void *)dev->mem_start, 0,
  892. dev->mem_end - dev->mem_start);
  893. /*
  894. * setup the pointer arrays, this sucks [tm] :-(
  895. */
  896. for (i = 0; i < RX_RING_SIZE; i++) {
  897. lp->rx_buf_ptr_cpu[i] =
  898. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  899. 2 * i * RX_BUFF_SIZE);
  900. lp->rx_buf_ptr_lnc[i] =
  901. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  902. }
  903. for (i = 0; i < TX_RING_SIZE; i++) {
  904. lp->tx_buf_ptr_cpu[i] =
  905. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  906. 2 * RX_RING_SIZE * RX_BUFF_SIZE +
  907. 2 * i * TX_BUFF_SIZE);
  908. lp->tx_buf_ptr_lnc[i] =
  909. (char *)(BUF_OFFSET_LNC +
  910. RX_RING_SIZE * RX_BUFF_SIZE +
  911. i * TX_BUFF_SIZE);
  912. }
  913. /* Setup I/O ASIC LANCE DMA. */
  914. lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
  915. ioasic_write(IO_REG_LANCE_DMA_P,
  916. CPHYSADDR(dev->mem_start) << 3);
  917. break;
  918. case PMAD_LANCE:
  919. claim_tc_card(slot);
  920. dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot));
  921. dev->base_addr = dev->mem_start + 0x100000;
  922. dev->irq = get_tc_irq_nr(slot);
  923. esar_base = dev->mem_start + 0x1c0002;
  924. lp->dma_irq = -1;
  925. for (i = 0; i < RX_RING_SIZE; i++) {
  926. lp->rx_buf_ptr_cpu[i] =
  927. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  928. i * RX_BUFF_SIZE);
  929. lp->rx_buf_ptr_lnc[i] =
  930. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  931. }
  932. for (i = 0; i < TX_RING_SIZE; i++) {
  933. lp->tx_buf_ptr_cpu[i] =
  934. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  935. RX_RING_SIZE * RX_BUFF_SIZE +
  936. i * TX_BUFF_SIZE);
  937. lp->tx_buf_ptr_lnc[i] =
  938. (char *)(BUF_OFFSET_LNC +
  939. RX_RING_SIZE * RX_BUFF_SIZE +
  940. i * TX_BUFF_SIZE);
  941. }
  942. break;
  943. #endif
  944. case PMAX_LANCE:
  945. dev->irq = dec_interrupt[DEC_IRQ_LANCE];
  946. dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
  947. dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
  948. esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
  949. lp->dma_irq = -1;
  950. /*
  951. * setup the pointer arrays, this sucks [tm] :-(
  952. */
  953. for (i = 0; i < RX_RING_SIZE; i++) {
  954. lp->rx_buf_ptr_cpu[i] =
  955. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  956. 2 * i * RX_BUFF_SIZE);
  957. lp->rx_buf_ptr_lnc[i] =
  958. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  959. }
  960. for (i = 0; i < TX_RING_SIZE; i++) {
  961. lp->tx_buf_ptr_cpu[i] =
  962. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  963. 2 * RX_RING_SIZE * RX_BUFF_SIZE +
  964. 2 * i * TX_BUFF_SIZE);
  965. lp->tx_buf_ptr_lnc[i] =
  966. (char *)(BUF_OFFSET_LNC +
  967. RX_RING_SIZE * RX_BUFF_SIZE +
  968. i * TX_BUFF_SIZE);
  969. }
  970. break;
  971. default:
  972. printk(KERN_ERR "%s: declance_init called with unknown type\n",
  973. name);
  974. ret = -ENODEV;
  975. goto err_out_free_dev;
  976. }
  977. ll = (struct lance_regs *) dev->base_addr;
  978. esar = (unsigned char *) esar_base;
  979. /* prom checks */
  980. /* First, check for test pattern */
  981. if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
  982. esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
  983. printk(KERN_ERR
  984. "%s: Ethernet station address prom not found!\n",
  985. name);
  986. ret = -ENODEV;
  987. goto err_out_free_dev;
  988. }
  989. /* Check the prom contents */
  990. for (i = 0; i < 8; i++) {
  991. if (esar[i * 4] != esar[0x3c - i * 4] &&
  992. esar[i * 4] != esar[0x40 + i * 4] &&
  993. esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
  994. printk(KERN_ERR "%s: Something is wrong with the "
  995. "ethernet station address prom!\n", name);
  996. ret = -ENODEV;
  997. goto err_out_free_dev;
  998. }
  999. }
  1000. /* Copy the ethernet address to the device structure, later to the
  1001. * lance initialization block so the lance gets it every time it's
  1002. * (re)initialized.
  1003. */
  1004. switch (type) {
  1005. case ASIC_LANCE:
  1006. printk("%s: IOASIC onboard LANCE, addr = ", name);
  1007. break;
  1008. case PMAD_LANCE:
  1009. printk("%s: PMAD-AA, addr = ", name);
  1010. break;
  1011. case PMAX_LANCE:
  1012. printk("%s: PMAX onboard LANCE, addr = ", name);
  1013. break;
  1014. }
  1015. for (i = 0; i < 6; i++) {
  1016. dev->dev_addr[i] = esar[i * 4];
  1017. printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
  1018. }
  1019. printk(" irq = %d\n", dev->irq);
  1020. dev->open = &lance_open;
  1021. dev->stop = &lance_close;
  1022. dev->hard_start_xmit = &lance_start_xmit;
  1023. dev->tx_timeout = &lance_tx_timeout;
  1024. dev->watchdog_timeo = 5*HZ;
  1025. dev->get_stats = &lance_get_stats;
  1026. dev->set_multicast_list = &lance_set_multicast;
  1027. /* lp->ll is the location of the registers for lance card */
  1028. lp->ll = ll;
  1029. /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
  1030. * specification.
  1031. */
  1032. lp->busmaster_regval = 0;
  1033. dev->dma = 0;
  1034. /* We cannot sleep if the chip is busy during a
  1035. * multicast list update event, because such events
  1036. * can occur from interrupts (ex. IPv6). So we
  1037. * use a timer to try again later when necessary. -DaveM
  1038. */
  1039. init_timer(&lp->multicast_timer);
  1040. lp->multicast_timer.data = (unsigned long) dev;
  1041. lp->multicast_timer.function = &lance_set_multicast_retry;
  1042. ret = register_netdev(dev);
  1043. if (ret) {
  1044. printk(KERN_ERR
  1045. "%s: Unable to register netdev, aborting.\n", name);
  1046. goto err_out_free_dev;
  1047. }
  1048. lp->next = root_lance_dev;
  1049. root_lance_dev = dev;
  1050. printk("%s: registered as %s.\n", name, dev->name);
  1051. return 0;
  1052. err_out_free_dev:
  1053. free_netdev(dev);
  1054. err_out:
  1055. return ret;
  1056. }
  1057. /* Find all the lance cards on the system and initialize them */
  1058. static int __init dec_lance_probe(void)
  1059. {
  1060. int count = 0;
  1061. /* Scan slots for PMAD-AA cards first. */
  1062. #ifdef CONFIG_TC
  1063. if (TURBOCHANNEL) {
  1064. int slot;
  1065. while ((slot = search_tc_card("PMAD-AA")) >= 0) {
  1066. if (dec_lance_init(PMAD_LANCE, slot) < 0)
  1067. break;
  1068. count++;
  1069. }
  1070. }
  1071. #endif
  1072. /* Then handle onboard devices. */
  1073. if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
  1074. if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
  1075. #ifdef CONFIG_TC
  1076. if (dec_lance_init(ASIC_LANCE, -1) >= 0)
  1077. count++;
  1078. #endif
  1079. } else if (!TURBOCHANNEL) {
  1080. if (dec_lance_init(PMAX_LANCE, -1) >= 0)
  1081. count++;
  1082. }
  1083. }
  1084. return (count > 0) ? 0 : -ENODEV;
  1085. }
  1086. static void __exit dec_lance_cleanup(void)
  1087. {
  1088. while (root_lance_dev) {
  1089. struct net_device *dev = root_lance_dev;
  1090. struct lance_private *lp = netdev_priv(dev);
  1091. unregister_netdev(dev);
  1092. #ifdef CONFIG_TC
  1093. if (lp->slot >= 0)
  1094. release_tc_card(lp->slot);
  1095. #endif
  1096. root_lance_dev = lp->next;
  1097. free_netdev(dev);
  1098. }
  1099. }
  1100. module_init(dec_lance_probe);
  1101. module_exit(dec_lance_cleanup);