zoran_device.c 45 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783
  1. /*
  2. * Zoran zr36057/zr36067 PCI controller driver, for the
  3. * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
  4. * Media Labs LML33/LML33R10.
  5. *
  6. * This part handles device access (PCI/I2C/codec/...)
  7. *
  8. * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
  9. *
  10. * Currently maintained by:
  11. * Ronald Bultje <rbultje@ronald.bitfreak.net>
  12. * Laurent Pinchart <laurent.pinchart@skynet.be>
  13. * Mailinglist <mjpeg-users@lists.sf.net>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  28. */
  29. #include <linux/types.h>
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/byteorder/generic.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/proc_fs.h>
  36. #include <linux/i2c.h>
  37. #include <linux/i2c-algo-bit.h>
  38. #include <linux/videodev.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/sem.h>
  41. #include <linux/pci.h>
  42. #include <linux/video_decoder.h>
  43. #include <linux/video_encoder.h>
  44. #include <linux/delay.h>
  45. #include <linux/wait.h>
  46. #include <asm/io.h>
  47. #include "videocodec.h"
  48. #include "zoran.h"
  49. #include "zoran_device.h"
  50. #define IRQ_MASK ( ZR36057_ISR_GIRQ0 | \
  51. ZR36057_ISR_GIRQ1 | \
  52. ZR36057_ISR_JPEGRepIRQ )
  53. extern const struct zoran_format zoran_formats[];
  54. extern int *zr_debug;
  55. #define dprintk(num, format, args...) \
  56. do { \
  57. if (*zr_debug >= num) \
  58. printk(format, ##args); \
  59. } while (0)
  60. static int lml33dpath = 0; /* 1 will use digital path in capture
  61. * mode instead of analog. It can be
  62. * used for picture adjustments using
  63. * tool like xawtv while watching image
  64. * on TV monitor connected to the output.
  65. * However, due to absence of 75 Ohm
  66. * load on Bt819 input, there will be
  67. * some image imperfections */
  68. module_param(lml33dpath, bool, 0);
  69. MODULE_PARM_DESC(lml33dpath,
  70. "Use digital path capture mode (on LML33 cards)");
  71. static void
  72. zr36057_init_vfe (struct zoran *zr);
  73. /*
  74. * General Purpose I/O and Guest bus access
  75. */
  76. /*
  77. * This is a bit tricky. When a board lacks a GPIO function, the corresponding
  78. * GPIO bit number in the card_info structure is set to 0.
  79. */
  80. void
  81. GPIO (struct zoran *zr,
  82. int bit,
  83. unsigned int value)
  84. {
  85. u32 reg;
  86. u32 mask;
  87. /* Make sure the bit number is legal
  88. * A bit number of -1 (lacking) gives a mask of 0,
  89. * making it harmless */
  90. mask = (1 << (24 + bit)) & 0xff000000;
  91. reg = btread(ZR36057_GPPGCR1) & ~mask;
  92. if (value) {
  93. reg |= mask;
  94. }
  95. btwrite(reg, ZR36057_GPPGCR1);
  96. udelay(1);
  97. }
  98. /*
  99. * Wait til post office is no longer busy
  100. */
  101. int
  102. post_office_wait (struct zoran *zr)
  103. {
  104. u32 por;
  105. // while (((por = btread(ZR36057_POR)) & (ZR36057_POR_POPen | ZR36057_POR_POTime)) == ZR36057_POR_POPen) {
  106. while ((por = btread(ZR36057_POR)) & ZR36057_POR_POPen) {
  107. /* wait for something to happen */
  108. }
  109. if ((por & ZR36057_POR_POTime) && !zr->card.gws_not_connected) {
  110. /* In LML33/BUZ \GWS line is not connected, so it has always timeout set */
  111. dprintk(1, KERN_INFO "%s: pop timeout %08x\n", ZR_DEVNAME(zr),
  112. por);
  113. return -1;
  114. }
  115. return 0;
  116. }
  117. int
  118. post_office_write (struct zoran *zr,
  119. unsigned int guest,
  120. unsigned int reg,
  121. unsigned int value)
  122. {
  123. u32 por;
  124. por =
  125. ZR36057_POR_PODir | ZR36057_POR_POTime | ((guest & 7) << 20) |
  126. ((reg & 7) << 16) | (value & 0xFF);
  127. btwrite(por, ZR36057_POR);
  128. return post_office_wait(zr);
  129. }
  130. int
  131. post_office_read (struct zoran *zr,
  132. unsigned int guest,
  133. unsigned int reg)
  134. {
  135. u32 por;
  136. por = ZR36057_POR_POTime | ((guest & 7) << 20) | ((reg & 7) << 16);
  137. btwrite(por, ZR36057_POR);
  138. if (post_office_wait(zr) < 0) {
  139. return -1;
  140. }
  141. return btread(ZR36057_POR) & 0xFF;
  142. }
  143. /*
  144. * detect guests
  145. */
  146. static void
  147. dump_guests (struct zoran *zr)
  148. {
  149. if (*zr_debug > 2) {
  150. int i, guest[8];
  151. for (i = 1; i < 8; i++) { // Don't read jpeg codec here
  152. guest[i] = post_office_read(zr, i, 0);
  153. }
  154. printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
  155. for (i = 1; i < 8; i++) {
  156. printk(" 0x%02x", guest[i]);
  157. }
  158. printk("\n");
  159. }
  160. }
  161. static inline unsigned long
  162. get_time (void)
  163. {
  164. struct timeval tv;
  165. do_gettimeofday(&tv);
  166. return (1000000 * tv.tv_sec + tv.tv_usec);
  167. }
  168. void
  169. detect_guest_activity (struct zoran *zr)
  170. {
  171. int timeout, i, j, res, guest[8], guest0[8], change[8][3];
  172. unsigned long t0, t1;
  173. dump_guests(zr);
  174. printk(KERN_INFO "%s: Detecting guests activity, please wait...\n",
  175. ZR_DEVNAME(zr));
  176. for (i = 1; i < 8; i++) { // Don't read jpeg codec here
  177. guest0[i] = guest[i] = post_office_read(zr, i, 0);
  178. }
  179. timeout = 0;
  180. j = 0;
  181. t0 = get_time();
  182. while (timeout < 10000) {
  183. udelay(10);
  184. timeout++;
  185. for (i = 1; (i < 8) && (j < 8); i++) {
  186. res = post_office_read(zr, i, 0);
  187. if (res != guest[i]) {
  188. t1 = get_time();
  189. change[j][0] = (t1 - t0);
  190. t0 = t1;
  191. change[j][1] = i;
  192. change[j][2] = res;
  193. j++;
  194. guest[i] = res;
  195. }
  196. }
  197. if (j >= 8)
  198. break;
  199. }
  200. printk(KERN_INFO "%s: Guests:", ZR_DEVNAME(zr));
  201. for (i = 1; i < 8; i++) {
  202. printk(" 0x%02x", guest0[i]);
  203. }
  204. printk("\n");
  205. if (j == 0) {
  206. printk(KERN_INFO "%s: No activity detected.\n", ZR_DEVNAME(zr));
  207. return;
  208. }
  209. for (i = 0; i < j; i++) {
  210. printk(KERN_INFO "%s: %6d: %d => 0x%02x\n", ZR_DEVNAME(zr),
  211. change[i][0], change[i][1], change[i][2]);
  212. }
  213. }
  214. /*
  215. * JPEG Codec access
  216. */
  217. void
  218. jpeg_codec_sleep (struct zoran *zr,
  219. int sleep)
  220. {
  221. GPIO(zr, zr->card.gpio[GPIO_JPEG_SLEEP], !sleep);
  222. if (!sleep) {
  223. dprintk(3,
  224. KERN_DEBUG
  225. "%s: jpeg_codec_sleep() - wake GPIO=0x%08x\n",
  226. ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
  227. udelay(500);
  228. } else {
  229. dprintk(3,
  230. KERN_DEBUG
  231. "%s: jpeg_codec_sleep() - sleep GPIO=0x%08x\n",
  232. ZR_DEVNAME(zr), btread(ZR36057_GPPGCR1));
  233. udelay(2);
  234. }
  235. }
  236. int
  237. jpeg_codec_reset (struct zoran *zr)
  238. {
  239. /* Take the codec out of sleep */
  240. jpeg_codec_sleep(zr, 0);
  241. if (zr->card.gpcs[GPCS_JPEG_RESET] != 0xff) {
  242. post_office_write(zr, zr->card.gpcs[GPCS_JPEG_RESET], 0,
  243. 0);
  244. udelay(2);
  245. } else {
  246. GPIO(zr, zr->card.gpio[GPIO_JPEG_RESET], 0);
  247. udelay(2);
  248. GPIO(zr, zr->card.gpio[GPIO_JPEG_RESET], 1);
  249. udelay(2);
  250. }
  251. return 0;
  252. }
  253. /*
  254. * Set the registers for the size we have specified. Don't bother
  255. * trying to understand this without the ZR36057 manual in front of
  256. * you [AC].
  257. *
  258. * PS: The manual is free for download in .pdf format from
  259. * www.zoran.com - nicely done those folks.
  260. */
  261. static void
  262. zr36057_adjust_vfe (struct zoran *zr,
  263. enum zoran_codec_mode mode)
  264. {
  265. u32 reg;
  266. switch (mode) {
  267. case BUZ_MODE_MOTION_DECOMPRESS:
  268. btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  269. reg = btread(ZR36057_VFEHCR);
  270. if ((reg & (1 << 10)) && zr->card.type != LML33R10) {
  271. reg += ((1 << 10) | 1);
  272. }
  273. btwrite(reg, ZR36057_VFEHCR);
  274. break;
  275. case BUZ_MODE_MOTION_COMPRESS:
  276. case BUZ_MODE_IDLE:
  277. default:
  278. if (zr->norm == VIDEO_MODE_NTSC ||
  279. (zr->card.type == LML33R10 &&
  280. zr->norm == VIDEO_MODE_PAL))
  281. btand(~ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  282. else
  283. btor(ZR36057_VFESPFR_ExtFl, ZR36057_VFESPFR);
  284. reg = btread(ZR36057_VFEHCR);
  285. if (!(reg & (1 << 10)) && zr->card.type != LML33R10) {
  286. reg -= ((1 << 10) | 1);
  287. }
  288. btwrite(reg, ZR36057_VFEHCR);
  289. break;
  290. }
  291. }
  292. /*
  293. * set geometry
  294. */
  295. static void
  296. zr36057_set_vfe (struct zoran *zr,
  297. int video_width,
  298. int video_height,
  299. const struct zoran_format *format)
  300. {
  301. struct tvnorm *tvn;
  302. unsigned HStart, HEnd, VStart, VEnd;
  303. unsigned DispMode;
  304. unsigned VidWinWid, VidWinHt;
  305. unsigned hcrop1, hcrop2, vcrop1, vcrop2;
  306. unsigned Wa, We, Ha, He;
  307. unsigned X, Y, HorDcm, VerDcm;
  308. u32 reg;
  309. unsigned mask_line_size;
  310. tvn = zr->timing;
  311. Wa = tvn->Wa;
  312. Ha = tvn->Ha;
  313. dprintk(2, KERN_INFO "%s: set_vfe() - width = %d, height = %d\n",
  314. ZR_DEVNAME(zr), video_width, video_height);
  315. if (zr->norm != VIDEO_MODE_PAL &&
  316. zr->norm != VIDEO_MODE_NTSC &&
  317. zr->norm != VIDEO_MODE_SECAM) {
  318. dprintk(1,
  319. KERN_ERR "%s: set_vfe() - norm = %d not valid\n",
  320. ZR_DEVNAME(zr), zr->norm);
  321. return;
  322. }
  323. if (video_width < BUZ_MIN_WIDTH ||
  324. video_height < BUZ_MIN_HEIGHT ||
  325. video_width > Wa || video_height > Ha) {
  326. dprintk(1, KERN_ERR "%s: set_vfe: w=%d h=%d not valid\n",
  327. ZR_DEVNAME(zr), video_width, video_height);
  328. return;
  329. }
  330. /**** zr36057 ****/
  331. /* horizontal */
  332. VidWinWid = video_width;
  333. X = (VidWinWid * 64 + tvn->Wa - 1) / tvn->Wa;
  334. We = (VidWinWid * 64) / X;
  335. HorDcm = 64 - X;
  336. hcrop1 = 2 * ((tvn->Wa - We) / 4);
  337. hcrop2 = tvn->Wa - We - hcrop1;
  338. HStart = tvn->HStart ? tvn->HStart : 1;
  339. /* (Ronald) Original comment:
  340. * "| 1 Doesn't have any effect, tested on both a DC10 and a DC10+"
  341. * this is false. It inverses chroma values on the LML33R10 (so Cr
  342. * suddenly is shown as Cb and reverse, really cool effect if you
  343. * want to see blue faces, not useful otherwise). So don't use |1.
  344. * However, the DC10 has '0' as HStart, but does need |1, so we
  345. * use a dirty check...
  346. */
  347. HEnd = HStart + tvn->Wa - 1;
  348. HStart += hcrop1;
  349. HEnd -= hcrop2;
  350. reg = ((HStart & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HStart)
  351. | ((HEnd & ZR36057_VFEHCR_Hmask) << ZR36057_VFEHCR_HEnd);
  352. if (zr->card.vfe_pol.hsync_pol)
  353. reg |= ZR36057_VFEHCR_HSPol;
  354. btwrite(reg, ZR36057_VFEHCR);
  355. /* Vertical */
  356. DispMode = !(video_height > BUZ_MAX_HEIGHT / 2);
  357. VidWinHt = DispMode ? video_height : video_height / 2;
  358. Y = (VidWinHt * 64 * 2 + tvn->Ha - 1) / tvn->Ha;
  359. He = (VidWinHt * 64) / Y;
  360. VerDcm = 64 - Y;
  361. vcrop1 = (tvn->Ha / 2 - He) / 2;
  362. vcrop2 = tvn->Ha / 2 - He - vcrop1;
  363. VStart = tvn->VStart;
  364. VEnd = VStart + tvn->Ha / 2; // - 1; FIXME SnapShot times out with -1 in 768*576 on the DC10 - LP
  365. VStart += vcrop1;
  366. VEnd -= vcrop2;
  367. reg = ((VStart & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VStart)
  368. | ((VEnd & ZR36057_VFEVCR_Vmask) << ZR36057_VFEVCR_VEnd);
  369. if (zr->card.vfe_pol.vsync_pol)
  370. reg |= ZR36057_VFEVCR_VSPol;
  371. btwrite(reg, ZR36057_VFEVCR);
  372. /* scaler and pixel format */
  373. reg = 0;
  374. reg |= (HorDcm << ZR36057_VFESPFR_HorDcm);
  375. reg |= (VerDcm << ZR36057_VFESPFR_VerDcm);
  376. reg |= (DispMode << ZR36057_VFESPFR_DispMode);
  377. if (format->palette != VIDEO_PALETTE_YUV422)
  378. reg |= ZR36057_VFESPFR_LittleEndian;
  379. /* RJ: I don't know, why the following has to be the opposite
  380. * of the corresponding ZR36060 setting, but only this way
  381. * we get the correct colors when uncompressing to the screen */
  382. //reg |= ZR36057_VFESPFR_VCLKPol; /**/
  383. /* RJ: Don't know if that is needed for NTSC also */
  384. if (zr->norm != VIDEO_MODE_NTSC)
  385. reg |= ZR36057_VFESPFR_ExtFl; // NEEDED!!!!!!! Wolfgang
  386. reg |= ZR36057_VFESPFR_TopField;
  387. switch (format->palette) {
  388. case VIDEO_PALETTE_YUV422:
  389. reg |= ZR36057_VFESPFR_YUV422;
  390. break;
  391. case VIDEO_PALETTE_RGB555:
  392. reg |= ZR36057_VFESPFR_RGB555 | ZR36057_VFESPFR_ErrDif;
  393. break;
  394. case VIDEO_PALETTE_RGB565:
  395. reg |= ZR36057_VFESPFR_RGB565 | ZR36057_VFESPFR_ErrDif;
  396. break;
  397. case VIDEO_PALETTE_RGB24:
  398. reg |= ZR36057_VFESPFR_RGB888 | ZR36057_VFESPFR_Pack24;
  399. break;
  400. case VIDEO_PALETTE_RGB32:
  401. reg |= ZR36057_VFESPFR_RGB888;
  402. break;
  403. default:
  404. dprintk(1,
  405. KERN_INFO "%s: set_vfe() - unknown color_fmt=%x\n",
  406. ZR_DEVNAME(zr), format->palette);
  407. return;
  408. }
  409. if (HorDcm >= 48) {
  410. reg |= 3 << ZR36057_VFESPFR_HFilter; /* 5 tap filter */
  411. } else if (HorDcm >= 32) {
  412. reg |= 2 << ZR36057_VFESPFR_HFilter; /* 4 tap filter */
  413. } else if (HorDcm >= 16) {
  414. reg |= 1 << ZR36057_VFESPFR_HFilter; /* 3 tap filter */
  415. }
  416. btwrite(reg, ZR36057_VFESPFR);
  417. /* display configuration */
  418. reg = (16 << ZR36057_VDCR_MinPix)
  419. | (VidWinHt << ZR36057_VDCR_VidWinHt)
  420. | (VidWinWid << ZR36057_VDCR_VidWinWid);
  421. if (pci_pci_problems & PCIPCI_TRITON)
  422. // || zr->revision < 1) // Revision 1 has also Triton support
  423. reg &= ~ZR36057_VDCR_Triton;
  424. else
  425. reg |= ZR36057_VDCR_Triton;
  426. btwrite(reg, ZR36057_VDCR);
  427. /* (Ronald) don't write this if overlay_mask = NULL */
  428. if (zr->overlay_mask) {
  429. /* Write overlay clipping mask data, but don't enable overlay clipping */
  430. /* RJ: since this makes only sense on the screen, we use
  431. * zr->overlay_settings.width instead of video_width */
  432. mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
  433. reg = virt_to_bus(zr->overlay_mask);
  434. btwrite(reg, ZR36057_MMTR);
  435. reg = virt_to_bus(zr->overlay_mask + mask_line_size);
  436. btwrite(reg, ZR36057_MMBR);
  437. reg =
  438. mask_line_size - (zr->overlay_settings.width +
  439. 31) / 32;
  440. if (DispMode == 0)
  441. reg += mask_line_size;
  442. reg <<= ZR36057_OCR_MaskStride;
  443. btwrite(reg, ZR36057_OCR);
  444. }
  445. zr36057_adjust_vfe(zr, zr->codec_mode);
  446. }
  447. /*
  448. * Switch overlay on or off
  449. */
  450. void
  451. zr36057_overlay (struct zoran *zr,
  452. int on)
  453. {
  454. u32 reg;
  455. if (on) {
  456. /* do the necessary settings ... */
  457. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR); /* switch it off first */
  458. zr36057_set_vfe(zr,
  459. zr->overlay_settings.width,
  460. zr->overlay_settings.height,
  461. zr->overlay_settings.format);
  462. /* Start and length of each line MUST be 4-byte aligned.
  463. * This should be allready checked before the call to this routine.
  464. * All error messages are internal driver checking only! */
  465. /* video display top and bottom registers */
  466. reg = (long) zr->buffer.base +
  467. zr->overlay_settings.x *
  468. ((zr->overlay_settings.format->depth + 7) / 8) +
  469. zr->overlay_settings.y *
  470. zr->buffer.bytesperline;
  471. btwrite(reg, ZR36057_VDTR);
  472. if (reg & 3)
  473. dprintk(1,
  474. KERN_ERR
  475. "%s: zr36057_overlay() - video_address not aligned\n",
  476. ZR_DEVNAME(zr));
  477. if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
  478. reg += zr->buffer.bytesperline;
  479. btwrite(reg, ZR36057_VDBR);
  480. /* video stride, status, and frame grab register */
  481. reg = zr->buffer.bytesperline -
  482. zr->overlay_settings.width *
  483. ((zr->overlay_settings.format->depth + 7) / 8);
  484. if (zr->overlay_settings.height > BUZ_MAX_HEIGHT / 2)
  485. reg += zr->buffer.bytesperline;
  486. if (reg & 3)
  487. dprintk(1,
  488. KERN_ERR
  489. "%s: zr36057_overlay() - video_stride not aligned\n",
  490. ZR_DEVNAME(zr));
  491. reg = (reg << ZR36057_VSSFGR_DispStride);
  492. reg |= ZR36057_VSSFGR_VidOvf; /* clear overflow status */
  493. btwrite(reg, ZR36057_VSSFGR);
  494. /* Set overlay clipping */
  495. if (zr->overlay_settings.clipcount > 0)
  496. btor(ZR36057_OCR_OvlEnable, ZR36057_OCR);
  497. /* ... and switch it on */
  498. btor(ZR36057_VDCR_VidEn, ZR36057_VDCR);
  499. } else {
  500. /* Switch it off */
  501. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
  502. }
  503. }
  504. /*
  505. * The overlay mask has one bit for each pixel on a scan line,
  506. * and the maximum window size is BUZ_MAX_WIDTH * BUZ_MAX_HEIGHT pixels.
  507. */
  508. void
  509. write_overlay_mask (struct file *file,
  510. struct video_clip *vp,
  511. int count)
  512. {
  513. struct zoran_fh *fh = file->private_data;
  514. struct zoran *zr = fh->zr;
  515. unsigned mask_line_size = (BUZ_MAX_WIDTH + 31) / 32;
  516. u32 *mask;
  517. int x, y, width, height;
  518. unsigned i, j, k;
  519. u32 reg;
  520. /* fill mask with one bits */
  521. memset(fh->overlay_mask, ~0, mask_line_size * 4 * BUZ_MAX_HEIGHT);
  522. reg = 0;
  523. for (i = 0; i < count; ++i) {
  524. /* pick up local copy of clip */
  525. x = vp[i].x;
  526. y = vp[i].y;
  527. width = vp[i].width;
  528. height = vp[i].height;
  529. /* trim clips that extend beyond the window */
  530. if (x < 0) {
  531. width += x;
  532. x = 0;
  533. }
  534. if (y < 0) {
  535. height += y;
  536. y = 0;
  537. }
  538. if (x + width > fh->overlay_settings.width) {
  539. width = fh->overlay_settings.width - x;
  540. }
  541. if (y + height > fh->overlay_settings.height) {
  542. height = fh->overlay_settings.height - y;
  543. }
  544. /* ignore degenerate clips */
  545. if (height <= 0) {
  546. continue;
  547. }
  548. if (width <= 0) {
  549. continue;
  550. }
  551. /* apply clip for each scan line */
  552. for (j = 0; j < height; ++j) {
  553. /* reset bit for each pixel */
  554. /* this can be optimized later if need be */
  555. mask = fh->overlay_mask + (y + j) * mask_line_size;
  556. for (k = 0; k < width; ++k) {
  557. mask[(x + k) / 32] &=
  558. ~((u32) 1 << (x + k) % 32);
  559. }
  560. }
  561. }
  562. }
  563. /* Enable/Disable uncompressed memory grabbing of the 36057 */
  564. void
  565. zr36057_set_memgrab (struct zoran *zr,
  566. int mode)
  567. {
  568. if (mode) {
  569. if (btread(ZR36057_VSSFGR) &
  570. (ZR36057_VSSFGR_SnapShot | ZR36057_VSSFGR_FrameGrab))
  571. dprintk(1,
  572. KERN_WARNING
  573. "%s: zr36057_set_memgrab(1) with SnapShot or FrameGrab on!?\n",
  574. ZR_DEVNAME(zr));
  575. /* switch on VSync interrupts */
  576. btwrite(IRQ_MASK, ZR36057_ISR); // Clear Interrupts
  577. btor(zr->card.vsync_int, ZR36057_ICR); // SW
  578. /* enable SnapShot */
  579. btor(ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
  580. /* Set zr36057 video front end and enable video */
  581. zr36057_set_vfe(zr, zr->v4l_settings.width,
  582. zr->v4l_settings.height,
  583. zr->v4l_settings.format);
  584. zr->v4l_memgrab_active = 1;
  585. } else {
  586. zr->v4l_memgrab_active = 0;
  587. /* switch off VSync interrupts */
  588. btand(~zr->card.vsync_int, ZR36057_ICR); // SW
  589. /* reenable grabbing to screen if it was running */
  590. if (zr->v4l_overlay_active) {
  591. zr36057_overlay(zr, 1);
  592. } else {
  593. btand(~ZR36057_VDCR_VidEn, ZR36057_VDCR);
  594. btand(~ZR36057_VSSFGR_SnapShot, ZR36057_VSSFGR);
  595. }
  596. }
  597. }
  598. int
  599. wait_grab_pending (struct zoran *zr)
  600. {
  601. unsigned long flags;
  602. /* wait until all pending grabs are finished */
  603. if (!zr->v4l_memgrab_active)
  604. return 0;
  605. wait_event_interruptible(zr->v4l_capq,
  606. (zr->v4l_pend_tail == zr->v4l_pend_head));
  607. if (signal_pending(current))
  608. return -ERESTARTSYS;
  609. spin_lock_irqsave(&zr->spinlock, flags);
  610. zr36057_set_memgrab(zr, 0);
  611. spin_unlock_irqrestore(&zr->spinlock, flags);
  612. return 0;
  613. }
  614. /*****************************************************************************
  615. * *
  616. * Set up the Buz-specific MJPEG part *
  617. * *
  618. *****************************************************************************/
  619. static inline void
  620. set_frame (struct zoran *zr,
  621. int val)
  622. {
  623. GPIO(zr, zr->card.gpio[GPIO_JPEG_FRAME], val);
  624. }
  625. static void
  626. set_videobus_dir (struct zoran *zr,
  627. int val)
  628. {
  629. switch (zr->card.type) {
  630. case LML33:
  631. case LML33R10:
  632. if (lml33dpath == 0)
  633. GPIO(zr, 5, val);
  634. else
  635. GPIO(zr, 5, 1);
  636. break;
  637. default:
  638. GPIO(zr, zr->card.gpio[GPIO_VID_DIR],
  639. zr->card.gpio_pol[GPIO_VID_DIR] ? !val : val);
  640. break;
  641. }
  642. }
  643. static void
  644. init_jpeg_queue (struct zoran *zr)
  645. {
  646. int i;
  647. /* re-initialize DMA ring stuff */
  648. zr->jpg_que_head = 0;
  649. zr->jpg_dma_head = 0;
  650. zr->jpg_dma_tail = 0;
  651. zr->jpg_que_tail = 0;
  652. zr->jpg_seq_num = 0;
  653. zr->JPEG_error = 0;
  654. zr->num_errors = 0;
  655. zr->jpg_err_seq = 0;
  656. zr->jpg_err_shift = 0;
  657. zr->jpg_queued_num = 0;
  658. for (i = 0; i < zr->jpg_buffers.num_buffers; i++) {
  659. zr->jpg_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
  660. }
  661. for (i = 0; i < BUZ_NUM_STAT_COM; i++) {
  662. zr->stat_com[i] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
  663. }
  664. }
  665. static void
  666. zr36057_set_jpg (struct zoran *zr,
  667. enum zoran_codec_mode mode)
  668. {
  669. struct tvnorm *tvn;
  670. u32 reg;
  671. tvn = zr->timing;
  672. /* assert P_Reset, disable code transfer, deassert Active */
  673. btwrite(0, ZR36057_JPC);
  674. /* MJPEG compression mode */
  675. switch (mode) {
  676. case BUZ_MODE_MOTION_COMPRESS:
  677. default:
  678. reg = ZR36057_JMC_MJPGCmpMode;
  679. break;
  680. case BUZ_MODE_MOTION_DECOMPRESS:
  681. reg = ZR36057_JMC_MJPGExpMode;
  682. reg |= ZR36057_JMC_SyncMstr;
  683. /* RJ: The following is experimental - improves the output to screen */
  684. //if(zr->jpg_settings.VFIFO_FB) reg |= ZR36057_JMC_VFIFO_FB; // No, it doesn't. SM
  685. break;
  686. case BUZ_MODE_STILL_COMPRESS:
  687. reg = ZR36057_JMC_JPGCmpMode;
  688. break;
  689. case BUZ_MODE_STILL_DECOMPRESS:
  690. reg = ZR36057_JMC_JPGExpMode;
  691. break;
  692. }
  693. reg |= ZR36057_JMC_JPG;
  694. if (zr->jpg_settings.field_per_buff == 1)
  695. reg |= ZR36057_JMC_Fld_per_buff;
  696. btwrite(reg, ZR36057_JMC);
  697. /* vertical */
  698. btor(ZR36057_VFEVCR_VSPol, ZR36057_VFEVCR);
  699. reg = (6 << ZR36057_VSP_VsyncSize) |
  700. (tvn->Ht << ZR36057_VSP_FrmTot);
  701. btwrite(reg, ZR36057_VSP);
  702. reg = ((zr->jpg_settings.img_y + tvn->VStart) << ZR36057_FVAP_NAY) |
  703. (zr->jpg_settings.img_height << ZR36057_FVAP_PAY);
  704. btwrite(reg, ZR36057_FVAP);
  705. /* horizontal */
  706. if (zr->card.vfe_pol.hsync_pol)
  707. btor(ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
  708. else
  709. btand(~ZR36057_VFEHCR_HSPol, ZR36057_VFEHCR);
  710. reg = ((tvn->HSyncStart) << ZR36057_HSP_HsyncStart) |
  711. (tvn->Wt << ZR36057_HSP_LineTot);
  712. btwrite(reg, ZR36057_HSP);
  713. reg = ((zr->jpg_settings.img_x +
  714. tvn->HStart + 4) << ZR36057_FHAP_NAX) |
  715. (zr->jpg_settings.img_width << ZR36057_FHAP_PAX);
  716. btwrite(reg, ZR36057_FHAP);
  717. /* field process parameters */
  718. if (zr->jpg_settings.odd_even)
  719. reg = ZR36057_FPP_Odd_Even;
  720. else
  721. reg = 0;
  722. btwrite(reg, ZR36057_FPP);
  723. /* Set proper VCLK Polarity, else colors will be wrong during playback */
  724. //btor(ZR36057_VFESPFR_VCLKPol, ZR36057_VFESPFR);
  725. /* code base address */
  726. reg = virt_to_bus(zr->stat_com);
  727. btwrite(reg, ZR36057_JCBA);
  728. /* FIFO threshold (FIFO is 160. double words) */
  729. /* NOTE: decimal values here */
  730. switch (mode) {
  731. case BUZ_MODE_STILL_COMPRESS:
  732. case BUZ_MODE_MOTION_COMPRESS:
  733. if (zr->card.type != BUZ)
  734. reg = 140;
  735. else
  736. reg = 60;
  737. break;
  738. case BUZ_MODE_STILL_DECOMPRESS:
  739. case BUZ_MODE_MOTION_DECOMPRESS:
  740. reg = 20;
  741. break;
  742. default:
  743. reg = 80;
  744. break;
  745. }
  746. btwrite(reg, ZR36057_JCFT);
  747. zr36057_adjust_vfe(zr, mode);
  748. }
  749. void
  750. print_interrupts (struct zoran *zr)
  751. {
  752. int res, noerr = 0;
  753. printk(KERN_INFO "%s: interrupts received:", ZR_DEVNAME(zr));
  754. if ((res = zr->field_counter) < -1 || res > 1) {
  755. printk(" FD:%d", res);
  756. }
  757. if ((res = zr->intr_counter_GIRQ1) != 0) {
  758. printk(" GIRQ1:%d", res);
  759. noerr++;
  760. }
  761. if ((res = zr->intr_counter_GIRQ0) != 0) {
  762. printk(" GIRQ0:%d", res);
  763. noerr++;
  764. }
  765. if ((res = zr->intr_counter_CodRepIRQ) != 0) {
  766. printk(" CodRepIRQ:%d", res);
  767. noerr++;
  768. }
  769. if ((res = zr->intr_counter_JPEGRepIRQ) != 0) {
  770. printk(" JPEGRepIRQ:%d", res);
  771. noerr++;
  772. }
  773. if (zr->JPEG_max_missed) {
  774. printk(" JPEG delays: max=%d min=%d", zr->JPEG_max_missed,
  775. zr->JPEG_min_missed);
  776. }
  777. if (zr->END_event_missed) {
  778. printk(" ENDs missed: %d", zr->END_event_missed);
  779. }
  780. //if (zr->jpg_queued_num) {
  781. printk(" queue_state=%ld/%ld/%ld/%ld", zr->jpg_que_tail,
  782. zr->jpg_dma_tail, zr->jpg_dma_head, zr->jpg_que_head);
  783. //}
  784. if (!noerr) {
  785. printk(": no interrupts detected.");
  786. }
  787. printk("\n");
  788. }
  789. void
  790. clear_interrupt_counters (struct zoran *zr)
  791. {
  792. zr->intr_counter_GIRQ1 = 0;
  793. zr->intr_counter_GIRQ0 = 0;
  794. zr->intr_counter_CodRepIRQ = 0;
  795. zr->intr_counter_JPEGRepIRQ = 0;
  796. zr->field_counter = 0;
  797. zr->IRQ1_in = 0;
  798. zr->IRQ1_out = 0;
  799. zr->JPEG_in = 0;
  800. zr->JPEG_out = 0;
  801. zr->JPEG_0 = 0;
  802. zr->JPEG_1 = 0;
  803. zr->END_event_missed = 0;
  804. zr->JPEG_missed = 0;
  805. zr->JPEG_max_missed = 0;
  806. zr->JPEG_min_missed = 0x7fffffff;
  807. }
  808. static u32
  809. count_reset_interrupt (struct zoran *zr)
  810. {
  811. u32 isr;
  812. if ((isr = btread(ZR36057_ISR) & 0x78000000)) {
  813. if (isr & ZR36057_ISR_GIRQ1) {
  814. btwrite(ZR36057_ISR_GIRQ1, ZR36057_ISR);
  815. zr->intr_counter_GIRQ1++;
  816. }
  817. if (isr & ZR36057_ISR_GIRQ0) {
  818. btwrite(ZR36057_ISR_GIRQ0, ZR36057_ISR);
  819. zr->intr_counter_GIRQ0++;
  820. }
  821. if (isr & ZR36057_ISR_CodRepIRQ) {
  822. btwrite(ZR36057_ISR_CodRepIRQ, ZR36057_ISR);
  823. zr->intr_counter_CodRepIRQ++;
  824. }
  825. if (isr & ZR36057_ISR_JPEGRepIRQ) {
  826. btwrite(ZR36057_ISR_JPEGRepIRQ, ZR36057_ISR);
  827. zr->intr_counter_JPEGRepIRQ++;
  828. }
  829. }
  830. return isr;
  831. }
  832. /* hack */
  833. extern void zr36016_write (struct videocodec *codec,
  834. u16 reg,
  835. u32 val);
  836. void
  837. jpeg_start (struct zoran *zr)
  838. {
  839. int reg;
  840. zr->frame_num = 0;
  841. /* deassert P_reset, disable code transfer, deassert Active */
  842. btwrite(ZR36057_JPC_P_Reset, ZR36057_JPC);
  843. /* stop flushing the internal code buffer */
  844. btand(~ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
  845. /* enable code transfer */
  846. btor(ZR36057_JPC_CodTrnsEn, ZR36057_JPC);
  847. /* clear IRQs */
  848. btwrite(IRQ_MASK, ZR36057_ISR);
  849. /* enable the JPEG IRQs */
  850. btwrite(zr->card.jpeg_int |
  851. ZR36057_ICR_JPEGRepIRQ |
  852. ZR36057_ICR_IntPinEn,
  853. ZR36057_ICR);
  854. set_frame(zr, 0); // \FRAME
  855. /* set the JPEG codec guest ID */
  856. reg = (zr->card.gpcs[1] << ZR36057_JCGI_JPEGuestID) |
  857. (0 << ZR36057_JCGI_JPEGuestReg);
  858. btwrite(reg, ZR36057_JCGI);
  859. if (zr->card.video_vfe == CODEC_TYPE_ZR36016 &&
  860. zr->card.video_codec == CODEC_TYPE_ZR36050) {
  861. /* Enable processing on the ZR36016 */
  862. if (zr->vfe)
  863. zr36016_write(zr->vfe, 0, 1);
  864. /* load the address of the GO register in the ZR36050 latch */
  865. post_office_write(zr, 0, 0, 0);
  866. }
  867. /* assert Active */
  868. btor(ZR36057_JPC_Active, ZR36057_JPC);
  869. /* enable the Go generation */
  870. btor(ZR36057_JMC_Go_en, ZR36057_JMC);
  871. udelay(30);
  872. set_frame(zr, 1); // /FRAME
  873. dprintk(3, KERN_DEBUG "%s: jpeg_start\n", ZR_DEVNAME(zr));
  874. }
  875. void
  876. zr36057_enable_jpg (struct zoran *zr,
  877. enum zoran_codec_mode mode)
  878. {
  879. static int zero = 0;
  880. static int one = 1;
  881. struct vfe_settings cap;
  882. int field_size =
  883. zr->jpg_buffers.buffer_size / zr->jpg_settings.field_per_buff;
  884. zr->codec_mode = mode;
  885. cap.x = zr->jpg_settings.img_x;
  886. cap.y = zr->jpg_settings.img_y;
  887. cap.width = zr->jpg_settings.img_width;
  888. cap.height = zr->jpg_settings.img_height;
  889. cap.decimation =
  890. zr->jpg_settings.HorDcm | (zr->jpg_settings.VerDcm << 8);
  891. cap.quality = zr->jpg_settings.jpg_comp.quality;
  892. switch (mode) {
  893. case BUZ_MODE_MOTION_COMPRESS: {
  894. struct jpeg_app_marker app;
  895. struct jpeg_com_marker com;
  896. /* In motion compress mode, the decoder output must be enabled, and
  897. * the video bus direction set to input.
  898. */
  899. set_videobus_dir(zr, 0);
  900. decoder_command(zr, DECODER_ENABLE_OUTPUT, &one);
  901. encoder_command(zr, ENCODER_SET_INPUT, &zero);
  902. /* Take the JPEG codec and the VFE out of sleep */
  903. jpeg_codec_sleep(zr, 0);
  904. /* set JPEG app/com marker */
  905. app.appn = zr->jpg_settings.jpg_comp.APPn;
  906. app.len = zr->jpg_settings.jpg_comp.APP_len;
  907. memcpy(app.data, zr->jpg_settings.jpg_comp.APP_data, 60);
  908. zr->codec->control(zr->codec, CODEC_S_JPEG_APP_DATA,
  909. sizeof(struct jpeg_app_marker), &app);
  910. com.len = zr->jpg_settings.jpg_comp.COM_len;
  911. memcpy(com.data, zr->jpg_settings.jpg_comp.COM_data, 60);
  912. zr->codec->control(zr->codec, CODEC_S_JPEG_COM_DATA,
  913. sizeof(struct jpeg_com_marker), &com);
  914. /* Setup the JPEG codec */
  915. zr->codec->control(zr->codec, CODEC_S_JPEG_TDS_BYTE,
  916. sizeof(int), &field_size);
  917. zr->codec->set_video(zr->codec, zr->timing, &cap,
  918. &zr->card.vfe_pol);
  919. zr->codec->set_mode(zr->codec, CODEC_DO_COMPRESSION);
  920. /* Setup the VFE */
  921. if (zr->vfe) {
  922. zr->vfe->control(zr->vfe, CODEC_S_JPEG_TDS_BYTE,
  923. sizeof(int), &field_size);
  924. zr->vfe->set_video(zr->vfe, zr->timing, &cap,
  925. &zr->card.vfe_pol);
  926. zr->vfe->set_mode(zr->vfe, CODEC_DO_COMPRESSION);
  927. }
  928. init_jpeg_queue(zr);
  929. zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
  930. clear_interrupt_counters(zr);
  931. dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_COMPRESS)\n",
  932. ZR_DEVNAME(zr));
  933. break;
  934. }
  935. case BUZ_MODE_MOTION_DECOMPRESS:
  936. /* In motion decompression mode, the decoder output must be disabled, and
  937. * the video bus direction set to output.
  938. */
  939. decoder_command(zr, DECODER_ENABLE_OUTPUT, &zero);
  940. set_videobus_dir(zr, 1);
  941. encoder_command(zr, ENCODER_SET_INPUT, &one);
  942. /* Take the JPEG codec and the VFE out of sleep */
  943. jpeg_codec_sleep(zr, 0);
  944. /* Setup the VFE */
  945. if (zr->vfe) {
  946. zr->vfe->set_video(zr->vfe, zr->timing, &cap,
  947. &zr->card.vfe_pol);
  948. zr->vfe->set_mode(zr->vfe, CODEC_DO_EXPANSION);
  949. }
  950. /* Setup the JPEG codec */
  951. zr->codec->set_video(zr->codec, zr->timing, &cap,
  952. &zr->card.vfe_pol);
  953. zr->codec->set_mode(zr->codec, CODEC_DO_EXPANSION);
  954. init_jpeg_queue(zr);
  955. zr36057_set_jpg(zr, mode); // \P_Reset, ... Video param, FIFO
  956. clear_interrupt_counters(zr);
  957. dprintk(2, KERN_INFO "%s: enable_jpg(MOTION_DECOMPRESS)\n",
  958. ZR_DEVNAME(zr));
  959. break;
  960. case BUZ_MODE_IDLE:
  961. default:
  962. /* shut down processing */
  963. btand(~(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ),
  964. ZR36057_ICR);
  965. btwrite(zr->card.jpeg_int | ZR36057_ICR_JPEGRepIRQ,
  966. ZR36057_ISR);
  967. btand(~ZR36057_JMC_Go_en, ZR36057_JMC); // \Go_en
  968. msleep(50);
  969. set_videobus_dir(zr, 0);
  970. set_frame(zr, 1); // /FRAME
  971. btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR); // /CFlush
  972. btwrite(0, ZR36057_JPC); // \P_Reset,\CodTrnsEn,\Active
  973. btand(~ZR36057_JMC_VFIFO_FB, ZR36057_JMC);
  974. btand(~ZR36057_JMC_SyncMstr, ZR36057_JMC);
  975. jpeg_codec_reset(zr);
  976. jpeg_codec_sleep(zr, 1);
  977. zr36057_adjust_vfe(zr, mode);
  978. decoder_command(zr, DECODER_ENABLE_OUTPUT, &one);
  979. encoder_command(zr, ENCODER_SET_INPUT, &zero);
  980. dprintk(2, KERN_INFO "%s: enable_jpg(IDLE)\n", ZR_DEVNAME(zr));
  981. break;
  982. }
  983. }
  984. /* when this is called the spinlock must be held */
  985. void
  986. zoran_feed_stat_com (struct zoran *zr)
  987. {
  988. /* move frames from pending queue to DMA */
  989. int frame, i, max_stat_com;
  990. max_stat_com =
  991. (zr->jpg_settings.TmpDcm ==
  992. 1) ? BUZ_NUM_STAT_COM : (BUZ_NUM_STAT_COM >> 1);
  993. while ((zr->jpg_dma_head - zr->jpg_dma_tail) < max_stat_com &&
  994. zr->jpg_dma_head < zr->jpg_que_head) {
  995. frame = zr->jpg_pend[zr->jpg_dma_head & BUZ_MASK_FRAME];
  996. if (zr->jpg_settings.TmpDcm == 1) {
  997. /* fill 1 stat_com entry */
  998. i = (zr->jpg_dma_head -
  999. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1000. if (!(zr->stat_com[i] & cpu_to_le32(1)))
  1001. break;
  1002. zr->stat_com[i] =
  1003. cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
  1004. } else {
  1005. /* fill 2 stat_com entries */
  1006. i = ((zr->jpg_dma_head -
  1007. zr->jpg_err_shift) & 1) * 2;
  1008. if (!(zr->stat_com[i] & cpu_to_le32(1)))
  1009. break;
  1010. zr->stat_com[i] =
  1011. cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
  1012. zr->stat_com[i + 1] =
  1013. cpu_to_le32(zr->jpg_buffers.buffer[frame].frag_tab_bus);
  1014. }
  1015. zr->jpg_buffers.buffer[frame].state = BUZ_STATE_DMA;
  1016. zr->jpg_dma_head++;
  1017. }
  1018. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS)
  1019. zr->jpg_queued_num++;
  1020. }
  1021. /* when this is called the spinlock must be held */
  1022. static void
  1023. zoran_reap_stat_com (struct zoran *zr)
  1024. {
  1025. /* move frames from DMA queue to done queue */
  1026. int i;
  1027. u32 stat_com;
  1028. unsigned int seq;
  1029. unsigned int dif;
  1030. struct zoran_jpg_buffer *buffer;
  1031. int frame;
  1032. /* In motion decompress we don't have a hardware frame counter,
  1033. * we just count the interrupts here */
  1034. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
  1035. zr->jpg_seq_num++;
  1036. }
  1037. while (zr->jpg_dma_tail < zr->jpg_dma_head) {
  1038. if (zr->jpg_settings.TmpDcm == 1)
  1039. i = (zr->jpg_dma_tail -
  1040. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1041. else
  1042. i = ((zr->jpg_dma_tail -
  1043. zr->jpg_err_shift) & 1) * 2 + 1;
  1044. stat_com = le32_to_cpu(zr->stat_com[i]);
  1045. if ((stat_com & 1) == 0) {
  1046. return;
  1047. }
  1048. frame = zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
  1049. buffer = &zr->jpg_buffers.buffer[frame];
  1050. do_gettimeofday(&buffer->bs.timestamp);
  1051. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1052. buffer->bs.length = (stat_com & 0x7fffff) >> 1;
  1053. /* update sequence number with the help of the counter in stat_com */
  1054. seq = ((stat_com >> 24) + zr->jpg_err_seq) & 0xff;
  1055. dif = (seq - zr->jpg_seq_num) & 0xff;
  1056. zr->jpg_seq_num += dif;
  1057. } else {
  1058. buffer->bs.length = 0;
  1059. }
  1060. buffer->bs.seq =
  1061. zr->jpg_settings.TmpDcm ==
  1062. 2 ? (zr->jpg_seq_num >> 1) : zr->jpg_seq_num;
  1063. buffer->state = BUZ_STATE_DONE;
  1064. zr->jpg_dma_tail++;
  1065. }
  1066. }
  1067. static void
  1068. error_handler (struct zoran *zr,
  1069. u32 astat,
  1070. u32 stat)
  1071. {
  1072. /* This is JPEG error handling part */
  1073. if ((zr->codec_mode != BUZ_MODE_MOTION_COMPRESS) &&
  1074. (zr->codec_mode != BUZ_MODE_MOTION_DECOMPRESS)) {
  1075. //dprintk(1, KERN_ERR "%s: Internal error: error handling request in mode %d\n", ZR_DEVNAME(zr), zr->codec_mode);
  1076. return;
  1077. }
  1078. if ((stat & 1) == 0 &&
  1079. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS &&
  1080. zr->jpg_dma_tail - zr->jpg_que_tail >=
  1081. zr->jpg_buffers.num_buffers) {
  1082. /* No free buffers... */
  1083. zoran_reap_stat_com(zr);
  1084. zoran_feed_stat_com(zr);
  1085. wake_up_interruptible(&zr->jpg_capq);
  1086. zr->JPEG_missed = 0;
  1087. return;
  1088. }
  1089. if (zr->JPEG_error != 1) {
  1090. /*
  1091. * First entry: error just happened during normal operation
  1092. *
  1093. * In BUZ_MODE_MOTION_COMPRESS:
  1094. *
  1095. * Possible glitch in TV signal. In this case we should
  1096. * stop the codec and wait for good quality signal before
  1097. * restarting it to avoid further problems
  1098. *
  1099. * In BUZ_MODE_MOTION_DECOMPRESS:
  1100. *
  1101. * Bad JPEG frame: we have to mark it as processed (codec crashed
  1102. * and was not able to do it itself), and to remove it from queue.
  1103. */
  1104. btand(~ZR36057_JMC_Go_en, ZR36057_JMC);
  1105. udelay(1);
  1106. stat = stat | (post_office_read(zr, 7, 0) & 3) << 8;
  1107. btwrite(0, ZR36057_JPC);
  1108. btor(ZR36057_MCTCR_CFlush, ZR36057_MCTCR);
  1109. jpeg_codec_reset(zr);
  1110. jpeg_codec_sleep(zr, 1);
  1111. zr->JPEG_error = 1;
  1112. zr->num_errors++;
  1113. /* Report error */
  1114. if (*zr_debug > 1 && zr->num_errors <= 8) {
  1115. long frame;
  1116. frame =
  1117. zr->jpg_pend[zr->jpg_dma_tail & BUZ_MASK_FRAME];
  1118. printk(KERN_ERR
  1119. "%s: JPEG error stat=0x%08x(0x%08x) queue_state=%ld/%ld/%ld/%ld seq=%ld frame=%ld. Codec stopped. ",
  1120. ZR_DEVNAME(zr), stat, zr->last_isr,
  1121. zr->jpg_que_tail, zr->jpg_dma_tail,
  1122. zr->jpg_dma_head, zr->jpg_que_head,
  1123. zr->jpg_seq_num, frame);
  1124. printk("stat_com frames:");
  1125. {
  1126. int i, j;
  1127. for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
  1128. for (i = 0;
  1129. i < zr->jpg_buffers.num_buffers;
  1130. i++) {
  1131. if (le32_to_cpu(zr->stat_com[j]) ==
  1132. zr->jpg_buffers.
  1133. buffer[i].
  1134. frag_tab_bus) {
  1135. printk("% d->%d",
  1136. j, i);
  1137. }
  1138. }
  1139. }
  1140. printk("\n");
  1141. }
  1142. }
  1143. /* Find an entry in stat_com and rotate contents */
  1144. {
  1145. int i;
  1146. if (zr->jpg_settings.TmpDcm == 1)
  1147. i = (zr->jpg_dma_tail -
  1148. zr->jpg_err_shift) & BUZ_MASK_STAT_COM;
  1149. else
  1150. i = ((zr->jpg_dma_tail -
  1151. zr->jpg_err_shift) & 1) * 2;
  1152. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) {
  1153. /* Mimic zr36067 operation */
  1154. zr->stat_com[i] |= cpu_to_le32(1);
  1155. if (zr->jpg_settings.TmpDcm != 1)
  1156. zr->stat_com[i + 1] |= cpu_to_le32(1);
  1157. /* Refill */
  1158. zoran_reap_stat_com(zr);
  1159. zoran_feed_stat_com(zr);
  1160. wake_up_interruptible(&zr->jpg_capq);
  1161. /* Find an entry in stat_com again after refill */
  1162. if (zr->jpg_settings.TmpDcm == 1)
  1163. i = (zr->jpg_dma_tail -
  1164. zr->jpg_err_shift) &
  1165. BUZ_MASK_STAT_COM;
  1166. else
  1167. i = ((zr->jpg_dma_tail -
  1168. zr->jpg_err_shift) & 1) * 2;
  1169. }
  1170. if (i) {
  1171. /* Rotate stat_comm entries to make current entry first */
  1172. int j;
  1173. u32 bus_addr[BUZ_NUM_STAT_COM];
  1174. /* Here we are copying the stat_com array, which
  1175. * is already in little endian format, so
  1176. * no endian conversions here
  1177. */
  1178. memcpy(bus_addr, zr->stat_com,
  1179. sizeof(bus_addr));
  1180. for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
  1181. zr->stat_com[j] =
  1182. bus_addr[(i + j) &
  1183. BUZ_MASK_STAT_COM];
  1184. }
  1185. zr->jpg_err_shift += i;
  1186. zr->jpg_err_shift &= BUZ_MASK_STAT_COM;
  1187. }
  1188. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS)
  1189. zr->jpg_err_seq = zr->jpg_seq_num; /* + 1; */
  1190. }
  1191. }
  1192. /* Now the stat_comm buffer is ready for restart */
  1193. do {
  1194. int status, mode;
  1195. if (zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1196. decoder_command(zr, DECODER_GET_STATUS, &status);
  1197. mode = CODEC_DO_COMPRESSION;
  1198. } else {
  1199. status = 0;
  1200. mode = CODEC_DO_EXPANSION;
  1201. }
  1202. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1203. (status & DECODER_STATUS_GOOD)) {
  1204. /********** RESTART code *************/
  1205. jpeg_codec_reset(zr);
  1206. zr->codec->set_mode(zr->codec, mode);
  1207. zr36057_set_jpg(zr, zr->codec_mode);
  1208. jpeg_start(zr);
  1209. if (zr->num_errors <= 8)
  1210. dprintk(2, KERN_INFO "%s: Restart\n",
  1211. ZR_DEVNAME(zr));
  1212. zr->JPEG_missed = 0;
  1213. zr->JPEG_error = 2;
  1214. /********** End RESTART code ***********/
  1215. }
  1216. } while (0);
  1217. }
  1218. irqreturn_t
  1219. zoran_irq (int irq,
  1220. void *dev_id)
  1221. {
  1222. u32 stat, astat;
  1223. int count;
  1224. struct zoran *zr;
  1225. unsigned long flags;
  1226. zr = dev_id;
  1227. count = 0;
  1228. if (zr->testing) {
  1229. /* Testing interrupts */
  1230. spin_lock_irqsave(&zr->spinlock, flags);
  1231. while ((stat = count_reset_interrupt(zr))) {
  1232. if (count++ > 100) {
  1233. btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
  1234. dprintk(1,
  1235. KERN_ERR
  1236. "%s: IRQ lockup while testing, isr=0x%08x, cleared int mask\n",
  1237. ZR_DEVNAME(zr), stat);
  1238. wake_up_interruptible(&zr->test_q);
  1239. }
  1240. }
  1241. zr->last_isr = stat;
  1242. spin_unlock_irqrestore(&zr->spinlock, flags);
  1243. return IRQ_HANDLED;
  1244. }
  1245. spin_lock_irqsave(&zr->spinlock, flags);
  1246. while (1) {
  1247. /* get/clear interrupt status bits */
  1248. stat = count_reset_interrupt(zr);
  1249. astat = stat & IRQ_MASK;
  1250. if (!astat) {
  1251. break;
  1252. }
  1253. dprintk(4,
  1254. KERN_DEBUG
  1255. "zoran_irq: astat: 0x%08x, mask: 0x%08x\n",
  1256. astat, btread(ZR36057_ICR));
  1257. if (astat & zr->card.vsync_int) { // SW
  1258. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1259. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1260. /* count missed interrupts */
  1261. zr->JPEG_missed++;
  1262. }
  1263. //post_office_read(zr,1,0);
  1264. /* Interrupts may still happen when
  1265. * zr->v4l_memgrab_active is switched off.
  1266. * We simply ignore them */
  1267. if (zr->v4l_memgrab_active) {
  1268. /* A lot more checks should be here ... */
  1269. if ((btread(ZR36057_VSSFGR) &
  1270. ZR36057_VSSFGR_SnapShot) == 0)
  1271. dprintk(1,
  1272. KERN_WARNING
  1273. "%s: BuzIRQ with SnapShot off ???\n",
  1274. ZR_DEVNAME(zr));
  1275. if (zr->v4l_grab_frame != NO_GRAB_ACTIVE) {
  1276. /* There is a grab on a frame going on, check if it has finished */
  1277. if ((btread(ZR36057_VSSFGR) &
  1278. ZR36057_VSSFGR_FrameGrab) ==
  1279. 0) {
  1280. /* it is finished, notify the user */
  1281. zr->v4l_buffers.buffer[zr->v4l_grab_frame].state = BUZ_STATE_DONE;
  1282. zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.seq = zr->v4l_grab_seq;
  1283. do_gettimeofday(&zr->v4l_buffers.buffer[zr->v4l_grab_frame].bs.timestamp);
  1284. zr->v4l_grab_frame = NO_GRAB_ACTIVE;
  1285. zr->v4l_pend_tail++;
  1286. }
  1287. }
  1288. if (zr->v4l_grab_frame == NO_GRAB_ACTIVE)
  1289. wake_up_interruptible(&zr->v4l_capq);
  1290. /* Check if there is another grab queued */
  1291. if (zr->v4l_grab_frame == NO_GRAB_ACTIVE &&
  1292. zr->v4l_pend_tail != zr->v4l_pend_head) {
  1293. int frame = zr->v4l_pend[zr->v4l_pend_tail &
  1294. V4L_MASK_FRAME];
  1295. u32 reg;
  1296. zr->v4l_grab_frame = frame;
  1297. /* Set zr36057 video front end and enable video */
  1298. /* Buffer address */
  1299. reg =
  1300. zr->v4l_buffers.buffer[frame].
  1301. fbuffer_bus;
  1302. btwrite(reg, ZR36057_VDTR);
  1303. if (zr->v4l_settings.height >
  1304. BUZ_MAX_HEIGHT / 2)
  1305. reg +=
  1306. zr->v4l_settings.
  1307. bytesperline;
  1308. btwrite(reg, ZR36057_VDBR);
  1309. /* video stride, status, and frame grab register */
  1310. reg = 0;
  1311. if (zr->v4l_settings.height >
  1312. BUZ_MAX_HEIGHT / 2)
  1313. reg +=
  1314. zr->v4l_settings.
  1315. bytesperline;
  1316. reg =
  1317. (reg <<
  1318. ZR36057_VSSFGR_DispStride);
  1319. reg |= ZR36057_VSSFGR_VidOvf;
  1320. reg |= ZR36057_VSSFGR_SnapShot;
  1321. reg |= ZR36057_VSSFGR_FrameGrab;
  1322. btwrite(reg, ZR36057_VSSFGR);
  1323. btor(ZR36057_VDCR_VidEn,
  1324. ZR36057_VDCR);
  1325. }
  1326. }
  1327. /* even if we don't grab, we do want to increment
  1328. * the sequence counter to see lost frames */
  1329. zr->v4l_grab_seq++;
  1330. }
  1331. #if (IRQ_MASK & ZR36057_ISR_CodRepIRQ)
  1332. if (astat & ZR36057_ISR_CodRepIRQ) {
  1333. zr->intr_counter_CodRepIRQ++;
  1334. IDEBUG(printk
  1335. (KERN_DEBUG "%s: ZR36057_ISR_CodRepIRQ\n",
  1336. ZR_DEVNAME(zr)));
  1337. btand(~ZR36057_ICR_CodRepIRQ, ZR36057_ICR);
  1338. }
  1339. #endif /* (IRQ_MASK & ZR36057_ISR_CodRepIRQ) */
  1340. #if (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ)
  1341. if (astat & ZR36057_ISR_JPEGRepIRQ) {
  1342. if (zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS ||
  1343. zr->codec_mode == BUZ_MODE_MOTION_COMPRESS) {
  1344. if (*zr_debug > 1 &&
  1345. (!zr->frame_num || zr->JPEG_error)) {
  1346. printk(KERN_INFO
  1347. "%s: first frame ready: state=0x%08x odd_even=%d field_per_buff=%d delay=%d\n",
  1348. ZR_DEVNAME(zr), stat,
  1349. zr->jpg_settings.odd_even,
  1350. zr->jpg_settings.
  1351. field_per_buff,
  1352. zr->JPEG_missed);
  1353. {
  1354. char sc[] = "0000";
  1355. char sv[5];
  1356. int i;
  1357. strcpy(sv, sc);
  1358. for (i = 0; i < 4; i++) {
  1359. if (le32_to_cpu(zr->stat_com[i]) & 1)
  1360. sv[i] = '1';
  1361. }
  1362. sv[4] = 0;
  1363. printk(KERN_INFO
  1364. "%s: stat_com=%s queue_state=%ld/%ld/%ld/%ld\n",
  1365. ZR_DEVNAME(zr), sv,
  1366. zr->jpg_que_tail,
  1367. zr->jpg_dma_tail,
  1368. zr->jpg_dma_head,
  1369. zr->jpg_que_head);
  1370. }
  1371. } else {
  1372. if (zr->JPEG_missed > zr->JPEG_max_missed) // Get statistics
  1373. zr->JPEG_max_missed =
  1374. zr->JPEG_missed;
  1375. if (zr->JPEG_missed <
  1376. zr->JPEG_min_missed)
  1377. zr->JPEG_min_missed =
  1378. zr->JPEG_missed;
  1379. }
  1380. if (*zr_debug > 2 && zr->frame_num < 6) {
  1381. int i;
  1382. printk("%s: seq=%ld stat_com:",
  1383. ZR_DEVNAME(zr), zr->jpg_seq_num);
  1384. for (i = 0; i < 4; i++) {
  1385. printk(" %08x",
  1386. le32_to_cpu(zr->stat_com[i]));
  1387. }
  1388. printk("\n");
  1389. }
  1390. zr->frame_num++;
  1391. zr->JPEG_missed = 0;
  1392. zr->JPEG_error = 0;
  1393. zoran_reap_stat_com(zr);
  1394. zoran_feed_stat_com(zr);
  1395. wake_up_interruptible(&zr->jpg_capq);
  1396. } /*else {
  1397. dprintk(1,
  1398. KERN_ERR
  1399. "%s: JPEG interrupt while not in motion (de)compress mode!\n",
  1400. ZR_DEVNAME(zr));
  1401. }*/
  1402. }
  1403. #endif /* (IRQ_MASK & ZR36057_ISR_JPEGRepIRQ) */
  1404. /* DATERR, too many fields missed, error processing */
  1405. if ((astat & zr->card.jpeg_int) ||
  1406. zr->JPEG_missed > 25 ||
  1407. zr->JPEG_error == 1 ||
  1408. ((zr->codec_mode == BUZ_MODE_MOTION_DECOMPRESS) &&
  1409. (zr->frame_num & (zr->JPEG_missed >
  1410. zr->jpg_settings.field_per_buff)))) {
  1411. error_handler(zr, astat, stat);
  1412. }
  1413. count++;
  1414. if (count > 10) {
  1415. dprintk(2, KERN_WARNING "%s: irq loop %d\n",
  1416. ZR_DEVNAME(zr), count);
  1417. if (count > 20) {
  1418. btand(~ZR36057_ICR_IntPinEn, ZR36057_ICR);
  1419. dprintk(2,
  1420. KERN_ERR
  1421. "%s: IRQ lockup, cleared int mask\n",
  1422. ZR_DEVNAME(zr));
  1423. break;
  1424. }
  1425. }
  1426. zr->last_isr = stat;
  1427. }
  1428. spin_unlock_irqrestore(&zr->spinlock, flags);
  1429. return IRQ_HANDLED;
  1430. }
  1431. void
  1432. zoran_set_pci_master (struct zoran *zr,
  1433. int set_master)
  1434. {
  1435. if (set_master) {
  1436. pci_set_master(zr->pci_dev);
  1437. } else {
  1438. u16 command;
  1439. pci_read_config_word(zr->pci_dev, PCI_COMMAND, &command);
  1440. command &= ~PCI_COMMAND_MASTER;
  1441. pci_write_config_word(zr->pci_dev, PCI_COMMAND, command);
  1442. }
  1443. }
  1444. void
  1445. zoran_init_hardware (struct zoran *zr)
  1446. {
  1447. int j, zero = 0;
  1448. /* Enable bus-mastering */
  1449. zoran_set_pci_master(zr, 1);
  1450. /* Initialize the board */
  1451. if (zr->card.init) {
  1452. zr->card.init(zr);
  1453. }
  1454. j = zr->card.input[zr->input].muxsel;
  1455. decoder_command(zr, 0, NULL);
  1456. decoder_command(zr, DECODER_SET_NORM, &zr->norm);
  1457. decoder_command(zr, DECODER_SET_INPUT, &j);
  1458. encoder_command(zr, 0, NULL);
  1459. encoder_command(zr, ENCODER_SET_NORM, &zr->norm);
  1460. encoder_command(zr, ENCODER_SET_INPUT, &zero);
  1461. /* toggle JPEG codec sleep to sync PLL */
  1462. jpeg_codec_sleep(zr, 1);
  1463. jpeg_codec_sleep(zr, 0);
  1464. /* set individual interrupt enables (without GIRQ1)
  1465. * but don't global enable until zoran_open() */
  1466. //btwrite(IRQ_MASK & ~ZR36057_ISR_GIRQ1, ZR36057_ICR); // SW
  1467. // It looks like using only JPEGRepIRQEn is not always reliable,
  1468. // may be when JPEG codec crashes it won't generate IRQ? So,
  1469. /*CP*/ // btwrite(IRQ_MASK, ZR36057_ICR); // Enable Vsync interrupts too. SM WHY ? LP
  1470. zr36057_init_vfe(zr);
  1471. zr36057_enable_jpg(zr, BUZ_MODE_IDLE);
  1472. btwrite(IRQ_MASK, ZR36057_ISR); // Clears interrupts
  1473. }
  1474. void
  1475. zr36057_restart (struct zoran *zr)
  1476. {
  1477. btwrite(0, ZR36057_SPGPPCR);
  1478. mdelay(1);
  1479. btor(ZR36057_SPGPPCR_SoftReset, ZR36057_SPGPPCR);
  1480. mdelay(1);
  1481. /* assert P_Reset */
  1482. btwrite(0, ZR36057_JPC);
  1483. /* set up GPIO direction - all output */
  1484. btwrite(ZR36057_SPGPPCR_SoftReset | 0, ZR36057_SPGPPCR);
  1485. /* set up GPIO pins and guest bus timing */
  1486. btwrite((0x81 << 24) | 0x8888, ZR36057_GPPGCR1);
  1487. }
  1488. /*
  1489. * initialize video front end
  1490. */
  1491. static void
  1492. zr36057_init_vfe (struct zoran *zr)
  1493. {
  1494. u32 reg;
  1495. reg = btread(ZR36057_VFESPFR);
  1496. reg |= ZR36057_VFESPFR_LittleEndian;
  1497. reg &= ~ZR36057_VFESPFR_VCLKPol;
  1498. reg |= ZR36057_VFESPFR_ExtFl;
  1499. reg |= ZR36057_VFESPFR_TopField;
  1500. btwrite(reg, ZR36057_VFESPFR);
  1501. reg = btread(ZR36057_VDCR);
  1502. if (pci_pci_problems & PCIPCI_TRITON)
  1503. // || zr->revision < 1) // Revision 1 has also Triton support
  1504. reg &= ~ZR36057_VDCR_Triton;
  1505. else
  1506. reg |= ZR36057_VDCR_Triton;
  1507. btwrite(reg, ZR36057_VDCR);
  1508. }
  1509. /*
  1510. * Interface to decoder and encoder chips using i2c bus
  1511. */
  1512. int
  1513. decoder_command (struct zoran *zr,
  1514. int cmd,
  1515. void *data)
  1516. {
  1517. if (zr->decoder == NULL)
  1518. return -EIO;
  1519. if (zr->card.type == LML33 &&
  1520. (cmd == DECODER_SET_NORM || DECODER_SET_INPUT)) {
  1521. int res;
  1522. // Bt819 needs to reset its FIFO buffer using #FRST pin and
  1523. // LML33 card uses GPIO(7) for that.
  1524. GPIO(zr, 7, 0);
  1525. res = zr->decoder->driver->command(zr->decoder, cmd, data);
  1526. // Pull #FRST high.
  1527. GPIO(zr, 7, 1);
  1528. return res;
  1529. } else
  1530. return zr->decoder->driver->command(zr->decoder, cmd,
  1531. data);
  1532. }
  1533. int
  1534. encoder_command (struct zoran *zr,
  1535. int cmd,
  1536. void *data)
  1537. {
  1538. if (zr->encoder == NULL)
  1539. return -1;
  1540. return zr->encoder->driver->command(zr->encoder, cmd, data);
  1541. }