cx88-dvb.c 26 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #ifdef HAVE_VP3054_I2C
  36. # include "cx88-vp3054-i2c.h"
  37. #endif
  38. #include "zl10353.h"
  39. #include "cx22702.h"
  40. #include "or51132.h"
  41. #include "lgdt330x.h"
  42. #include "lg_h06xf.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  47. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  48. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  49. MODULE_LICENSE("GPL");
  50. static unsigned int debug = 0;
  51. module_param(debug, int, 0644);
  52. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  53. #define dprintk(level,fmt, arg...) if (debug >= level) \
  54. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  55. /* ------------------------------------------------------------------ */
  56. static int dvb_buf_setup(struct videobuf_queue *q,
  57. unsigned int *count, unsigned int *size)
  58. {
  59. struct cx8802_dev *dev = q->priv_data;
  60. dev->ts_packet_size = 188 * 4;
  61. dev->ts_packet_count = 32;
  62. *size = dev->ts_packet_size * dev->ts_packet_count;
  63. *count = 32;
  64. return 0;
  65. }
  66. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  67. enum v4l2_field field)
  68. {
  69. struct cx8802_dev *dev = q->priv_data;
  70. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  71. }
  72. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  73. {
  74. struct cx8802_dev *dev = q->priv_data;
  75. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  76. }
  77. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  78. {
  79. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  80. }
  81. static struct videobuf_queue_ops dvb_qops = {
  82. .buf_setup = dvb_buf_setup,
  83. .buf_prepare = dvb_buf_prepare,
  84. .buf_queue = dvb_buf_queue,
  85. .buf_release = dvb_buf_release,
  86. };
  87. /* ------------------------------------------------------------------ */
  88. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  89. {
  90. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  91. static u8 reset [] = { RESET, 0x80 };
  92. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  93. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  94. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  95. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  96. mt352_write(fe, clock_config, sizeof(clock_config));
  97. udelay(200);
  98. mt352_write(fe, reset, sizeof(reset));
  99. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  100. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  101. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  102. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  103. return 0;
  104. }
  105. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  106. {
  107. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  108. static u8 reset [] = { RESET, 0x80 };
  109. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  110. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  111. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  112. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  113. mt352_write(fe, clock_config, sizeof(clock_config));
  114. udelay(200);
  115. mt352_write(fe, reset, sizeof(reset));
  116. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  117. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  118. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  119. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  120. return 0;
  121. }
  122. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  123. {
  124. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  125. static u8 reset [] = { 0x50, 0x80 };
  126. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  127. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  128. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  129. static u8 dntv_extra[] = { 0xB5, 0x7A };
  130. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  131. mt352_write(fe, clock_config, sizeof(clock_config));
  132. udelay(2000);
  133. mt352_write(fe, reset, sizeof(reset));
  134. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  135. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  136. udelay(2000);
  137. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static struct mt352_config dvico_fusionhdtv = {
  142. .demod_address = 0x0f,
  143. .demod_init = dvico_fusionhdtv_demod_init,
  144. };
  145. static struct mt352_config dntv_live_dvbt_config = {
  146. .demod_address = 0x0f,
  147. .demod_init = dntv_live_dvbt_demod_init,
  148. };
  149. static struct mt352_config dvico_fusionhdtv_dual = {
  150. .demod_address = 0x0f,
  151. .demod_init = dvico_dual_demod_init,
  152. };
  153. #ifdef HAVE_VP3054_I2C
  154. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  155. {
  156. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  157. static u8 reset [] = { 0x50, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  159. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  160. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  161. static u8 dntv_extra[] = { 0xB5, 0x7A };
  162. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  163. mt352_write(fe, clock_config, sizeof(clock_config));
  164. udelay(2000);
  165. mt352_write(fe, reset, sizeof(reset));
  166. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  167. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  168. udelay(2000);
  169. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  170. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  171. return 0;
  172. }
  173. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  174. {
  175. struct cx8802_dev *dev= fe->dvb->priv;
  176. /* this message is to set up ATC and ALC */
  177. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  178. struct i2c_msg msg =
  179. { .addr = dev->core->pll_addr, .flags = 0,
  180. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  181. int err;
  182. if (fe->ops.i2c_gate_ctrl)
  183. fe->ops.i2c_gate_ctrl(fe, 1);
  184. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  185. if (err < 0)
  186. return err;
  187. else
  188. return -EREMOTEIO;
  189. }
  190. return 0;
  191. }
  192. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  193. struct dvb_frontend_parameters* params)
  194. {
  195. struct cx8802_dev *dev= fe->dvb->priv;
  196. u8 buf[4];
  197. struct i2c_msg msg =
  198. { .addr = dev->core->pll_addr, .flags = 0,
  199. .buf = buf, .len = 4 };
  200. int err;
  201. /* Switch PLL to DVB mode */
  202. err = philips_fmd1216_pll_init(fe);
  203. if (err)
  204. return err;
  205. /* Tune PLL */
  206. dvb_pll_configure(dev->core->pll_desc, buf,
  207. params->frequency,
  208. params->u.ofdm.bandwidth);
  209. if (fe->ops.i2c_gate_ctrl)
  210. fe->ops.i2c_gate_ctrl(fe, 1);
  211. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  212. printk(KERN_WARNING "cx88-dvb: %s error "
  213. "(addr %02x <- %02x, err = %i)\n",
  214. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  215. if (err < 0)
  216. return err;
  217. else
  218. return -EREMOTEIO;
  219. }
  220. return 0;
  221. }
  222. static struct mt352_config dntv_live_dvbt_pro_config = {
  223. .demod_address = 0x0f,
  224. .no_tuner = 1,
  225. .demod_init = dntv_live_dvbt_pro_demod_init,
  226. };
  227. #endif
  228. static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
  229. struct dvb_frontend_parameters *params)
  230. {
  231. u8 pllbuf[4];
  232. struct cx8802_dev *dev= fe->dvb->priv;
  233. struct i2c_msg msg =
  234. { .addr = dev->core->pll_addr, .flags = 0,
  235. .buf = pllbuf, .len = 4 };
  236. int err;
  237. dvb_pll_configure(dev->core->pll_desc, pllbuf,
  238. params->frequency,
  239. params->u.ofdm.bandwidth);
  240. if (fe->ops.i2c_gate_ctrl)
  241. fe->ops.i2c_gate_ctrl(fe, 1);
  242. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  243. printk(KERN_WARNING "cx88-dvb: %s error "
  244. "(addr %02x <- %02x, err = %i)\n",
  245. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  246. if (err < 0)
  247. return err;
  248. else
  249. return -EREMOTEIO;
  250. }
  251. return 0;
  252. }
  253. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  254. .demod_address = 0x0f,
  255. .no_tuner = 1,
  256. };
  257. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  258. .demod_address = 0x0f,
  259. };
  260. static struct cx22702_config connexant_refboard_config = {
  261. .demod_address = 0x43,
  262. .output_mode = CX22702_SERIAL_OUTPUT,
  263. };
  264. static struct cx22702_config hauppauge_novat_config = {
  265. .demod_address = 0x43,
  266. .output_mode = CX22702_SERIAL_OUTPUT,
  267. };
  268. static struct cx22702_config hauppauge_hvr1100_config = {
  269. .demod_address = 0x63,
  270. .output_mode = CX22702_SERIAL_OUTPUT,
  271. };
  272. static struct cx22702_config hauppauge_hvr1300_config = {
  273. .demod_address = 0x63,
  274. .output_mode = CX22702_SERIAL_OUTPUT,
  275. };
  276. static struct cx22702_config hauppauge_hvr3000_config = {
  277. .demod_address = 0x63,
  278. .output_mode = CX22702_SERIAL_OUTPUT,
  279. };
  280. static int or51132_set_ts_param(struct dvb_frontend* fe,
  281. int is_punctured)
  282. {
  283. struct cx8802_dev *dev= fe->dvb->priv;
  284. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  285. return 0;
  286. }
  287. static struct or51132_config pchdtv_hd3000 = {
  288. .demod_address = 0x15,
  289. .set_ts_params = or51132_set_ts_param,
  290. };
  291. static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
  292. struct dvb_frontend_parameters* params)
  293. {
  294. /* FIXME make this routine use the tuner-simple code.
  295. * It could probably be shared with a number of ATSC
  296. * frontends. Many share the same tuner with analog TV. */
  297. struct cx8802_dev *dev= fe->dvb->priv;
  298. struct cx88_core *core = dev->core;
  299. u8 buf[4];
  300. struct i2c_msg msg =
  301. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  302. int err;
  303. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  304. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  305. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  306. if (fe->ops.i2c_gate_ctrl)
  307. fe->ops.i2c_gate_ctrl(fe, 1);
  308. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  309. printk(KERN_WARNING "cx88-dvb: %s error "
  310. "(addr %02x <- %02x, err = %i)\n",
  311. __FUNCTION__, buf[0], buf[1], err);
  312. if (err < 0)
  313. return err;
  314. else
  315. return -EREMOTEIO;
  316. }
  317. return 0;
  318. }
  319. static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
  320. struct dvb_frontend_parameters* params)
  321. {
  322. struct cx8802_dev *dev= fe->dvb->priv;
  323. struct cx88_core *core = dev->core;
  324. /* Put the analog decoder in standby to keep it quiet */
  325. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  326. return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
  327. }
  328. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  329. {
  330. struct cx8802_dev *dev= fe->dvb->priv;
  331. struct cx88_core *core = dev->core;
  332. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  333. if (index == 0)
  334. cx_clear(MO_GP0_IO, 8);
  335. else
  336. cx_set(MO_GP0_IO, 8);
  337. return 0;
  338. }
  339. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  340. {
  341. struct cx8802_dev *dev= fe->dvb->priv;
  342. if (is_punctured)
  343. dev->ts_gen_cntrl |= 0x04;
  344. else
  345. dev->ts_gen_cntrl &= ~0x04;
  346. return 0;
  347. }
  348. static struct lgdt330x_config fusionhdtv_3_gold = {
  349. .demod_address = 0x0e,
  350. .demod_chip = LGDT3302,
  351. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  352. .set_ts_params = lgdt330x_set_ts_param,
  353. };
  354. static struct lgdt330x_config fusionhdtv_5_gold = {
  355. .demod_address = 0x0e,
  356. .demod_chip = LGDT3303,
  357. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  358. .set_ts_params = lgdt330x_set_ts_param,
  359. };
  360. static struct lgdt330x_config pchdtv_hd5500 = {
  361. .demod_address = 0x59,
  362. .demod_chip = LGDT3303,
  363. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  364. .set_ts_params = lgdt330x_set_ts_param,
  365. };
  366. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  367. int is_punctured)
  368. {
  369. struct cx8802_dev *dev= fe->dvb->priv;
  370. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  371. return 0;
  372. }
  373. static int nxt200x_set_pll_input(u8* buf, int input)
  374. {
  375. if (input)
  376. buf[3] |= 0x08;
  377. else
  378. buf[3] &= ~0x08;
  379. return 0;
  380. }
  381. static struct nxt200x_config ati_hdtvwonder = {
  382. .demod_address = 0x0a,
  383. .set_pll_input = nxt200x_set_pll_input,
  384. .set_ts_params = nxt200x_set_ts_param,
  385. };
  386. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  387. int is_punctured)
  388. {
  389. struct cx8802_dev *dev= fe->dvb->priv;
  390. dev->ts_gen_cntrl = 0x02;
  391. return 0;
  392. }
  393. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  394. fe_sec_voltage_t voltage)
  395. {
  396. struct cx8802_dev *dev= fe->dvb->priv;
  397. struct cx88_core *core = dev->core;
  398. if (voltage == SEC_VOLTAGE_OFF) {
  399. cx_write(MO_GP0_IO, 0x000006fb);
  400. } else {
  401. cx_write(MO_GP0_IO, 0x000006f9);
  402. }
  403. if (core->prev_set_voltage)
  404. return core->prev_set_voltage(fe, voltage);
  405. return 0;
  406. }
  407. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  408. fe_sec_voltage_t voltage)
  409. {
  410. struct cx8802_dev *dev= fe->dvb->priv;
  411. struct cx88_core *core = dev->core;
  412. if (voltage == SEC_VOLTAGE_OFF) {
  413. dprintk(1,"LNB Voltage OFF\n");
  414. cx_write(MO_GP0_IO, 0x0000efff);
  415. }
  416. if (core->prev_set_voltage)
  417. return core->prev_set_voltage(fe, voltage);
  418. return 0;
  419. }
  420. static struct cx24123_config geniatech_dvbs_config = {
  421. .demod_address = 0x55,
  422. .set_ts_params = cx24123_set_ts_param,
  423. };
  424. static struct cx24123_config hauppauge_novas_config = {
  425. .demod_address = 0x55,
  426. .set_ts_params = cx24123_set_ts_param,
  427. };
  428. static struct cx24123_config kworld_dvbs_100_config = {
  429. .demod_address = 0x15,
  430. .set_ts_params = cx24123_set_ts_param,
  431. .lnb_polarity = 1,
  432. };
  433. static int dvb_register(struct cx8802_dev *dev)
  434. {
  435. /* init struct videobuf_dvb */
  436. dev->dvb.name = dev->core->name;
  437. dev->ts_gen_cntrl = 0x0c;
  438. /* init frontend */
  439. switch (dev->core->board) {
  440. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  441. dev->dvb.frontend = dvb_attach(cx22702_attach,
  442. &hauppauge_novat_config,
  443. &dev->core->i2c_adap);
  444. if (dev->dvb.frontend != NULL) {
  445. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  446. &dev->core->i2c_adap,
  447. &dvb_pll_thomson_dtt759x);
  448. }
  449. break;
  450. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  451. case CX88_BOARD_CONEXANT_DVB_T1:
  452. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  453. case CX88_BOARD_WINFAST_DTV1000:
  454. dev->dvb.frontend = dvb_attach(cx22702_attach,
  455. &connexant_refboard_config,
  456. &dev->core->i2c_adap);
  457. if (dev->dvb.frontend != NULL) {
  458. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  459. &dev->core->i2c_adap,
  460. &dvb_pll_thomson_dtt7579);
  461. }
  462. break;
  463. case CX88_BOARD_WINFAST_DTV2000H:
  464. case CX88_BOARD_HAUPPAUGE_HVR1100:
  465. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  466. dev->dvb.frontend = dvb_attach(cx22702_attach,
  467. &hauppauge_hvr1100_config,
  468. &dev->core->i2c_adap);
  469. if (dev->dvb.frontend != NULL) {
  470. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  471. &dev->core->i2c_adap,
  472. &dvb_pll_fmd1216me);
  473. }
  474. break;
  475. case CX88_BOARD_HAUPPAUGE_HVR1300:
  476. dev->dvb.frontend = dvb_attach(cx22702_attach,
  477. &hauppauge_hvr1300_config,
  478. &dev->core->i2c_adap);
  479. if (dev->dvb.frontend != NULL) {
  480. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  481. &dev->core->i2c_adap,
  482. &dvb_pll_fmd1216me);
  483. }
  484. break;
  485. case CX88_BOARD_HAUPPAUGE_HVR3000:
  486. dev->dvb.frontend = dvb_attach(cx22702_attach,
  487. &hauppauge_hvr3000_config,
  488. &dev->core->i2c_adap);
  489. if (dev->dvb.frontend != NULL) {
  490. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  491. &dev->core->i2c_adap,
  492. &dvb_pll_fmd1216me);
  493. }
  494. break;
  495. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  496. dev->dvb.frontend = dvb_attach(mt352_attach,
  497. &dvico_fusionhdtv,
  498. &dev->core->i2c_adap);
  499. if (dev->dvb.frontend != NULL) {
  500. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  501. NULL, &dvb_pll_thomson_dtt7579);
  502. break;
  503. }
  504. /* ZL10353 replaces MT352 on later cards */
  505. dev->dvb.frontend = dvb_attach(zl10353_attach,
  506. &dvico_fusionhdtv_plus_v1_1,
  507. &dev->core->i2c_adap);
  508. if (dev->dvb.frontend != NULL) {
  509. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  510. NULL, &dvb_pll_thomson_dtt7579);
  511. }
  512. break;
  513. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  514. /* The tin box says DEE1601, but it seems to be DTT7579
  515. * compatible, with a slightly different MT352 AGC gain. */
  516. dev->dvb.frontend = dvb_attach(mt352_attach,
  517. &dvico_fusionhdtv_dual,
  518. &dev->core->i2c_adap);
  519. if (dev->dvb.frontend != NULL) {
  520. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  521. NULL, &dvb_pll_thomson_dtt7579);
  522. break;
  523. }
  524. /* ZL10353 replaces MT352 on later cards */
  525. dev->dvb.frontend = dvb_attach(zl10353_attach,
  526. &dvico_fusionhdtv_plus_v1_1,
  527. &dev->core->i2c_adap);
  528. if (dev->dvb.frontend != NULL) {
  529. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  530. NULL, &dvb_pll_thomson_dtt7579);
  531. }
  532. break;
  533. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  534. dev->dvb.frontend = dvb_attach(mt352_attach,
  535. &dvico_fusionhdtv,
  536. &dev->core->i2c_adap);
  537. if (dev->dvb.frontend != NULL) {
  538. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  539. NULL, &dvb_pll_lg_z201);
  540. }
  541. break;
  542. case CX88_BOARD_KWORLD_DVB_T:
  543. case CX88_BOARD_DNTV_LIVE_DVB_T:
  544. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  545. dev->dvb.frontend = dvb_attach(mt352_attach,
  546. &dntv_live_dvbt_config,
  547. &dev->core->i2c_adap);
  548. if (dev->dvb.frontend != NULL) {
  549. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  550. NULL, &dvb_pll_unknown_1);
  551. }
  552. break;
  553. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  554. #ifdef HAVE_VP3054_I2C
  555. dev->core->pll_addr = 0x61;
  556. dev->core->pll_desc = &dvb_pll_fmd1216me;
  557. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  558. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  559. if (dev->dvb.frontend != NULL) {
  560. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  561. }
  562. #else
  563. printk("%s: built without vp3054 support\n", dev->core->name);
  564. #endif
  565. break;
  566. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  567. dev->core->pll_addr = 0x61;
  568. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  569. dev->dvb.frontend = dvb_attach(zl10353_attach,
  570. &dvico_fusionhdtv_hybrid,
  571. &dev->core->i2c_adap);
  572. if (dev->dvb.frontend != NULL) {
  573. dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
  574. }
  575. break;
  576. case CX88_BOARD_PCHDTV_HD3000:
  577. dev->dvb.frontend = dvb_attach(or51132_attach,
  578. &pchdtv_hd3000,
  579. &dev->core->i2c_adap);
  580. if (dev->dvb.frontend != NULL) {
  581. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  582. &dev->core->i2c_adap,
  583. &dvb_pll_thomson_dtt761x);
  584. }
  585. break;
  586. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  587. dev->ts_gen_cntrl = 0x08;
  588. {
  589. /* Do a hardware reset of chip before using it. */
  590. struct cx88_core *core = dev->core;
  591. cx_clear(MO_GP0_IO, 1);
  592. mdelay(100);
  593. cx_set(MO_GP0_IO, 1);
  594. mdelay(200);
  595. /* Select RF connector callback */
  596. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  597. dev->core->pll_addr = 0x61;
  598. dev->core->pll_desc = &dvb_pll_microtune_4042;
  599. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  600. &fusionhdtv_3_gold,
  601. &dev->core->i2c_adap);
  602. if (dev->dvb.frontend != NULL) {
  603. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  604. }
  605. }
  606. break;
  607. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  608. dev->ts_gen_cntrl = 0x08;
  609. {
  610. /* Do a hardware reset of chip before using it. */
  611. struct cx88_core *core = dev->core;
  612. cx_clear(MO_GP0_IO, 1);
  613. mdelay(100);
  614. cx_set(MO_GP0_IO, 9);
  615. mdelay(200);
  616. dev->core->pll_addr = 0x61;
  617. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  618. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  619. &fusionhdtv_3_gold,
  620. &dev->core->i2c_adap);
  621. if (dev->dvb.frontend != NULL) {
  622. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  623. }
  624. }
  625. break;
  626. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  627. dev->ts_gen_cntrl = 0x08;
  628. {
  629. /* Do a hardware reset of chip before using it. */
  630. struct cx88_core *core = dev->core;
  631. cx_clear(MO_GP0_IO, 1);
  632. mdelay(100);
  633. cx_set(MO_GP0_IO, 1);
  634. mdelay(200);
  635. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  636. &fusionhdtv_5_gold,
  637. &dev->core->i2c_adap);
  638. if (dev->dvb.frontend != NULL) {
  639. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  640. }
  641. }
  642. break;
  643. case CX88_BOARD_PCHDTV_HD5500:
  644. dev->ts_gen_cntrl = 0x08;
  645. {
  646. /* Do a hardware reset of chip before using it. */
  647. struct cx88_core *core = dev->core;
  648. cx_clear(MO_GP0_IO, 1);
  649. mdelay(100);
  650. cx_set(MO_GP0_IO, 1);
  651. mdelay(200);
  652. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  653. &pchdtv_hd5500,
  654. &dev->core->i2c_adap);
  655. if (dev->dvb.frontend != NULL) {
  656. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  657. }
  658. }
  659. break;
  660. case CX88_BOARD_ATI_HDTVWONDER:
  661. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  662. &ati_hdtvwonder,
  663. &dev->core->i2c_adap);
  664. if (dev->dvb.frontend != NULL) {
  665. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  666. NULL, &dvb_pll_tuv1236d);
  667. }
  668. break;
  669. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  670. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  671. dev->dvb.frontend = dvb_attach(cx24123_attach,
  672. &hauppauge_novas_config,
  673. &dev->core->i2c_adap);
  674. if (dev->dvb.frontend) {
  675. dvb_attach(isl6421_attach, dev->dvb.frontend,
  676. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  677. }
  678. break;
  679. case CX88_BOARD_KWORLD_DVBS_100:
  680. dev->dvb.frontend = dvb_attach(cx24123_attach,
  681. &kworld_dvbs_100_config,
  682. &dev->core->i2c_adap);
  683. if (dev->dvb.frontend) {
  684. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  685. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  686. }
  687. break;
  688. case CX88_BOARD_GENIATECH_DVBS:
  689. dev->dvb.frontend = dvb_attach(cx24123_attach,
  690. &geniatech_dvbs_config,
  691. &dev->core->i2c_adap);
  692. if (dev->dvb.frontend) {
  693. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  694. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  695. }
  696. break;
  697. default:
  698. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  699. dev->core->name);
  700. break;
  701. }
  702. if (NULL == dev->dvb.frontend) {
  703. printk("%s: frontend initialization failed\n",dev->core->name);
  704. return -1;
  705. }
  706. if (dev->core->pll_desc) {
  707. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  708. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  709. }
  710. /* Put the analog decoder in standby to keep it quiet */
  711. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  712. /* register everything */
  713. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  714. }
  715. /* ----------------------------------------------------------- */
  716. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  717. const struct pci_device_id *pci_id)
  718. {
  719. struct cx8802_dev *dev;
  720. struct cx88_core *core;
  721. int err;
  722. /* general setup */
  723. core = cx88_core_get(pci_dev);
  724. if (NULL == core)
  725. return -EINVAL;
  726. err = -ENODEV;
  727. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  728. goto fail_core;
  729. err = -ENOMEM;
  730. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  731. if (NULL == dev)
  732. goto fail_core;
  733. dev->pci = pci_dev;
  734. dev->core = core;
  735. err = cx8802_init_common(dev);
  736. if (0 != err)
  737. goto fail_free;
  738. #ifdef HAVE_VP3054_I2C
  739. err = vp3054_i2c_probe(dev);
  740. if (0 != err)
  741. goto fail_free;
  742. #endif
  743. /* dvb stuff */
  744. printk("%s/2: cx2388x based dvb card\n", core->name);
  745. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  746. dev->pci, &dev->slock,
  747. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  748. V4L2_FIELD_TOP,
  749. sizeof(struct cx88_buffer),
  750. dev);
  751. err = dvb_register(dev);
  752. if (0 != err)
  753. goto fail_fini;
  754. /* Maintain a reference to cx88-video can query the 8802 device. */
  755. core->dvbdev = dev;
  756. return 0;
  757. fail_fini:
  758. cx8802_fini_common(dev);
  759. fail_free:
  760. kfree(dev);
  761. fail_core:
  762. cx88_core_put(core,pci_dev);
  763. return err;
  764. }
  765. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  766. {
  767. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  768. /* Destroy any 8802 reference. */
  769. dev->core->dvbdev = NULL;
  770. /* dvb */
  771. videobuf_dvb_unregister(&dev->dvb);
  772. #ifdef HAVE_VP3054_I2C
  773. vp3054_i2c_remove(dev);
  774. #endif
  775. /* common */
  776. cx8802_fini_common(dev);
  777. cx88_core_put(dev->core,dev->pci);
  778. kfree(dev);
  779. }
  780. static struct pci_device_id cx8802_pci_tbl[] = {
  781. {
  782. .vendor = 0x14f1,
  783. .device = 0x8802,
  784. .subvendor = PCI_ANY_ID,
  785. .subdevice = PCI_ANY_ID,
  786. },{
  787. /* --- end of list --- */
  788. }
  789. };
  790. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  791. static struct pci_driver dvb_pci_driver = {
  792. .name = "cx88-dvb",
  793. .id_table = cx8802_pci_tbl,
  794. .probe = dvb_probe,
  795. .remove = __devexit_p(dvb_remove),
  796. #ifdef CONFIG_PM
  797. .suspend = cx8802_suspend_common,
  798. .resume = cx8802_resume_common,
  799. #endif
  800. };
  801. static int dvb_init(void)
  802. {
  803. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  804. (CX88_VERSION_CODE >> 16) & 0xff,
  805. (CX88_VERSION_CODE >> 8) & 0xff,
  806. CX88_VERSION_CODE & 0xff);
  807. #ifdef SNAPSHOT
  808. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  809. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  810. #endif
  811. return pci_register_driver(&dvb_pci_driver);
  812. }
  813. static void dvb_fini(void)
  814. {
  815. pci_unregister_driver(&dvb_pci_driver);
  816. }
  817. module_init(dvb_init);
  818. module_exit(dvb_fini);
  819. /*
  820. * Local variables:
  821. * c-basic-offset: 8
  822. * compile-command: "make DVB=1"
  823. * End:
  824. */