smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrutps off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/device.h>
  23. #include <linux/dmapool.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/highmem.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/rtc.h>
  30. #include <linux/completion.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/delay.h>
  33. #include <linux/sysdev.h>
  34. #include <linux/poll.h>
  35. #include <linux/mutex.h>
  36. #include <asm/byteorder.h>
  37. #include <asm/io.h>
  38. #include <asm/prom.h>
  39. #include <asm/machdep.h>
  40. #include <asm/pmac_feature.h>
  41. #include <asm/smu.h>
  42. #include <asm/sections.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/uaccess.h>
  45. #include <asm/of_device.h>
  46. #define VERSION "0.7"
  47. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  48. #undef DEBUG_SMU
  49. #ifdef DEBUG_SMU
  50. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  51. #else
  52. #define DPRINTK(fmt, args...) do { } while (0)
  53. #endif
  54. /*
  55. * This is the command buffer passed to the SMU hardware
  56. */
  57. #define SMU_MAX_DATA 254
  58. struct smu_cmd_buf {
  59. u8 cmd;
  60. u8 length;
  61. u8 data[SMU_MAX_DATA];
  62. };
  63. struct smu_device {
  64. spinlock_t lock;
  65. struct device_node *of_node;
  66. struct of_device *of_dev;
  67. int doorbell; /* doorbell gpio */
  68. u32 __iomem *db_buf; /* doorbell buffer */
  69. struct device_node *db_node;
  70. unsigned int db_irq;
  71. int msg;
  72. struct device_node *msg_node;
  73. unsigned int msg_irq;
  74. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  75. u32 cmd_buf_abs; /* command buffer absolute */
  76. struct list_head cmd_list;
  77. struct smu_cmd *cmd_cur; /* pending command */
  78. struct list_head cmd_i2c_list;
  79. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  80. struct timer_list i2c_timer;
  81. };
  82. /*
  83. * I don't think there will ever be more than one SMU, so
  84. * for now, just hard code that
  85. */
  86. static struct smu_device *smu;
  87. static DEFINE_MUTEX(smu_part_access);
  88. static int smu_irq_inited;
  89. static void smu_i2c_retry(unsigned long data);
  90. /*
  91. * SMU driver low level stuff
  92. */
  93. static void smu_start_cmd(void)
  94. {
  95. unsigned long faddr, fend;
  96. struct smu_cmd *cmd;
  97. if (list_empty(&smu->cmd_list))
  98. return;
  99. /* Fetch first command in queue */
  100. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  101. smu->cmd_cur = cmd;
  102. list_del(&cmd->link);
  103. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  104. cmd->data_len);
  105. DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n",
  106. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  107. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3],
  108. ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5],
  109. ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]);
  110. /* Fill the SMU command buffer */
  111. smu->cmd_buf->cmd = cmd->cmd;
  112. smu->cmd_buf->length = cmd->data_len;
  113. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  114. /* Flush command and data to RAM */
  115. faddr = (unsigned long)smu->cmd_buf;
  116. fend = faddr + smu->cmd_buf->length + 2;
  117. flush_inval_dcache_range(faddr, fend);
  118. /* This isn't exactly a DMA mapping here, I suspect
  119. * the SMU is actually communicating with us via i2c to the
  120. * northbridge or the CPU to access RAM.
  121. */
  122. writel(smu->cmd_buf_abs, smu->db_buf);
  123. /* Ring the SMU doorbell */
  124. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  125. }
  126. static irqreturn_t smu_db_intr(int irq, void *arg)
  127. {
  128. unsigned long flags;
  129. struct smu_cmd *cmd;
  130. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  131. void *misc = NULL;
  132. u8 gpio;
  133. int rc = 0;
  134. /* SMU completed the command, well, we hope, let's make sure
  135. * of it
  136. */
  137. spin_lock_irqsave(&smu->lock, flags);
  138. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  139. if ((gpio & 7) != 7) {
  140. spin_unlock_irqrestore(&smu->lock, flags);
  141. return IRQ_HANDLED;
  142. }
  143. cmd = smu->cmd_cur;
  144. smu->cmd_cur = NULL;
  145. if (cmd == NULL)
  146. goto bail;
  147. if (rc == 0) {
  148. unsigned long faddr;
  149. int reply_len;
  150. u8 ack;
  151. /* CPU might have brought back the cache line, so we need
  152. * to flush again before peeking at the SMU response. We
  153. * flush the entire buffer for now as we haven't read the
  154. * reply lenght (it's only 2 cache lines anyway)
  155. */
  156. faddr = (unsigned long)smu->cmd_buf;
  157. flush_inval_dcache_range(faddr, faddr + 256);
  158. /* Now check ack */
  159. ack = (~cmd->cmd) & 0xff;
  160. if (ack != smu->cmd_buf->cmd) {
  161. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  162. ack, smu->cmd_buf->cmd);
  163. rc = -EIO;
  164. }
  165. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  166. DPRINTK("SMU: reply len: %d\n", reply_len);
  167. if (reply_len > cmd->reply_len) {
  168. printk(KERN_WARNING "SMU: reply buffer too small,"
  169. "got %d bytes for a %d bytes buffer\n",
  170. reply_len, cmd->reply_len);
  171. reply_len = cmd->reply_len;
  172. }
  173. cmd->reply_len = reply_len;
  174. if (cmd->reply_buf && reply_len)
  175. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  176. }
  177. /* Now complete the command. Write status last in order as we lost
  178. * ownership of the command structure as soon as it's no longer -1
  179. */
  180. done = cmd->done;
  181. misc = cmd->misc;
  182. mb();
  183. cmd->status = rc;
  184. bail:
  185. /* Start next command if any */
  186. smu_start_cmd();
  187. spin_unlock_irqrestore(&smu->lock, flags);
  188. /* Call command completion handler if any */
  189. if (done)
  190. done(cmd, misc);
  191. /* It's an edge interrupt, nothing to do */
  192. return IRQ_HANDLED;
  193. }
  194. static irqreturn_t smu_msg_intr(int irq, void *arg)
  195. {
  196. /* I don't quite know what to do with this one, we seem to never
  197. * receive it, so I suspect we have to arm it someway in the SMU
  198. * to start getting events that way.
  199. */
  200. printk(KERN_INFO "SMU: message interrupt !\n");
  201. /* It's an edge interrupt, nothing to do */
  202. return IRQ_HANDLED;
  203. }
  204. /*
  205. * Queued command management.
  206. *
  207. */
  208. int smu_queue_cmd(struct smu_cmd *cmd)
  209. {
  210. unsigned long flags;
  211. if (smu == NULL)
  212. return -ENODEV;
  213. if (cmd->data_len > SMU_MAX_DATA ||
  214. cmd->reply_len > SMU_MAX_DATA)
  215. return -EINVAL;
  216. cmd->status = 1;
  217. spin_lock_irqsave(&smu->lock, flags);
  218. list_add_tail(&cmd->link, &smu->cmd_list);
  219. if (smu->cmd_cur == NULL)
  220. smu_start_cmd();
  221. spin_unlock_irqrestore(&smu->lock, flags);
  222. /* Workaround for early calls when irq isn't available */
  223. if (!smu_irq_inited || smu->db_irq == NO_IRQ)
  224. smu_spinwait_cmd(cmd);
  225. return 0;
  226. }
  227. EXPORT_SYMBOL(smu_queue_cmd);
  228. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  229. unsigned int data_len,
  230. void (*done)(struct smu_cmd *cmd, void *misc),
  231. void *misc, ...)
  232. {
  233. struct smu_cmd *cmd = &scmd->cmd;
  234. va_list list;
  235. int i;
  236. if (data_len > sizeof(scmd->buffer))
  237. return -EINVAL;
  238. memset(scmd, 0, sizeof(*scmd));
  239. cmd->cmd = command;
  240. cmd->data_len = data_len;
  241. cmd->data_buf = scmd->buffer;
  242. cmd->reply_len = sizeof(scmd->buffer);
  243. cmd->reply_buf = scmd->buffer;
  244. cmd->done = done;
  245. cmd->misc = misc;
  246. va_start(list, misc);
  247. for (i = 0; i < data_len; ++i)
  248. scmd->buffer[i] = (u8)va_arg(list, int);
  249. va_end(list);
  250. return smu_queue_cmd(cmd);
  251. }
  252. EXPORT_SYMBOL(smu_queue_simple);
  253. void smu_poll(void)
  254. {
  255. u8 gpio;
  256. if (smu == NULL)
  257. return;
  258. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  259. if ((gpio & 7) == 7)
  260. smu_db_intr(smu->db_irq, smu);
  261. }
  262. EXPORT_SYMBOL(smu_poll);
  263. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  264. {
  265. struct completion *comp = misc;
  266. complete(comp);
  267. }
  268. EXPORT_SYMBOL(smu_done_complete);
  269. void smu_spinwait_cmd(struct smu_cmd *cmd)
  270. {
  271. while(cmd->status == 1)
  272. smu_poll();
  273. }
  274. EXPORT_SYMBOL(smu_spinwait_cmd);
  275. /* RTC low level commands */
  276. static inline int bcd2hex (int n)
  277. {
  278. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  279. }
  280. static inline int hex2bcd (int n)
  281. {
  282. return ((n / 10) << 4) + (n % 10);
  283. }
  284. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  285. struct rtc_time *time)
  286. {
  287. cmd_buf->cmd = 0x8e;
  288. cmd_buf->length = 8;
  289. cmd_buf->data[0] = 0x80;
  290. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  291. cmd_buf->data[2] = hex2bcd(time->tm_min);
  292. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  293. cmd_buf->data[4] = time->tm_wday;
  294. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  295. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  296. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  297. }
  298. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  299. {
  300. struct smu_simple_cmd cmd;
  301. int rc;
  302. if (smu == NULL)
  303. return -ENODEV;
  304. memset(time, 0, sizeof(struct rtc_time));
  305. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  306. SMU_CMD_RTC_GET_DATETIME);
  307. if (rc)
  308. return rc;
  309. smu_spinwait_simple(&cmd);
  310. time->tm_sec = bcd2hex(cmd.buffer[0]);
  311. time->tm_min = bcd2hex(cmd.buffer[1]);
  312. time->tm_hour = bcd2hex(cmd.buffer[2]);
  313. time->tm_wday = bcd2hex(cmd.buffer[3]);
  314. time->tm_mday = bcd2hex(cmd.buffer[4]);
  315. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  316. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  317. return 0;
  318. }
  319. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  320. {
  321. struct smu_simple_cmd cmd;
  322. int rc;
  323. if (smu == NULL)
  324. return -ENODEV;
  325. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  326. SMU_CMD_RTC_SET_DATETIME,
  327. hex2bcd(time->tm_sec),
  328. hex2bcd(time->tm_min),
  329. hex2bcd(time->tm_hour),
  330. time->tm_wday,
  331. hex2bcd(time->tm_mday),
  332. hex2bcd(time->tm_mon) + 1,
  333. hex2bcd(time->tm_year - 100));
  334. if (rc)
  335. return rc;
  336. smu_spinwait_simple(&cmd);
  337. return 0;
  338. }
  339. void smu_shutdown(void)
  340. {
  341. struct smu_simple_cmd cmd;
  342. if (smu == NULL)
  343. return;
  344. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  345. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  346. return;
  347. smu_spinwait_simple(&cmd);
  348. for (;;)
  349. ;
  350. }
  351. void smu_restart(void)
  352. {
  353. struct smu_simple_cmd cmd;
  354. if (smu == NULL)
  355. return;
  356. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  357. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  358. return;
  359. smu_spinwait_simple(&cmd);
  360. for (;;)
  361. ;
  362. }
  363. int smu_present(void)
  364. {
  365. return smu != NULL;
  366. }
  367. EXPORT_SYMBOL(smu_present);
  368. int __init smu_init (void)
  369. {
  370. struct device_node *np;
  371. const u32 *data;
  372. np = of_find_node_by_type(NULL, "smu");
  373. if (np == NULL)
  374. return -ENODEV;
  375. printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR);
  376. if (smu_cmdbuf_abs == 0) {
  377. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  378. return -EINVAL;
  379. }
  380. smu = alloc_bootmem(sizeof(struct smu_device));
  381. if (smu == NULL)
  382. return -ENOMEM;
  383. memset(smu, 0, sizeof(*smu));
  384. spin_lock_init(&smu->lock);
  385. INIT_LIST_HEAD(&smu->cmd_list);
  386. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  387. smu->of_node = np;
  388. smu->db_irq = NO_IRQ;
  389. smu->msg_irq = NO_IRQ;
  390. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  391. * 32 bits value safely
  392. */
  393. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  394. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  395. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  396. if (smu->db_node == NULL) {
  397. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  398. goto fail;
  399. }
  400. data = get_property(smu->db_node, "reg", NULL);
  401. if (data == NULL) {
  402. of_node_put(smu->db_node);
  403. smu->db_node = NULL;
  404. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  405. goto fail;
  406. }
  407. /* Current setup has one doorbell GPIO that does both doorbell
  408. * and ack. GPIOs are at 0x50, best would be to find that out
  409. * in the device-tree though.
  410. */
  411. smu->doorbell = *data;
  412. if (smu->doorbell < 0x50)
  413. smu->doorbell += 0x50;
  414. /* Now look for the smu-interrupt GPIO */
  415. do {
  416. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  417. if (smu->msg_node == NULL)
  418. break;
  419. data = get_property(smu->msg_node, "reg", NULL);
  420. if (data == NULL) {
  421. of_node_put(smu->msg_node);
  422. smu->msg_node = NULL;
  423. break;
  424. }
  425. smu->msg = *data;
  426. if (smu->msg < 0x50)
  427. smu->msg += 0x50;
  428. } while(0);
  429. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  430. * device-tree entry giving the address. Best would probably to use
  431. * an offset for K2 base though, but let's do it that way for now.
  432. */
  433. smu->db_buf = ioremap(0x8000860c, 0x1000);
  434. if (smu->db_buf == NULL) {
  435. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  436. goto fail;
  437. }
  438. sys_ctrler = SYS_CTRLER_SMU;
  439. return 0;
  440. fail:
  441. smu = NULL;
  442. return -ENXIO;
  443. }
  444. static int smu_late_init(void)
  445. {
  446. if (!smu)
  447. return 0;
  448. init_timer(&smu->i2c_timer);
  449. smu->i2c_timer.function = smu_i2c_retry;
  450. smu->i2c_timer.data = (unsigned long)smu;
  451. if (smu->db_node) {
  452. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  453. if (smu->db_irq == NO_IRQ)
  454. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  455. smu->db_node->full_name);
  456. }
  457. if (smu->msg_node) {
  458. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  459. if (smu->msg_irq == NO_IRQ)
  460. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  461. smu->msg_node->full_name);
  462. }
  463. /*
  464. * Try to request the interrupts
  465. */
  466. if (smu->db_irq != NO_IRQ) {
  467. if (request_irq(smu->db_irq, smu_db_intr,
  468. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  469. printk(KERN_WARNING "SMU: can't "
  470. "request interrupt %d\n",
  471. smu->db_irq);
  472. smu->db_irq = NO_IRQ;
  473. }
  474. }
  475. if (smu->msg_irq != NO_IRQ) {
  476. if (request_irq(smu->msg_irq, smu_msg_intr,
  477. IRQF_SHARED, "SMU message", smu) < 0) {
  478. printk(KERN_WARNING "SMU: can't "
  479. "request interrupt %d\n",
  480. smu->msg_irq);
  481. smu->msg_irq = NO_IRQ;
  482. }
  483. }
  484. smu_irq_inited = 1;
  485. return 0;
  486. }
  487. /* This has to be before arch_initcall as the low i2c stuff relies on the
  488. * above having been done before we reach arch_initcalls
  489. */
  490. core_initcall(smu_late_init);
  491. /*
  492. * sysfs visibility
  493. */
  494. static void smu_expose_childs(void *unused)
  495. {
  496. struct device_node *np;
  497. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  498. if (device_is_compatible(np, "smu-sensors"))
  499. of_platform_device_create(np, "smu-sensors",
  500. &smu->of_dev->dev);
  501. }
  502. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL);
  503. static int smu_platform_probe(struct of_device* dev,
  504. const struct of_device_id *match)
  505. {
  506. if (!smu)
  507. return -ENODEV;
  508. smu->of_dev = dev;
  509. /*
  510. * Ok, we are matched, now expose all i2c busses. We have to defer
  511. * that unfortunately or it would deadlock inside the device model
  512. */
  513. schedule_work(&smu_expose_childs_work);
  514. return 0;
  515. }
  516. static struct of_device_id smu_platform_match[] =
  517. {
  518. {
  519. .type = "smu",
  520. },
  521. {},
  522. };
  523. static struct of_platform_driver smu_of_platform_driver =
  524. {
  525. .name = "smu",
  526. .match_table = smu_platform_match,
  527. .probe = smu_platform_probe,
  528. };
  529. static int __init smu_init_sysfs(void)
  530. {
  531. /*
  532. * Due to sysfs bogosity, a sysdev is not a real device, so
  533. * we should in fact create both if we want sysdev semantics
  534. * for power management.
  535. * For now, we don't power manage machines with an SMU chip,
  536. * I'm a bit too far from figuring out how that works with those
  537. * new chipsets, but that will come back and bite us
  538. */
  539. of_register_driver(&smu_of_platform_driver);
  540. return 0;
  541. }
  542. device_initcall(smu_init_sysfs);
  543. struct of_device *smu_get_ofdev(void)
  544. {
  545. if (!smu)
  546. return NULL;
  547. return smu->of_dev;
  548. }
  549. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  550. /*
  551. * i2c interface
  552. */
  553. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  554. {
  555. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  556. void *misc = cmd->misc;
  557. unsigned long flags;
  558. /* Check for read case */
  559. if (!fail && cmd->read) {
  560. if (cmd->pdata[0] < 1)
  561. fail = 1;
  562. else
  563. memcpy(cmd->info.data, &cmd->pdata[1],
  564. cmd->info.datalen);
  565. }
  566. DPRINTK("SMU: completing, success: %d\n", !fail);
  567. /* Update status and mark no pending i2c command with lock
  568. * held so nobody comes in while we dequeue an eventual
  569. * pending next i2c command
  570. */
  571. spin_lock_irqsave(&smu->lock, flags);
  572. smu->cmd_i2c_cur = NULL;
  573. wmb();
  574. cmd->status = fail ? -EIO : 0;
  575. /* Is there another i2c command waiting ? */
  576. if (!list_empty(&smu->cmd_i2c_list)) {
  577. struct smu_i2c_cmd *newcmd;
  578. /* Fetch it, new current, remove from list */
  579. newcmd = list_entry(smu->cmd_i2c_list.next,
  580. struct smu_i2c_cmd, link);
  581. smu->cmd_i2c_cur = newcmd;
  582. list_del(&cmd->link);
  583. /* Queue with low level smu */
  584. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  585. if (smu->cmd_cur == NULL)
  586. smu_start_cmd();
  587. }
  588. spin_unlock_irqrestore(&smu->lock, flags);
  589. /* Call command completion handler if any */
  590. if (done)
  591. done(cmd, misc);
  592. }
  593. static void smu_i2c_retry(unsigned long data)
  594. {
  595. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  596. DPRINTK("SMU: i2c failure, requeuing...\n");
  597. /* requeue command simply by resetting reply_len */
  598. cmd->pdata[0] = 0xff;
  599. cmd->scmd.reply_len = sizeof(cmd->pdata);
  600. smu_queue_cmd(&cmd->scmd);
  601. }
  602. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  603. {
  604. struct smu_i2c_cmd *cmd = misc;
  605. int fail = 0;
  606. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  607. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  608. /* Check for possible status */
  609. if (scmd->status < 0)
  610. fail = 1;
  611. else if (cmd->read) {
  612. if (cmd->stage == 0)
  613. fail = cmd->pdata[0] != 0;
  614. else
  615. fail = cmd->pdata[0] >= 0x80;
  616. } else {
  617. fail = cmd->pdata[0] != 0;
  618. }
  619. /* Handle failures by requeuing command, after 5ms interval
  620. */
  621. if (fail && --cmd->retries > 0) {
  622. DPRINTK("SMU: i2c failure, starting timer...\n");
  623. BUG_ON(cmd != smu->cmd_i2c_cur);
  624. if (!smu_irq_inited) {
  625. mdelay(5);
  626. smu_i2c_retry(0);
  627. return;
  628. }
  629. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  630. return;
  631. }
  632. /* If failure or stage 1, command is complete */
  633. if (fail || cmd->stage != 0) {
  634. smu_i2c_complete_command(cmd, fail);
  635. return;
  636. }
  637. DPRINTK("SMU: going to stage 1\n");
  638. /* Ok, initial command complete, now poll status */
  639. scmd->reply_buf = cmd->pdata;
  640. scmd->reply_len = sizeof(cmd->pdata);
  641. scmd->data_buf = cmd->pdata;
  642. scmd->data_len = 1;
  643. cmd->pdata[0] = 0;
  644. cmd->stage = 1;
  645. cmd->retries = 20;
  646. smu_queue_cmd(scmd);
  647. }
  648. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  649. {
  650. unsigned long flags;
  651. if (smu == NULL)
  652. return -ENODEV;
  653. /* Fill most fields of scmd */
  654. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  655. cmd->scmd.done = smu_i2c_low_completion;
  656. cmd->scmd.misc = cmd;
  657. cmd->scmd.reply_buf = cmd->pdata;
  658. cmd->scmd.reply_len = sizeof(cmd->pdata);
  659. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  660. cmd->scmd.status = 1;
  661. cmd->stage = 0;
  662. cmd->pdata[0] = 0xff;
  663. cmd->retries = 20;
  664. cmd->status = 1;
  665. /* Check transfer type, sanitize some "info" fields
  666. * based on transfer type and do more checking
  667. */
  668. cmd->info.caddr = cmd->info.devaddr;
  669. cmd->read = cmd->info.devaddr & 0x01;
  670. switch(cmd->info.type) {
  671. case SMU_I2C_TRANSFER_SIMPLE:
  672. memset(&cmd->info.sublen, 0, 4);
  673. break;
  674. case SMU_I2C_TRANSFER_COMBINED:
  675. cmd->info.devaddr &= 0xfe;
  676. case SMU_I2C_TRANSFER_STDSUB:
  677. if (cmd->info.sublen > 3)
  678. return -EINVAL;
  679. break;
  680. default:
  681. return -EINVAL;
  682. }
  683. /* Finish setting up command based on transfer direction
  684. */
  685. if (cmd->read) {
  686. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  687. return -EINVAL;
  688. memset(cmd->info.data, 0xff, cmd->info.datalen);
  689. cmd->scmd.data_len = 9;
  690. } else {
  691. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  692. return -EINVAL;
  693. cmd->scmd.data_len = 9 + cmd->info.datalen;
  694. }
  695. DPRINTK("SMU: i2c enqueuing command\n");
  696. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  697. cmd->read ? "read" : "write", cmd->info.datalen,
  698. cmd->info.bus, cmd->info.caddr,
  699. cmd->info.subaddr[0], cmd->info.type);
  700. /* Enqueue command in i2c list, and if empty, enqueue also in
  701. * main command list
  702. */
  703. spin_lock_irqsave(&smu->lock, flags);
  704. if (smu->cmd_i2c_cur == NULL) {
  705. smu->cmd_i2c_cur = cmd;
  706. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  707. if (smu->cmd_cur == NULL)
  708. smu_start_cmd();
  709. } else
  710. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  711. spin_unlock_irqrestore(&smu->lock, flags);
  712. return 0;
  713. }
  714. /*
  715. * Handling of "partitions"
  716. */
  717. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  718. {
  719. DECLARE_COMPLETION_ONSTACK(comp);
  720. unsigned int chunk;
  721. struct smu_cmd cmd;
  722. int rc;
  723. u8 params[8];
  724. /* We currently use a chunk size of 0xe. We could check the
  725. * SMU firmware version and use bigger sizes though
  726. */
  727. chunk = 0xe;
  728. while (len) {
  729. unsigned int clen = min(len, chunk);
  730. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  731. cmd.data_len = 7;
  732. cmd.data_buf = params;
  733. cmd.reply_len = chunk;
  734. cmd.reply_buf = dest;
  735. cmd.done = smu_done_complete;
  736. cmd.misc = &comp;
  737. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  738. params[1] = 0x4;
  739. *((u32 *)&params[2]) = addr;
  740. params[6] = clen;
  741. rc = smu_queue_cmd(&cmd);
  742. if (rc)
  743. return rc;
  744. wait_for_completion(&comp);
  745. if (cmd.status != 0)
  746. return rc;
  747. if (cmd.reply_len != clen) {
  748. printk(KERN_DEBUG "SMU: short read in "
  749. "smu_read_datablock, got: %d, want: %d\n",
  750. cmd.reply_len, clen);
  751. return -EIO;
  752. }
  753. len -= clen;
  754. addr += clen;
  755. dest += clen;
  756. }
  757. return 0;
  758. }
  759. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  760. {
  761. DECLARE_COMPLETION_ONSTACK(comp);
  762. struct smu_simple_cmd cmd;
  763. unsigned int addr, len, tlen;
  764. struct smu_sdbp_header *hdr;
  765. struct property *prop;
  766. /* First query the partition info */
  767. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  768. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  769. smu_done_complete, &comp,
  770. SMU_CMD_PARTITION_LATEST, id);
  771. wait_for_completion(&comp);
  772. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  773. cmd.cmd.status, cmd.cmd.reply_len);
  774. /* Partition doesn't exist (or other error) */
  775. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  776. return NULL;
  777. /* Fetch address and length from reply */
  778. addr = *((u16 *)cmd.buffer);
  779. len = cmd.buffer[3] << 2;
  780. /* Calucluate total length to allocate, including the 17 bytes
  781. * for "sdb-partition-XX" that we append at the end of the buffer
  782. */
  783. tlen = sizeof(struct property) + len + 18;
  784. prop = kcalloc(tlen, 1, GFP_KERNEL);
  785. if (prop == NULL)
  786. return NULL;
  787. hdr = (struct smu_sdbp_header *)(prop + 1);
  788. prop->name = ((char *)prop) + tlen - 18;
  789. sprintf(prop->name, "sdb-partition-%02x", id);
  790. prop->length = len;
  791. prop->value = (unsigned char *)hdr;
  792. prop->next = NULL;
  793. /* Read the datablock */
  794. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  795. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  796. "partition %02x !\n", id);
  797. goto failure;
  798. }
  799. /* Got it, check a few things and create the property */
  800. if (hdr->id != id) {
  801. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  802. "%02x !\n", id, hdr->id);
  803. goto failure;
  804. }
  805. if (prom_add_property(smu->of_node, prop)) {
  806. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  807. "property !\n", id);
  808. goto failure;
  809. }
  810. return hdr;
  811. failure:
  812. kfree(prop);
  813. return NULL;
  814. }
  815. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  816. * when interruptible is 1
  817. */
  818. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  819. unsigned int *size, int interruptible)
  820. {
  821. char pname[32];
  822. const struct smu_sdbp_header *part;
  823. if (!smu)
  824. return NULL;
  825. sprintf(pname, "sdb-partition-%02x", id);
  826. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  827. if (interruptible) {
  828. int rc;
  829. rc = mutex_lock_interruptible(&smu_part_access);
  830. if (rc)
  831. return ERR_PTR(rc);
  832. } else
  833. mutex_lock(&smu_part_access);
  834. part = get_property(smu->of_node, pname, size);
  835. if (part == NULL) {
  836. DPRINTK("trying to extract from SMU ...\n");
  837. part = smu_create_sdb_partition(id);
  838. if (part != NULL && size)
  839. *size = part->len << 2;
  840. }
  841. mutex_unlock(&smu_part_access);
  842. return part;
  843. }
  844. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  845. {
  846. return __smu_get_sdb_partition(id, size, 0);
  847. }
  848. EXPORT_SYMBOL(smu_get_sdb_partition);
  849. /*
  850. * Userland driver interface
  851. */
  852. static LIST_HEAD(smu_clist);
  853. static DEFINE_SPINLOCK(smu_clist_lock);
  854. enum smu_file_mode {
  855. smu_file_commands,
  856. smu_file_events,
  857. smu_file_closing
  858. };
  859. struct smu_private
  860. {
  861. struct list_head list;
  862. enum smu_file_mode mode;
  863. int busy;
  864. struct smu_cmd cmd;
  865. spinlock_t lock;
  866. wait_queue_head_t wait;
  867. u8 buffer[SMU_MAX_DATA];
  868. };
  869. static int smu_open(struct inode *inode, struct file *file)
  870. {
  871. struct smu_private *pp;
  872. unsigned long flags;
  873. pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL);
  874. if (pp == 0)
  875. return -ENOMEM;
  876. memset(pp, 0, sizeof(struct smu_private));
  877. spin_lock_init(&pp->lock);
  878. pp->mode = smu_file_commands;
  879. init_waitqueue_head(&pp->wait);
  880. spin_lock_irqsave(&smu_clist_lock, flags);
  881. list_add(&pp->list, &smu_clist);
  882. spin_unlock_irqrestore(&smu_clist_lock, flags);
  883. file->private_data = pp;
  884. return 0;
  885. }
  886. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  887. {
  888. struct smu_private *pp = misc;
  889. wake_up_all(&pp->wait);
  890. }
  891. static ssize_t smu_write(struct file *file, const char __user *buf,
  892. size_t count, loff_t *ppos)
  893. {
  894. struct smu_private *pp = file->private_data;
  895. unsigned long flags;
  896. struct smu_user_cmd_hdr hdr;
  897. int rc = 0;
  898. if (pp->busy)
  899. return -EBUSY;
  900. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  901. return -EFAULT;
  902. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  903. pp->mode = smu_file_events;
  904. return 0;
  905. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  906. const struct smu_sdbp_header *part;
  907. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  908. if (part == NULL)
  909. return -EINVAL;
  910. else if (IS_ERR(part))
  911. return PTR_ERR(part);
  912. return 0;
  913. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  914. return -EINVAL;
  915. else if (pp->mode != smu_file_commands)
  916. return -EBADFD;
  917. else if (hdr.data_len > SMU_MAX_DATA)
  918. return -EINVAL;
  919. spin_lock_irqsave(&pp->lock, flags);
  920. if (pp->busy) {
  921. spin_unlock_irqrestore(&pp->lock, flags);
  922. return -EBUSY;
  923. }
  924. pp->busy = 1;
  925. pp->cmd.status = 1;
  926. spin_unlock_irqrestore(&pp->lock, flags);
  927. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  928. pp->busy = 0;
  929. return -EFAULT;
  930. }
  931. pp->cmd.cmd = hdr.cmd;
  932. pp->cmd.data_len = hdr.data_len;
  933. pp->cmd.reply_len = SMU_MAX_DATA;
  934. pp->cmd.data_buf = pp->buffer;
  935. pp->cmd.reply_buf = pp->buffer;
  936. pp->cmd.done = smu_user_cmd_done;
  937. pp->cmd.misc = pp;
  938. rc = smu_queue_cmd(&pp->cmd);
  939. if (rc < 0)
  940. return rc;
  941. return count;
  942. }
  943. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  944. char __user *buf, size_t count)
  945. {
  946. DECLARE_WAITQUEUE(wait, current);
  947. struct smu_user_reply_hdr hdr;
  948. unsigned long flags;
  949. int size, rc = 0;
  950. if (!pp->busy)
  951. return 0;
  952. if (count < sizeof(struct smu_user_reply_hdr))
  953. return -EOVERFLOW;
  954. spin_lock_irqsave(&pp->lock, flags);
  955. if (pp->cmd.status == 1) {
  956. if (file->f_flags & O_NONBLOCK)
  957. return -EAGAIN;
  958. add_wait_queue(&pp->wait, &wait);
  959. for (;;) {
  960. set_current_state(TASK_INTERRUPTIBLE);
  961. rc = 0;
  962. if (pp->cmd.status != 1)
  963. break;
  964. rc = -ERESTARTSYS;
  965. if (signal_pending(current))
  966. break;
  967. spin_unlock_irqrestore(&pp->lock, flags);
  968. schedule();
  969. spin_lock_irqsave(&pp->lock, flags);
  970. }
  971. set_current_state(TASK_RUNNING);
  972. remove_wait_queue(&pp->wait, &wait);
  973. }
  974. spin_unlock_irqrestore(&pp->lock, flags);
  975. if (rc)
  976. return rc;
  977. if (pp->cmd.status != 0)
  978. pp->cmd.reply_len = 0;
  979. size = sizeof(hdr) + pp->cmd.reply_len;
  980. if (count < size)
  981. size = count;
  982. rc = size;
  983. hdr.status = pp->cmd.status;
  984. hdr.reply_len = pp->cmd.reply_len;
  985. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  986. return -EFAULT;
  987. size -= sizeof(hdr);
  988. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  989. return -EFAULT;
  990. pp->busy = 0;
  991. return rc;
  992. }
  993. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  994. char __user *buf, size_t count)
  995. {
  996. /* Not implemented */
  997. msleep_interruptible(1000);
  998. return 0;
  999. }
  1000. static ssize_t smu_read(struct file *file, char __user *buf,
  1001. size_t count, loff_t *ppos)
  1002. {
  1003. struct smu_private *pp = file->private_data;
  1004. if (pp->mode == smu_file_commands)
  1005. return smu_read_command(file, pp, buf, count);
  1006. if (pp->mode == smu_file_events)
  1007. return smu_read_events(file, pp, buf, count);
  1008. return -EBADFD;
  1009. }
  1010. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1011. {
  1012. struct smu_private *pp = file->private_data;
  1013. unsigned int mask = 0;
  1014. unsigned long flags;
  1015. if (pp == 0)
  1016. return 0;
  1017. if (pp->mode == smu_file_commands) {
  1018. poll_wait(file, &pp->wait, wait);
  1019. spin_lock_irqsave(&pp->lock, flags);
  1020. if (pp->busy && pp->cmd.status != 1)
  1021. mask |= POLLIN;
  1022. spin_unlock_irqrestore(&pp->lock, flags);
  1023. } if (pp->mode == smu_file_events) {
  1024. /* Not yet implemented */
  1025. }
  1026. return mask;
  1027. }
  1028. static int smu_release(struct inode *inode, struct file *file)
  1029. {
  1030. struct smu_private *pp = file->private_data;
  1031. unsigned long flags;
  1032. unsigned int busy;
  1033. if (pp == 0)
  1034. return 0;
  1035. file->private_data = NULL;
  1036. /* Mark file as closing to avoid races with new request */
  1037. spin_lock_irqsave(&pp->lock, flags);
  1038. pp->mode = smu_file_closing;
  1039. busy = pp->busy;
  1040. /* Wait for any pending request to complete */
  1041. if (busy && pp->cmd.status == 1) {
  1042. DECLARE_WAITQUEUE(wait, current);
  1043. add_wait_queue(&pp->wait, &wait);
  1044. for (;;) {
  1045. set_current_state(TASK_UNINTERRUPTIBLE);
  1046. if (pp->cmd.status != 1)
  1047. break;
  1048. spin_lock_irqsave(&pp->lock, flags);
  1049. schedule();
  1050. spin_unlock_irqrestore(&pp->lock, flags);
  1051. }
  1052. set_current_state(TASK_RUNNING);
  1053. remove_wait_queue(&pp->wait, &wait);
  1054. }
  1055. spin_unlock_irqrestore(&pp->lock, flags);
  1056. spin_lock_irqsave(&smu_clist_lock, flags);
  1057. list_del(&pp->list);
  1058. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1059. kfree(pp);
  1060. return 0;
  1061. }
  1062. static struct file_operations smu_device_fops = {
  1063. .llseek = no_llseek,
  1064. .read = smu_read,
  1065. .write = smu_write,
  1066. .poll = smu_fpoll,
  1067. .open = smu_open,
  1068. .release = smu_release,
  1069. };
  1070. static struct miscdevice pmu_device = {
  1071. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1072. };
  1073. static int smu_device_init(void)
  1074. {
  1075. if (!smu)
  1076. return -ENODEV;
  1077. if (misc_register(&pmu_device) < 0)
  1078. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1079. return 0;
  1080. }
  1081. device_initcall(smu_device_init);