hisax_fcpcipnp.c 25 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021
  1. /*
  2. * Driver for AVM Fritz!PCI, Fritz!PCI v2, Fritz!PnP ISDN cards
  3. *
  4. * Author Kai Germaschewski
  5. * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
  6. * 2001 by Karsten Keil <keil@isdn4linux.de>
  7. *
  8. * based upon Karsten Keil's original avm_pci.c driver
  9. *
  10. * This software may be used and distributed according to the terms
  11. * of the GNU General Public License, incorporated herein by reference.
  12. *
  13. * Thanks to Wizard Computersysteme GmbH, Bremervoerde and
  14. * SoHaNet Technology GmbH, Berlin
  15. * for supporting the development of this driver
  16. */
  17. /* TODO:
  18. *
  19. * o POWER PC
  20. * o clean up debugging
  21. * o tx_skb at PH_DEACTIVATE time
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/pci.h>
  26. #include <linux/isapnp.h>
  27. #include <linux/kmod.h>
  28. #include <linux/slab.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/delay.h>
  32. #include <asm/io.h>
  33. #include "hisax_fcpcipnp.h"
  34. // debugging cruft
  35. #define __debug_variable debug
  36. #include "hisax_debug.h"
  37. #ifdef CONFIG_HISAX_DEBUG
  38. static int debug = 0;
  39. /* static int hdlcfifosize = 32; */
  40. module_param(debug, int, 0);
  41. /* module_param(hdlcfifosize, int, 0); */
  42. #endif
  43. MODULE_AUTHOR("Kai Germaschewski <kai.germaschewski@gmx.de>/Karsten Keil <kkeil@suse.de>");
  44. MODULE_DESCRIPTION("AVM Fritz!PCI/PnP ISDN driver");
  45. static struct pci_device_id fcpci_ids[] = {
  46. { .vendor = PCI_VENDOR_ID_AVM,
  47. .device = PCI_DEVICE_ID_AVM_A1,
  48. .subvendor = PCI_ANY_ID,
  49. .subdevice = PCI_ANY_ID,
  50. .driver_data = (unsigned long) "Fritz!Card PCI",
  51. },
  52. { .vendor = PCI_VENDOR_ID_AVM,
  53. .device = PCI_DEVICE_ID_AVM_A1_V2,
  54. .subvendor = PCI_ANY_ID,
  55. .subdevice = PCI_ANY_ID,
  56. .driver_data = (unsigned long) "Fritz!Card PCI v2" },
  57. {}
  58. };
  59. MODULE_DEVICE_TABLE(pci, fcpci_ids);
  60. #ifdef __ISAPNP__
  61. static struct pnp_device_id fcpnp_ids[] __devinitdata = {
  62. {
  63. .id = "AVM0900",
  64. .driver_data = (unsigned long) "Fritz!Card PnP",
  65. },
  66. };
  67. MODULE_DEVICE_TABLE(isapnp, fcpnp_ids);
  68. #endif
  69. static int protocol = 2; /* EURO-ISDN Default */
  70. module_param(protocol, int, 0);
  71. MODULE_LICENSE("GPL");
  72. // ----------------------------------------------------------------------
  73. #define AVM_INDEX 0x04
  74. #define AVM_DATA 0x10
  75. #define AVM_IDX_HDLC_1 0x00
  76. #define AVM_IDX_HDLC_2 0x01
  77. #define AVM_IDX_ISAC_FIFO 0x02
  78. #define AVM_IDX_ISAC_REG_LOW 0x04
  79. #define AVM_IDX_ISAC_REG_HIGH 0x06
  80. #define AVM_STATUS0 0x02
  81. #define AVM_STATUS0_IRQ_ISAC 0x01
  82. #define AVM_STATUS0_IRQ_HDLC 0x02
  83. #define AVM_STATUS0_IRQ_TIMER 0x04
  84. #define AVM_STATUS0_IRQ_MASK 0x07
  85. #define AVM_STATUS0_RESET 0x01
  86. #define AVM_STATUS0_DIS_TIMER 0x02
  87. #define AVM_STATUS0_RES_TIMER 0x04
  88. #define AVM_STATUS0_ENA_IRQ 0x08
  89. #define AVM_STATUS0_TESTBIT 0x10
  90. #define AVM_STATUS1 0x03
  91. #define AVM_STATUS1_ENA_IOM 0x80
  92. #define HDLC_FIFO 0x0
  93. #define HDLC_STATUS 0x4
  94. #define HDLC_CTRL 0x4
  95. #define HDLC_MODE_ITF_FLG 0x01
  96. #define HDLC_MODE_TRANS 0x02
  97. #define HDLC_MODE_CCR_7 0x04
  98. #define HDLC_MODE_CCR_16 0x08
  99. #define HDLC_MODE_TESTLOOP 0x80
  100. #define HDLC_INT_XPR 0x80
  101. #define HDLC_INT_XDU 0x40
  102. #define HDLC_INT_RPR 0x20
  103. #define HDLC_INT_MASK 0xE0
  104. #define HDLC_STAT_RME 0x01
  105. #define HDLC_STAT_RDO 0x10
  106. #define HDLC_STAT_CRCVFRRAB 0x0E
  107. #define HDLC_STAT_CRCVFR 0x06
  108. #define HDLC_STAT_RML_MASK 0xff00
  109. #define HDLC_CMD_XRS 0x80
  110. #define HDLC_CMD_XME 0x01
  111. #define HDLC_CMD_RRS 0x20
  112. #define HDLC_CMD_XML_MASK 0xff00
  113. #define AVM_HDLC_FIFO_1 0x10
  114. #define AVM_HDLC_FIFO_2 0x18
  115. #define AVM_HDLC_STATUS_1 0x14
  116. #define AVM_HDLC_STATUS_2 0x1c
  117. #define AVM_ISACSX_INDEX 0x04
  118. #define AVM_ISACSX_DATA 0x08
  119. // ----------------------------------------------------------------------
  120. // Fritz!PCI
  121. static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset)
  122. {
  123. struct fritz_adapter *adapter = isac->priv;
  124. unsigned char idx = (offset > 0x2f) ?
  125. AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
  126. unsigned char val;
  127. unsigned long flags;
  128. spin_lock_irqsave(&adapter->hw_lock, flags);
  129. outb(idx, adapter->io + AVM_INDEX);
  130. val = inb(adapter->io + AVM_DATA + (offset & 0xf));
  131. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  132. DBG(0x1000, " port %#x, value %#x",
  133. offset, val);
  134. return val;
  135. }
  136. static void fcpci_write_isac(struct isac *isac, unsigned char offset,
  137. unsigned char value)
  138. {
  139. struct fritz_adapter *adapter = isac->priv;
  140. unsigned char idx = (offset > 0x2f) ?
  141. AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
  142. unsigned long flags;
  143. DBG(0x1000, " port %#x, value %#x",
  144. offset, value);
  145. spin_lock_irqsave(&adapter->hw_lock, flags);
  146. outb(idx, adapter->io + AVM_INDEX);
  147. outb(value, adapter->io + AVM_DATA + (offset & 0xf));
  148. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  149. }
  150. static void fcpci_read_isac_fifo(struct isac *isac, unsigned char * data,
  151. int size)
  152. {
  153. struct fritz_adapter *adapter = isac->priv;
  154. unsigned long flags;
  155. spin_lock_irqsave(&adapter->hw_lock, flags);
  156. outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
  157. insb(adapter->io + AVM_DATA, data, size);
  158. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  159. }
  160. static void fcpci_write_isac_fifo(struct isac *isac, unsigned char * data,
  161. int size)
  162. {
  163. struct fritz_adapter *adapter = isac->priv;
  164. unsigned long flags;
  165. spin_lock_irqsave(&adapter->hw_lock, flags);
  166. outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
  167. outsb(adapter->io + AVM_DATA, data, size);
  168. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  169. }
  170. static u32 fcpci_read_hdlc_status(struct fritz_adapter *adapter, int nr)
  171. {
  172. u32 val;
  173. int idx = nr ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  174. unsigned long flags;
  175. spin_lock_irqsave(&adapter->hw_lock, flags);
  176. outl(idx, adapter->io + AVM_INDEX);
  177. val = inl(adapter->io + AVM_DATA + HDLC_STATUS);
  178. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  179. return val;
  180. }
  181. static void __fcpci_write_ctrl(struct fritz_bcs *bcs, int which)
  182. {
  183. struct fritz_adapter *adapter = bcs->adapter;
  184. int idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  185. DBG(0x40, "hdlc %c wr%x ctrl %x",
  186. 'A' + bcs->channel, which, bcs->ctrl.ctrl);
  187. outl(idx, adapter->io + AVM_INDEX);
  188. outl(bcs->ctrl.ctrl, adapter->io + AVM_DATA + HDLC_CTRL);
  189. }
  190. static void fcpci_write_ctrl(struct fritz_bcs *bcs, int which)
  191. {
  192. struct fritz_adapter *adapter = bcs->adapter;
  193. unsigned long flags;
  194. spin_lock_irqsave(&adapter->hw_lock, flags);
  195. __fcpci_write_ctrl(bcs, which);
  196. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  197. }
  198. // ----------------------------------------------------------------------
  199. // Fritz!PCI v2
  200. static unsigned char fcpci2_read_isac(struct isac *isac, unsigned char offset)
  201. {
  202. struct fritz_adapter *adapter = isac->priv;
  203. unsigned char val;
  204. unsigned long flags;
  205. spin_lock_irqsave(&adapter->hw_lock, flags);
  206. outl(offset, adapter->io + AVM_ISACSX_INDEX);
  207. val = inl(adapter->io + AVM_ISACSX_DATA);
  208. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  209. DBG(0x1000, " port %#x, value %#x",
  210. offset, val);
  211. return val;
  212. }
  213. static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
  214. unsigned char value)
  215. {
  216. struct fritz_adapter *adapter = isac->priv;
  217. unsigned long flags;
  218. DBG(0x1000, " port %#x, value %#x",
  219. offset, value);
  220. spin_lock_irqsave(&adapter->hw_lock, flags);
  221. outl(offset, adapter->io + AVM_ISACSX_INDEX);
  222. outl(value, adapter->io + AVM_ISACSX_DATA);
  223. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  224. }
  225. static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char * data,
  226. int size)
  227. {
  228. struct fritz_adapter *adapter = isac->priv;
  229. int i;
  230. unsigned long flags;
  231. spin_lock_irqsave(&adapter->hw_lock, flags);
  232. outl(0, adapter->io + AVM_ISACSX_INDEX);
  233. for (i = 0; i < size; i++)
  234. data[i] = inl(adapter->io + AVM_ISACSX_DATA);
  235. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  236. }
  237. static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char * data,
  238. int size)
  239. {
  240. struct fritz_adapter *adapter = isac->priv;
  241. int i;
  242. unsigned long flags;
  243. spin_lock_irqsave(&adapter->hw_lock, flags);
  244. outl(0, adapter->io + AVM_ISACSX_INDEX);
  245. for (i = 0; i < size; i++)
  246. outl(data[i], adapter->io + AVM_ISACSX_DATA);
  247. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  248. }
  249. static u32 fcpci2_read_hdlc_status(struct fritz_adapter *adapter, int nr)
  250. {
  251. int offset = nr ? AVM_HDLC_STATUS_2 : AVM_HDLC_STATUS_1;
  252. return inl(adapter->io + offset);
  253. }
  254. static void fcpci2_write_ctrl(struct fritz_bcs *bcs, int which)
  255. {
  256. struct fritz_adapter *adapter = bcs->adapter;
  257. int offset = bcs->channel ? AVM_HDLC_STATUS_2 : AVM_HDLC_STATUS_1;
  258. DBG(0x40, "hdlc %c wr%x ctrl %x",
  259. 'A' + bcs->channel, which, bcs->ctrl.ctrl);
  260. outl(bcs->ctrl.ctrl, adapter->io + offset);
  261. }
  262. // ----------------------------------------------------------------------
  263. // Fritz!PnP (ISAC access as for Fritz!PCI)
  264. static u32 fcpnp_read_hdlc_status(struct fritz_adapter *adapter, int nr)
  265. {
  266. unsigned char idx = nr ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  267. u32 val;
  268. unsigned long flags;
  269. spin_lock_irqsave(&adapter->hw_lock, flags);
  270. outb(idx, adapter->io + AVM_INDEX);
  271. val = inb(adapter->io + AVM_DATA + HDLC_STATUS);
  272. if (val & HDLC_INT_RPR)
  273. val |= inb(adapter->io + AVM_DATA + HDLC_STATUS + 1) << 8;
  274. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  275. return val;
  276. }
  277. static void __fcpnp_write_ctrl(struct fritz_bcs *bcs, int which)
  278. {
  279. struct fritz_adapter *adapter = bcs->adapter;
  280. unsigned char idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  281. DBG(0x40, "hdlc %c wr%x ctrl %x",
  282. 'A' + bcs->channel, which, bcs->ctrl.ctrl);
  283. outb(idx, adapter->io + AVM_INDEX);
  284. if (which & 4)
  285. outb(bcs->ctrl.sr.mode,
  286. adapter->io + AVM_DATA + HDLC_STATUS + 2);
  287. if (which & 2)
  288. outb(bcs->ctrl.sr.xml,
  289. adapter->io + AVM_DATA + HDLC_STATUS + 1);
  290. if (which & 1)
  291. outb(bcs->ctrl.sr.cmd,
  292. adapter->io + AVM_DATA + HDLC_STATUS + 0);
  293. }
  294. static void fcpnp_write_ctrl(struct fritz_bcs *bcs, int which)
  295. {
  296. struct fritz_adapter *adapter = bcs->adapter;
  297. unsigned long flags;
  298. spin_lock_irqsave(&adapter->hw_lock, flags);
  299. __fcpnp_write_ctrl(bcs, which);
  300. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  301. }
  302. // ----------------------------------------------------------------------
  303. static inline void B_L1L2(struct fritz_bcs *bcs, int pr, void *arg)
  304. {
  305. struct hisax_if *ifc = (struct hisax_if *) &bcs->b_if;
  306. DBG(2, "pr %#x", pr);
  307. ifc->l1l2(ifc, pr, arg);
  308. }
  309. static void hdlc_fill_fifo(struct fritz_bcs *bcs)
  310. {
  311. struct fritz_adapter *adapter = bcs->adapter;
  312. struct sk_buff *skb = bcs->tx_skb;
  313. int count;
  314. unsigned long flags;
  315. unsigned char *p;
  316. DBG(0x40, "hdlc_fill_fifo");
  317. BUG_ON(skb->len == 0);
  318. bcs->ctrl.sr.cmd &= ~HDLC_CMD_XME;
  319. if (bcs->tx_skb->len > bcs->fifo_size) {
  320. count = bcs->fifo_size;
  321. } else {
  322. count = bcs->tx_skb->len;
  323. if (bcs->mode != L1_MODE_TRANS)
  324. bcs->ctrl.sr.cmd |= HDLC_CMD_XME;
  325. }
  326. DBG(0x40, "hdlc_fill_fifo %d/%d", count, bcs->tx_skb->len);
  327. p = bcs->tx_skb->data;
  328. skb_pull(bcs->tx_skb, count);
  329. bcs->tx_cnt += count;
  330. bcs->ctrl.sr.xml = ((count == bcs->fifo_size) ? 0 : count);
  331. switch (adapter->type) {
  332. case AVM_FRITZ_PCI:
  333. spin_lock_irqsave(&adapter->hw_lock, flags);
  334. // sets the correct AVM_INDEX, too
  335. __fcpci_write_ctrl(bcs, 3);
  336. outsl(adapter->io + AVM_DATA + HDLC_FIFO,
  337. p, (count + 3) / 4);
  338. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  339. break;
  340. case AVM_FRITZ_PCIV2:
  341. fcpci2_write_ctrl(bcs, 3);
  342. outsl(adapter->io +
  343. (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
  344. p, (count + 3) / 4);
  345. break;
  346. case AVM_FRITZ_PNP:
  347. spin_lock_irqsave(&adapter->hw_lock, flags);
  348. // sets the correct AVM_INDEX, too
  349. __fcpnp_write_ctrl(bcs, 3);
  350. outsb(adapter->io + AVM_DATA, p, count);
  351. spin_unlock_irqrestore(&adapter->hw_lock, flags);
  352. break;
  353. }
  354. }
  355. static inline void hdlc_empty_fifo(struct fritz_bcs *bcs, int count)
  356. {
  357. struct fritz_adapter *adapter = bcs->adapter;
  358. unsigned char *p;
  359. unsigned char idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
  360. DBG(0x10, "hdlc_empty_fifo %d", count);
  361. if (bcs->rcvidx + count > HSCX_BUFMAX) {
  362. DBG(0x10, "hdlc_empty_fifo: incoming packet too large");
  363. return;
  364. }
  365. p = bcs->rcvbuf + bcs->rcvidx;
  366. bcs->rcvidx += count;
  367. switch (adapter->type) {
  368. case AVM_FRITZ_PCI:
  369. spin_lock(&adapter->hw_lock);
  370. outl(idx, adapter->io + AVM_INDEX);
  371. insl(adapter->io + AVM_DATA + HDLC_FIFO,
  372. p, (count + 3) / 4);
  373. spin_unlock(&adapter->hw_lock);
  374. break;
  375. case AVM_FRITZ_PCIV2:
  376. insl(adapter->io +
  377. (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
  378. p, (count + 3) / 4);
  379. break;
  380. case AVM_FRITZ_PNP:
  381. spin_lock(&adapter->hw_lock);
  382. outb(idx, adapter->io + AVM_INDEX);
  383. insb(adapter->io + AVM_DATA, p, count);
  384. spin_unlock(&adapter->hw_lock);
  385. break;
  386. }
  387. }
  388. static inline void hdlc_rpr_irq(struct fritz_bcs *bcs, u32 stat)
  389. {
  390. struct fritz_adapter *adapter = bcs->adapter;
  391. struct sk_buff *skb;
  392. int len;
  393. if (stat & HDLC_STAT_RDO) {
  394. DBG(0x10, "RDO");
  395. bcs->ctrl.sr.xml = 0;
  396. bcs->ctrl.sr.cmd |= HDLC_CMD_RRS;
  397. adapter->write_ctrl(bcs, 1);
  398. bcs->ctrl.sr.cmd &= ~HDLC_CMD_RRS;
  399. adapter->write_ctrl(bcs, 1);
  400. bcs->rcvidx = 0;
  401. return;
  402. }
  403. len = (stat & HDLC_STAT_RML_MASK) >> 8;
  404. if (len == 0)
  405. len = bcs->fifo_size;
  406. hdlc_empty_fifo(bcs, len);
  407. if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) {
  408. if (((stat & HDLC_STAT_CRCVFRRAB)== HDLC_STAT_CRCVFR) ||
  409. (bcs->mode == L1_MODE_TRANS)) {
  410. skb = dev_alloc_skb(bcs->rcvidx);
  411. if (!skb) {
  412. printk(KERN_WARNING "HDLC: receive out of memory\n");
  413. } else {
  414. memcpy(skb_put(skb, bcs->rcvidx), bcs->rcvbuf,
  415. bcs->rcvidx);
  416. DBG_SKB(1, skb);
  417. B_L1L2(bcs, PH_DATA | INDICATION, skb);
  418. }
  419. bcs->rcvidx = 0;
  420. } else {
  421. DBG(0x10, "ch%d invalid frame %#x",
  422. bcs->channel, stat);
  423. bcs->rcvidx = 0;
  424. }
  425. }
  426. }
  427. static inline void hdlc_xdu_irq(struct fritz_bcs *bcs)
  428. {
  429. struct fritz_adapter *adapter = bcs->adapter;
  430. /* Here we lost an TX interrupt, so
  431. * restart transmitting the whole frame.
  432. */
  433. bcs->ctrl.sr.xml = 0;
  434. bcs->ctrl.sr.cmd |= HDLC_CMD_XRS;
  435. adapter->write_ctrl(bcs, 1);
  436. bcs->ctrl.sr.cmd &= ~HDLC_CMD_XRS;
  437. if (!bcs->tx_skb) {
  438. DBG(0x10, "XDU without skb");
  439. adapter->write_ctrl(bcs, 1);
  440. return;
  441. }
  442. /* only hdlc restarts the frame, transparent mode must continue */
  443. if (bcs->mode == L1_MODE_HDLC) {
  444. skb_push(bcs->tx_skb, bcs->tx_cnt);
  445. bcs->tx_cnt = 0;
  446. }
  447. }
  448. static inline void hdlc_xpr_irq(struct fritz_bcs *bcs)
  449. {
  450. struct sk_buff *skb;
  451. skb = bcs->tx_skb;
  452. if (!skb)
  453. return;
  454. if (skb->len) {
  455. hdlc_fill_fifo(bcs);
  456. return;
  457. }
  458. bcs->tx_cnt = 0;
  459. bcs->tx_skb = NULL;
  460. B_L1L2(bcs, PH_DATA | CONFIRM, (void *)(unsigned long)skb->truesize);
  461. dev_kfree_skb_irq(skb);
  462. }
  463. static void hdlc_irq_one(struct fritz_bcs *bcs, u32 stat)
  464. {
  465. DBG(0x10, "ch%d stat %#x", bcs->channel, stat);
  466. if (stat & HDLC_INT_RPR) {
  467. DBG(0x10, "RPR");
  468. hdlc_rpr_irq(bcs, stat);
  469. }
  470. if (stat & HDLC_INT_XDU) {
  471. DBG(0x10, "XDU");
  472. hdlc_xdu_irq(bcs);
  473. hdlc_xpr_irq(bcs);
  474. return;
  475. }
  476. if (stat & HDLC_INT_XPR) {
  477. DBG(0x10, "XPR");
  478. hdlc_xpr_irq(bcs);
  479. }
  480. }
  481. static inline void hdlc_irq(struct fritz_adapter *adapter)
  482. {
  483. int nr;
  484. u32 stat;
  485. for (nr = 0; nr < 2; nr++) {
  486. stat = adapter->read_hdlc_status(adapter, nr);
  487. DBG(0x10, "HDLC %c stat %#x", 'A' + nr, stat);
  488. if (stat & HDLC_INT_MASK)
  489. hdlc_irq_one(&adapter->bcs[nr], stat);
  490. }
  491. }
  492. static void modehdlc(struct fritz_bcs *bcs, int mode)
  493. {
  494. struct fritz_adapter *adapter = bcs->adapter;
  495. DBG(0x40, "hdlc %c mode %d --> %d",
  496. 'A' + bcs->channel, bcs->mode, mode);
  497. if (bcs->mode == mode)
  498. return;
  499. bcs->fifo_size = 32;
  500. bcs->ctrl.ctrl = 0;
  501. bcs->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
  502. switch (mode) {
  503. case L1_MODE_NULL:
  504. bcs->ctrl.sr.mode = HDLC_MODE_TRANS;
  505. adapter->write_ctrl(bcs, 5);
  506. break;
  507. case L1_MODE_TRANS:
  508. case L1_MODE_HDLC:
  509. bcs->rcvidx = 0;
  510. bcs->tx_cnt = 0;
  511. bcs->tx_skb = NULL;
  512. if (mode == L1_MODE_TRANS) {
  513. bcs->ctrl.sr.mode = HDLC_MODE_TRANS;
  514. } else {
  515. bcs->ctrl.sr.mode = HDLC_MODE_ITF_FLG;
  516. }
  517. adapter->write_ctrl(bcs, 5);
  518. bcs->ctrl.sr.cmd = HDLC_CMD_XRS;
  519. adapter->write_ctrl(bcs, 1);
  520. bcs->ctrl.sr.cmd = 0;
  521. break;
  522. }
  523. bcs->mode = mode;
  524. }
  525. static void fritz_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
  526. {
  527. struct fritz_bcs *bcs = ifc->priv;
  528. struct sk_buff *skb = arg;
  529. int mode;
  530. DBG(0x10, "pr %#x", pr);
  531. switch (pr) {
  532. case PH_DATA | REQUEST:
  533. BUG_ON(bcs->tx_skb);
  534. bcs->tx_skb = skb;
  535. DBG_SKB(1, skb);
  536. hdlc_fill_fifo(bcs);
  537. break;
  538. case PH_ACTIVATE | REQUEST:
  539. mode = (long) arg;
  540. DBG(4,"B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode);
  541. modehdlc(bcs, mode);
  542. B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
  543. break;
  544. case PH_DEACTIVATE | REQUEST:
  545. DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
  546. modehdlc(bcs, L1_MODE_NULL);
  547. B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
  548. break;
  549. }
  550. }
  551. // ----------------------------------------------------------------------
  552. static irqreturn_t
  553. fcpci2_irq(int intno, void *dev)
  554. {
  555. struct fritz_adapter *adapter = dev;
  556. unsigned char val;
  557. val = inb(adapter->io + AVM_STATUS0);
  558. if (!(val & AVM_STATUS0_IRQ_MASK))
  559. /* hopefully a shared IRQ reqest */
  560. return IRQ_NONE;
  561. DBG(2, "STATUS0 %#x", val);
  562. if (val & AVM_STATUS0_IRQ_ISAC)
  563. isacsx_irq(&adapter->isac);
  564. if (val & AVM_STATUS0_IRQ_HDLC)
  565. hdlc_irq(adapter);
  566. if (val & AVM_STATUS0_IRQ_ISAC)
  567. isacsx_irq(&adapter->isac);
  568. return IRQ_HANDLED;
  569. }
  570. static irqreturn_t
  571. fcpci_irq(int intno, void *dev)
  572. {
  573. struct fritz_adapter *adapter = dev;
  574. unsigned char sval;
  575. sval = inb(adapter->io + 2);
  576. if ((sval & AVM_STATUS0_IRQ_MASK) == AVM_STATUS0_IRQ_MASK)
  577. /* possibly a shared IRQ reqest */
  578. return IRQ_NONE;
  579. DBG(2, "sval %#x", sval);
  580. if (!(sval & AVM_STATUS0_IRQ_ISAC))
  581. isac_irq(&adapter->isac);
  582. if (!(sval & AVM_STATUS0_IRQ_HDLC))
  583. hdlc_irq(adapter);
  584. return IRQ_HANDLED;
  585. }
  586. // ----------------------------------------------------------------------
  587. static inline void fcpci2_init(struct fritz_adapter *adapter)
  588. {
  589. outb(AVM_STATUS0_RES_TIMER, adapter->io + AVM_STATUS0);
  590. outb(AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0);
  591. }
  592. static inline void fcpci_init(struct fritz_adapter *adapter)
  593. {
  594. outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
  595. AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0);
  596. outb(AVM_STATUS1_ENA_IOM | adapter->irq,
  597. adapter->io + AVM_STATUS1);
  598. mdelay(10);
  599. }
  600. // ----------------------------------------------------------------------
  601. static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
  602. {
  603. u32 val = 0;
  604. int retval;
  605. DBG(1,"");
  606. isac_init(&adapter->isac); // FIXME is this okay now
  607. retval = -EBUSY;
  608. if (!request_region(adapter->io, 32, "fcpcipnp"))
  609. goto err;
  610. switch (adapter->type) {
  611. case AVM_FRITZ_PCIV2:
  612. retval = request_irq(adapter->irq, fcpci2_irq, IRQF_SHARED,
  613. "fcpcipnp", adapter);
  614. break;
  615. case AVM_FRITZ_PCI:
  616. retval = request_irq(adapter->irq, fcpci_irq, IRQF_SHARED,
  617. "fcpcipnp", adapter);
  618. break;
  619. case AVM_FRITZ_PNP:
  620. retval = request_irq(adapter->irq, fcpci_irq, 0,
  621. "fcpcipnp", adapter);
  622. break;
  623. }
  624. if (retval)
  625. goto err_region;
  626. switch (adapter->type) {
  627. case AVM_FRITZ_PCIV2:
  628. case AVM_FRITZ_PCI:
  629. val = inl(adapter->io);
  630. break;
  631. case AVM_FRITZ_PNP:
  632. val = inb(adapter->io);
  633. val |= inb(adapter->io + 1) << 8;
  634. break;
  635. }
  636. DBG(1, "stat %#x Class %X Rev %d",
  637. val, val & 0xff, (val>>8) & 0xff);
  638. spin_lock_init(&adapter->hw_lock);
  639. adapter->isac.priv = adapter;
  640. switch (adapter->type) {
  641. case AVM_FRITZ_PCIV2:
  642. adapter->isac.read_isac = &fcpci2_read_isac;
  643. adapter->isac.write_isac = &fcpci2_write_isac;
  644. adapter->isac.read_isac_fifo = &fcpci2_read_isac_fifo;
  645. adapter->isac.write_isac_fifo = &fcpci2_write_isac_fifo;
  646. adapter->read_hdlc_status = &fcpci2_read_hdlc_status;
  647. adapter->write_ctrl = &fcpci2_write_ctrl;
  648. break;
  649. case AVM_FRITZ_PCI:
  650. adapter->isac.read_isac = &fcpci_read_isac;
  651. adapter->isac.write_isac = &fcpci_write_isac;
  652. adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
  653. adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
  654. adapter->read_hdlc_status = &fcpci_read_hdlc_status;
  655. adapter->write_ctrl = &fcpci_write_ctrl;
  656. break;
  657. case AVM_FRITZ_PNP:
  658. adapter->isac.read_isac = &fcpci_read_isac;
  659. adapter->isac.write_isac = &fcpci_write_isac;
  660. adapter->isac.read_isac_fifo = &fcpci_read_isac_fifo;
  661. adapter->isac.write_isac_fifo = &fcpci_write_isac_fifo;
  662. adapter->read_hdlc_status = &fcpnp_read_hdlc_status;
  663. adapter->write_ctrl = &fcpnp_write_ctrl;
  664. break;
  665. }
  666. // Reset
  667. outb(0, adapter->io + AVM_STATUS0);
  668. mdelay(10);
  669. outb(AVM_STATUS0_RESET, adapter->io + AVM_STATUS0);
  670. mdelay(10);
  671. outb(0, adapter->io + AVM_STATUS0);
  672. mdelay(10);
  673. switch (adapter->type) {
  674. case AVM_FRITZ_PCIV2:
  675. fcpci2_init(adapter);
  676. isacsx_setup(&adapter->isac);
  677. break;
  678. case AVM_FRITZ_PCI:
  679. case AVM_FRITZ_PNP:
  680. fcpci_init(adapter);
  681. isac_setup(&adapter->isac);
  682. break;
  683. }
  684. val = adapter->read_hdlc_status(adapter, 0);
  685. DBG(0x20, "HDLC A STA %x", val);
  686. val = adapter->read_hdlc_status(adapter, 1);
  687. DBG(0x20, "HDLC B STA %x", val);
  688. adapter->bcs[0].mode = -1;
  689. adapter->bcs[1].mode = -1;
  690. modehdlc(&adapter->bcs[0], L1_MODE_NULL);
  691. modehdlc(&adapter->bcs[1], L1_MODE_NULL);
  692. return 0;
  693. err_region:
  694. release_region(adapter->io, 32);
  695. err:
  696. return retval;
  697. }
  698. static void __devexit fcpcipnp_release(struct fritz_adapter *adapter)
  699. {
  700. DBG(1,"");
  701. outb(0, adapter->io + AVM_STATUS0);
  702. free_irq(adapter->irq, adapter);
  703. release_region(adapter->io, 32);
  704. }
  705. // ----------------------------------------------------------------------
  706. static struct fritz_adapter * __devinit
  707. new_adapter(void)
  708. {
  709. struct fritz_adapter *adapter;
  710. struct hisax_b_if *b_if[2];
  711. int i;
  712. adapter = kmalloc(sizeof(struct fritz_adapter), GFP_KERNEL);
  713. if (!adapter)
  714. return NULL;
  715. memset(adapter, 0, sizeof(struct fritz_adapter));
  716. adapter->isac.hisax_d_if.owner = THIS_MODULE;
  717. adapter->isac.hisax_d_if.ifc.priv = &adapter->isac;
  718. adapter->isac.hisax_d_if.ifc.l2l1 = isac_d_l2l1;
  719. for (i = 0; i < 2; i++) {
  720. adapter->bcs[i].adapter = adapter;
  721. adapter->bcs[i].channel = i;
  722. adapter->bcs[i].b_if.ifc.priv = &adapter->bcs[i];
  723. adapter->bcs[i].b_if.ifc.l2l1 = fritz_b_l2l1;
  724. }
  725. for (i = 0; i < 2; i++)
  726. b_if[i] = &adapter->bcs[i].b_if;
  727. hisax_register(&adapter->isac.hisax_d_if, b_if, "fcpcipnp", protocol);
  728. return adapter;
  729. }
  730. static void delete_adapter(struct fritz_adapter *adapter)
  731. {
  732. hisax_unregister(&adapter->isac.hisax_d_if);
  733. kfree(adapter);
  734. }
  735. static int __devinit fcpci_probe(struct pci_dev *pdev,
  736. const struct pci_device_id *ent)
  737. {
  738. struct fritz_adapter *adapter;
  739. int retval;
  740. retval = -ENOMEM;
  741. adapter = new_adapter();
  742. if (!adapter)
  743. goto err;
  744. pci_set_drvdata(pdev, adapter);
  745. if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
  746. adapter->type = AVM_FRITZ_PCIV2;
  747. else
  748. adapter->type = AVM_FRITZ_PCI;
  749. retval = pci_enable_device(pdev);
  750. if (retval)
  751. goto err_free;
  752. adapter->io = pci_resource_start(pdev, 1);
  753. adapter->irq = pdev->irq;
  754. printk(KERN_INFO "hisax_fcpcipnp: found adapter %s at %s\n",
  755. (char *) ent->driver_data, pci_name(pdev));
  756. retval = fcpcipnp_setup(adapter);
  757. if (retval)
  758. goto err_free;
  759. return 0;
  760. err_free:
  761. delete_adapter(adapter);
  762. err:
  763. return retval;
  764. }
  765. #ifdef __ISAPNP__
  766. static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
  767. {
  768. struct fritz_adapter *adapter;
  769. int retval;
  770. if (!pdev)
  771. return(-ENODEV);
  772. retval = -ENOMEM;
  773. adapter = new_adapter();
  774. if (!adapter)
  775. goto err;
  776. pnp_set_drvdata(pdev, adapter);
  777. adapter->type = AVM_FRITZ_PNP;
  778. pnp_disable_dev(pdev);
  779. retval = pnp_activate_dev(pdev);
  780. if (retval < 0) {
  781. printk(KERN_WARNING "%s: pnp_activate_dev(%s) ret(%d)\n", __FUNCTION__,
  782. (char *)dev_id->driver_data, retval);
  783. goto err_free;
  784. }
  785. adapter->io = pnp_port_start(pdev, 0);
  786. adapter->irq = pnp_irq(pdev, 0);
  787. printk(KERN_INFO "hisax_fcpcipnp: found adapter %s at IO %#x irq %d\n",
  788. (char *) dev_id->driver_data, adapter->io, adapter->irq);
  789. retval = fcpcipnp_setup(adapter);
  790. if (retval)
  791. goto err_free;
  792. return 0;
  793. err_free:
  794. delete_adapter(adapter);
  795. err:
  796. return retval;
  797. }
  798. static void __devexit fcpnp_remove(struct pnp_dev *pdev)
  799. {
  800. struct fritz_adapter *adapter = pnp_get_drvdata(pdev);
  801. if (adapter) {
  802. fcpcipnp_release(adapter);
  803. delete_adapter(adapter);
  804. }
  805. pnp_disable_dev(pdev);
  806. }
  807. static struct pnp_driver fcpnp_driver = {
  808. .name = "fcpnp",
  809. .probe = fcpnp_probe,
  810. .remove = __devexit_p(fcpnp_remove),
  811. .id_table = fcpnp_ids,
  812. };
  813. #endif
  814. static void __devexit fcpci_remove(struct pci_dev *pdev)
  815. {
  816. struct fritz_adapter *adapter = pci_get_drvdata(pdev);
  817. fcpcipnp_release(adapter);
  818. pci_disable_device(pdev);
  819. delete_adapter(adapter);
  820. }
  821. static struct pci_driver fcpci_driver = {
  822. .name = "fcpci",
  823. .probe = fcpci_probe,
  824. .remove = __devexit_p(fcpci_remove),
  825. .id_table = fcpci_ids,
  826. };
  827. static int __init hisax_fcpcipnp_init(void)
  828. {
  829. int retval;
  830. printk(KERN_INFO "hisax_fcpcipnp: Fritz!Card PCI/PCIv2/PnP ISDN driver v0.0.1\n");
  831. retval = pci_register_driver(&fcpci_driver);
  832. if (retval)
  833. return retval;
  834. #ifdef __ISAPNP__
  835. retval = pnp_register_driver(&fcpnp_driver);
  836. if (retval < 0) {
  837. pci_unregister_driver(&fcpci_driver);
  838. return retval;
  839. }
  840. #endif
  841. return 0;
  842. }
  843. static void __exit hisax_fcpcipnp_exit(void)
  844. {
  845. #ifdef __ISAPNP__
  846. pnp_unregister_driver(&fcpnp_driver);
  847. #endif
  848. pci_unregister_driver(&fcpci_driver);
  849. }
  850. module_init(hisax_fcpcipnp_init);
  851. module_exit(hisax_fcpcipnp_exit);