ehca_mrmw.c 66 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * MR/MW functions
  5. *
  6. * Authors: Dietmar Decker <ddecker@de.ibm.com>
  7. * Christoph Raisch <raisch@de.ibm.com>
  8. *
  9. * Copyright (c) 2005 IBM Corporation
  10. *
  11. * All rights reserved.
  12. *
  13. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  14. * BSD.
  15. *
  16. * OpenIB BSD License
  17. *
  18. * Redistribution and use in source and binary forms, with or without
  19. * modification, are permitted provided that the following conditions are met:
  20. *
  21. * Redistributions of source code must retain the above copyright notice, this
  22. * list of conditions and the following disclaimer.
  23. *
  24. * Redistributions in binary form must reproduce the above copyright notice,
  25. * this list of conditions and the following disclaimer in the documentation
  26. * and/or other materials
  27. * provided with the distribution.
  28. *
  29. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  32. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  33. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  34. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  35. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  36. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  37. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  38. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  39. * POSSIBILITY OF SUCH DAMAGE.
  40. */
  41. #include <asm/current.h>
  42. #include "ehca_iverbs.h"
  43. #include "ehca_mrmw.h"
  44. #include "hcp_if.h"
  45. #include "hipz_hw.h"
  46. static struct kmem_cache *mr_cache;
  47. static struct kmem_cache *mw_cache;
  48. static struct ehca_mr *ehca_mr_new(void)
  49. {
  50. struct ehca_mr *me;
  51. me = kmem_cache_alloc(mr_cache, SLAB_KERNEL);
  52. if (me) {
  53. memset(me, 0, sizeof(struct ehca_mr));
  54. spin_lock_init(&me->mrlock);
  55. } else
  56. ehca_gen_err("alloc failed");
  57. return me;
  58. }
  59. static void ehca_mr_delete(struct ehca_mr *me)
  60. {
  61. kmem_cache_free(mr_cache, me);
  62. }
  63. static struct ehca_mw *ehca_mw_new(void)
  64. {
  65. struct ehca_mw *me;
  66. me = kmem_cache_alloc(mw_cache, SLAB_KERNEL);
  67. if (me) {
  68. memset(me, 0, sizeof(struct ehca_mw));
  69. spin_lock_init(&me->mwlock);
  70. } else
  71. ehca_gen_err("alloc failed");
  72. return me;
  73. }
  74. static void ehca_mw_delete(struct ehca_mw *me)
  75. {
  76. kmem_cache_free(mw_cache, me);
  77. }
  78. /*----------------------------------------------------------------------*/
  79. struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
  80. {
  81. struct ib_mr *ib_mr;
  82. int ret;
  83. struct ehca_mr *e_maxmr;
  84. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  85. struct ehca_shca *shca =
  86. container_of(pd->device, struct ehca_shca, ib_device);
  87. if (shca->maxmr) {
  88. e_maxmr = ehca_mr_new();
  89. if (!e_maxmr) {
  90. ehca_err(&shca->ib_device, "out of memory");
  91. ib_mr = ERR_PTR(-ENOMEM);
  92. goto get_dma_mr_exit0;
  93. }
  94. ret = ehca_reg_maxmr(shca, e_maxmr, (u64*)KERNELBASE,
  95. mr_access_flags, e_pd,
  96. &e_maxmr->ib.ib_mr.lkey,
  97. &e_maxmr->ib.ib_mr.rkey);
  98. if (ret) {
  99. ib_mr = ERR_PTR(ret);
  100. goto get_dma_mr_exit0;
  101. }
  102. ib_mr = &e_maxmr->ib.ib_mr;
  103. } else {
  104. ehca_err(&shca->ib_device, "no internal max-MR exist!");
  105. ib_mr = ERR_PTR(-EINVAL);
  106. goto get_dma_mr_exit0;
  107. }
  108. get_dma_mr_exit0:
  109. if (IS_ERR(ib_mr))
  110. ehca_err(&shca->ib_device, "rc=%lx pd=%p mr_access_flags=%x ",
  111. PTR_ERR(ib_mr), pd, mr_access_flags);
  112. return ib_mr;
  113. } /* end ehca_get_dma_mr() */
  114. /*----------------------------------------------------------------------*/
  115. struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
  116. struct ib_phys_buf *phys_buf_array,
  117. int num_phys_buf,
  118. int mr_access_flags,
  119. u64 *iova_start)
  120. {
  121. struct ib_mr *ib_mr;
  122. int ret;
  123. struct ehca_mr *e_mr;
  124. struct ehca_shca *shca =
  125. container_of(pd->device, struct ehca_shca, ib_device);
  126. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  127. u64 size;
  128. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  129. u32 num_pages_mr;
  130. u32 num_pages_4k; /* 4k portion "pages" */
  131. if ((num_phys_buf <= 0) || !phys_buf_array) {
  132. ehca_err(pd->device, "bad input values: num_phys_buf=%x "
  133. "phys_buf_array=%p", num_phys_buf, phys_buf_array);
  134. ib_mr = ERR_PTR(-EINVAL);
  135. goto reg_phys_mr_exit0;
  136. }
  137. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  138. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  139. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  140. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  141. /*
  142. * Remote Write Access requires Local Write Access
  143. * Remote Atomic Access requires Local Write Access
  144. */
  145. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  146. mr_access_flags);
  147. ib_mr = ERR_PTR(-EINVAL);
  148. goto reg_phys_mr_exit0;
  149. }
  150. /* check physical buffer list and calculate size */
  151. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array, num_phys_buf,
  152. iova_start, &size);
  153. if (ret) {
  154. ib_mr = ERR_PTR(ret);
  155. goto reg_phys_mr_exit0;
  156. }
  157. if ((size == 0) ||
  158. (((u64)iova_start + size) < (u64)iova_start)) {
  159. ehca_err(pd->device, "bad input values: size=%lx iova_start=%p",
  160. size, iova_start);
  161. ib_mr = ERR_PTR(-EINVAL);
  162. goto reg_phys_mr_exit0;
  163. }
  164. e_mr = ehca_mr_new();
  165. if (!e_mr) {
  166. ehca_err(pd->device, "out of memory");
  167. ib_mr = ERR_PTR(-ENOMEM);
  168. goto reg_phys_mr_exit0;
  169. }
  170. /* determine number of MR pages */
  171. num_pages_mr = ((((u64)iova_start % PAGE_SIZE) + size +
  172. PAGE_SIZE - 1) / PAGE_SIZE);
  173. num_pages_4k = ((((u64)iova_start % EHCA_PAGESIZE) + size +
  174. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  175. /* register MR on HCA */
  176. if (ehca_mr_is_maxmr(size, iova_start)) {
  177. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  178. ret = ehca_reg_maxmr(shca, e_mr, iova_start, mr_access_flags,
  179. e_pd, &e_mr->ib.ib_mr.lkey,
  180. &e_mr->ib.ib_mr.rkey);
  181. if (ret) {
  182. ib_mr = ERR_PTR(ret);
  183. goto reg_phys_mr_exit1;
  184. }
  185. } else {
  186. pginfo.type = EHCA_MR_PGI_PHYS;
  187. pginfo.num_pages = num_pages_mr;
  188. pginfo.num_4k = num_pages_4k;
  189. pginfo.num_phys_buf = num_phys_buf;
  190. pginfo.phys_buf_array = phys_buf_array;
  191. pginfo.next_4k = (((u64)iova_start & ~PAGE_MASK) /
  192. EHCA_PAGESIZE);
  193. ret = ehca_reg_mr(shca, e_mr, iova_start, size, mr_access_flags,
  194. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  195. &e_mr->ib.ib_mr.rkey);
  196. if (ret) {
  197. ib_mr = ERR_PTR(ret);
  198. goto reg_phys_mr_exit1;
  199. }
  200. }
  201. /* successful registration of all pages */
  202. return &e_mr->ib.ib_mr;
  203. reg_phys_mr_exit1:
  204. ehca_mr_delete(e_mr);
  205. reg_phys_mr_exit0:
  206. if (IS_ERR(ib_mr))
  207. ehca_err(pd->device, "rc=%lx pd=%p phys_buf_array=%p "
  208. "num_phys_buf=%x mr_access_flags=%x iova_start=%p",
  209. PTR_ERR(ib_mr), pd, phys_buf_array,
  210. num_phys_buf, mr_access_flags, iova_start);
  211. return ib_mr;
  212. } /* end ehca_reg_phys_mr() */
  213. /*----------------------------------------------------------------------*/
  214. struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd,
  215. struct ib_umem *region,
  216. int mr_access_flags,
  217. struct ib_udata *udata)
  218. {
  219. struct ib_mr *ib_mr;
  220. struct ehca_mr *e_mr;
  221. struct ehca_shca *shca =
  222. container_of(pd->device, struct ehca_shca, ib_device);
  223. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  224. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  225. int ret;
  226. u32 num_pages_mr;
  227. u32 num_pages_4k; /* 4k portion "pages" */
  228. if (!pd) {
  229. ehca_gen_err("bad pd=%p", pd);
  230. return ERR_PTR(-EFAULT);
  231. }
  232. if (!region) {
  233. ehca_err(pd->device, "bad input values: region=%p", region);
  234. ib_mr = ERR_PTR(-EINVAL);
  235. goto reg_user_mr_exit0;
  236. }
  237. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  238. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  239. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  240. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  241. /*
  242. * Remote Write Access requires Local Write Access
  243. * Remote Atomic Access requires Local Write Access
  244. */
  245. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  246. mr_access_flags);
  247. ib_mr = ERR_PTR(-EINVAL);
  248. goto reg_user_mr_exit0;
  249. }
  250. if (region->page_size != PAGE_SIZE) {
  251. ehca_err(pd->device, "page size not supported, "
  252. "region->page_size=%x", region->page_size);
  253. ib_mr = ERR_PTR(-EINVAL);
  254. goto reg_user_mr_exit0;
  255. }
  256. if ((region->length == 0) ||
  257. ((region->virt_base + region->length) < region->virt_base)) {
  258. ehca_err(pd->device, "bad input values: length=%lx "
  259. "virt_base=%lx", region->length, region->virt_base);
  260. ib_mr = ERR_PTR(-EINVAL);
  261. goto reg_user_mr_exit0;
  262. }
  263. e_mr = ehca_mr_new();
  264. if (!e_mr) {
  265. ehca_err(pd->device, "out of memory");
  266. ib_mr = ERR_PTR(-ENOMEM);
  267. goto reg_user_mr_exit0;
  268. }
  269. /* determine number of MR pages */
  270. num_pages_mr = (((region->virt_base % PAGE_SIZE) + region->length +
  271. PAGE_SIZE - 1) / PAGE_SIZE);
  272. num_pages_4k = (((region->virt_base % EHCA_PAGESIZE) + region->length +
  273. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  274. /* register MR on HCA */
  275. pginfo.type = EHCA_MR_PGI_USER;
  276. pginfo.num_pages = num_pages_mr;
  277. pginfo.num_4k = num_pages_4k;
  278. pginfo.region = region;
  279. pginfo.next_4k = region->offset / EHCA_PAGESIZE;
  280. pginfo.next_chunk = list_prepare_entry(pginfo.next_chunk,
  281. (&region->chunk_list),
  282. list);
  283. ret = ehca_reg_mr(shca, e_mr, (u64*)region->virt_base,
  284. region->length, mr_access_flags, e_pd, &pginfo,
  285. &e_mr->ib.ib_mr.lkey, &e_mr->ib.ib_mr.rkey);
  286. if (ret) {
  287. ib_mr = ERR_PTR(ret);
  288. goto reg_user_mr_exit1;
  289. }
  290. /* successful registration of all pages */
  291. return &e_mr->ib.ib_mr;
  292. reg_user_mr_exit1:
  293. ehca_mr_delete(e_mr);
  294. reg_user_mr_exit0:
  295. if (IS_ERR(ib_mr))
  296. ehca_err(pd->device, "rc=%lx pd=%p region=%p mr_access_flags=%x"
  297. " udata=%p",
  298. PTR_ERR(ib_mr), pd, region, mr_access_flags, udata);
  299. return ib_mr;
  300. } /* end ehca_reg_user_mr() */
  301. /*----------------------------------------------------------------------*/
  302. int ehca_rereg_phys_mr(struct ib_mr *mr,
  303. int mr_rereg_mask,
  304. struct ib_pd *pd,
  305. struct ib_phys_buf *phys_buf_array,
  306. int num_phys_buf,
  307. int mr_access_flags,
  308. u64 *iova_start)
  309. {
  310. int ret;
  311. struct ehca_shca *shca =
  312. container_of(mr->device, struct ehca_shca, ib_device);
  313. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  314. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  315. u64 new_size;
  316. u64 *new_start;
  317. u32 new_acl;
  318. struct ehca_pd *new_pd;
  319. u32 tmp_lkey, tmp_rkey;
  320. unsigned long sl_flags;
  321. u32 num_pages_mr = 0;
  322. u32 num_pages_4k = 0; /* 4k portion "pages" */
  323. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  324. u32 cur_pid = current->tgid;
  325. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  326. (my_pd->ownpid != cur_pid)) {
  327. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  328. cur_pid, my_pd->ownpid);
  329. ret = -EINVAL;
  330. goto rereg_phys_mr_exit0;
  331. }
  332. if (!(mr_rereg_mask & IB_MR_REREG_TRANS)) {
  333. /* TODO not supported, because PHYP rereg hCall needs pages */
  334. ehca_err(mr->device, "rereg without IB_MR_REREG_TRANS not "
  335. "supported yet, mr_rereg_mask=%x", mr_rereg_mask);
  336. ret = -EINVAL;
  337. goto rereg_phys_mr_exit0;
  338. }
  339. if (mr_rereg_mask & IB_MR_REREG_PD) {
  340. if (!pd) {
  341. ehca_err(mr->device, "rereg with bad pd, pd=%p "
  342. "mr_rereg_mask=%x", pd, mr_rereg_mask);
  343. ret = -EINVAL;
  344. goto rereg_phys_mr_exit0;
  345. }
  346. }
  347. if ((mr_rereg_mask &
  348. ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS)) ||
  349. (mr_rereg_mask == 0)) {
  350. ret = -EINVAL;
  351. goto rereg_phys_mr_exit0;
  352. }
  353. /* check other parameters */
  354. if (e_mr == shca->maxmr) {
  355. /* should be impossible, however reject to be sure */
  356. ehca_err(mr->device, "rereg internal max-MR impossible, mr=%p "
  357. "shca->maxmr=%p mr->lkey=%x",
  358. mr, shca->maxmr, mr->lkey);
  359. ret = -EINVAL;
  360. goto rereg_phys_mr_exit0;
  361. }
  362. if (mr_rereg_mask & IB_MR_REREG_TRANS) { /* transl., i.e. addr/size */
  363. if (e_mr->flags & EHCA_MR_FLAG_FMR) {
  364. ehca_err(mr->device, "not supported for FMR, mr=%p "
  365. "flags=%x", mr, e_mr->flags);
  366. ret = -EINVAL;
  367. goto rereg_phys_mr_exit0;
  368. }
  369. if (!phys_buf_array || num_phys_buf <= 0) {
  370. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x"
  371. " phys_buf_array=%p num_phys_buf=%x",
  372. mr_rereg_mask, phys_buf_array, num_phys_buf);
  373. ret = -EINVAL;
  374. goto rereg_phys_mr_exit0;
  375. }
  376. }
  377. if ((mr_rereg_mask & IB_MR_REREG_ACCESS) && /* change ACL */
  378. (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  379. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  380. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  381. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)))) {
  382. /*
  383. * Remote Write Access requires Local Write Access
  384. * Remote Atomic Access requires Local Write Access
  385. */
  386. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x "
  387. "mr_access_flags=%x", mr_rereg_mask, mr_access_flags);
  388. ret = -EINVAL;
  389. goto rereg_phys_mr_exit0;
  390. }
  391. /* set requested values dependent on rereg request */
  392. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  393. new_start = e_mr->start; /* new == old address */
  394. new_size = e_mr->size; /* new == old length */
  395. new_acl = e_mr->acl; /* new == old access control */
  396. new_pd = container_of(mr->pd,struct ehca_pd,ib_pd); /*new == old PD*/
  397. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  398. new_start = iova_start; /* change address */
  399. /* check physical buffer list and calculate size */
  400. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array,
  401. num_phys_buf, iova_start,
  402. &new_size);
  403. if (ret)
  404. goto rereg_phys_mr_exit1;
  405. if ((new_size == 0) ||
  406. (((u64)iova_start + new_size) < (u64)iova_start)) {
  407. ehca_err(mr->device, "bad input values: new_size=%lx "
  408. "iova_start=%p", new_size, iova_start);
  409. ret = -EINVAL;
  410. goto rereg_phys_mr_exit1;
  411. }
  412. num_pages_mr = ((((u64)new_start % PAGE_SIZE) + new_size +
  413. PAGE_SIZE - 1) / PAGE_SIZE);
  414. num_pages_4k = ((((u64)new_start % EHCA_PAGESIZE) + new_size +
  415. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  416. pginfo.type = EHCA_MR_PGI_PHYS;
  417. pginfo.num_pages = num_pages_mr;
  418. pginfo.num_4k = num_pages_4k;
  419. pginfo.num_phys_buf = num_phys_buf;
  420. pginfo.phys_buf_array = phys_buf_array;
  421. pginfo.next_4k = (((u64)iova_start & ~PAGE_MASK) /
  422. EHCA_PAGESIZE);
  423. }
  424. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  425. new_acl = mr_access_flags;
  426. if (mr_rereg_mask & IB_MR_REREG_PD)
  427. new_pd = container_of(pd, struct ehca_pd, ib_pd);
  428. ret = ehca_rereg_mr(shca, e_mr, new_start, new_size, new_acl,
  429. new_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  430. if (ret)
  431. goto rereg_phys_mr_exit1;
  432. /* successful reregistration */
  433. if (mr_rereg_mask & IB_MR_REREG_PD)
  434. mr->pd = pd;
  435. mr->lkey = tmp_lkey;
  436. mr->rkey = tmp_rkey;
  437. rereg_phys_mr_exit1:
  438. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  439. rereg_phys_mr_exit0:
  440. if (ret)
  441. ehca_err(mr->device, "ret=%x mr=%p mr_rereg_mask=%x pd=%p "
  442. "phys_buf_array=%p num_phys_buf=%x mr_access_flags=%x "
  443. "iova_start=%p",
  444. ret, mr, mr_rereg_mask, pd, phys_buf_array,
  445. num_phys_buf, mr_access_flags, iova_start);
  446. return ret;
  447. } /* end ehca_rereg_phys_mr() */
  448. /*----------------------------------------------------------------------*/
  449. int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
  450. {
  451. int ret = 0;
  452. u64 h_ret;
  453. struct ehca_shca *shca =
  454. container_of(mr->device, struct ehca_shca, ib_device);
  455. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  456. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  457. u32 cur_pid = current->tgid;
  458. unsigned long sl_flags;
  459. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  460. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  461. (my_pd->ownpid != cur_pid)) {
  462. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  463. cur_pid, my_pd->ownpid);
  464. ret = -EINVAL;
  465. goto query_mr_exit0;
  466. }
  467. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  468. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  469. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  470. ret = -EINVAL;
  471. goto query_mr_exit0;
  472. }
  473. memset(mr_attr, 0, sizeof(struct ib_mr_attr));
  474. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  475. h_ret = hipz_h_query_mr(shca->ipz_hca_handle, e_mr, &hipzout);
  476. if (h_ret != H_SUCCESS) {
  477. ehca_err(mr->device, "hipz_mr_query failed, h_ret=%lx mr=%p "
  478. "hca_hndl=%lx mr_hndl=%lx lkey=%x",
  479. h_ret, mr, shca->ipz_hca_handle.handle,
  480. e_mr->ipz_mr_handle.handle, mr->lkey);
  481. ret = ehca_mrmw_map_hrc_query_mr(h_ret);
  482. goto query_mr_exit1;
  483. }
  484. mr_attr->pd = mr->pd;
  485. mr_attr->device_virt_addr = hipzout.vaddr;
  486. mr_attr->size = hipzout.len;
  487. mr_attr->lkey = hipzout.lkey;
  488. mr_attr->rkey = hipzout.rkey;
  489. ehca_mrmw_reverse_map_acl(&hipzout.acl, &mr_attr->mr_access_flags);
  490. query_mr_exit1:
  491. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  492. query_mr_exit0:
  493. if (ret)
  494. ehca_err(mr->device, "ret=%x mr=%p mr_attr=%p",
  495. ret, mr, mr_attr);
  496. return ret;
  497. } /* end ehca_query_mr() */
  498. /*----------------------------------------------------------------------*/
  499. int ehca_dereg_mr(struct ib_mr *mr)
  500. {
  501. int ret = 0;
  502. u64 h_ret;
  503. struct ehca_shca *shca =
  504. container_of(mr->device, struct ehca_shca, ib_device);
  505. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  506. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  507. u32 cur_pid = current->tgid;
  508. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  509. (my_pd->ownpid != cur_pid)) {
  510. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  511. cur_pid, my_pd->ownpid);
  512. ret = -EINVAL;
  513. goto dereg_mr_exit0;
  514. }
  515. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  516. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  517. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  518. ret = -EINVAL;
  519. goto dereg_mr_exit0;
  520. } else if (e_mr == shca->maxmr) {
  521. /* should be impossible, however reject to be sure */
  522. ehca_err(mr->device, "dereg internal max-MR impossible, mr=%p "
  523. "shca->maxmr=%p mr->lkey=%x",
  524. mr, shca->maxmr, mr->lkey);
  525. ret = -EINVAL;
  526. goto dereg_mr_exit0;
  527. }
  528. /* TODO: BUSY: MR still has bound window(s) */
  529. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  530. if (h_ret != H_SUCCESS) {
  531. ehca_err(mr->device, "hipz_free_mr failed, h_ret=%lx shca=%p "
  532. "e_mr=%p hca_hndl=%lx mr_hndl=%lx mr->lkey=%x",
  533. h_ret, shca, e_mr, shca->ipz_hca_handle.handle,
  534. e_mr->ipz_mr_handle.handle, mr->lkey);
  535. ret = ehca_mrmw_map_hrc_free_mr(h_ret);
  536. goto dereg_mr_exit0;
  537. }
  538. /* successful deregistration */
  539. ehca_mr_delete(e_mr);
  540. dereg_mr_exit0:
  541. if (ret)
  542. ehca_err(mr->device, "ret=%x mr=%p", ret, mr);
  543. return ret;
  544. } /* end ehca_dereg_mr() */
  545. /*----------------------------------------------------------------------*/
  546. struct ib_mw *ehca_alloc_mw(struct ib_pd *pd)
  547. {
  548. struct ib_mw *ib_mw;
  549. u64 h_ret;
  550. struct ehca_mw *e_mw;
  551. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  552. struct ehca_shca *shca =
  553. container_of(pd->device, struct ehca_shca, ib_device);
  554. struct ehca_mw_hipzout_parms hipzout = {{0},0};
  555. e_mw = ehca_mw_new();
  556. if (!e_mw) {
  557. ib_mw = ERR_PTR(-ENOMEM);
  558. goto alloc_mw_exit0;
  559. }
  560. h_ret = hipz_h_alloc_resource_mw(shca->ipz_hca_handle, e_mw,
  561. e_pd->fw_pd, &hipzout);
  562. if (h_ret != H_SUCCESS) {
  563. ehca_err(pd->device, "hipz_mw_allocate failed, h_ret=%lx "
  564. "shca=%p hca_hndl=%lx mw=%p",
  565. h_ret, shca, shca->ipz_hca_handle.handle, e_mw);
  566. ib_mw = ERR_PTR(ehca_mrmw_map_hrc_alloc(h_ret));
  567. goto alloc_mw_exit1;
  568. }
  569. /* successful MW allocation */
  570. e_mw->ipz_mw_handle = hipzout.handle;
  571. e_mw->ib_mw.rkey = hipzout.rkey;
  572. return &e_mw->ib_mw;
  573. alloc_mw_exit1:
  574. ehca_mw_delete(e_mw);
  575. alloc_mw_exit0:
  576. if (IS_ERR(ib_mw))
  577. ehca_err(pd->device, "rc=%lx pd=%p", PTR_ERR(ib_mw), pd);
  578. return ib_mw;
  579. } /* end ehca_alloc_mw() */
  580. /*----------------------------------------------------------------------*/
  581. int ehca_bind_mw(struct ib_qp *qp,
  582. struct ib_mw *mw,
  583. struct ib_mw_bind *mw_bind)
  584. {
  585. /* TODO: not supported up to now */
  586. ehca_gen_err("bind MW currently not supported by HCAD");
  587. return -EPERM;
  588. } /* end ehca_bind_mw() */
  589. /*----------------------------------------------------------------------*/
  590. int ehca_dealloc_mw(struct ib_mw *mw)
  591. {
  592. u64 h_ret;
  593. struct ehca_shca *shca =
  594. container_of(mw->device, struct ehca_shca, ib_device);
  595. struct ehca_mw *e_mw = container_of(mw, struct ehca_mw, ib_mw);
  596. h_ret = hipz_h_free_resource_mw(shca->ipz_hca_handle, e_mw);
  597. if (h_ret != H_SUCCESS) {
  598. ehca_err(mw->device, "hipz_free_mw failed, h_ret=%lx shca=%p "
  599. "mw=%p rkey=%x hca_hndl=%lx mw_hndl=%lx",
  600. h_ret, shca, mw, mw->rkey, shca->ipz_hca_handle.handle,
  601. e_mw->ipz_mw_handle.handle);
  602. return ehca_mrmw_map_hrc_free_mw(h_ret);
  603. }
  604. /* successful deallocation */
  605. ehca_mw_delete(e_mw);
  606. return 0;
  607. } /* end ehca_dealloc_mw() */
  608. /*----------------------------------------------------------------------*/
  609. struct ib_fmr *ehca_alloc_fmr(struct ib_pd *pd,
  610. int mr_access_flags,
  611. struct ib_fmr_attr *fmr_attr)
  612. {
  613. struct ib_fmr *ib_fmr;
  614. struct ehca_shca *shca =
  615. container_of(pd->device, struct ehca_shca, ib_device);
  616. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  617. struct ehca_mr *e_fmr;
  618. int ret;
  619. u32 tmp_lkey, tmp_rkey;
  620. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  621. /* check other parameters */
  622. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  623. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  624. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  625. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  626. /*
  627. * Remote Write Access requires Local Write Access
  628. * Remote Atomic Access requires Local Write Access
  629. */
  630. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  631. mr_access_flags);
  632. ib_fmr = ERR_PTR(-EINVAL);
  633. goto alloc_fmr_exit0;
  634. }
  635. if (mr_access_flags & IB_ACCESS_MW_BIND) {
  636. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  637. mr_access_flags);
  638. ib_fmr = ERR_PTR(-EINVAL);
  639. goto alloc_fmr_exit0;
  640. }
  641. if ((fmr_attr->max_pages == 0) || (fmr_attr->max_maps == 0)) {
  642. ehca_err(pd->device, "bad input values: fmr_attr->max_pages=%x "
  643. "fmr_attr->max_maps=%x fmr_attr->page_shift=%x",
  644. fmr_attr->max_pages, fmr_attr->max_maps,
  645. fmr_attr->page_shift);
  646. ib_fmr = ERR_PTR(-EINVAL);
  647. goto alloc_fmr_exit0;
  648. }
  649. if (((1 << fmr_attr->page_shift) != EHCA_PAGESIZE) &&
  650. ((1 << fmr_attr->page_shift) != PAGE_SIZE)) {
  651. ehca_err(pd->device, "unsupported fmr_attr->page_shift=%x",
  652. fmr_attr->page_shift);
  653. ib_fmr = ERR_PTR(-EINVAL);
  654. goto alloc_fmr_exit0;
  655. }
  656. e_fmr = ehca_mr_new();
  657. if (!e_fmr) {
  658. ib_fmr = ERR_PTR(-ENOMEM);
  659. goto alloc_fmr_exit0;
  660. }
  661. e_fmr->flags |= EHCA_MR_FLAG_FMR;
  662. /* register MR on HCA */
  663. ret = ehca_reg_mr(shca, e_fmr, NULL,
  664. fmr_attr->max_pages * (1 << fmr_attr->page_shift),
  665. mr_access_flags, e_pd, &pginfo,
  666. &tmp_lkey, &tmp_rkey);
  667. if (ret) {
  668. ib_fmr = ERR_PTR(ret);
  669. goto alloc_fmr_exit1;
  670. }
  671. /* successful */
  672. e_fmr->fmr_page_size = 1 << fmr_attr->page_shift;
  673. e_fmr->fmr_max_pages = fmr_attr->max_pages;
  674. e_fmr->fmr_max_maps = fmr_attr->max_maps;
  675. e_fmr->fmr_map_cnt = 0;
  676. return &e_fmr->ib.ib_fmr;
  677. alloc_fmr_exit1:
  678. ehca_mr_delete(e_fmr);
  679. alloc_fmr_exit0:
  680. if (IS_ERR(ib_fmr))
  681. ehca_err(pd->device, "rc=%lx pd=%p mr_access_flags=%x "
  682. "fmr_attr=%p", PTR_ERR(ib_fmr), pd,
  683. mr_access_flags, fmr_attr);
  684. return ib_fmr;
  685. } /* end ehca_alloc_fmr() */
  686. /*----------------------------------------------------------------------*/
  687. int ehca_map_phys_fmr(struct ib_fmr *fmr,
  688. u64 *page_list,
  689. int list_len,
  690. u64 iova)
  691. {
  692. int ret;
  693. struct ehca_shca *shca =
  694. container_of(fmr->device, struct ehca_shca, ib_device);
  695. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  696. struct ehca_pd *e_pd = container_of(fmr->pd, struct ehca_pd, ib_pd);
  697. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  698. u32 tmp_lkey, tmp_rkey;
  699. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  700. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  701. e_fmr, e_fmr->flags);
  702. ret = -EINVAL;
  703. goto map_phys_fmr_exit0;
  704. }
  705. ret = ehca_fmr_check_page_list(e_fmr, page_list, list_len);
  706. if (ret)
  707. goto map_phys_fmr_exit0;
  708. if (iova % e_fmr->fmr_page_size) {
  709. /* only whole-numbered pages */
  710. ehca_err(fmr->device, "bad iova, iova=%lx fmr_page_size=%x",
  711. iova, e_fmr->fmr_page_size);
  712. ret = -EINVAL;
  713. goto map_phys_fmr_exit0;
  714. }
  715. if (e_fmr->fmr_map_cnt >= e_fmr->fmr_max_maps) {
  716. /* HCAD does not limit the maps, however trace this anyway */
  717. ehca_info(fmr->device, "map limit exceeded, fmr=%p "
  718. "e_fmr->fmr_map_cnt=%x e_fmr->fmr_max_maps=%x",
  719. fmr, e_fmr->fmr_map_cnt, e_fmr->fmr_max_maps);
  720. }
  721. pginfo.type = EHCA_MR_PGI_FMR;
  722. pginfo.num_pages = list_len;
  723. pginfo.num_4k = list_len * (e_fmr->fmr_page_size / EHCA_PAGESIZE);
  724. pginfo.page_list = page_list;
  725. pginfo.next_4k = ((iova & (e_fmr->fmr_page_size-1)) /
  726. EHCA_PAGESIZE);
  727. ret = ehca_rereg_mr(shca, e_fmr, (u64*)iova,
  728. list_len * e_fmr->fmr_page_size,
  729. e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  730. if (ret)
  731. goto map_phys_fmr_exit0;
  732. /* successful reregistration */
  733. e_fmr->fmr_map_cnt++;
  734. e_fmr->ib.ib_fmr.lkey = tmp_lkey;
  735. e_fmr->ib.ib_fmr.rkey = tmp_rkey;
  736. return 0;
  737. map_phys_fmr_exit0:
  738. if (ret)
  739. ehca_err(fmr->device, "ret=%x fmr=%p page_list=%p list_len=%x "
  740. "iova=%lx",
  741. ret, fmr, page_list, list_len, iova);
  742. return ret;
  743. } /* end ehca_map_phys_fmr() */
  744. /*----------------------------------------------------------------------*/
  745. int ehca_unmap_fmr(struct list_head *fmr_list)
  746. {
  747. int ret = 0;
  748. struct ib_fmr *ib_fmr;
  749. struct ehca_shca *shca = NULL;
  750. struct ehca_shca *prev_shca;
  751. struct ehca_mr *e_fmr;
  752. u32 num_fmr = 0;
  753. u32 unmap_fmr_cnt = 0;
  754. /* check all FMR belong to same SHCA, and check internal flag */
  755. list_for_each_entry(ib_fmr, fmr_list, list) {
  756. prev_shca = shca;
  757. if (!ib_fmr) {
  758. ehca_gen_err("bad fmr=%p in list", ib_fmr);
  759. ret = -EINVAL;
  760. goto unmap_fmr_exit0;
  761. }
  762. shca = container_of(ib_fmr->device, struct ehca_shca,
  763. ib_device);
  764. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  765. if ((shca != prev_shca) && prev_shca) {
  766. ehca_err(&shca->ib_device, "SHCA mismatch, shca=%p "
  767. "prev_shca=%p e_fmr=%p",
  768. shca, prev_shca, e_fmr);
  769. ret = -EINVAL;
  770. goto unmap_fmr_exit0;
  771. }
  772. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  773. ehca_err(&shca->ib_device, "not a FMR, e_fmr=%p "
  774. "e_fmr->flags=%x", e_fmr, e_fmr->flags);
  775. ret = -EINVAL;
  776. goto unmap_fmr_exit0;
  777. }
  778. num_fmr++;
  779. }
  780. /* loop over all FMRs to unmap */
  781. list_for_each_entry(ib_fmr, fmr_list, list) {
  782. unmap_fmr_cnt++;
  783. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  784. shca = container_of(ib_fmr->device, struct ehca_shca,
  785. ib_device);
  786. ret = ehca_unmap_one_fmr(shca, e_fmr);
  787. if (ret) {
  788. /* unmap failed, stop unmapping of rest of FMRs */
  789. ehca_err(&shca->ib_device, "unmap of one FMR failed, "
  790. "stop rest, e_fmr=%p num_fmr=%x "
  791. "unmap_fmr_cnt=%x lkey=%x", e_fmr, num_fmr,
  792. unmap_fmr_cnt, e_fmr->ib.ib_fmr.lkey);
  793. goto unmap_fmr_exit0;
  794. }
  795. }
  796. unmap_fmr_exit0:
  797. if (ret)
  798. ehca_gen_err("ret=%x fmr_list=%p num_fmr=%x unmap_fmr_cnt=%x",
  799. ret, fmr_list, num_fmr, unmap_fmr_cnt);
  800. return ret;
  801. } /* end ehca_unmap_fmr() */
  802. /*----------------------------------------------------------------------*/
  803. int ehca_dealloc_fmr(struct ib_fmr *fmr)
  804. {
  805. int ret;
  806. u64 h_ret;
  807. struct ehca_shca *shca =
  808. container_of(fmr->device, struct ehca_shca, ib_device);
  809. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  810. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  811. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  812. e_fmr, e_fmr->flags);
  813. ret = -EINVAL;
  814. goto free_fmr_exit0;
  815. }
  816. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  817. if (h_ret != H_SUCCESS) {
  818. ehca_err(fmr->device, "hipz_free_mr failed, h_ret=%lx e_fmr=%p "
  819. "hca_hndl=%lx fmr_hndl=%lx fmr->lkey=%x",
  820. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  821. e_fmr->ipz_mr_handle.handle, fmr->lkey);
  822. ret = ehca_mrmw_map_hrc_free_mr(h_ret);
  823. goto free_fmr_exit0;
  824. }
  825. /* successful deregistration */
  826. ehca_mr_delete(e_fmr);
  827. return 0;
  828. free_fmr_exit0:
  829. if (ret)
  830. ehca_err(&shca->ib_device, "ret=%x fmr=%p", ret, fmr);
  831. return ret;
  832. } /* end ehca_dealloc_fmr() */
  833. /*----------------------------------------------------------------------*/
  834. int ehca_reg_mr(struct ehca_shca *shca,
  835. struct ehca_mr *e_mr,
  836. u64 *iova_start,
  837. u64 size,
  838. int acl,
  839. struct ehca_pd *e_pd,
  840. struct ehca_mr_pginfo *pginfo,
  841. u32 *lkey, /*OUT*/
  842. u32 *rkey) /*OUT*/
  843. {
  844. int ret;
  845. u64 h_ret;
  846. u32 hipz_acl;
  847. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  848. ehca_mrmw_map_acl(acl, &hipz_acl);
  849. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  850. if (ehca_use_hp_mr == 1)
  851. hipz_acl |= 0x00000001;
  852. h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr,
  853. (u64)iova_start, size, hipz_acl,
  854. e_pd->fw_pd, &hipzout);
  855. if (h_ret != H_SUCCESS) {
  856. ehca_err(&shca->ib_device, "hipz_alloc_mr failed, h_ret=%lx "
  857. "hca_hndl=%lx", h_ret, shca->ipz_hca_handle.handle);
  858. ret = ehca_mrmw_map_hrc_alloc(h_ret);
  859. goto ehca_reg_mr_exit0;
  860. }
  861. e_mr->ipz_mr_handle = hipzout.handle;
  862. ret = ehca_reg_mr_rpages(shca, e_mr, pginfo);
  863. if (ret)
  864. goto ehca_reg_mr_exit1;
  865. /* successful registration */
  866. e_mr->num_pages = pginfo->num_pages;
  867. e_mr->num_4k = pginfo->num_4k;
  868. e_mr->start = iova_start;
  869. e_mr->size = size;
  870. e_mr->acl = acl;
  871. *lkey = hipzout.lkey;
  872. *rkey = hipzout.rkey;
  873. return 0;
  874. ehca_reg_mr_exit1:
  875. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  876. if (h_ret != H_SUCCESS) {
  877. ehca_err(&shca->ib_device, "h_ret=%lx shca=%p e_mr=%p "
  878. "iova_start=%p size=%lx acl=%x e_pd=%p lkey=%x "
  879. "pginfo=%p num_pages=%lx num_4k=%lx ret=%x",
  880. h_ret, shca, e_mr, iova_start, size, acl, e_pd,
  881. hipzout.lkey, pginfo, pginfo->num_pages,
  882. pginfo->num_4k, ret);
  883. ehca_err(&shca->ib_device, "internal error in ehca_reg_mr, "
  884. "not recoverable");
  885. }
  886. ehca_reg_mr_exit0:
  887. if (ret)
  888. ehca_err(&shca->ib_device, "ret=%x shca=%p e_mr=%p "
  889. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  890. "num_pages=%lx num_4k=%lx",
  891. ret, shca, e_mr, iova_start, size, acl, e_pd, pginfo,
  892. pginfo->num_pages, pginfo->num_4k);
  893. return ret;
  894. } /* end ehca_reg_mr() */
  895. /*----------------------------------------------------------------------*/
  896. int ehca_reg_mr_rpages(struct ehca_shca *shca,
  897. struct ehca_mr *e_mr,
  898. struct ehca_mr_pginfo *pginfo)
  899. {
  900. int ret = 0;
  901. u64 h_ret;
  902. u32 rnum;
  903. u64 rpage;
  904. u32 i;
  905. u64 *kpage;
  906. kpage = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL);
  907. if (!kpage) {
  908. ehca_err(&shca->ib_device, "kpage alloc failed");
  909. ret = -ENOMEM;
  910. goto ehca_reg_mr_rpages_exit0;
  911. }
  912. /* max 512 pages per shot */
  913. for (i = 0; i < ((pginfo->num_4k + 512 - 1) / 512); i++) {
  914. if (i == ((pginfo->num_4k + 512 - 1) / 512) - 1) {
  915. rnum = pginfo->num_4k % 512; /* last shot */
  916. if (rnum == 0)
  917. rnum = 512; /* last shot is full */
  918. } else
  919. rnum = 512;
  920. if (rnum > 1) {
  921. ret = ehca_set_pagebuf(e_mr, pginfo, rnum, kpage);
  922. if (ret) {
  923. ehca_err(&shca->ib_device, "ehca_set_pagebuf "
  924. "bad rc, ret=%x rnum=%x kpage=%p",
  925. ret, rnum, kpage);
  926. ret = -EFAULT;
  927. goto ehca_reg_mr_rpages_exit1;
  928. }
  929. rpage = virt_to_abs(kpage);
  930. if (!rpage) {
  931. ehca_err(&shca->ib_device, "kpage=%p i=%x",
  932. kpage, i);
  933. ret = -EFAULT;
  934. goto ehca_reg_mr_rpages_exit1;
  935. }
  936. } else { /* rnum==1 */
  937. ret = ehca_set_pagebuf_1(e_mr, pginfo, &rpage);
  938. if (ret) {
  939. ehca_err(&shca->ib_device, "ehca_set_pagebuf_1 "
  940. "bad rc, ret=%x i=%x", ret, i);
  941. ret = -EFAULT;
  942. goto ehca_reg_mr_rpages_exit1;
  943. }
  944. }
  945. h_ret = hipz_h_register_rpage_mr(shca->ipz_hca_handle, e_mr,
  946. 0, /* pagesize 4k */
  947. 0, rpage, rnum);
  948. if (i == ((pginfo->num_4k + 512 - 1) / 512) - 1) {
  949. /*
  950. * check for 'registration complete'==H_SUCCESS
  951. * and for 'page registered'==H_PAGE_REGISTERED
  952. */
  953. if (h_ret != H_SUCCESS) {
  954. ehca_err(&shca->ib_device, "last "
  955. "hipz_reg_rpage_mr failed, h_ret=%lx "
  956. "e_mr=%p i=%x hca_hndl=%lx mr_hndl=%lx"
  957. " lkey=%x", h_ret, e_mr, i,
  958. shca->ipz_hca_handle.handle,
  959. e_mr->ipz_mr_handle.handle,
  960. e_mr->ib.ib_mr.lkey);
  961. ret = ehca_mrmw_map_hrc_rrpg_last(h_ret);
  962. break;
  963. } else
  964. ret = 0;
  965. } else if (h_ret != H_PAGE_REGISTERED) {
  966. ehca_err(&shca->ib_device, "hipz_reg_rpage_mr failed, "
  967. "h_ret=%lx e_mr=%p i=%x lkey=%x hca_hndl=%lx "
  968. "mr_hndl=%lx", h_ret, e_mr, i,
  969. e_mr->ib.ib_mr.lkey,
  970. shca->ipz_hca_handle.handle,
  971. e_mr->ipz_mr_handle.handle);
  972. ret = ehca_mrmw_map_hrc_rrpg_notlast(h_ret);
  973. break;
  974. } else
  975. ret = 0;
  976. } /* end for(i) */
  977. ehca_reg_mr_rpages_exit1:
  978. kfree(kpage);
  979. ehca_reg_mr_rpages_exit0:
  980. if (ret)
  981. ehca_err(&shca->ib_device, "ret=%x shca=%p e_mr=%p pginfo=%p "
  982. "num_pages=%lx num_4k=%lx", ret, shca, e_mr, pginfo,
  983. pginfo->num_pages, pginfo->num_4k);
  984. return ret;
  985. } /* end ehca_reg_mr_rpages() */
  986. /*----------------------------------------------------------------------*/
  987. inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
  988. struct ehca_mr *e_mr,
  989. u64 *iova_start,
  990. u64 size,
  991. u32 acl,
  992. struct ehca_pd *e_pd,
  993. struct ehca_mr_pginfo *pginfo,
  994. u32 *lkey, /*OUT*/
  995. u32 *rkey) /*OUT*/
  996. {
  997. int ret;
  998. u64 h_ret;
  999. u32 hipz_acl;
  1000. u64 *kpage;
  1001. u64 rpage;
  1002. struct ehca_mr_pginfo pginfo_save;
  1003. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1004. ehca_mrmw_map_acl(acl, &hipz_acl);
  1005. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  1006. kpage = kzalloc(H_CB_ALIGNMENT, GFP_KERNEL);
  1007. if (!kpage) {
  1008. ehca_err(&shca->ib_device, "kpage alloc failed");
  1009. ret = -ENOMEM;
  1010. goto ehca_rereg_mr_rereg1_exit0;
  1011. }
  1012. pginfo_save = *pginfo;
  1013. ret = ehca_set_pagebuf(e_mr, pginfo, pginfo->num_4k, kpage);
  1014. if (ret) {
  1015. ehca_err(&shca->ib_device, "set pagebuf failed, e_mr=%p "
  1016. "pginfo=%p type=%x num_pages=%lx num_4k=%lx kpage=%p",
  1017. e_mr, pginfo, pginfo->type, pginfo->num_pages,
  1018. pginfo->num_4k,kpage);
  1019. goto ehca_rereg_mr_rereg1_exit1;
  1020. }
  1021. rpage = virt_to_abs(kpage);
  1022. if (!rpage) {
  1023. ehca_err(&shca->ib_device, "kpage=%p", kpage);
  1024. ret = -EFAULT;
  1025. goto ehca_rereg_mr_rereg1_exit1;
  1026. }
  1027. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_mr,
  1028. (u64)iova_start, size, hipz_acl,
  1029. e_pd->fw_pd, rpage, &hipzout);
  1030. if (h_ret != H_SUCCESS) {
  1031. /*
  1032. * reregistration unsuccessful, try it again with the 3 hCalls,
  1033. * e.g. this is required in case H_MR_CONDITION
  1034. * (MW bound or MR is shared)
  1035. */
  1036. ehca_warn(&shca->ib_device, "hipz_h_reregister_pmr failed "
  1037. "(Rereg1), h_ret=%lx e_mr=%p", h_ret, e_mr);
  1038. *pginfo = pginfo_save;
  1039. ret = -EAGAIN;
  1040. } else if ((u64*)hipzout.vaddr != iova_start) {
  1041. ehca_err(&shca->ib_device, "PHYP changed iova_start in "
  1042. "rereg_pmr, iova_start=%p iova_start_out=%lx e_mr=%p "
  1043. "mr_handle=%lx lkey=%x lkey_out=%x", iova_start,
  1044. hipzout.vaddr, e_mr, e_mr->ipz_mr_handle.handle,
  1045. e_mr->ib.ib_mr.lkey, hipzout.lkey);
  1046. ret = -EFAULT;
  1047. } else {
  1048. /*
  1049. * successful reregistration
  1050. * note: start and start_out are identical for eServer HCAs
  1051. */
  1052. e_mr->num_pages = pginfo->num_pages;
  1053. e_mr->num_4k = pginfo->num_4k;
  1054. e_mr->start = iova_start;
  1055. e_mr->size = size;
  1056. e_mr->acl = acl;
  1057. *lkey = hipzout.lkey;
  1058. *rkey = hipzout.rkey;
  1059. }
  1060. ehca_rereg_mr_rereg1_exit1:
  1061. kfree(kpage);
  1062. ehca_rereg_mr_rereg1_exit0:
  1063. if ( ret && (ret != -EAGAIN) )
  1064. ehca_err(&shca->ib_device, "ret=%x lkey=%x rkey=%x "
  1065. "pginfo=%p num_pages=%lx num_4k=%lx",
  1066. ret, *lkey, *rkey, pginfo, pginfo->num_pages,
  1067. pginfo->num_4k);
  1068. return ret;
  1069. } /* end ehca_rereg_mr_rereg1() */
  1070. /*----------------------------------------------------------------------*/
  1071. int ehca_rereg_mr(struct ehca_shca *shca,
  1072. struct ehca_mr *e_mr,
  1073. u64 *iova_start,
  1074. u64 size,
  1075. int acl,
  1076. struct ehca_pd *e_pd,
  1077. struct ehca_mr_pginfo *pginfo,
  1078. u32 *lkey,
  1079. u32 *rkey)
  1080. {
  1081. int ret = 0;
  1082. u64 h_ret;
  1083. int rereg_1_hcall = 1; /* 1: use hipz_h_reregister_pmr directly */
  1084. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for reregistration */
  1085. /* first determine reregistration hCall(s) */
  1086. if ((pginfo->num_4k > 512) || (e_mr->num_4k > 512) ||
  1087. (pginfo->num_4k > e_mr->num_4k)) {
  1088. ehca_dbg(&shca->ib_device, "Rereg3 case, pginfo->num_4k=%lx "
  1089. "e_mr->num_4k=%x", pginfo->num_4k, e_mr->num_4k);
  1090. rereg_1_hcall = 0;
  1091. rereg_3_hcall = 1;
  1092. }
  1093. if (e_mr->flags & EHCA_MR_FLAG_MAXMR) { /* check for max-MR */
  1094. rereg_1_hcall = 0;
  1095. rereg_3_hcall = 1;
  1096. e_mr->flags &= ~EHCA_MR_FLAG_MAXMR;
  1097. ehca_err(&shca->ib_device, "Rereg MR for max-MR! e_mr=%p",
  1098. e_mr);
  1099. }
  1100. if (rereg_1_hcall) {
  1101. ret = ehca_rereg_mr_rereg1(shca, e_mr, iova_start, size,
  1102. acl, e_pd, pginfo, lkey, rkey);
  1103. if (ret) {
  1104. if (ret == -EAGAIN)
  1105. rereg_3_hcall = 1;
  1106. else
  1107. goto ehca_rereg_mr_exit0;
  1108. }
  1109. }
  1110. if (rereg_3_hcall) {
  1111. struct ehca_mr save_mr;
  1112. /* first deregister old MR */
  1113. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  1114. if (h_ret != H_SUCCESS) {
  1115. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1116. "h_ret=%lx e_mr=%p hca_hndl=%lx mr_hndl=%lx "
  1117. "mr->lkey=%x",
  1118. h_ret, e_mr, shca->ipz_hca_handle.handle,
  1119. e_mr->ipz_mr_handle.handle,
  1120. e_mr->ib.ib_mr.lkey);
  1121. ret = ehca_mrmw_map_hrc_free_mr(h_ret);
  1122. goto ehca_rereg_mr_exit0;
  1123. }
  1124. /* clean ehca_mr_t, without changing struct ib_mr and lock */
  1125. save_mr = *e_mr;
  1126. ehca_mr_deletenew(e_mr);
  1127. /* set some MR values */
  1128. e_mr->flags = save_mr.flags;
  1129. e_mr->fmr_page_size = save_mr.fmr_page_size;
  1130. e_mr->fmr_max_pages = save_mr.fmr_max_pages;
  1131. e_mr->fmr_max_maps = save_mr.fmr_max_maps;
  1132. e_mr->fmr_map_cnt = save_mr.fmr_map_cnt;
  1133. ret = ehca_reg_mr(shca, e_mr, iova_start, size, acl,
  1134. e_pd, pginfo, lkey, rkey);
  1135. if (ret) {
  1136. u32 offset = (u64)(&e_mr->flags) - (u64)e_mr;
  1137. memcpy(&e_mr->flags, &(save_mr.flags),
  1138. sizeof(struct ehca_mr) - offset);
  1139. goto ehca_rereg_mr_exit0;
  1140. }
  1141. }
  1142. ehca_rereg_mr_exit0:
  1143. if (ret)
  1144. ehca_err(&shca->ib_device, "ret=%x shca=%p e_mr=%p "
  1145. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  1146. "num_pages=%lx lkey=%x rkey=%x rereg_1_hcall=%x "
  1147. "rereg_3_hcall=%x", ret, shca, e_mr, iova_start, size,
  1148. acl, e_pd, pginfo, pginfo->num_pages, *lkey, *rkey,
  1149. rereg_1_hcall, rereg_3_hcall);
  1150. return ret;
  1151. } /* end ehca_rereg_mr() */
  1152. /*----------------------------------------------------------------------*/
  1153. int ehca_unmap_one_fmr(struct ehca_shca *shca,
  1154. struct ehca_mr *e_fmr)
  1155. {
  1156. int ret = 0;
  1157. u64 h_ret;
  1158. int rereg_1_hcall = 1; /* 1: use hipz_mr_reregister directly */
  1159. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for unmapping */
  1160. struct ehca_pd *e_pd =
  1161. container_of(e_fmr->ib.ib_fmr.pd, struct ehca_pd, ib_pd);
  1162. struct ehca_mr save_fmr;
  1163. u32 tmp_lkey, tmp_rkey;
  1164. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  1165. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1166. /* first check if reregistration hCall can be used for unmap */
  1167. if (e_fmr->fmr_max_pages > 512) {
  1168. rereg_1_hcall = 0;
  1169. rereg_3_hcall = 1;
  1170. }
  1171. if (rereg_1_hcall) {
  1172. /*
  1173. * note: after using rereg hcall with len=0,
  1174. * rereg hcall must be used again for registering pages
  1175. */
  1176. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_fmr, 0,
  1177. 0, 0, e_pd->fw_pd, 0, &hipzout);
  1178. if (h_ret != H_SUCCESS) {
  1179. /*
  1180. * should not happen, because length checked above,
  1181. * FMRs are not shared and no MW bound to FMRs
  1182. */
  1183. ehca_err(&shca->ib_device, "hipz_reregister_pmr failed "
  1184. "(Rereg1), h_ret=%lx e_fmr=%p hca_hndl=%lx "
  1185. "mr_hndl=%lx lkey=%x lkey_out=%x",
  1186. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1187. e_fmr->ipz_mr_handle.handle,
  1188. e_fmr->ib.ib_fmr.lkey, hipzout.lkey);
  1189. rereg_3_hcall = 1;
  1190. } else {
  1191. /* successful reregistration */
  1192. e_fmr->start = NULL;
  1193. e_fmr->size = 0;
  1194. tmp_lkey = hipzout.lkey;
  1195. tmp_rkey = hipzout.rkey;
  1196. }
  1197. }
  1198. if (rereg_3_hcall) {
  1199. struct ehca_mr save_mr;
  1200. /* first free old FMR */
  1201. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  1202. if (h_ret != H_SUCCESS) {
  1203. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1204. "h_ret=%lx e_fmr=%p hca_hndl=%lx mr_hndl=%lx "
  1205. "lkey=%x",
  1206. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1207. e_fmr->ipz_mr_handle.handle,
  1208. e_fmr->ib.ib_fmr.lkey);
  1209. ret = ehca_mrmw_map_hrc_free_mr(h_ret);
  1210. goto ehca_unmap_one_fmr_exit0;
  1211. }
  1212. /* clean ehca_mr_t, without changing lock */
  1213. save_fmr = *e_fmr;
  1214. ehca_mr_deletenew(e_fmr);
  1215. /* set some MR values */
  1216. e_fmr->flags = save_fmr.flags;
  1217. e_fmr->fmr_page_size = save_fmr.fmr_page_size;
  1218. e_fmr->fmr_max_pages = save_fmr.fmr_max_pages;
  1219. e_fmr->fmr_max_maps = save_fmr.fmr_max_maps;
  1220. e_fmr->fmr_map_cnt = save_fmr.fmr_map_cnt;
  1221. e_fmr->acl = save_fmr.acl;
  1222. pginfo.type = EHCA_MR_PGI_FMR;
  1223. pginfo.num_pages = 0;
  1224. pginfo.num_4k = 0;
  1225. ret = ehca_reg_mr(shca, e_fmr, NULL,
  1226. (e_fmr->fmr_max_pages * e_fmr->fmr_page_size),
  1227. e_fmr->acl, e_pd, &pginfo, &tmp_lkey,
  1228. &tmp_rkey);
  1229. if (ret) {
  1230. u32 offset = (u64)(&e_fmr->flags) - (u64)e_fmr;
  1231. memcpy(&e_fmr->flags, &(save_mr.flags),
  1232. sizeof(struct ehca_mr) - offset);
  1233. goto ehca_unmap_one_fmr_exit0;
  1234. }
  1235. }
  1236. ehca_unmap_one_fmr_exit0:
  1237. if (ret)
  1238. ehca_err(&shca->ib_device, "ret=%x tmp_lkey=%x tmp_rkey=%x "
  1239. "fmr_max_pages=%x rereg_1_hcall=%x rereg_3_hcall=%x",
  1240. ret, tmp_lkey, tmp_rkey, e_fmr->fmr_max_pages,
  1241. rereg_1_hcall, rereg_3_hcall);
  1242. return ret;
  1243. } /* end ehca_unmap_one_fmr() */
  1244. /*----------------------------------------------------------------------*/
  1245. int ehca_reg_smr(struct ehca_shca *shca,
  1246. struct ehca_mr *e_origmr,
  1247. struct ehca_mr *e_newmr,
  1248. u64 *iova_start,
  1249. int acl,
  1250. struct ehca_pd *e_pd,
  1251. u32 *lkey, /*OUT*/
  1252. u32 *rkey) /*OUT*/
  1253. {
  1254. int ret = 0;
  1255. u64 h_ret;
  1256. u32 hipz_acl;
  1257. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1258. ehca_mrmw_map_acl(acl, &hipz_acl);
  1259. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  1260. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1261. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1262. &hipzout);
  1263. if (h_ret != H_SUCCESS) {
  1264. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%lx "
  1265. "shca=%p e_origmr=%p e_newmr=%p iova_start=%p acl=%x "
  1266. "e_pd=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1267. h_ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd,
  1268. shca->ipz_hca_handle.handle,
  1269. e_origmr->ipz_mr_handle.handle,
  1270. e_origmr->ib.ib_mr.lkey);
  1271. ret = ehca_mrmw_map_hrc_reg_smr(h_ret);
  1272. goto ehca_reg_smr_exit0;
  1273. }
  1274. /* successful registration */
  1275. e_newmr->num_pages = e_origmr->num_pages;
  1276. e_newmr->num_4k = e_origmr->num_4k;
  1277. e_newmr->start = iova_start;
  1278. e_newmr->size = e_origmr->size;
  1279. e_newmr->acl = acl;
  1280. e_newmr->ipz_mr_handle = hipzout.handle;
  1281. *lkey = hipzout.lkey;
  1282. *rkey = hipzout.rkey;
  1283. return 0;
  1284. ehca_reg_smr_exit0:
  1285. if (ret)
  1286. ehca_err(&shca->ib_device, "ret=%x shca=%p e_origmr=%p "
  1287. "e_newmr=%p iova_start=%p acl=%x e_pd=%p",
  1288. ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd);
  1289. return ret;
  1290. } /* end ehca_reg_smr() */
  1291. /*----------------------------------------------------------------------*/
  1292. /* register internal max-MR to internal SHCA */
  1293. int ehca_reg_internal_maxmr(
  1294. struct ehca_shca *shca,
  1295. struct ehca_pd *e_pd,
  1296. struct ehca_mr **e_maxmr) /*OUT*/
  1297. {
  1298. int ret;
  1299. struct ehca_mr *e_mr;
  1300. u64 *iova_start;
  1301. u64 size_maxmr;
  1302. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  1303. struct ib_phys_buf ib_pbuf;
  1304. u32 num_pages_mr;
  1305. u32 num_pages_4k; /* 4k portion "pages" */
  1306. e_mr = ehca_mr_new();
  1307. if (!e_mr) {
  1308. ehca_err(&shca->ib_device, "out of memory");
  1309. ret = -ENOMEM;
  1310. goto ehca_reg_internal_maxmr_exit0;
  1311. }
  1312. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  1313. /* register internal max-MR on HCA */
  1314. size_maxmr = (u64)high_memory - PAGE_OFFSET;
  1315. iova_start = (u64*)KERNELBASE;
  1316. ib_pbuf.addr = 0;
  1317. ib_pbuf.size = size_maxmr;
  1318. num_pages_mr = ((((u64)iova_start % PAGE_SIZE) + size_maxmr +
  1319. PAGE_SIZE - 1) / PAGE_SIZE);
  1320. num_pages_4k = ((((u64)iova_start % EHCA_PAGESIZE) + size_maxmr +
  1321. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  1322. pginfo.type = EHCA_MR_PGI_PHYS;
  1323. pginfo.num_pages = num_pages_mr;
  1324. pginfo.num_4k = num_pages_4k;
  1325. pginfo.num_phys_buf = 1;
  1326. pginfo.phys_buf_array = &ib_pbuf;
  1327. ret = ehca_reg_mr(shca, e_mr, iova_start, size_maxmr, 0, e_pd,
  1328. &pginfo, &e_mr->ib.ib_mr.lkey,
  1329. &e_mr->ib.ib_mr.rkey);
  1330. if (ret) {
  1331. ehca_err(&shca->ib_device, "reg of internal max MR failed, "
  1332. "e_mr=%p iova_start=%p size_maxmr=%lx num_pages_mr=%x "
  1333. "num_pages_4k=%x", e_mr, iova_start, size_maxmr,
  1334. num_pages_mr, num_pages_4k);
  1335. goto ehca_reg_internal_maxmr_exit1;
  1336. }
  1337. /* successful registration of all pages */
  1338. e_mr->ib.ib_mr.device = e_pd->ib_pd.device;
  1339. e_mr->ib.ib_mr.pd = &e_pd->ib_pd;
  1340. e_mr->ib.ib_mr.uobject = NULL;
  1341. atomic_inc(&(e_pd->ib_pd.usecnt));
  1342. atomic_set(&(e_mr->ib.ib_mr.usecnt), 0);
  1343. *e_maxmr = e_mr;
  1344. return 0;
  1345. ehca_reg_internal_maxmr_exit1:
  1346. ehca_mr_delete(e_mr);
  1347. ehca_reg_internal_maxmr_exit0:
  1348. if (ret)
  1349. ehca_err(&shca->ib_device, "ret=%x shca=%p e_pd=%p e_maxmr=%p",
  1350. ret, shca, e_pd, e_maxmr);
  1351. return ret;
  1352. } /* end ehca_reg_internal_maxmr() */
  1353. /*----------------------------------------------------------------------*/
  1354. int ehca_reg_maxmr(struct ehca_shca *shca,
  1355. struct ehca_mr *e_newmr,
  1356. u64 *iova_start,
  1357. int acl,
  1358. struct ehca_pd *e_pd,
  1359. u32 *lkey,
  1360. u32 *rkey)
  1361. {
  1362. u64 h_ret;
  1363. struct ehca_mr *e_origmr = shca->maxmr;
  1364. u32 hipz_acl;
  1365. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1366. ehca_mrmw_map_acl(acl, &hipz_acl);
  1367. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  1368. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1369. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1370. &hipzout);
  1371. if (h_ret != H_SUCCESS) {
  1372. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%lx "
  1373. "e_origmr=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1374. h_ret, e_origmr, shca->ipz_hca_handle.handle,
  1375. e_origmr->ipz_mr_handle.handle,
  1376. e_origmr->ib.ib_mr.lkey);
  1377. return ehca_mrmw_map_hrc_reg_smr(h_ret);
  1378. }
  1379. /* successful registration */
  1380. e_newmr->num_pages = e_origmr->num_pages;
  1381. e_newmr->num_4k = e_origmr->num_4k;
  1382. e_newmr->start = iova_start;
  1383. e_newmr->size = e_origmr->size;
  1384. e_newmr->acl = acl;
  1385. e_newmr->ipz_mr_handle = hipzout.handle;
  1386. *lkey = hipzout.lkey;
  1387. *rkey = hipzout.rkey;
  1388. return 0;
  1389. } /* end ehca_reg_maxmr() */
  1390. /*----------------------------------------------------------------------*/
  1391. int ehca_dereg_internal_maxmr(struct ehca_shca *shca)
  1392. {
  1393. int ret;
  1394. struct ehca_mr *e_maxmr;
  1395. struct ib_pd *ib_pd;
  1396. if (!shca->maxmr) {
  1397. ehca_err(&shca->ib_device, "bad call, shca=%p", shca);
  1398. ret = -EINVAL;
  1399. goto ehca_dereg_internal_maxmr_exit0;
  1400. }
  1401. e_maxmr = shca->maxmr;
  1402. ib_pd = e_maxmr->ib.ib_mr.pd;
  1403. shca->maxmr = NULL; /* remove internal max-MR indication from SHCA */
  1404. ret = ehca_dereg_mr(&e_maxmr->ib.ib_mr);
  1405. if (ret) {
  1406. ehca_err(&shca->ib_device, "dereg internal max-MR failed, "
  1407. "ret=%x e_maxmr=%p shca=%p lkey=%x",
  1408. ret, e_maxmr, shca, e_maxmr->ib.ib_mr.lkey);
  1409. shca->maxmr = e_maxmr;
  1410. goto ehca_dereg_internal_maxmr_exit0;
  1411. }
  1412. atomic_dec(&ib_pd->usecnt);
  1413. ehca_dereg_internal_maxmr_exit0:
  1414. if (ret)
  1415. ehca_err(&shca->ib_device, "ret=%x shca=%p shca->maxmr=%p",
  1416. ret, shca, shca->maxmr);
  1417. return ret;
  1418. } /* end ehca_dereg_internal_maxmr() */
  1419. /*----------------------------------------------------------------------*/
  1420. /*
  1421. * check physical buffer array of MR verbs for validness and
  1422. * calculates MR size
  1423. */
  1424. int ehca_mr_chk_buf_and_calc_size(struct ib_phys_buf *phys_buf_array,
  1425. int num_phys_buf,
  1426. u64 *iova_start,
  1427. u64 *size)
  1428. {
  1429. struct ib_phys_buf *pbuf = phys_buf_array;
  1430. u64 size_count = 0;
  1431. u32 i;
  1432. if (num_phys_buf == 0) {
  1433. ehca_gen_err("bad phys buf array len, num_phys_buf=0");
  1434. return -EINVAL;
  1435. }
  1436. /* check first buffer */
  1437. if (((u64)iova_start & ~PAGE_MASK) != (pbuf->addr & ~PAGE_MASK)) {
  1438. ehca_gen_err("iova_start/addr mismatch, iova_start=%p "
  1439. "pbuf->addr=%lx pbuf->size=%lx",
  1440. iova_start, pbuf->addr, pbuf->size);
  1441. return -EINVAL;
  1442. }
  1443. if (((pbuf->addr + pbuf->size) % PAGE_SIZE) &&
  1444. (num_phys_buf > 1)) {
  1445. ehca_gen_err("addr/size mismatch in 1st buf, pbuf->addr=%lx "
  1446. "pbuf->size=%lx", pbuf->addr, pbuf->size);
  1447. return -EINVAL;
  1448. }
  1449. for (i = 0; i < num_phys_buf; i++) {
  1450. if ((i > 0) && (pbuf->addr % PAGE_SIZE)) {
  1451. ehca_gen_err("bad address, i=%x pbuf->addr=%lx "
  1452. "pbuf->size=%lx",
  1453. i, pbuf->addr, pbuf->size);
  1454. return -EINVAL;
  1455. }
  1456. if (((i > 0) && /* not 1st */
  1457. (i < (num_phys_buf - 1)) && /* not last */
  1458. (pbuf->size % PAGE_SIZE)) || (pbuf->size == 0)) {
  1459. ehca_gen_err("bad size, i=%x pbuf->size=%lx",
  1460. i, pbuf->size);
  1461. return -EINVAL;
  1462. }
  1463. size_count += pbuf->size;
  1464. pbuf++;
  1465. }
  1466. *size = size_count;
  1467. return 0;
  1468. } /* end ehca_mr_chk_buf_and_calc_size() */
  1469. /*----------------------------------------------------------------------*/
  1470. /* check page list of map FMR verb for validness */
  1471. int ehca_fmr_check_page_list(struct ehca_mr *e_fmr,
  1472. u64 *page_list,
  1473. int list_len)
  1474. {
  1475. u32 i;
  1476. u64 *page;
  1477. if ((list_len == 0) || (list_len > e_fmr->fmr_max_pages)) {
  1478. ehca_gen_err("bad list_len, list_len=%x "
  1479. "e_fmr->fmr_max_pages=%x fmr=%p",
  1480. list_len, e_fmr->fmr_max_pages, e_fmr);
  1481. return -EINVAL;
  1482. }
  1483. /* each page must be aligned */
  1484. page = page_list;
  1485. for (i = 0; i < list_len; i++) {
  1486. if (*page % e_fmr->fmr_page_size) {
  1487. ehca_gen_err("bad page, i=%x *page=%lx page=%p fmr=%p "
  1488. "fmr_page_size=%x", i, *page, page, e_fmr,
  1489. e_fmr->fmr_page_size);
  1490. return -EINVAL;
  1491. }
  1492. page++;
  1493. }
  1494. return 0;
  1495. } /* end ehca_fmr_check_page_list() */
  1496. /*----------------------------------------------------------------------*/
  1497. /* setup page buffer from page info */
  1498. int ehca_set_pagebuf(struct ehca_mr *e_mr,
  1499. struct ehca_mr_pginfo *pginfo,
  1500. u32 number,
  1501. u64 *kpage)
  1502. {
  1503. int ret = 0;
  1504. struct ib_umem_chunk *prev_chunk;
  1505. struct ib_umem_chunk *chunk;
  1506. struct ib_phys_buf *pbuf;
  1507. u64 *fmrlist;
  1508. u64 num4k, pgaddr, offs4k;
  1509. u32 i = 0;
  1510. u32 j = 0;
  1511. if (pginfo->type == EHCA_MR_PGI_PHYS) {
  1512. /* loop over desired phys_buf_array entries */
  1513. while (i < number) {
  1514. pbuf = pginfo->phys_buf_array + pginfo->next_buf;
  1515. num4k = ((pbuf->addr % EHCA_PAGESIZE) + pbuf->size +
  1516. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE;
  1517. offs4k = (pbuf->addr & ~PAGE_MASK) / EHCA_PAGESIZE;
  1518. while (pginfo->next_4k < offs4k + num4k) {
  1519. /* sanity check */
  1520. if ((pginfo->page_cnt >= pginfo->num_pages) ||
  1521. (pginfo->page_4k_cnt >= pginfo->num_4k)) {
  1522. ehca_gen_err("page_cnt >= num_pages, "
  1523. "page_cnt=%lx "
  1524. "num_pages=%lx "
  1525. "page_4k_cnt=%lx "
  1526. "num_4k=%lx i=%x",
  1527. pginfo->page_cnt,
  1528. pginfo->num_pages,
  1529. pginfo->page_4k_cnt,
  1530. pginfo->num_4k, i);
  1531. ret = -EFAULT;
  1532. goto ehca_set_pagebuf_exit0;
  1533. }
  1534. *kpage = phys_to_abs(
  1535. (pbuf->addr & EHCA_PAGEMASK)
  1536. + (pginfo->next_4k * EHCA_PAGESIZE));
  1537. if ( !(*kpage) && pbuf->addr ) {
  1538. ehca_gen_err("pbuf->addr=%lx "
  1539. "pbuf->size=%lx "
  1540. "next_4k=%lx", pbuf->addr,
  1541. pbuf->size,
  1542. pginfo->next_4k);
  1543. ret = -EFAULT;
  1544. goto ehca_set_pagebuf_exit0;
  1545. }
  1546. (pginfo->page_4k_cnt)++;
  1547. (pginfo->next_4k)++;
  1548. if (pginfo->next_4k %
  1549. (PAGE_SIZE / EHCA_PAGESIZE) == 0)
  1550. (pginfo->page_cnt)++;
  1551. kpage++;
  1552. i++;
  1553. if (i >= number) break;
  1554. }
  1555. if (pginfo->next_4k >= offs4k + num4k) {
  1556. (pginfo->next_buf)++;
  1557. pginfo->next_4k = 0;
  1558. }
  1559. }
  1560. } else if (pginfo->type == EHCA_MR_PGI_USER) {
  1561. /* loop over desired chunk entries */
  1562. chunk = pginfo->next_chunk;
  1563. prev_chunk = pginfo->next_chunk;
  1564. list_for_each_entry_continue(chunk,
  1565. (&(pginfo->region->chunk_list)),
  1566. list) {
  1567. for (i = pginfo->next_nmap; i < chunk->nmap; ) {
  1568. pgaddr = ( page_to_pfn(chunk->page_list[i].page)
  1569. << PAGE_SHIFT );
  1570. *kpage = phys_to_abs(pgaddr +
  1571. (pginfo->next_4k *
  1572. EHCA_PAGESIZE));
  1573. if ( !(*kpage) ) {
  1574. ehca_gen_err("pgaddr=%lx "
  1575. "chunk->page_list[i]=%lx "
  1576. "i=%x next_4k=%lx mr=%p",
  1577. pgaddr,
  1578. (u64)sg_dma_address(
  1579. &chunk->
  1580. page_list[i]),
  1581. i, pginfo->next_4k, e_mr);
  1582. ret = -EFAULT;
  1583. goto ehca_set_pagebuf_exit0;
  1584. }
  1585. (pginfo->page_4k_cnt)++;
  1586. (pginfo->next_4k)++;
  1587. kpage++;
  1588. if (pginfo->next_4k %
  1589. (PAGE_SIZE / EHCA_PAGESIZE) == 0) {
  1590. (pginfo->page_cnt)++;
  1591. (pginfo->next_nmap)++;
  1592. pginfo->next_4k = 0;
  1593. i++;
  1594. }
  1595. j++;
  1596. if (j >= number) break;
  1597. }
  1598. if ((pginfo->next_nmap >= chunk->nmap) &&
  1599. (j >= number)) {
  1600. pginfo->next_nmap = 0;
  1601. prev_chunk = chunk;
  1602. break;
  1603. } else if (pginfo->next_nmap >= chunk->nmap) {
  1604. pginfo->next_nmap = 0;
  1605. prev_chunk = chunk;
  1606. } else if (j >= number)
  1607. break;
  1608. else
  1609. prev_chunk = chunk;
  1610. }
  1611. pginfo->next_chunk =
  1612. list_prepare_entry(prev_chunk,
  1613. (&(pginfo->region->chunk_list)),
  1614. list);
  1615. } else if (pginfo->type == EHCA_MR_PGI_FMR) {
  1616. /* loop over desired page_list entries */
  1617. fmrlist = pginfo->page_list + pginfo->next_listelem;
  1618. for (i = 0; i < number; i++) {
  1619. *kpage = phys_to_abs((*fmrlist & EHCA_PAGEMASK) +
  1620. pginfo->next_4k * EHCA_PAGESIZE);
  1621. if ( !(*kpage) ) {
  1622. ehca_gen_err("*fmrlist=%lx fmrlist=%p "
  1623. "next_listelem=%lx next_4k=%lx",
  1624. *fmrlist, fmrlist,
  1625. pginfo->next_listelem,
  1626. pginfo->next_4k);
  1627. ret = -EFAULT;
  1628. goto ehca_set_pagebuf_exit0;
  1629. }
  1630. (pginfo->page_4k_cnt)++;
  1631. (pginfo->next_4k)++;
  1632. kpage++;
  1633. if (pginfo->next_4k %
  1634. (e_mr->fmr_page_size / EHCA_PAGESIZE) == 0) {
  1635. (pginfo->page_cnt)++;
  1636. (pginfo->next_listelem)++;
  1637. fmrlist++;
  1638. pginfo->next_4k = 0;
  1639. }
  1640. }
  1641. } else {
  1642. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1643. ret = -EFAULT;
  1644. goto ehca_set_pagebuf_exit0;
  1645. }
  1646. ehca_set_pagebuf_exit0:
  1647. if (ret)
  1648. ehca_gen_err("ret=%x e_mr=%p pginfo=%p type=%x num_pages=%lx "
  1649. "num_4k=%lx next_buf=%lx next_4k=%lx number=%x "
  1650. "kpage=%p page_cnt=%lx page_4k_cnt=%lx i=%x "
  1651. "next_listelem=%lx region=%p next_chunk=%p "
  1652. "next_nmap=%lx", ret, e_mr, pginfo, pginfo->type,
  1653. pginfo->num_pages, pginfo->num_4k,
  1654. pginfo->next_buf, pginfo->next_4k, number, kpage,
  1655. pginfo->page_cnt, pginfo->page_4k_cnt, i,
  1656. pginfo->next_listelem, pginfo->region,
  1657. pginfo->next_chunk, pginfo->next_nmap);
  1658. return ret;
  1659. } /* end ehca_set_pagebuf() */
  1660. /*----------------------------------------------------------------------*/
  1661. /* setup 1 page from page info page buffer */
  1662. int ehca_set_pagebuf_1(struct ehca_mr *e_mr,
  1663. struct ehca_mr_pginfo *pginfo,
  1664. u64 *rpage)
  1665. {
  1666. int ret = 0;
  1667. struct ib_phys_buf *tmp_pbuf;
  1668. u64 *fmrlist;
  1669. struct ib_umem_chunk *chunk;
  1670. struct ib_umem_chunk *prev_chunk;
  1671. u64 pgaddr, num4k, offs4k;
  1672. if (pginfo->type == EHCA_MR_PGI_PHYS) {
  1673. /* sanity check */
  1674. if ((pginfo->page_cnt >= pginfo->num_pages) ||
  1675. (pginfo->page_4k_cnt >= pginfo->num_4k)) {
  1676. ehca_gen_err("page_cnt >= num_pages, page_cnt=%lx "
  1677. "num_pages=%lx page_4k_cnt=%lx num_4k=%lx",
  1678. pginfo->page_cnt, pginfo->num_pages,
  1679. pginfo->page_4k_cnt, pginfo->num_4k);
  1680. ret = -EFAULT;
  1681. goto ehca_set_pagebuf_1_exit0;
  1682. }
  1683. tmp_pbuf = pginfo->phys_buf_array + pginfo->next_buf;
  1684. num4k = ((tmp_pbuf->addr % EHCA_PAGESIZE) + tmp_pbuf->size +
  1685. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE;
  1686. offs4k = (tmp_pbuf->addr & ~PAGE_MASK) / EHCA_PAGESIZE;
  1687. *rpage = phys_to_abs((tmp_pbuf->addr & EHCA_PAGEMASK) +
  1688. (pginfo->next_4k * EHCA_PAGESIZE));
  1689. if ( !(*rpage) && tmp_pbuf->addr ) {
  1690. ehca_gen_err("tmp_pbuf->addr=%lx"
  1691. " tmp_pbuf->size=%lx next_4k=%lx",
  1692. tmp_pbuf->addr, tmp_pbuf->size,
  1693. pginfo->next_4k);
  1694. ret = -EFAULT;
  1695. goto ehca_set_pagebuf_1_exit0;
  1696. }
  1697. (pginfo->page_4k_cnt)++;
  1698. (pginfo->next_4k)++;
  1699. if (pginfo->next_4k % (PAGE_SIZE / EHCA_PAGESIZE) == 0)
  1700. (pginfo->page_cnt)++;
  1701. if (pginfo->next_4k >= offs4k + num4k) {
  1702. (pginfo->next_buf)++;
  1703. pginfo->next_4k = 0;
  1704. }
  1705. } else if (pginfo->type == EHCA_MR_PGI_USER) {
  1706. chunk = pginfo->next_chunk;
  1707. prev_chunk = pginfo->next_chunk;
  1708. list_for_each_entry_continue(chunk,
  1709. (&(pginfo->region->chunk_list)),
  1710. list) {
  1711. pgaddr = ( page_to_pfn(chunk->page_list[
  1712. pginfo->next_nmap].page)
  1713. << PAGE_SHIFT);
  1714. *rpage = phys_to_abs(pgaddr +
  1715. (pginfo->next_4k * EHCA_PAGESIZE));
  1716. if ( !(*rpage) ) {
  1717. ehca_gen_err("pgaddr=%lx chunk->page_list[]=%lx"
  1718. " next_nmap=%lx next_4k=%lx mr=%p",
  1719. pgaddr, (u64)sg_dma_address(
  1720. &chunk->page_list[
  1721. pginfo->
  1722. next_nmap]),
  1723. pginfo->next_nmap, pginfo->next_4k,
  1724. e_mr);
  1725. ret = -EFAULT;
  1726. goto ehca_set_pagebuf_1_exit0;
  1727. }
  1728. (pginfo->page_4k_cnt)++;
  1729. (pginfo->next_4k)++;
  1730. if (pginfo->next_4k %
  1731. (PAGE_SIZE / EHCA_PAGESIZE) == 0) {
  1732. (pginfo->page_cnt)++;
  1733. (pginfo->next_nmap)++;
  1734. pginfo->next_4k = 0;
  1735. }
  1736. if (pginfo->next_nmap >= chunk->nmap) {
  1737. pginfo->next_nmap = 0;
  1738. prev_chunk = chunk;
  1739. }
  1740. break;
  1741. }
  1742. pginfo->next_chunk =
  1743. list_prepare_entry(prev_chunk,
  1744. (&(pginfo->region->chunk_list)),
  1745. list);
  1746. } else if (pginfo->type == EHCA_MR_PGI_FMR) {
  1747. fmrlist = pginfo->page_list + pginfo->next_listelem;
  1748. *rpage = phys_to_abs((*fmrlist & EHCA_PAGEMASK) +
  1749. pginfo->next_4k * EHCA_PAGESIZE);
  1750. if ( !(*rpage) ) {
  1751. ehca_gen_err("*fmrlist=%lx fmrlist=%p "
  1752. "next_listelem=%lx next_4k=%lx",
  1753. *fmrlist, fmrlist, pginfo->next_listelem,
  1754. pginfo->next_4k);
  1755. ret = -EFAULT;
  1756. goto ehca_set_pagebuf_1_exit0;
  1757. }
  1758. (pginfo->page_4k_cnt)++;
  1759. (pginfo->next_4k)++;
  1760. if (pginfo->next_4k %
  1761. (e_mr->fmr_page_size / EHCA_PAGESIZE) == 0) {
  1762. (pginfo->page_cnt)++;
  1763. (pginfo->next_listelem)++;
  1764. pginfo->next_4k = 0;
  1765. }
  1766. } else {
  1767. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1768. ret = -EFAULT;
  1769. goto ehca_set_pagebuf_1_exit0;
  1770. }
  1771. ehca_set_pagebuf_1_exit0:
  1772. if (ret)
  1773. ehca_gen_err("ret=%x e_mr=%p pginfo=%p type=%x num_pages=%lx "
  1774. "num_4k=%lx next_buf=%lx next_4k=%lx rpage=%p "
  1775. "page_cnt=%lx page_4k_cnt=%lx next_listelem=%lx "
  1776. "region=%p next_chunk=%p next_nmap=%lx", ret, e_mr,
  1777. pginfo, pginfo->type, pginfo->num_pages,
  1778. pginfo->num_4k, pginfo->next_buf, pginfo->next_4k,
  1779. rpage, pginfo->page_cnt, pginfo->page_4k_cnt,
  1780. pginfo->next_listelem, pginfo->region,
  1781. pginfo->next_chunk, pginfo->next_nmap);
  1782. return ret;
  1783. } /* end ehca_set_pagebuf_1() */
  1784. /*----------------------------------------------------------------------*/
  1785. /*
  1786. * check MR if it is a max-MR, i.e. uses whole memory
  1787. * in case it's a max-MR 1 is returned, else 0
  1788. */
  1789. int ehca_mr_is_maxmr(u64 size,
  1790. u64 *iova_start)
  1791. {
  1792. /* a MR is treated as max-MR only if it fits following: */
  1793. if ((size == ((u64)high_memory - PAGE_OFFSET)) &&
  1794. (iova_start == (void*)KERNELBASE)) {
  1795. ehca_gen_dbg("this is a max-MR");
  1796. return 1;
  1797. } else
  1798. return 0;
  1799. } /* end ehca_mr_is_maxmr() */
  1800. /*----------------------------------------------------------------------*/
  1801. /* map access control for MR/MW. This routine is used for MR and MW. */
  1802. void ehca_mrmw_map_acl(int ib_acl,
  1803. u32 *hipz_acl)
  1804. {
  1805. *hipz_acl = 0;
  1806. if (ib_acl & IB_ACCESS_REMOTE_READ)
  1807. *hipz_acl |= HIPZ_ACCESSCTRL_R_READ;
  1808. if (ib_acl & IB_ACCESS_REMOTE_WRITE)
  1809. *hipz_acl |= HIPZ_ACCESSCTRL_R_WRITE;
  1810. if (ib_acl & IB_ACCESS_REMOTE_ATOMIC)
  1811. *hipz_acl |= HIPZ_ACCESSCTRL_R_ATOMIC;
  1812. if (ib_acl & IB_ACCESS_LOCAL_WRITE)
  1813. *hipz_acl |= HIPZ_ACCESSCTRL_L_WRITE;
  1814. if (ib_acl & IB_ACCESS_MW_BIND)
  1815. *hipz_acl |= HIPZ_ACCESSCTRL_MW_BIND;
  1816. } /* end ehca_mrmw_map_acl() */
  1817. /*----------------------------------------------------------------------*/
  1818. /* sets page size in hipz access control for MR/MW. */
  1819. void ehca_mrmw_set_pgsize_hipz_acl(u32 *hipz_acl) /*INOUT*/
  1820. {
  1821. return; /* HCA supports only 4k */
  1822. } /* end ehca_mrmw_set_pgsize_hipz_acl() */
  1823. /*----------------------------------------------------------------------*/
  1824. /*
  1825. * reverse map access control for MR/MW.
  1826. * This routine is used for MR and MW.
  1827. */
  1828. void ehca_mrmw_reverse_map_acl(const u32 *hipz_acl,
  1829. int *ib_acl) /*OUT*/
  1830. {
  1831. *ib_acl = 0;
  1832. if (*hipz_acl & HIPZ_ACCESSCTRL_R_READ)
  1833. *ib_acl |= IB_ACCESS_REMOTE_READ;
  1834. if (*hipz_acl & HIPZ_ACCESSCTRL_R_WRITE)
  1835. *ib_acl |= IB_ACCESS_REMOTE_WRITE;
  1836. if (*hipz_acl & HIPZ_ACCESSCTRL_R_ATOMIC)
  1837. *ib_acl |= IB_ACCESS_REMOTE_ATOMIC;
  1838. if (*hipz_acl & HIPZ_ACCESSCTRL_L_WRITE)
  1839. *ib_acl |= IB_ACCESS_LOCAL_WRITE;
  1840. if (*hipz_acl & HIPZ_ACCESSCTRL_MW_BIND)
  1841. *ib_acl |= IB_ACCESS_MW_BIND;
  1842. } /* end ehca_mrmw_reverse_map_acl() */
  1843. /*----------------------------------------------------------------------*/
  1844. /*
  1845. * map HIPZ rc to IB retcodes for MR/MW allocations
  1846. * Used for hipz_mr_reg_alloc and hipz_mw_alloc.
  1847. */
  1848. int ehca_mrmw_map_hrc_alloc(const u64 hipz_rc)
  1849. {
  1850. switch (hipz_rc) {
  1851. case H_SUCCESS: /* successful completion */
  1852. return 0;
  1853. case H_ADAPTER_PARM: /* invalid adapter handle */
  1854. case H_RT_PARM: /* invalid resource type */
  1855. case H_NOT_ENOUGH_RESOURCES: /* insufficient resources */
  1856. case H_MLENGTH_PARM: /* invalid memory length */
  1857. case H_MEM_ACCESS_PARM: /* invalid access controls */
  1858. case H_CONSTRAINED: /* resource constraint */
  1859. return -EINVAL;
  1860. case H_BUSY: /* long busy */
  1861. return -EBUSY;
  1862. default:
  1863. return -EINVAL;
  1864. }
  1865. } /* end ehca_mrmw_map_hrc_alloc() */
  1866. /*----------------------------------------------------------------------*/
  1867. /*
  1868. * map HIPZ rc to IB retcodes for MR register rpage
  1869. * Used for hipz_h_register_rpage_mr at registering last page
  1870. */
  1871. int ehca_mrmw_map_hrc_rrpg_last(const u64 hipz_rc)
  1872. {
  1873. switch (hipz_rc) {
  1874. case H_SUCCESS: /* registration complete */
  1875. return 0;
  1876. case H_PAGE_REGISTERED: /* page registered */
  1877. case H_ADAPTER_PARM: /* invalid adapter handle */
  1878. case H_RH_PARM: /* invalid resource handle */
  1879. /* case H_QT_PARM: invalid queue type */
  1880. case H_PARAMETER: /*
  1881. * invalid logical address,
  1882. * or count zero or greater 512
  1883. */
  1884. case H_TABLE_FULL: /* page table full */
  1885. case H_HARDWARE: /* HCA not operational */
  1886. return -EINVAL;
  1887. case H_BUSY: /* long busy */
  1888. return -EBUSY;
  1889. default:
  1890. return -EINVAL;
  1891. }
  1892. } /* end ehca_mrmw_map_hrc_rrpg_last() */
  1893. /*----------------------------------------------------------------------*/
  1894. /*
  1895. * map HIPZ rc to IB retcodes for MR register rpage
  1896. * Used for hipz_h_register_rpage_mr at registering one page, but not last page
  1897. */
  1898. int ehca_mrmw_map_hrc_rrpg_notlast(const u64 hipz_rc)
  1899. {
  1900. switch (hipz_rc) {
  1901. case H_PAGE_REGISTERED: /* page registered */
  1902. return 0;
  1903. case H_SUCCESS: /* registration complete */
  1904. case H_ADAPTER_PARM: /* invalid adapter handle */
  1905. case H_RH_PARM: /* invalid resource handle */
  1906. /* case H_QT_PARM: invalid queue type */
  1907. case H_PARAMETER: /*
  1908. * invalid logical address,
  1909. * or count zero or greater 512
  1910. */
  1911. case H_TABLE_FULL: /* page table full */
  1912. case H_HARDWARE: /* HCA not operational */
  1913. return -EINVAL;
  1914. case H_BUSY: /* long busy */
  1915. return -EBUSY;
  1916. default:
  1917. return -EINVAL;
  1918. }
  1919. } /* end ehca_mrmw_map_hrc_rrpg_notlast() */
  1920. /*----------------------------------------------------------------------*/
  1921. /* map HIPZ rc to IB retcodes for MR query. Used for hipz_mr_query. */
  1922. int ehca_mrmw_map_hrc_query_mr(const u64 hipz_rc)
  1923. {
  1924. switch (hipz_rc) {
  1925. case H_SUCCESS: /* successful completion */
  1926. return 0;
  1927. case H_ADAPTER_PARM: /* invalid adapter handle */
  1928. case H_RH_PARM: /* invalid resource handle */
  1929. return -EINVAL;
  1930. case H_BUSY: /* long busy */
  1931. return -EBUSY;
  1932. default:
  1933. return -EINVAL;
  1934. }
  1935. } /* end ehca_mrmw_map_hrc_query_mr() */
  1936. /*----------------------------------------------------------------------*/
  1937. /*----------------------------------------------------------------------*/
  1938. /*
  1939. * map HIPZ rc to IB retcodes for freeing MR resource
  1940. * Used for hipz_h_free_resource_mr
  1941. */
  1942. int ehca_mrmw_map_hrc_free_mr(const u64 hipz_rc)
  1943. {
  1944. switch (hipz_rc) {
  1945. case H_SUCCESS: /* resource freed */
  1946. return 0;
  1947. case H_ADAPTER_PARM: /* invalid adapter handle */
  1948. case H_RH_PARM: /* invalid resource handle */
  1949. case H_R_STATE: /* invalid resource state */
  1950. case H_HARDWARE: /* HCA not operational */
  1951. return -EINVAL;
  1952. case H_RESOURCE: /* Resource in use */
  1953. case H_BUSY: /* long busy */
  1954. return -EBUSY;
  1955. default:
  1956. return -EINVAL;
  1957. }
  1958. } /* end ehca_mrmw_map_hrc_free_mr() */
  1959. /*----------------------------------------------------------------------*/
  1960. /*
  1961. * map HIPZ rc to IB retcodes for freeing MW resource
  1962. * Used for hipz_h_free_resource_mw
  1963. */
  1964. int ehca_mrmw_map_hrc_free_mw(const u64 hipz_rc)
  1965. {
  1966. switch (hipz_rc) {
  1967. case H_SUCCESS: /* resource freed */
  1968. return 0;
  1969. case H_ADAPTER_PARM: /* invalid adapter handle */
  1970. case H_RH_PARM: /* invalid resource handle */
  1971. case H_R_STATE: /* invalid resource state */
  1972. case H_HARDWARE: /* HCA not operational */
  1973. return -EINVAL;
  1974. case H_RESOURCE: /* Resource in use */
  1975. case H_BUSY: /* long busy */
  1976. return -EBUSY;
  1977. default:
  1978. return -EINVAL;
  1979. }
  1980. } /* end ehca_mrmw_map_hrc_free_mw() */
  1981. /*----------------------------------------------------------------------*/
  1982. /*
  1983. * map HIPZ rc to IB retcodes for SMR registrations
  1984. * Used for hipz_h_register_smr.
  1985. */
  1986. int ehca_mrmw_map_hrc_reg_smr(const u64 hipz_rc)
  1987. {
  1988. switch (hipz_rc) {
  1989. case H_SUCCESS: /* successful completion */
  1990. return 0;
  1991. case H_ADAPTER_PARM: /* invalid adapter handle */
  1992. case H_RH_PARM: /* invalid resource handle */
  1993. case H_MEM_PARM: /* invalid MR virtual address */
  1994. case H_MEM_ACCESS_PARM: /* invalid access controls */
  1995. case H_NOT_ENOUGH_RESOURCES: /* insufficient resources */
  1996. return -EINVAL;
  1997. case H_BUSY: /* long busy */
  1998. return -EBUSY;
  1999. default:
  2000. return -EINVAL;
  2001. }
  2002. } /* end ehca_mrmw_map_hrc_reg_smr() */
  2003. /*----------------------------------------------------------------------*/
  2004. /*
  2005. * MR destructor and constructor
  2006. * used in Reregister MR verb, sets all fields in ehca_mr_t to 0,
  2007. * except struct ib_mr and spinlock
  2008. */
  2009. void ehca_mr_deletenew(struct ehca_mr *mr)
  2010. {
  2011. mr->flags = 0;
  2012. mr->num_pages = 0;
  2013. mr->num_4k = 0;
  2014. mr->acl = 0;
  2015. mr->start = NULL;
  2016. mr->fmr_page_size = 0;
  2017. mr->fmr_max_pages = 0;
  2018. mr->fmr_max_maps = 0;
  2019. mr->fmr_map_cnt = 0;
  2020. memset(&mr->ipz_mr_handle, 0, sizeof(mr->ipz_mr_handle));
  2021. memset(&mr->galpas, 0, sizeof(mr->galpas));
  2022. mr->nr_of_pages = 0;
  2023. mr->pagearray = NULL;
  2024. } /* end ehca_mr_deletenew() */
  2025. int ehca_init_mrmw_cache(void)
  2026. {
  2027. mr_cache = kmem_cache_create("ehca_cache_mr",
  2028. sizeof(struct ehca_mr), 0,
  2029. SLAB_HWCACHE_ALIGN,
  2030. NULL, NULL);
  2031. if (!mr_cache)
  2032. return -ENOMEM;
  2033. mw_cache = kmem_cache_create("ehca_cache_mw",
  2034. sizeof(struct ehca_mw), 0,
  2035. SLAB_HWCACHE_ALIGN,
  2036. NULL, NULL);
  2037. if (!mw_cache) {
  2038. kmem_cache_destroy(mr_cache);
  2039. mr_cache = NULL;
  2040. return -ENOMEM;
  2041. }
  2042. return 0;
  2043. }
  2044. void ehca_cleanup_mrmw_cache(void)
  2045. {
  2046. if (mr_cache)
  2047. kmem_cache_destroy(mr_cache);
  2048. if (mw_cache)
  2049. kmem_cache_destroy(mw_cache);
  2050. }