s3c2410_wdt.c 12 KB

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  1. /* linux/drivers/char/watchdog/s3c2410_wdt.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 Watchdog Timer Support
  7. *
  8. * Based on, softdog.c by Alan Cox,
  9. * (c) Copyright 1996 Alan Cox <alan@redhat.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * Changelog:
  26. * 05-Oct-2004 BJD Added semaphore init to stop crashes on open
  27. * Fixed tmr_count / wdt_count confusion
  28. * Added configurable debug
  29. *
  30. * 11-Jan-2005 BJD Fixed divide-by-2 in timeout code
  31. *
  32. * 25-Jan-2005 DA Added suspend/resume support
  33. * Replaced reboot notifier with .shutdown method
  34. *
  35. * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
  36. */
  37. #include <linux/module.h>
  38. #include <linux/moduleparam.h>
  39. #include <linux/types.h>
  40. #include <linux/timer.h>
  41. #include <linux/miscdevice.h>
  42. #include <linux/watchdog.h>
  43. #include <linux/fs.h>
  44. #include <linux/init.h>
  45. #include <linux/platform_device.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/clk.h>
  48. #include <asm/uaccess.h>
  49. #include <asm/io.h>
  50. #include <asm/arch/map.h>
  51. #undef S3C24XX_VA_WATCHDOG
  52. #define S3C24XX_VA_WATCHDOG (0)
  53. #include <asm/arch/regs-watchdog.h>
  54. #define PFX "s3c2410-wdt: "
  55. #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
  56. #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
  57. static int nowayout = WATCHDOG_NOWAYOUT;
  58. static int tmr_margin = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME;
  59. static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
  60. static int soft_noboot = 0;
  61. static int debug = 0;
  62. module_param(tmr_margin, int, 0);
  63. module_param(tmr_atboot, int, 0);
  64. module_param(nowayout, int, 0);
  65. module_param(soft_noboot, int, 0);
  66. module_param(debug, int, 0);
  67. MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
  68. MODULE_PARM_DESC(tmr_atboot, "Watchdog is started at boot time if set to 1, default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
  69. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
  70. MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default depends on ONLY_TESTING)");
  71. MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug, (default 0)");
  72. typedef enum close_state {
  73. CLOSE_STATE_NOT,
  74. CLOSE_STATE_ALLOW=0x4021
  75. } close_state_t;
  76. static DECLARE_MUTEX(open_lock);
  77. static struct resource *wdt_mem;
  78. static struct resource *wdt_irq;
  79. static struct clk *wdt_clock;
  80. static void __iomem *wdt_base;
  81. static unsigned int wdt_count;
  82. static close_state_t allow_close;
  83. /* watchdog control routines */
  84. #define DBG(msg...) do { \
  85. if (debug) \
  86. printk(KERN_INFO msg); \
  87. } while(0)
  88. /* functions */
  89. static int s3c2410wdt_keepalive(void)
  90. {
  91. writel(wdt_count, wdt_base + S3C2410_WTCNT);
  92. return 0;
  93. }
  94. static int s3c2410wdt_stop(void)
  95. {
  96. unsigned long wtcon;
  97. wtcon = readl(wdt_base + S3C2410_WTCON);
  98. wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
  99. writel(wtcon, wdt_base + S3C2410_WTCON);
  100. return 0;
  101. }
  102. static int s3c2410wdt_start(void)
  103. {
  104. unsigned long wtcon;
  105. s3c2410wdt_stop();
  106. wtcon = readl(wdt_base + S3C2410_WTCON);
  107. wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
  108. if (soft_noboot) {
  109. wtcon |= S3C2410_WTCON_INTEN;
  110. wtcon &= ~S3C2410_WTCON_RSTEN;
  111. } else {
  112. wtcon &= ~S3C2410_WTCON_INTEN;
  113. wtcon |= S3C2410_WTCON_RSTEN;
  114. }
  115. DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
  116. __FUNCTION__, wdt_count, wtcon);
  117. writel(wdt_count, wdt_base + S3C2410_WTDAT);
  118. writel(wdt_count, wdt_base + S3C2410_WTCNT);
  119. writel(wtcon, wdt_base + S3C2410_WTCON);
  120. return 0;
  121. }
  122. static int s3c2410wdt_set_heartbeat(int timeout)
  123. {
  124. unsigned int freq = clk_get_rate(wdt_clock);
  125. unsigned int count;
  126. unsigned int divisor = 1;
  127. unsigned long wtcon;
  128. if (timeout < 1)
  129. return -EINVAL;
  130. freq /= 128;
  131. count = timeout * freq;
  132. DBG("%s: count=%d, timeout=%d, freq=%d\n",
  133. __FUNCTION__, count, timeout, freq);
  134. /* if the count is bigger than the watchdog register,
  135. then work out what we need to do (and if) we can
  136. actually make this value
  137. */
  138. if (count >= 0x10000) {
  139. for (divisor = 1; divisor <= 0x100; divisor++) {
  140. if ((count / divisor) < 0x10000)
  141. break;
  142. }
  143. if ((count / divisor) >= 0x10000) {
  144. printk(KERN_ERR PFX "timeout %d too big\n", timeout);
  145. return -EINVAL;
  146. }
  147. }
  148. tmr_margin = timeout;
  149. DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
  150. __FUNCTION__, timeout, divisor, count, count/divisor);
  151. count /= divisor;
  152. wdt_count = count;
  153. /* update the pre-scaler */
  154. wtcon = readl(wdt_base + S3C2410_WTCON);
  155. wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
  156. wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
  157. writel(count, wdt_base + S3C2410_WTDAT);
  158. writel(wtcon, wdt_base + S3C2410_WTCON);
  159. return 0;
  160. }
  161. /*
  162. * /dev/watchdog handling
  163. */
  164. static int s3c2410wdt_open(struct inode *inode, struct file *file)
  165. {
  166. if(down_trylock(&open_lock))
  167. return -EBUSY;
  168. if (nowayout)
  169. __module_get(THIS_MODULE);
  170. allow_close = CLOSE_STATE_NOT;
  171. /* start the timer */
  172. s3c2410wdt_start();
  173. return nonseekable_open(inode, file);
  174. }
  175. static int s3c2410wdt_release(struct inode *inode, struct file *file)
  176. {
  177. /*
  178. * Shut off the timer.
  179. * Lock it in if it's a module and we set nowayout
  180. */
  181. if (allow_close == CLOSE_STATE_ALLOW) {
  182. s3c2410wdt_stop();
  183. } else {
  184. printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
  185. s3c2410wdt_keepalive();
  186. }
  187. allow_close = CLOSE_STATE_NOT;
  188. up(&open_lock);
  189. return 0;
  190. }
  191. static ssize_t s3c2410wdt_write(struct file *file, const char __user *data,
  192. size_t len, loff_t *ppos)
  193. {
  194. /*
  195. * Refresh the timer.
  196. */
  197. if(len) {
  198. if (!nowayout) {
  199. size_t i;
  200. /* In case it was set long ago */
  201. allow_close = CLOSE_STATE_NOT;
  202. for (i = 0; i != len; i++) {
  203. char c;
  204. if (get_user(c, data + i))
  205. return -EFAULT;
  206. if (c == 'V')
  207. allow_close = CLOSE_STATE_ALLOW;
  208. }
  209. }
  210. s3c2410wdt_keepalive();
  211. }
  212. return len;
  213. }
  214. #define OPTIONS WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE
  215. static struct watchdog_info s3c2410_wdt_ident = {
  216. .options = OPTIONS,
  217. .firmware_version = 0,
  218. .identity = "S3C2410 Watchdog",
  219. };
  220. static int s3c2410wdt_ioctl(struct inode *inode, struct file *file,
  221. unsigned int cmd, unsigned long arg)
  222. {
  223. void __user *argp = (void __user *)arg;
  224. int __user *p = argp;
  225. int new_margin;
  226. switch (cmd) {
  227. default:
  228. return -ENOTTY;
  229. case WDIOC_GETSUPPORT:
  230. return copy_to_user(argp, &s3c2410_wdt_ident,
  231. sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
  232. case WDIOC_GETSTATUS:
  233. case WDIOC_GETBOOTSTATUS:
  234. return put_user(0, p);
  235. case WDIOC_KEEPALIVE:
  236. s3c2410wdt_keepalive();
  237. return 0;
  238. case WDIOC_SETTIMEOUT:
  239. if (get_user(new_margin, p))
  240. return -EFAULT;
  241. if (s3c2410wdt_set_heartbeat(new_margin))
  242. return -EINVAL;
  243. s3c2410wdt_keepalive();
  244. return put_user(tmr_margin, p);
  245. case WDIOC_GETTIMEOUT:
  246. return put_user(tmr_margin, p);
  247. }
  248. }
  249. /* kernel interface */
  250. static const struct file_operations s3c2410wdt_fops = {
  251. .owner = THIS_MODULE,
  252. .llseek = no_llseek,
  253. .write = s3c2410wdt_write,
  254. .ioctl = s3c2410wdt_ioctl,
  255. .open = s3c2410wdt_open,
  256. .release = s3c2410wdt_release,
  257. };
  258. static struct miscdevice s3c2410wdt_miscdev = {
  259. .minor = WATCHDOG_MINOR,
  260. .name = "watchdog",
  261. .fops = &s3c2410wdt_fops,
  262. };
  263. /* interrupt handler code */
  264. static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
  265. {
  266. printk(KERN_INFO PFX "Watchdog timer expired!\n");
  267. s3c2410wdt_keepalive();
  268. return IRQ_HANDLED;
  269. }
  270. /* device interface */
  271. static int s3c2410wdt_probe(struct platform_device *pdev)
  272. {
  273. struct resource *res;
  274. int started = 0;
  275. int ret;
  276. int size;
  277. DBG("%s: probe=%p\n", __FUNCTION__, pdev);
  278. /* get the memory region for the watchdog timer */
  279. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  280. if (res == NULL) {
  281. printk(KERN_INFO PFX "failed to get memory region resouce\n");
  282. return -ENOENT;
  283. }
  284. size = (res->end-res->start)+1;
  285. wdt_mem = request_mem_region(res->start, size, pdev->name);
  286. if (wdt_mem == NULL) {
  287. printk(KERN_INFO PFX "failed to get memory region\n");
  288. return -ENOENT;
  289. }
  290. wdt_base = ioremap(res->start, size);
  291. if (wdt_base == 0) {
  292. printk(KERN_INFO PFX "failed to ioremap() region\n");
  293. return -EINVAL;
  294. }
  295. DBG("probe: mapped wdt_base=%p\n", wdt_base);
  296. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  297. if (res == NULL) {
  298. printk(KERN_INFO PFX "failed to get irq resource\n");
  299. iounmap(wdt_base);
  300. return -ENOENT;
  301. }
  302. ret = request_irq(res->start, s3c2410wdt_irq, 0, pdev->name, pdev);
  303. if (ret != 0) {
  304. printk(KERN_INFO PFX "failed to install irq (%d)\n", ret);
  305. iounmap(wdt_base);
  306. return ret;
  307. }
  308. wdt_clock = clk_get(&pdev->dev, "watchdog");
  309. if (wdt_clock == NULL) {
  310. printk(KERN_INFO PFX "failed to find watchdog clock source\n");
  311. iounmap(wdt_base);
  312. return -ENOENT;
  313. }
  314. clk_enable(wdt_clock);
  315. /* see if we can actually set the requested timer margin, and if
  316. * not, try the default value */
  317. if (s3c2410wdt_set_heartbeat(tmr_margin)) {
  318. started = s3c2410wdt_set_heartbeat(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
  319. if (started == 0) {
  320. printk(KERN_INFO PFX "tmr_margin value out of range, default %d used\n",
  321. CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
  322. } else {
  323. printk(KERN_INFO PFX "default timer value is out of range, cannot start\n");
  324. }
  325. }
  326. ret = misc_register(&s3c2410wdt_miscdev);
  327. if (ret) {
  328. printk (KERN_ERR PFX "cannot register miscdev on minor=%d (%d)\n",
  329. WATCHDOG_MINOR, ret);
  330. iounmap(wdt_base);
  331. return ret;
  332. }
  333. if (tmr_atboot && started == 0) {
  334. printk(KERN_INFO PFX "Starting Watchdog Timer\n");
  335. s3c2410wdt_start();
  336. } else if (!tmr_atboot) {
  337. /* if we're not enabling the watchdog, then ensure it is
  338. * disabled if it has been left running from the bootloader
  339. * or other source */
  340. s3c2410wdt_stop();
  341. }
  342. return 0;
  343. }
  344. static int s3c2410wdt_remove(struct platform_device *dev)
  345. {
  346. if (wdt_mem != NULL) {
  347. release_resource(wdt_mem);
  348. kfree(wdt_mem);
  349. wdt_mem = NULL;
  350. }
  351. if (wdt_irq != NULL) {
  352. free_irq(wdt_irq->start, dev);
  353. wdt_irq = NULL;
  354. }
  355. if (wdt_clock != NULL) {
  356. clk_disable(wdt_clock);
  357. clk_put(wdt_clock);
  358. wdt_clock = NULL;
  359. }
  360. iounmap(wdt_base);
  361. misc_deregister(&s3c2410wdt_miscdev);
  362. return 0;
  363. }
  364. static void s3c2410wdt_shutdown(struct platform_device *dev)
  365. {
  366. s3c2410wdt_stop();
  367. }
  368. #ifdef CONFIG_PM
  369. static unsigned long wtcon_save;
  370. static unsigned long wtdat_save;
  371. static int s3c2410wdt_suspend(struct platform_device *dev, pm_message_t state)
  372. {
  373. /* Save watchdog state, and turn it off. */
  374. wtcon_save = readl(wdt_base + S3C2410_WTCON);
  375. wtdat_save = readl(wdt_base + S3C2410_WTDAT);
  376. /* Note that WTCNT doesn't need to be saved. */
  377. s3c2410wdt_stop();
  378. return 0;
  379. }
  380. static int s3c2410wdt_resume(struct platform_device *dev)
  381. {
  382. /* Restore watchdog state. */
  383. writel(wtdat_save, wdt_base + S3C2410_WTDAT);
  384. writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
  385. writel(wtcon_save, wdt_base + S3C2410_WTCON);
  386. printk(KERN_INFO PFX "watchdog %sabled\n",
  387. (wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
  388. return 0;
  389. }
  390. #else
  391. #define s3c2410wdt_suspend NULL
  392. #define s3c2410wdt_resume NULL
  393. #endif /* CONFIG_PM */
  394. static struct platform_driver s3c2410wdt_driver = {
  395. .probe = s3c2410wdt_probe,
  396. .remove = s3c2410wdt_remove,
  397. .shutdown = s3c2410wdt_shutdown,
  398. .suspend = s3c2410wdt_suspend,
  399. .resume = s3c2410wdt_resume,
  400. .driver = {
  401. .owner = THIS_MODULE,
  402. .name = "s3c2410-wdt",
  403. },
  404. };
  405. static char banner[] __initdata = KERN_INFO "S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics\n";
  406. static int __init watchdog_init(void)
  407. {
  408. printk(banner);
  409. return platform_driver_register(&s3c2410wdt_driver);
  410. }
  411. static void __exit watchdog_exit(void)
  412. {
  413. platform_driver_unregister(&s3c2410wdt_driver);
  414. }
  415. module_init(watchdog_init);
  416. module_exit(watchdog_exit);
  417. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
  418. "Dimitry Andric <dimitry.andric@tomtom.com>");
  419. MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
  420. MODULE_LICENSE("GPL");
  421. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);