i8xx_tco.c 15 KB

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  1. /*
  2. * i8xx_tco: TCO timer driver for i8xx chipsets
  3. *
  4. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights Reserved.
  5. * http://www.kernelconcepts.de
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. *
  12. * Neither kernel concepts nor Nils Faerber admit liability nor provide
  13. * warranty for any of this software. This material is provided
  14. * "AS-IS" and at no charge.
  15. *
  16. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
  17. * developed for
  18. * Jentro AG, Haar/Munich (Germany)
  19. *
  20. * TCO timer driver for i8xx chipsets
  21. * based on softdog.c by Alan Cox <alan@redhat.com>
  22. *
  23. * The TCO timer is implemented in the following I/O controller hubs:
  24. * (See the intel documentation on http://developer.intel.com.)
  25. * 82801AA (ICH) : document number 290655-003, 290677-014,
  26. * 82801AB (ICHO) : document number 290655-003, 290677-014,
  27. * 82801BA (ICH2) : document number 290687-002, 298242-027,
  28. * 82801BAM (ICH2-M) : document number 290687-002, 298242-027,
  29. * 82801CA (ICH3-S) : document number 290733-003, 290739-013,
  30. * 82801CAM (ICH3-M) : document number 290716-001, 290718-007,
  31. * 82801DB (ICH4) : document number 290744-001, 290745-020,
  32. * 82801DBM (ICH4-M) : document number 252337-001, 252663-005,
  33. * 82801E (C-ICH) : document number 273599-001, 273645-002,
  34. * 82801EB (ICH5) : document number 252516-001, 252517-003,
  35. * 82801ER (ICH5R) : document number 252516-001, 252517-003,
  36. *
  37. * 20000710 Nils Faerber
  38. * Initial Version 0.01
  39. * 20000728 Nils Faerber
  40. * 0.02 Fix for SMI_EN->TCO_EN bit, some cleanups
  41. * 20011214 Matt Domsch <Matt_Domsch@dell.com>
  42. * 0.03 Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
  43. * Didn't add timeout option as i810_margin already exists.
  44. * 20020224 Joel Becker, Wim Van Sebroeck
  45. * 0.04 Support for 82801CA(M) chipset, timer margin needs to be > 3,
  46. * add support for WDIOC_SETTIMEOUT and WDIOC_GETTIMEOUT.
  47. * 20020412 Rob Radez <rob@osinvestor.com>, Wim Van Sebroeck
  48. * 0.05 Fix possible timer_alive race, add expect close support,
  49. * clean up ioctls (WDIOC_GETSTATUS, WDIOC_GETBOOTSTATUS and
  50. * WDIOC_SETOPTIONS), made i810tco_getdevice __init,
  51. * removed boot_status, removed tco_timer_read,
  52. * added support for 82801DB and 82801E chipset,
  53. * added support for 82801EB and 8280ER chipset,
  54. * general cleanup.
  55. * 20030921 Wim Van Sebroeck <wim@iguana.be>
  56. * 0.06 change i810_margin to heartbeat, use module_param,
  57. * added notify system support, renamed module to i8xx_tco.
  58. * 20050128 Wim Van Sebroeck <wim@iguana.be>
  59. * 0.07 Added support for the ICH4-M, ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW
  60. * chipsets. Also added support for the "undocumented" ICH7 chipset.
  61. * 20050807 Wim Van Sebroeck <wim@iguana.be>
  62. * 0.08 Make sure that the watchdog is only "armed" when started.
  63. * (Kernel Bug 4251)
  64. * 20060416 Wim Van Sebroeck <wim@iguana.be>
  65. * 0.09 Remove support for the ICH6, ICH6R, ICH6-M, ICH6W and ICH6RW and
  66. * ICH7 chipsets. (See Kernel Bug 6031 - other code will support these
  67. * chipsets)
  68. */
  69. /*
  70. * Includes, defines, variables, module parameters, ...
  71. */
  72. #include <linux/module.h>
  73. #include <linux/moduleparam.h>
  74. #include <linux/types.h>
  75. #include <linux/miscdevice.h>
  76. #include <linux/watchdog.h>
  77. #include <linux/notifier.h>
  78. #include <linux/reboot.h>
  79. #include <linux/init.h>
  80. #include <linux/fs.h>
  81. #include <linux/pci.h>
  82. #include <linux/ioport.h>
  83. #include <asm/uaccess.h>
  84. #include <asm/io.h>
  85. #include "i8xx_tco.h"
  86. /* Module and version information */
  87. #define TCO_VERSION "0.09"
  88. #define TCO_MODULE_NAME "i8xx TCO timer"
  89. #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
  90. #define PFX TCO_MODULE_NAME ": "
  91. /* internal variables */
  92. static unsigned int ACPIBASE;
  93. static spinlock_t tco_lock; /* Guards the hardware */
  94. static unsigned long timer_alive;
  95. static char tco_expect_close;
  96. static struct pci_dev *i8xx_tco_pci;
  97. /* module parameters */
  98. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (2<heartbeat<39) */
  99. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  100. module_param(heartbeat, int, 0);
  101. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  102. static int nowayout = WATCHDOG_NOWAYOUT;
  103. module_param(nowayout, int, 0);
  104. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
  105. /*
  106. * Some TCO specific functions
  107. */
  108. static inline unsigned char seconds_to_ticks(int seconds)
  109. {
  110. /* the internal timer is stored as ticks which decrement
  111. * every 0.6 seconds */
  112. return (seconds * 10) / 6;
  113. }
  114. static int tco_timer_start (void)
  115. {
  116. unsigned char val;
  117. spin_lock(&tco_lock);
  118. /* disable chipset's NO_REBOOT bit */
  119. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val);
  120. val &= 0xfd;
  121. pci_write_config_byte (i8xx_tco_pci, 0xd4, val);
  122. /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
  123. val = inb (TCO1_CNT + 1);
  124. val &= 0xf7;
  125. outb (val, TCO1_CNT + 1);
  126. val = inb (TCO1_CNT + 1);
  127. spin_unlock(&tco_lock);
  128. if (val & 0x08)
  129. return -1;
  130. return 0;
  131. }
  132. static int tco_timer_stop (void)
  133. {
  134. unsigned char val, val1;
  135. spin_lock(&tco_lock);
  136. /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
  137. val = inb (TCO1_CNT + 1);
  138. val |= 0x08;
  139. outb (val, TCO1_CNT + 1);
  140. val = inb (TCO1_CNT + 1);
  141. /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
  142. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
  143. val1 |= 0x02;
  144. pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
  145. spin_unlock(&tco_lock);
  146. if ((val & 0x08) == 0)
  147. return -1;
  148. return 0;
  149. }
  150. static int tco_timer_keepalive (void)
  151. {
  152. spin_lock(&tco_lock);
  153. /* Reload the timer by writing to the TCO Timer Reload register */
  154. outb (0x01, TCO1_RLD);
  155. spin_unlock(&tco_lock);
  156. return 0;
  157. }
  158. static int tco_timer_set_heartbeat (int t)
  159. {
  160. unsigned char val;
  161. unsigned char tmrval;
  162. tmrval = seconds_to_ticks(t);
  163. /* from the specs: */
  164. /* "Values of 0h-3h are ignored and should not be attempted" */
  165. if (tmrval > 0x3f || tmrval < 0x04)
  166. return -EINVAL;
  167. /* Write new heartbeat to watchdog */
  168. spin_lock(&tco_lock);
  169. val = inb (TCO1_TMR);
  170. val &= 0xc0;
  171. val |= tmrval;
  172. outb (val, TCO1_TMR);
  173. val = inb (TCO1_TMR);
  174. spin_unlock(&tco_lock);
  175. if ((val & 0x3f) != tmrval)
  176. return -EINVAL;
  177. heartbeat = t;
  178. return 0;
  179. }
  180. static int tco_timer_get_timeleft (int *time_left)
  181. {
  182. unsigned char val;
  183. spin_lock(&tco_lock);
  184. /* read the TCO Timer */
  185. val = inb (TCO1_RLD);
  186. val &= 0x3f;
  187. spin_unlock(&tco_lock);
  188. *time_left = (int)((val * 6) / 10);
  189. return 0;
  190. }
  191. /*
  192. * /dev/watchdog handling
  193. */
  194. static int i8xx_tco_open (struct inode *inode, struct file *file)
  195. {
  196. /* /dev/watchdog can only be opened once */
  197. if (test_and_set_bit(0, &timer_alive))
  198. return -EBUSY;
  199. /*
  200. * Reload and activate timer
  201. */
  202. tco_timer_keepalive ();
  203. tco_timer_start ();
  204. return nonseekable_open(inode, file);
  205. }
  206. static int i8xx_tco_release (struct inode *inode, struct file *file)
  207. {
  208. /*
  209. * Shut off the timer.
  210. */
  211. if (tco_expect_close == 42) {
  212. tco_timer_stop ();
  213. } else {
  214. printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
  215. tco_timer_keepalive ();
  216. }
  217. clear_bit(0, &timer_alive);
  218. tco_expect_close = 0;
  219. return 0;
  220. }
  221. static ssize_t i8xx_tco_write (struct file *file, const char __user *data,
  222. size_t len, loff_t * ppos)
  223. {
  224. /* See if we got the magic character 'V' and reload the timer */
  225. if (len) {
  226. if (!nowayout) {
  227. size_t i;
  228. /* note: just in case someone wrote the magic character
  229. * five months ago... */
  230. tco_expect_close = 0;
  231. /* scan to see whether or not we got the magic character */
  232. for (i = 0; i != len; i++) {
  233. char c;
  234. if(get_user(c, data+i))
  235. return -EFAULT;
  236. if (c == 'V')
  237. tco_expect_close = 42;
  238. }
  239. }
  240. /* someone wrote to us, we should reload the timer */
  241. tco_timer_keepalive ();
  242. }
  243. return len;
  244. }
  245. static int i8xx_tco_ioctl (struct inode *inode, struct file *file,
  246. unsigned int cmd, unsigned long arg)
  247. {
  248. int new_options, retval = -EINVAL;
  249. int new_heartbeat;
  250. int time_left;
  251. void __user *argp = (void __user *)arg;
  252. int __user *p = argp;
  253. static struct watchdog_info ident = {
  254. .options = WDIOF_SETTIMEOUT |
  255. WDIOF_KEEPALIVEPING |
  256. WDIOF_MAGICCLOSE,
  257. .firmware_version = 0,
  258. .identity = TCO_MODULE_NAME,
  259. };
  260. switch (cmd) {
  261. case WDIOC_GETSUPPORT:
  262. return copy_to_user(argp, &ident,
  263. sizeof (ident)) ? -EFAULT : 0;
  264. case WDIOC_GETSTATUS:
  265. case WDIOC_GETBOOTSTATUS:
  266. return put_user (0, p);
  267. case WDIOC_KEEPALIVE:
  268. tco_timer_keepalive ();
  269. return 0;
  270. case WDIOC_SETOPTIONS:
  271. {
  272. if (get_user (new_options, p))
  273. return -EFAULT;
  274. if (new_options & WDIOS_DISABLECARD) {
  275. tco_timer_stop ();
  276. retval = 0;
  277. }
  278. if (new_options & WDIOS_ENABLECARD) {
  279. tco_timer_keepalive ();
  280. tco_timer_start ();
  281. retval = 0;
  282. }
  283. return retval;
  284. }
  285. case WDIOC_SETTIMEOUT:
  286. {
  287. if (get_user(new_heartbeat, p))
  288. return -EFAULT;
  289. if (tco_timer_set_heartbeat(new_heartbeat))
  290. return -EINVAL;
  291. tco_timer_keepalive ();
  292. /* Fall */
  293. }
  294. case WDIOC_GETTIMEOUT:
  295. return put_user(heartbeat, p);
  296. case WDIOC_GETTIMELEFT:
  297. {
  298. if (tco_timer_get_timeleft(&time_left))
  299. return -EINVAL;
  300. return put_user(time_left, p);
  301. }
  302. default:
  303. return -ENOTTY;
  304. }
  305. }
  306. /*
  307. * Notify system
  308. */
  309. static int i8xx_tco_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
  310. {
  311. if (code==SYS_DOWN || code==SYS_HALT) {
  312. /* Turn the WDT off */
  313. tco_timer_stop ();
  314. }
  315. return NOTIFY_DONE;
  316. }
  317. /*
  318. * Kernel Interfaces
  319. */
  320. static const struct file_operations i8xx_tco_fops = {
  321. .owner = THIS_MODULE,
  322. .llseek = no_llseek,
  323. .write = i8xx_tco_write,
  324. .ioctl = i8xx_tco_ioctl,
  325. .open = i8xx_tco_open,
  326. .release = i8xx_tco_release,
  327. };
  328. static struct miscdevice i8xx_tco_miscdev = {
  329. .minor = WATCHDOG_MINOR,
  330. .name = "watchdog",
  331. .fops = &i8xx_tco_fops,
  332. };
  333. static struct notifier_block i8xx_tco_notifier = {
  334. .notifier_call = i8xx_tco_notify_sys,
  335. };
  336. /*
  337. * Data for PCI driver interface
  338. *
  339. * This data only exists for exporting the supported
  340. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  341. * register a pci_driver, because someone else might one day
  342. * want to register another driver on the same PCI id.
  343. */
  344. static struct pci_device_id i8xx_tco_pci_tbl[] = {
  345. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_0) },
  346. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_0) },
  347. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0) },
  348. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_10) },
  349. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0) },
  350. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12) },
  351. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0) },
  352. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12) },
  353. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_0) },
  354. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0) },
  355. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1) },
  356. { }, /* End of list */
  357. };
  358. MODULE_DEVICE_TABLE (pci, i8xx_tco_pci_tbl);
  359. /*
  360. * Init & exit routines
  361. */
  362. static unsigned char __init i8xx_tco_getdevice (void)
  363. {
  364. struct pci_dev *dev = NULL;
  365. u8 val1, val2;
  366. u16 badr;
  367. /*
  368. * Find the PCI device
  369. */
  370. for_each_pci_dev(dev)
  371. if (pci_match_id(i8xx_tco_pci_tbl, dev)) {
  372. i8xx_tco_pci = dev;
  373. break;
  374. }
  375. if (i8xx_tco_pci) {
  376. /*
  377. * Find the ACPI base I/O address which is the base
  378. * for the TCO registers (TCOBASE=ACPIBASE + 0x60)
  379. * ACPIBASE is bits [15:7] from 0x40-0x43
  380. */
  381. pci_read_config_byte (i8xx_tco_pci, 0x40, &val1);
  382. pci_read_config_byte (i8xx_tco_pci, 0x41, &val2);
  383. badr = ((val2 << 1) | (val1 >> 7)) << 7;
  384. ACPIBASE = badr;
  385. /* Something's wrong here, ACPIBASE has to be set */
  386. if (badr == 0x0001 || badr == 0x0000) {
  387. printk (KERN_ERR PFX "failed to get TCOBASE address\n");
  388. pci_dev_put(i8xx_tco_pci);
  389. return 0;
  390. }
  391. /* Check chipset's NO_REBOOT bit */
  392. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
  393. if (val1 & 0x02) {
  394. val1 &= 0xfd;
  395. pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
  396. pci_read_config_byte (i8xx_tco_pci, 0xd4, &val1);
  397. if (val1 & 0x02) {
  398. printk (KERN_ERR PFX "failed to reset NO_REBOOT flag, reboot disabled by hardware\n");
  399. pci_dev_put(i8xx_tco_pci);
  400. return 0; /* Cannot reset NO_REBOOT bit */
  401. }
  402. }
  403. /* Disable reboots untill the watchdog starts */
  404. val1 |= 0x02;
  405. pci_write_config_byte (i8xx_tco_pci, 0xd4, val1);
  406. /* Set the TCO_EN bit in SMI_EN register */
  407. if (!request_region (SMI_EN + 1, 1, "i8xx TCO")) {
  408. printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
  409. SMI_EN + 1);
  410. pci_dev_put(i8xx_tco_pci);
  411. return 0;
  412. }
  413. val1 = inb (SMI_EN + 1);
  414. val1 &= 0xdf;
  415. outb (val1, SMI_EN + 1);
  416. release_region (SMI_EN + 1, 1);
  417. return 1;
  418. }
  419. return 0;
  420. }
  421. static int __init watchdog_init (void)
  422. {
  423. int ret;
  424. spin_lock_init(&tco_lock);
  425. /* Check whether or not the hardware watchdog is there */
  426. if (!i8xx_tco_getdevice () || i8xx_tco_pci == NULL)
  427. return -ENODEV;
  428. if (!request_region (TCOBASE, 0x10, "i8xx TCO")) {
  429. printk (KERN_ERR PFX "I/O address 0x%04x already in use\n",
  430. TCOBASE);
  431. ret = -EIO;
  432. goto out;
  433. }
  434. /* Clear out the (probably old) status */
  435. outb (0, TCO1_STS);
  436. outb (3, TCO2_STS);
  437. /* Check that the heartbeat value is within it's range ; if not reset to the default */
  438. if (tco_timer_set_heartbeat (heartbeat)) {
  439. heartbeat = WATCHDOG_HEARTBEAT;
  440. tco_timer_set_heartbeat (heartbeat);
  441. printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39, using %d\n",
  442. heartbeat);
  443. }
  444. ret = register_reboot_notifier(&i8xx_tco_notifier);
  445. if (ret != 0) {
  446. printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
  447. ret);
  448. goto unreg_region;
  449. }
  450. ret = misc_register(&i8xx_tco_miscdev);
  451. if (ret != 0) {
  452. printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
  453. WATCHDOG_MINOR, ret);
  454. goto unreg_notifier;
  455. }
  456. tco_timer_stop ();
  457. printk (KERN_INFO PFX "initialized (0x%04x). heartbeat=%d sec (nowayout=%d)\n",
  458. TCOBASE, heartbeat, nowayout);
  459. return 0;
  460. unreg_notifier:
  461. unregister_reboot_notifier(&i8xx_tco_notifier);
  462. unreg_region:
  463. release_region (TCOBASE, 0x10);
  464. out:
  465. pci_dev_put(i8xx_tco_pci);
  466. return ret;
  467. }
  468. static void __exit watchdog_cleanup (void)
  469. {
  470. /* Stop the timer before we leave */
  471. if (!nowayout)
  472. tco_timer_stop ();
  473. /* Deregister */
  474. misc_deregister (&i8xx_tco_miscdev);
  475. unregister_reboot_notifier(&i8xx_tco_notifier);
  476. release_region (TCOBASE, 0x10);
  477. pci_dev_put(i8xx_tco_pci);
  478. }
  479. module_init(watchdog_init);
  480. module_exit(watchdog_cleanup);
  481. MODULE_AUTHOR("Nils Faerber");
  482. MODULE_DESCRIPTION("TCO timer driver for i8xx chipsets");
  483. MODULE_LICENSE("GPL");
  484. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);