i6300esb.c 15 KB

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  1. /*
  2. * i6300esb: Watchdog timer driver for Intel 6300ESB chipset
  3. *
  4. * (c) Copyright 2004 Google Inc.
  5. * (c) Copyright 2005 David Härdeman <david@2gen.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. *
  12. * based on i810-tco.c which is in turn based on softdog.c
  13. *
  14. * The timer is implemented in the following I/O controller hubs:
  15. * (See the intel documentation on http://developer.intel.com.)
  16. * 6300ESB chip : document number 300641-003
  17. *
  18. * 2004YYZZ Ross Biro
  19. * Initial version 0.01
  20. * 2004YYZZ Ross Biro
  21. * Version 0.02
  22. * 20050210 David Härdeman <david@2gen.com>
  23. * Ported driver to kernel 2.6
  24. */
  25. /*
  26. * Includes, defines, variables, module parameters, ...
  27. */
  28. #include <linux/module.h>
  29. #include <linux/types.h>
  30. #include <linux/kernel.h>
  31. #include <linux/fs.h>
  32. #include <linux/mm.h>
  33. #include <linux/miscdevice.h>
  34. #include <linux/watchdog.h>
  35. #include <linux/reboot.h>
  36. #include <linux/init.h>
  37. #include <linux/pci.h>
  38. #include <linux/ioport.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/io.h>
  41. /* Module and version information */
  42. #define ESB_VERSION "0.03"
  43. #define ESB_MODULE_NAME "i6300ESB timer"
  44. #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
  45. #define PFX ESB_MODULE_NAME ": "
  46. /* PCI configuration registers */
  47. #define ESB_CONFIG_REG 0x60 /* Config register */
  48. #define ESB_LOCK_REG 0x68 /* WDT lock register */
  49. /* Memory mapped registers */
  50. #define ESB_TIMER1_REG BASEADDR + 0x00 /* Timer1 value after each reset */
  51. #define ESB_TIMER2_REG BASEADDR + 0x04 /* Timer2 value after each reset */
  52. #define ESB_GINTSR_REG BASEADDR + 0x08 /* General Interrupt Status Register */
  53. #define ESB_RELOAD_REG BASEADDR + 0x0c /* Reload register */
  54. /* Lock register bits */
  55. #define ESB_WDT_FUNC ( 0x01 << 2 ) /* Watchdog functionality */
  56. #define ESB_WDT_ENABLE ( 0x01 << 1 ) /* Enable WDT */
  57. #define ESB_WDT_LOCK ( 0x01 << 0 ) /* Lock (nowayout) */
  58. /* Config register bits */
  59. #define ESB_WDT_REBOOT ( 0x01 << 5 ) /* Enable reboot on timeout */
  60. #define ESB_WDT_FREQ ( 0x01 << 2 ) /* Decrement frequency */
  61. #define ESB_WDT_INTTYPE ( 0x11 << 0 ) /* Interrupt type on timer1 timeout */
  62. /* Reload register bits */
  63. #define ESB_WDT_RELOAD ( 0x01 << 8 ) /* prevent timeout */
  64. /* Magic constants */
  65. #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
  66. #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
  67. /* internal variables */
  68. static void __iomem *BASEADDR;
  69. static spinlock_t esb_lock; /* Guards the hardware */
  70. static unsigned long timer_alive;
  71. static struct pci_dev *esb_pci;
  72. static unsigned short triggered; /* The status of the watchdog upon boot */
  73. static char esb_expect_close;
  74. /* module parameters */
  75. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (1<heartbeat<2*1023) */
  76. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  77. module_param(heartbeat, int, 0);
  78. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  79. static int nowayout = WATCHDOG_NOWAYOUT;
  80. module_param(nowayout, int, 0);
  81. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
  82. /*
  83. * Some i6300ESB specific functions
  84. */
  85. /*
  86. * Prepare for reloading the timer by unlocking the proper registers.
  87. * This is performed by first writing 0x80 followed by 0x86 to the
  88. * reload register. After this the appropriate registers can be written
  89. * to once before they need to be unlocked again.
  90. */
  91. static inline void esb_unlock_registers(void) {
  92. writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
  93. writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
  94. }
  95. static void esb_timer_start(void)
  96. {
  97. u8 val;
  98. /* Enable or Enable + Lock? */
  99. val = 0x02 | (nowayout ? 0x01 : 0x00);
  100. pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
  101. }
  102. static int esb_timer_stop(void)
  103. {
  104. u8 val;
  105. spin_lock(&esb_lock);
  106. /* First, reset timers as suggested by the docs */
  107. esb_unlock_registers();
  108. writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
  109. /* Then disable the WDT */
  110. pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
  111. pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
  112. spin_unlock(&esb_lock);
  113. /* Returns 0 if the timer was disabled, non-zero otherwise */
  114. return (val & 0x01);
  115. }
  116. static void esb_timer_keepalive(void)
  117. {
  118. spin_lock(&esb_lock);
  119. esb_unlock_registers();
  120. writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
  121. /* FIXME: Do we need to flush anything here? */
  122. spin_unlock(&esb_lock);
  123. }
  124. static int esb_timer_set_heartbeat(int time)
  125. {
  126. u32 val;
  127. if (time < 0x1 || time > (2 * 0x03ff))
  128. return -EINVAL;
  129. spin_lock(&esb_lock);
  130. /* We shift by 9, so if we are passed a value of 1 sec,
  131. * val will be 1 << 9 = 512, then write that to two
  132. * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
  133. */
  134. val = time << 9;
  135. /* Write timer 1 */
  136. esb_unlock_registers();
  137. writel(val, ESB_TIMER1_REG);
  138. /* Write timer 2 */
  139. esb_unlock_registers();
  140. writel(val, ESB_TIMER2_REG);
  141. /* Reload */
  142. esb_unlock_registers();
  143. writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
  144. /* FIXME: Do we need to flush everything out? */
  145. /* Done */
  146. heartbeat = time;
  147. spin_unlock(&esb_lock);
  148. return 0;
  149. }
  150. static int esb_timer_read (void)
  151. {
  152. u32 count;
  153. /* This isn't documented, and doesn't take into
  154. * acount which stage is running, but it looks
  155. * like a 20 bit count down, so we might as well report it.
  156. */
  157. pci_read_config_dword(esb_pci, 0x64, &count);
  158. return (int)count;
  159. }
  160. /*
  161. * /dev/watchdog handling
  162. */
  163. static int esb_open (struct inode *inode, struct file *file)
  164. {
  165. /* /dev/watchdog can only be opened once */
  166. if (test_and_set_bit(0, &timer_alive))
  167. return -EBUSY;
  168. /* Reload and activate timer */
  169. esb_timer_keepalive ();
  170. esb_timer_start ();
  171. return nonseekable_open(inode, file);
  172. }
  173. static int esb_release (struct inode *inode, struct file *file)
  174. {
  175. /* Shut off the timer. */
  176. if (esb_expect_close == 42) {
  177. esb_timer_stop ();
  178. } else {
  179. printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
  180. esb_timer_keepalive ();
  181. }
  182. clear_bit(0, &timer_alive);
  183. esb_expect_close = 0;
  184. return 0;
  185. }
  186. static ssize_t esb_write (struct file *file, const char __user *data,
  187. size_t len, loff_t * ppos)
  188. {
  189. /* See if we got the magic character 'V' and reload the timer */
  190. if (len) {
  191. if (!nowayout) {
  192. size_t i;
  193. /* note: just in case someone wrote the magic character
  194. * five months ago... */
  195. esb_expect_close = 0;
  196. /* scan to see whether or not we got the magic character */
  197. for (i = 0; i != len; i++) {
  198. char c;
  199. if(get_user(c, data+i))
  200. return -EFAULT;
  201. if (c == 'V')
  202. esb_expect_close = 42;
  203. }
  204. }
  205. /* someone wrote to us, we should reload the timer */
  206. esb_timer_keepalive ();
  207. }
  208. return len;
  209. }
  210. static int esb_ioctl (struct inode *inode, struct file *file,
  211. unsigned int cmd, unsigned long arg)
  212. {
  213. int new_options, retval = -EINVAL;
  214. int new_heartbeat;
  215. void __user *argp = (void __user *)arg;
  216. int __user *p = argp;
  217. static struct watchdog_info ident = {
  218. .options = WDIOF_SETTIMEOUT |
  219. WDIOF_KEEPALIVEPING |
  220. WDIOF_MAGICCLOSE,
  221. .firmware_version = 0,
  222. .identity = ESB_MODULE_NAME,
  223. };
  224. switch (cmd) {
  225. case WDIOC_GETSUPPORT:
  226. return copy_to_user(argp, &ident,
  227. sizeof (ident)) ? -EFAULT : 0;
  228. case WDIOC_GETSTATUS:
  229. return put_user (esb_timer_read(), p);
  230. case WDIOC_GETBOOTSTATUS:
  231. return put_user (triggered, p);
  232. case WDIOC_KEEPALIVE:
  233. esb_timer_keepalive ();
  234. return 0;
  235. case WDIOC_SETOPTIONS:
  236. {
  237. if (get_user (new_options, p))
  238. return -EFAULT;
  239. if (new_options & WDIOS_DISABLECARD) {
  240. esb_timer_stop ();
  241. retval = 0;
  242. }
  243. if (new_options & WDIOS_ENABLECARD) {
  244. esb_timer_keepalive ();
  245. esb_timer_start ();
  246. retval = 0;
  247. }
  248. return retval;
  249. }
  250. case WDIOC_SETTIMEOUT:
  251. {
  252. if (get_user(new_heartbeat, p))
  253. return -EFAULT;
  254. if (esb_timer_set_heartbeat(new_heartbeat))
  255. return -EINVAL;
  256. esb_timer_keepalive ();
  257. /* Fall */
  258. }
  259. case WDIOC_GETTIMEOUT:
  260. return put_user(heartbeat, p);
  261. default:
  262. return -ENOTTY;
  263. }
  264. }
  265. /*
  266. * Notify system
  267. */
  268. static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
  269. {
  270. if (code==SYS_DOWN || code==SYS_HALT) {
  271. /* Turn the WDT off */
  272. esb_timer_stop ();
  273. }
  274. return NOTIFY_DONE;
  275. }
  276. /*
  277. * Kernel Interfaces
  278. */
  279. static const struct file_operations esb_fops = {
  280. .owner = THIS_MODULE,
  281. .llseek = no_llseek,
  282. .write = esb_write,
  283. .ioctl = esb_ioctl,
  284. .open = esb_open,
  285. .release = esb_release,
  286. };
  287. static struct miscdevice esb_miscdev = {
  288. .minor = WATCHDOG_MINOR,
  289. .name = "watchdog",
  290. .fops = &esb_fops,
  291. };
  292. static struct notifier_block esb_notifier = {
  293. .notifier_call = esb_notify_sys,
  294. };
  295. /*
  296. * Data for PCI driver interface
  297. *
  298. * This data only exists for exporting the supported
  299. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  300. * register a pci_driver, because someone else might one day
  301. * want to register another driver on the same PCI id.
  302. */
  303. static struct pci_device_id esb_pci_tbl[] = {
  304. { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
  305. { 0, }, /* End of list */
  306. };
  307. MODULE_DEVICE_TABLE (pci, esb_pci_tbl);
  308. /*
  309. * Init & exit routines
  310. */
  311. static unsigned char __init esb_getdevice (void)
  312. {
  313. u8 val1;
  314. unsigned short val2;
  315. struct pci_dev *dev = NULL;
  316. /*
  317. * Find the PCI device
  318. */
  319. for_each_pci_dev(dev) {
  320. if (pci_match_id(esb_pci_tbl, dev)) {
  321. esb_pci = dev;
  322. break;
  323. }
  324. }
  325. if (esb_pci) {
  326. if (pci_enable_device(esb_pci)) {
  327. printk (KERN_ERR PFX "failed to enable device\n");
  328. goto err_devput;
  329. }
  330. if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
  331. printk (KERN_ERR PFX "failed to request region\n");
  332. goto err_disable;
  333. }
  334. BASEADDR = ioremap(pci_resource_start(esb_pci, 0),
  335. pci_resource_len(esb_pci, 0));
  336. if (BASEADDR == NULL) {
  337. /* Something's wrong here, BASEADDR has to be set */
  338. printk (KERN_ERR PFX "failed to get BASEADDR\n");
  339. goto err_release;
  340. }
  341. /*
  342. * The watchdog has two timers, it can be setup so that the
  343. * expiry of timer1 results in an interrupt and the expiry of
  344. * timer2 results in a reboot. We set it to not generate
  345. * any interrupts as there is not much we can do with it
  346. * right now.
  347. *
  348. * We also enable reboots and set the timer frequency to
  349. * the PCI clock divided by 2^15 (approx 1KHz).
  350. */
  351. pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
  352. /* Check that the WDT isn't already locked */
  353. pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
  354. if (val1 & ESB_WDT_LOCK)
  355. printk (KERN_WARNING PFX "nowayout already set\n");
  356. /* Set the timer to watchdog mode and disable it for now */
  357. pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
  358. /* Check if the watchdog was previously triggered */
  359. esb_unlock_registers();
  360. val2 = readw(ESB_RELOAD_REG);
  361. triggered = (val2 & (0x01 << 9) >> 9);
  362. /* Reset trigger flag and timers */
  363. esb_unlock_registers();
  364. writew((0x11 << 8), ESB_RELOAD_REG);
  365. /* Done */
  366. return 1;
  367. err_release:
  368. pci_release_region(esb_pci, 0);
  369. err_disable:
  370. pci_disable_device(esb_pci);
  371. err_devput:
  372. pci_dev_put(esb_pci);
  373. }
  374. return 0;
  375. }
  376. static int __init watchdog_init (void)
  377. {
  378. int ret;
  379. spin_lock_init(&esb_lock);
  380. /* Check whether or not the hardware watchdog is there */
  381. if (!esb_getdevice () || esb_pci == NULL)
  382. return -ENODEV;
  383. /* Check that the heartbeat value is within it's range ; if not reset to the default */
  384. if (esb_timer_set_heartbeat (heartbeat)) {
  385. esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT);
  386. printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n",
  387. heartbeat);
  388. }
  389. ret = register_reboot_notifier(&esb_notifier);
  390. if (ret != 0) {
  391. printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
  392. ret);
  393. goto err_unmap;
  394. }
  395. ret = misc_register(&esb_miscdev);
  396. if (ret != 0) {
  397. printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
  398. WATCHDOG_MINOR, ret);
  399. goto err_notifier;
  400. }
  401. esb_timer_stop ();
  402. printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
  403. BASEADDR, heartbeat, nowayout);
  404. return 0;
  405. err_notifier:
  406. unregister_reboot_notifier(&esb_notifier);
  407. err_unmap:
  408. iounmap(BASEADDR);
  409. /* err_release: */
  410. pci_release_region(esb_pci, 0);
  411. /* err_disable: */
  412. pci_disable_device(esb_pci);
  413. /* err_devput: */
  414. pci_dev_put(esb_pci);
  415. return ret;
  416. }
  417. static void __exit watchdog_cleanup (void)
  418. {
  419. /* Stop the timer before we leave */
  420. if (!nowayout)
  421. esb_timer_stop ();
  422. /* Deregister */
  423. misc_deregister(&esb_miscdev);
  424. unregister_reboot_notifier(&esb_notifier);
  425. iounmap(BASEADDR);
  426. pci_release_region(esb_pci, 0);
  427. pci_disable_device(esb_pci);
  428. pci_dev_put(esb_pci);
  429. }
  430. module_init(watchdog_init);
  431. module_exit(watchdog_cleanup);
  432. MODULE_AUTHOR("Ross Biro and David Härdeman");
  433. MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
  434. MODULE_LICENSE("GPL");
  435. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);