vme_scc.c 28 KB

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  1. /*
  2. * drivers/char/vme_scc.c: MVME147, MVME162, BVME6000 SCC serial ports
  3. * implementation.
  4. * Copyright 1999 Richard Hirst <richard@sleepie.demon.co.uk>
  5. *
  6. * Based on atari_SCC.c which was
  7. * Copyright 1994-95 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
  8. * Partially based on PC-Linux serial.c by Linus Torvalds and Theodore Ts'o
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file COPYING in the main directory of this archive
  12. * for more details.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/kdev_t.h>
  17. #include <asm/io.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/ioport.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/errno.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/mm.h>
  26. #include <linux/serial.h>
  27. #include <linux/fcntl.h>
  28. #include <linux/major.h>
  29. #include <linux/delay.h>
  30. #include <linux/slab.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/console.h>
  33. #include <linux/init.h>
  34. #include <asm/setup.h>
  35. #include <asm/bootinfo.h>
  36. #ifdef CONFIG_MVME147_SCC
  37. #include <asm/mvme147hw.h>
  38. #endif
  39. #ifdef CONFIG_MVME162_SCC
  40. #include <asm/mvme16xhw.h>
  41. #endif
  42. #ifdef CONFIG_BVME6000_SCC
  43. #include <asm/bvme6000hw.h>
  44. #endif
  45. #include <linux/generic_serial.h>
  46. #include "scc.h"
  47. #define CHANNEL_A 0
  48. #define CHANNEL_B 1
  49. #define SCC_MINOR_BASE 64
  50. /* Shadows for all SCC write registers */
  51. static unsigned char scc_shadow[2][16];
  52. /* Location to access for SCC register access delay */
  53. static volatile unsigned char *scc_del = NULL;
  54. /* To keep track of STATUS_REG state for detection of Ext/Status int source */
  55. static unsigned char scc_last_status_reg[2];
  56. /***************************** Prototypes *****************************/
  57. /* Function prototypes */
  58. static void scc_disable_tx_interrupts(void * ptr);
  59. static void scc_enable_tx_interrupts(void * ptr);
  60. static void scc_disable_rx_interrupts(void * ptr);
  61. static void scc_enable_rx_interrupts(void * ptr);
  62. static int scc_get_CD(void * ptr);
  63. static void scc_shutdown_port(void * ptr);
  64. static int scc_set_real_termios(void *ptr);
  65. static void scc_hungup(void *ptr);
  66. static void scc_close(void *ptr);
  67. static int scc_chars_in_buffer(void * ptr);
  68. static int scc_open(struct tty_struct * tty, struct file * filp);
  69. static int scc_ioctl(struct tty_struct * tty, struct file * filp,
  70. unsigned int cmd, unsigned long arg);
  71. static void scc_throttle(struct tty_struct *tty);
  72. static void scc_unthrottle(struct tty_struct *tty);
  73. static irqreturn_t scc_tx_int(int irq, void *data);
  74. static irqreturn_t scc_rx_int(int irq, void *data);
  75. static irqreturn_t scc_stat_int(int irq, void *data);
  76. static irqreturn_t scc_spcond_int(int irq, void *data);
  77. static void scc_setsignals(struct scc_port *port, int dtr, int rts);
  78. static void scc_break_ctl(struct tty_struct *tty, int break_state);
  79. static struct tty_driver *scc_driver;
  80. struct scc_port scc_ports[2];
  81. int scc_initialized = 0;
  82. /*---------------------------------------------------------------------------
  83. * Interface from generic_serial.c back here
  84. *--------------------------------------------------------------------------*/
  85. static struct real_driver scc_real_driver = {
  86. scc_disable_tx_interrupts,
  87. scc_enable_tx_interrupts,
  88. scc_disable_rx_interrupts,
  89. scc_enable_rx_interrupts,
  90. scc_get_CD,
  91. scc_shutdown_port,
  92. scc_set_real_termios,
  93. scc_chars_in_buffer,
  94. scc_close,
  95. scc_hungup,
  96. NULL
  97. };
  98. static const struct tty_operations scc_ops = {
  99. .open = scc_open,
  100. .close = gs_close,
  101. .write = gs_write,
  102. .put_char = gs_put_char,
  103. .flush_chars = gs_flush_chars,
  104. .write_room = gs_write_room,
  105. .chars_in_buffer = gs_chars_in_buffer,
  106. .flush_buffer = gs_flush_buffer,
  107. .ioctl = scc_ioctl,
  108. .throttle = scc_throttle,
  109. .unthrottle = scc_unthrottle,
  110. .set_termios = gs_set_termios,
  111. .stop = gs_stop,
  112. .start = gs_start,
  113. .hangup = gs_hangup,
  114. .break_ctl = scc_break_ctl,
  115. };
  116. /*----------------------------------------------------------------------------
  117. * vme_scc_init() and support functions
  118. *---------------------------------------------------------------------------*/
  119. static int scc_init_drivers(void)
  120. {
  121. int error;
  122. scc_driver = alloc_tty_driver(2);
  123. if (!scc_driver)
  124. return -ENOMEM;
  125. scc_driver->owner = THIS_MODULE;
  126. scc_driver->driver_name = "scc";
  127. scc_driver->name = "ttyS";
  128. scc_driver->major = TTY_MAJOR;
  129. scc_driver->minor_start = SCC_MINOR_BASE;
  130. scc_driver->type = TTY_DRIVER_TYPE_SERIAL;
  131. scc_driver->subtype = SERIAL_TYPE_NORMAL;
  132. scc_driver->init_termios = tty_std_termios;
  133. scc_driver->init_termios.c_cflag =
  134. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  135. scc_driver->flags = TTY_DRIVER_REAL_RAW;
  136. tty_set_operations(scc_driver, &scc_ops);
  137. if ((error = tty_register_driver(scc_driver))) {
  138. printk(KERN_ERR "scc: Couldn't register scc driver, error = %d\n",
  139. error);
  140. put_tty_driver(scc_driver);
  141. return 1;
  142. }
  143. return 0;
  144. }
  145. /* ports[] array is indexed by line no (i.e. [0] for ttyS0, [1] for ttyS1).
  146. */
  147. static void scc_init_portstructs(void)
  148. {
  149. struct scc_port *port;
  150. int i;
  151. for (i = 0; i < 2; i++) {
  152. port = scc_ports + i;
  153. port->gs.magic = SCC_MAGIC;
  154. port->gs.close_delay = HZ/2;
  155. port->gs.closing_wait = 30 * HZ;
  156. port->gs.rd = &scc_real_driver;
  157. #ifdef NEW_WRITE_LOCKING
  158. port->gs.port_write_mutex = MUTEX;
  159. #endif
  160. init_waitqueue_head(&port->gs.open_wait);
  161. init_waitqueue_head(&port->gs.close_wait);
  162. }
  163. }
  164. #ifdef CONFIG_MVME147_SCC
  165. static int mvme147_scc_init(void)
  166. {
  167. struct scc_port *port;
  168. printk(KERN_INFO "SCC: MVME147 Serial Driver\n");
  169. /* Init channel A */
  170. port = &scc_ports[0];
  171. port->channel = CHANNEL_A;
  172. port->ctrlp = (volatile unsigned char *)M147_SCC_A_ADDR;
  173. port->datap = port->ctrlp + 1;
  174. port->port_a = &scc_ports[0];
  175. port->port_b = &scc_ports[1];
  176. request_irq(MVME147_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
  177. "SCC-A TX", port);
  178. request_irq(MVME147_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
  179. "SCC-A status", port);
  180. request_irq(MVME147_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
  181. "SCC-A RX", port);
  182. request_irq(MVME147_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
  183. "SCC-A special cond", port);
  184. {
  185. SCC_ACCESS_INIT(port);
  186. /* disable interrupts for this channel */
  187. SCCwrite(INT_AND_DMA_REG, 0);
  188. /* Set the interrupt vector */
  189. SCCwrite(INT_VECTOR_REG, MVME147_IRQ_SCC_BASE);
  190. /* Interrupt parameters: vector includes status, status low */
  191. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  192. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  193. }
  194. /* Init channel B */
  195. port = &scc_ports[1];
  196. port->channel = CHANNEL_B;
  197. port->ctrlp = (volatile unsigned char *)M147_SCC_B_ADDR;
  198. port->datap = port->ctrlp + 1;
  199. port->port_a = &scc_ports[0];
  200. port->port_b = &scc_ports[1];
  201. request_irq(MVME147_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
  202. "SCC-B TX", port);
  203. request_irq(MVME147_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
  204. "SCC-B status", port);
  205. request_irq(MVME147_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
  206. "SCC-B RX", port);
  207. request_irq(MVME147_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
  208. "SCC-B special cond", port);
  209. {
  210. SCC_ACCESS_INIT(port);
  211. /* disable interrupts for this channel */
  212. SCCwrite(INT_AND_DMA_REG, 0);
  213. }
  214. /* Ensure interrupts are enabled in the PCC chip */
  215. m147_pcc->serial_cntrl=PCC_LEVEL_SERIAL|PCC_INT_ENAB;
  216. /* Initialise the tty driver structures and register */
  217. scc_init_portstructs();
  218. scc_init_drivers();
  219. return 0;
  220. }
  221. #endif
  222. #ifdef CONFIG_MVME162_SCC
  223. static int mvme162_scc_init(void)
  224. {
  225. struct scc_port *port;
  226. if (!(mvme16x_config & MVME16x_CONFIG_GOT_SCCA))
  227. return (-ENODEV);
  228. printk(KERN_INFO "SCC: MVME162 Serial Driver\n");
  229. /* Init channel A */
  230. port = &scc_ports[0];
  231. port->channel = CHANNEL_A;
  232. port->ctrlp = (volatile unsigned char *)MVME_SCC_A_ADDR;
  233. port->datap = port->ctrlp + 2;
  234. port->port_a = &scc_ports[0];
  235. port->port_b = &scc_ports[1];
  236. request_irq(MVME162_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
  237. "SCC-A TX", port);
  238. request_irq(MVME162_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
  239. "SCC-A status", port);
  240. request_irq(MVME162_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
  241. "SCC-A RX", port);
  242. request_irq(MVME162_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
  243. "SCC-A special cond", port);
  244. {
  245. SCC_ACCESS_INIT(port);
  246. /* disable interrupts for this channel */
  247. SCCwrite(INT_AND_DMA_REG, 0);
  248. /* Set the interrupt vector */
  249. SCCwrite(INT_VECTOR_REG, MVME162_IRQ_SCC_BASE);
  250. /* Interrupt parameters: vector includes status, status low */
  251. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  252. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  253. }
  254. /* Init channel B */
  255. port = &scc_ports[1];
  256. port->channel = CHANNEL_B;
  257. port->ctrlp = (volatile unsigned char *)MVME_SCC_B_ADDR;
  258. port->datap = port->ctrlp + 2;
  259. port->port_a = &scc_ports[0];
  260. port->port_b = &scc_ports[1];
  261. request_irq(MVME162_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
  262. "SCC-B TX", port);
  263. request_irq(MVME162_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
  264. "SCC-B status", port);
  265. request_irq(MVME162_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
  266. "SCC-B RX", port);
  267. request_irq(MVME162_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
  268. "SCC-B special cond", port);
  269. {
  270. SCC_ACCESS_INIT(port); /* Either channel will do */
  271. /* disable interrupts for this channel */
  272. SCCwrite(INT_AND_DMA_REG, 0);
  273. }
  274. /* Ensure interrupts are enabled in the MC2 chip */
  275. *(volatile char *)0xfff4201d = 0x14;
  276. /* Initialise the tty driver structures and register */
  277. scc_init_portstructs();
  278. scc_init_drivers();
  279. return 0;
  280. }
  281. #endif
  282. #ifdef CONFIG_BVME6000_SCC
  283. static int bvme6000_scc_init(void)
  284. {
  285. struct scc_port *port;
  286. printk(KERN_INFO "SCC: BVME6000 Serial Driver\n");
  287. /* Init channel A */
  288. port = &scc_ports[0];
  289. port->channel = CHANNEL_A;
  290. port->ctrlp = (volatile unsigned char *)BVME_SCC_A_ADDR;
  291. port->datap = port->ctrlp + 4;
  292. port->port_a = &scc_ports[0];
  293. port->port_b = &scc_ports[1];
  294. request_irq(BVME_IRQ_SCCA_TX, scc_tx_int, IRQF_DISABLED,
  295. "SCC-A TX", port);
  296. request_irq(BVME_IRQ_SCCA_STAT, scc_stat_int, IRQF_DISABLED,
  297. "SCC-A status", port);
  298. request_irq(BVME_IRQ_SCCA_RX, scc_rx_int, IRQF_DISABLED,
  299. "SCC-A RX", port);
  300. request_irq(BVME_IRQ_SCCA_SPCOND, scc_spcond_int, IRQF_DISABLED,
  301. "SCC-A special cond", port);
  302. {
  303. SCC_ACCESS_INIT(port);
  304. /* disable interrupts for this channel */
  305. SCCwrite(INT_AND_DMA_REG, 0);
  306. /* Set the interrupt vector */
  307. SCCwrite(INT_VECTOR_REG, BVME_IRQ_SCC_BASE);
  308. /* Interrupt parameters: vector includes status, status low */
  309. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  310. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  311. }
  312. /* Init channel B */
  313. port = &scc_ports[1];
  314. port->channel = CHANNEL_B;
  315. port->ctrlp = (volatile unsigned char *)BVME_SCC_B_ADDR;
  316. port->datap = port->ctrlp + 4;
  317. port->port_a = &scc_ports[0];
  318. port->port_b = &scc_ports[1];
  319. request_irq(BVME_IRQ_SCCB_TX, scc_tx_int, IRQF_DISABLED,
  320. "SCC-B TX", port);
  321. request_irq(BVME_IRQ_SCCB_STAT, scc_stat_int, IRQF_DISABLED,
  322. "SCC-B status", port);
  323. request_irq(BVME_IRQ_SCCB_RX, scc_rx_int, IRQF_DISABLED,
  324. "SCC-B RX", port);
  325. request_irq(BVME_IRQ_SCCB_SPCOND, scc_spcond_int, IRQF_DISABLED,
  326. "SCC-B special cond", port);
  327. {
  328. SCC_ACCESS_INIT(port); /* Either channel will do */
  329. /* disable interrupts for this channel */
  330. SCCwrite(INT_AND_DMA_REG, 0);
  331. }
  332. /* Initialise the tty driver structures and register */
  333. scc_init_portstructs();
  334. scc_init_drivers();
  335. return 0;
  336. }
  337. #endif
  338. static int vme_scc_init(void)
  339. {
  340. int res = -ENODEV;
  341. #ifdef CONFIG_MVME147_SCC
  342. if (MACH_IS_MVME147)
  343. res = mvme147_scc_init();
  344. #endif
  345. #ifdef CONFIG_MVME162_SCC
  346. if (MACH_IS_MVME16x)
  347. res = mvme162_scc_init();
  348. #endif
  349. #ifdef CONFIG_BVME6000_SCC
  350. if (MACH_IS_BVME6000)
  351. res = bvme6000_scc_init();
  352. #endif
  353. return res;
  354. }
  355. module_init(vme_scc_init);
  356. /*---------------------------------------------------------------------------
  357. * Interrupt handlers
  358. *--------------------------------------------------------------------------*/
  359. static irqreturn_t scc_rx_int(int irq, void *data)
  360. {
  361. unsigned char ch;
  362. struct scc_port *port = data;
  363. struct tty_struct *tty = port->gs.tty;
  364. SCC_ACCESS_INIT(port);
  365. ch = SCCread_NB(RX_DATA_REG);
  366. if (!tty) {
  367. printk(KERN_WARNING "scc_rx_int with NULL tty!\n");
  368. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  369. return IRQ_HANDLED;
  370. }
  371. tty_insert_flip_char(tty, ch, 0);
  372. /* Check if another character is already ready; in that case, the
  373. * spcond_int() function must be used, because this character may have an
  374. * error condition that isn't signalled by the interrupt vector used!
  375. */
  376. if (SCCread(INT_PENDING_REG) &
  377. (port->channel == CHANNEL_A ? IPR_A_RX : IPR_B_RX)) {
  378. scc_spcond_int (irq, data);
  379. return IRQ_HANDLED;
  380. }
  381. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  382. tty_flip_buffer_push(tty);
  383. return IRQ_HANDLED;
  384. }
  385. static irqreturn_t scc_spcond_int(int irq, void *data)
  386. {
  387. struct scc_port *port = data;
  388. struct tty_struct *tty = port->gs.tty;
  389. unsigned char stat, ch, err;
  390. int int_pending_mask = port->channel == CHANNEL_A ?
  391. IPR_A_RX : IPR_B_RX;
  392. SCC_ACCESS_INIT(port);
  393. if (!tty) {
  394. printk(KERN_WARNING "scc_spcond_int with NULL tty!\n");
  395. SCCwrite(COMMAND_REG, CR_ERROR_RESET);
  396. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  397. return IRQ_HANDLED;
  398. }
  399. do {
  400. stat = SCCread(SPCOND_STATUS_REG);
  401. ch = SCCread_NB(RX_DATA_REG);
  402. if (stat & SCSR_RX_OVERRUN)
  403. err = TTY_OVERRUN;
  404. else if (stat & SCSR_PARITY_ERR)
  405. err = TTY_PARITY;
  406. else if (stat & SCSR_CRC_FRAME_ERR)
  407. err = TTY_FRAME;
  408. else
  409. err = 0;
  410. tty_insert_flip_char(tty, ch, err);
  411. /* ++TeSche: *All* errors have to be cleared manually,
  412. * else the condition persists for the next chars
  413. */
  414. if (err)
  415. SCCwrite(COMMAND_REG, CR_ERROR_RESET);
  416. } while(SCCread(INT_PENDING_REG) & int_pending_mask);
  417. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  418. tty_flip_buffer_push(tty);
  419. return IRQ_HANDLED;
  420. }
  421. static irqreturn_t scc_tx_int(int irq, void *data)
  422. {
  423. struct scc_port *port = data;
  424. SCC_ACCESS_INIT(port);
  425. if (!port->gs.tty) {
  426. printk(KERN_WARNING "scc_tx_int with NULL tty!\n");
  427. SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  428. SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET);
  429. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  430. return IRQ_HANDLED;
  431. }
  432. while ((SCCread_NB(STATUS_REG) & SR_TX_BUF_EMPTY)) {
  433. if (port->x_char) {
  434. SCCwrite(TX_DATA_REG, port->x_char);
  435. port->x_char = 0;
  436. }
  437. else if ((port->gs.xmit_cnt <= 0) || port->gs.tty->stopped ||
  438. port->gs.tty->hw_stopped)
  439. break;
  440. else {
  441. SCCwrite(TX_DATA_REG, port->gs.xmit_buf[port->gs.xmit_tail++]);
  442. port->gs.xmit_tail = port->gs.xmit_tail & (SERIAL_XMIT_SIZE-1);
  443. if (--port->gs.xmit_cnt <= 0)
  444. break;
  445. }
  446. }
  447. if ((port->gs.xmit_cnt <= 0) || port->gs.tty->stopped ||
  448. port->gs.tty->hw_stopped) {
  449. /* disable tx interrupts */
  450. SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  451. SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET); /* disable tx_int on next tx underrun? */
  452. port->gs.flags &= ~GS_TX_INTEN;
  453. }
  454. if (port->gs.tty && port->gs.xmit_cnt <= port->gs.wakeup_chars)
  455. tty_wakeup(port->gs.tty);
  456. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  457. return IRQ_HANDLED;
  458. }
  459. static irqreturn_t scc_stat_int(int irq, void *data)
  460. {
  461. struct scc_port *port = data;
  462. unsigned channel = port->channel;
  463. unsigned char last_sr, sr, changed;
  464. SCC_ACCESS_INIT(port);
  465. last_sr = scc_last_status_reg[channel];
  466. sr = scc_last_status_reg[channel] = SCCread_NB(STATUS_REG);
  467. changed = last_sr ^ sr;
  468. if (changed & SR_DCD) {
  469. port->c_dcd = !!(sr & SR_DCD);
  470. if (!(port->gs.flags & ASYNC_CHECK_CD))
  471. ; /* Don't report DCD changes */
  472. else if (port->c_dcd) {
  473. wake_up_interruptible(&port->gs.open_wait);
  474. }
  475. else {
  476. if (port->gs.tty)
  477. tty_hangup (port->gs.tty);
  478. }
  479. }
  480. SCCwrite(COMMAND_REG, CR_EXTSTAT_RESET);
  481. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  482. return IRQ_HANDLED;
  483. }
  484. /*---------------------------------------------------------------------------
  485. * generic_serial.c callback funtions
  486. *--------------------------------------------------------------------------*/
  487. static void scc_disable_tx_interrupts(void *ptr)
  488. {
  489. struct scc_port *port = ptr;
  490. unsigned long flags;
  491. SCC_ACCESS_INIT(port);
  492. local_irq_save(flags);
  493. SCCmod(INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  494. port->gs.flags &= ~GS_TX_INTEN;
  495. local_irq_restore(flags);
  496. }
  497. static void scc_enable_tx_interrupts(void *ptr)
  498. {
  499. struct scc_port *port = ptr;
  500. unsigned long flags;
  501. SCC_ACCESS_INIT(port);
  502. local_irq_save(flags);
  503. SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB);
  504. /* restart the transmitter */
  505. scc_tx_int (0, port);
  506. local_irq_restore(flags);
  507. }
  508. static void scc_disable_rx_interrupts(void *ptr)
  509. {
  510. struct scc_port *port = ptr;
  511. unsigned long flags;
  512. SCC_ACCESS_INIT(port);
  513. local_irq_save(flags);
  514. SCCmod(INT_AND_DMA_REG,
  515. ~(IDR_RX_INT_MASK|IDR_PARERR_AS_SPCOND|IDR_EXTSTAT_INT_ENAB), 0);
  516. local_irq_restore(flags);
  517. }
  518. static void scc_enable_rx_interrupts(void *ptr)
  519. {
  520. struct scc_port *port = ptr;
  521. unsigned long flags;
  522. SCC_ACCESS_INIT(port);
  523. local_irq_save(flags);
  524. SCCmod(INT_AND_DMA_REG, 0xff,
  525. IDR_EXTSTAT_INT_ENAB|IDR_PARERR_AS_SPCOND|IDR_RX_INT_ALL);
  526. local_irq_restore(flags);
  527. }
  528. static int scc_get_CD(void *ptr)
  529. {
  530. struct scc_port *port = ptr;
  531. unsigned channel = port->channel;
  532. return !!(scc_last_status_reg[channel] & SR_DCD);
  533. }
  534. static void scc_shutdown_port(void *ptr)
  535. {
  536. struct scc_port *port = ptr;
  537. port->gs.flags &= ~ GS_ACTIVE;
  538. if (port->gs.tty && port->gs.tty->termios->c_cflag & HUPCL) {
  539. scc_setsignals (port, 0, 0);
  540. }
  541. }
  542. static int scc_set_real_termios (void *ptr)
  543. {
  544. /* the SCC has char sizes 5,7,6,8 in that order! */
  545. static int chsize_map[4] = { 0, 2, 1, 3 };
  546. unsigned cflag, baud, chsize, channel, brgval = 0;
  547. unsigned long flags;
  548. struct scc_port *port = ptr;
  549. SCC_ACCESS_INIT(port);
  550. if (!port->gs.tty || !port->gs.tty->termios) return 0;
  551. channel = port->channel;
  552. if (channel == CHANNEL_A)
  553. return 0; /* Settings controlled by boot PROM */
  554. cflag = port->gs.tty->termios->c_cflag;
  555. baud = port->gs.baud;
  556. chsize = (cflag & CSIZE) >> 4;
  557. if (baud == 0) {
  558. /* speed == 0 -> drop DTR */
  559. local_irq_save(flags);
  560. SCCmod(TX_CTRL_REG, ~TCR_DTR, 0);
  561. local_irq_restore(flags);
  562. return 0;
  563. }
  564. else if ((MACH_IS_MVME16x && (baud < 50 || baud > 38400)) ||
  565. (MACH_IS_MVME147 && (baud < 50 || baud > 19200)) ||
  566. (MACH_IS_BVME6000 &&(baud < 50 || baud > 76800))) {
  567. printk(KERN_NOTICE "SCC: Bad speed requested, %d\n", baud);
  568. return 0;
  569. }
  570. if (cflag & CLOCAL)
  571. port->gs.flags &= ~ASYNC_CHECK_CD;
  572. else
  573. port->gs.flags |= ASYNC_CHECK_CD;
  574. #ifdef CONFIG_MVME147_SCC
  575. if (MACH_IS_MVME147)
  576. brgval = (M147_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
  577. #endif
  578. #ifdef CONFIG_MVME162_SCC
  579. if (MACH_IS_MVME16x)
  580. brgval = (MVME_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
  581. #endif
  582. #ifdef CONFIG_BVME6000_SCC
  583. if (MACH_IS_BVME6000)
  584. brgval = (BVME_SCC_RTxC + baud/2) / (16 * 2 * baud) - 2;
  585. #endif
  586. /* Now we have all parameters and can go to set them: */
  587. local_irq_save(flags);
  588. /* receiver's character size and auto-enables */
  589. SCCmod(RX_CTRL_REG, ~(RCR_CHSIZE_MASK|RCR_AUTO_ENAB_MODE),
  590. (chsize_map[chsize] << 6) |
  591. ((cflag & CRTSCTS) ? RCR_AUTO_ENAB_MODE : 0));
  592. /* parity and stop bits (both, Tx and Rx), clock mode never changes */
  593. SCCmod (AUX1_CTRL_REG,
  594. ~(A1CR_PARITY_MASK | A1CR_MODE_MASK),
  595. ((cflag & PARENB
  596. ? (cflag & PARODD ? A1CR_PARITY_ODD : A1CR_PARITY_EVEN)
  597. : A1CR_PARITY_NONE)
  598. | (cflag & CSTOPB ? A1CR_MODE_ASYNC_2 : A1CR_MODE_ASYNC_1)));
  599. /* sender's character size, set DTR for valid baud rate */
  600. SCCmod(TX_CTRL_REG, ~TCR_CHSIZE_MASK, chsize_map[chsize] << 5 | TCR_DTR);
  601. /* clock sources never change */
  602. /* disable BRG before changing the value */
  603. SCCmod(DPLL_CTRL_REG, ~DCR_BRG_ENAB, 0);
  604. /* BRG value */
  605. SCCwrite(TIMER_LOW_REG, brgval & 0xff);
  606. SCCwrite(TIMER_HIGH_REG, (brgval >> 8) & 0xff);
  607. /* BRG enable, and clock source never changes */
  608. SCCmod(DPLL_CTRL_REG, 0xff, DCR_BRG_ENAB);
  609. local_irq_restore(flags);
  610. return 0;
  611. }
  612. static int scc_chars_in_buffer (void *ptr)
  613. {
  614. struct scc_port *port = ptr;
  615. SCC_ACCESS_INIT(port);
  616. return (SCCread (SPCOND_STATUS_REG) & SCSR_ALL_SENT) ? 0 : 1;
  617. }
  618. /* Comment taken from sx.c (2.4.0):
  619. I haven't the foggiest why the decrement use count has to happen
  620. here. The whole linux serial drivers stuff needs to be redesigned.
  621. My guess is that this is a hack to minimize the impact of a bug
  622. elsewhere. Thinking about it some more. (try it sometime) Try
  623. running minicom on a serial port that is driven by a modularized
  624. driver. Have the modem hangup. Then remove the driver module. Then
  625. exit minicom. I expect an "oops". -- REW */
  626. static void scc_hungup(void *ptr)
  627. {
  628. scc_disable_tx_interrupts(ptr);
  629. scc_disable_rx_interrupts(ptr);
  630. }
  631. static void scc_close(void *ptr)
  632. {
  633. scc_disable_tx_interrupts(ptr);
  634. scc_disable_rx_interrupts(ptr);
  635. }
  636. /*---------------------------------------------------------------------------
  637. * Internal support functions
  638. *--------------------------------------------------------------------------*/
  639. static void scc_setsignals(struct scc_port *port, int dtr, int rts)
  640. {
  641. unsigned long flags;
  642. unsigned char t;
  643. SCC_ACCESS_INIT(port);
  644. local_irq_save(flags);
  645. t = SCCread(TX_CTRL_REG);
  646. if (dtr >= 0) t = dtr? (t | TCR_DTR): (t & ~TCR_DTR);
  647. if (rts >= 0) t = rts? (t | TCR_RTS): (t & ~TCR_RTS);
  648. SCCwrite(TX_CTRL_REG, t);
  649. local_irq_restore(flags);
  650. }
  651. static void scc_send_xchar(struct tty_struct *tty, char ch)
  652. {
  653. struct scc_port *port = (struct scc_port *)tty->driver_data;
  654. port->x_char = ch;
  655. if (ch)
  656. scc_enable_tx_interrupts(port);
  657. }
  658. /*---------------------------------------------------------------------------
  659. * Driver entrypoints referenced from above
  660. *--------------------------------------------------------------------------*/
  661. static int scc_open (struct tty_struct * tty, struct file * filp)
  662. {
  663. int line = tty->index;
  664. int retval;
  665. struct scc_port *port = &scc_ports[line];
  666. int i, channel = port->channel;
  667. unsigned long flags;
  668. SCC_ACCESS_INIT(port);
  669. #if defined(CONFIG_MVME162_SCC) || defined(CONFIG_MVME147_SCC)
  670. static const struct {
  671. unsigned reg, val;
  672. } mvme_init_tab[] = {
  673. /* Values for MVME162 and MVME147 */
  674. /* no parity, 1 stop bit, async, 1:16 */
  675. { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
  676. /* parity error is special cond, ints disabled, no DMA */
  677. { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
  678. /* Rx 8 bits/char, no auto enable, Rx off */
  679. { RX_CTRL_REG, RCR_CHSIZE_8 },
  680. /* DTR off, Tx 8 bits/char, RTS off, Tx off */
  681. { TX_CTRL_REG, TCR_CHSIZE_8 },
  682. /* special features off */
  683. { AUX2_CTRL_REG, 0 },
  684. { CLK_CTRL_REG, CCR_RXCLK_BRG | CCR_TXCLK_BRG },
  685. { DPLL_CTRL_REG, DCR_BRG_ENAB | DCR_BRG_USE_PCLK },
  686. /* Start Rx */
  687. { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
  688. /* Start Tx */
  689. { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
  690. /* Ext/Stat ints: DCD only */
  691. { INT_CTRL_REG, ICR_ENAB_DCD_INT },
  692. /* Reset Ext/Stat ints */
  693. { COMMAND_REG, CR_EXTSTAT_RESET },
  694. /* ...again */
  695. { COMMAND_REG, CR_EXTSTAT_RESET },
  696. };
  697. #endif
  698. #if defined(CONFIG_BVME6000_SCC)
  699. static const struct {
  700. unsigned reg, val;
  701. } bvme_init_tab[] = {
  702. /* Values for BVME6000 */
  703. /* no parity, 1 stop bit, async, 1:16 */
  704. { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
  705. /* parity error is special cond, ints disabled, no DMA */
  706. { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
  707. /* Rx 8 bits/char, no auto enable, Rx off */
  708. { RX_CTRL_REG, RCR_CHSIZE_8 },
  709. /* DTR off, Tx 8 bits/char, RTS off, Tx off */
  710. { TX_CTRL_REG, TCR_CHSIZE_8 },
  711. /* special features off */
  712. { AUX2_CTRL_REG, 0 },
  713. { CLK_CTRL_REG, CCR_RTxC_XTAL | CCR_RXCLK_BRG | CCR_TXCLK_BRG },
  714. { DPLL_CTRL_REG, DCR_BRG_ENAB },
  715. /* Start Rx */
  716. { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
  717. /* Start Tx */
  718. { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
  719. /* Ext/Stat ints: DCD only */
  720. { INT_CTRL_REG, ICR_ENAB_DCD_INT },
  721. /* Reset Ext/Stat ints */
  722. { COMMAND_REG, CR_EXTSTAT_RESET },
  723. /* ...again */
  724. { COMMAND_REG, CR_EXTSTAT_RESET },
  725. };
  726. #endif
  727. if (!(port->gs.flags & ASYNC_INITIALIZED)) {
  728. local_irq_save(flags);
  729. #if defined(CONFIG_MVME147_SCC) || defined(CONFIG_MVME162_SCC)
  730. if (MACH_IS_MVME147 || MACH_IS_MVME16x) {
  731. for (i = 0; i < ARRAY_SIZE(mvme_init_tab); ++i)
  732. SCCwrite(mvme_init_tab[i].reg, mvme_init_tab[i].val);
  733. }
  734. #endif
  735. #if defined(CONFIG_BVME6000_SCC)
  736. if (MACH_IS_BVME6000) {
  737. for (i = 0; i < ARRAY_SIZE(bvme_init_tab); ++i)
  738. SCCwrite(bvme_init_tab[i].reg, bvme_init_tab[i].val);
  739. }
  740. #endif
  741. /* remember status register for detection of DCD and CTS changes */
  742. scc_last_status_reg[channel] = SCCread(STATUS_REG);
  743. port->c_dcd = 0; /* Prevent initial 1->0 interrupt */
  744. scc_setsignals (port, 1,1);
  745. local_irq_restore(flags);
  746. }
  747. tty->driver_data = port;
  748. port->gs.tty = tty;
  749. port->gs.count++;
  750. retval = gs_init_port(&port->gs);
  751. if (retval) {
  752. port->gs.count--;
  753. return retval;
  754. }
  755. port->gs.flags |= GS_ACTIVE;
  756. retval = gs_block_til_ready(port, filp);
  757. if (retval) {
  758. port->gs.count--;
  759. return retval;
  760. }
  761. port->c_dcd = scc_get_CD (port);
  762. scc_enable_rx_interrupts(port);
  763. return 0;
  764. }
  765. static void scc_throttle (struct tty_struct * tty)
  766. {
  767. struct scc_port *port = (struct scc_port *)tty->driver_data;
  768. unsigned long flags;
  769. SCC_ACCESS_INIT(port);
  770. if (tty->termios->c_cflag & CRTSCTS) {
  771. local_irq_save(flags);
  772. SCCmod(TX_CTRL_REG, ~TCR_RTS, 0);
  773. local_irq_restore(flags);
  774. }
  775. if (I_IXOFF(tty))
  776. scc_send_xchar(tty, STOP_CHAR(tty));
  777. }
  778. static void scc_unthrottle (struct tty_struct * tty)
  779. {
  780. struct scc_port *port = (struct scc_port *)tty->driver_data;
  781. unsigned long flags;
  782. SCC_ACCESS_INIT(port);
  783. if (tty->termios->c_cflag & CRTSCTS) {
  784. local_irq_save(flags);
  785. SCCmod(TX_CTRL_REG, 0xff, TCR_RTS);
  786. local_irq_restore(flags);
  787. }
  788. if (I_IXOFF(tty))
  789. scc_send_xchar(tty, START_CHAR(tty));
  790. }
  791. static int scc_ioctl(struct tty_struct *tty, struct file *file,
  792. unsigned int cmd, unsigned long arg)
  793. {
  794. return -ENOIOCTLCMD;
  795. }
  796. static void scc_break_ctl(struct tty_struct *tty, int break_state)
  797. {
  798. struct scc_port *port = (struct scc_port *)tty->driver_data;
  799. unsigned long flags;
  800. SCC_ACCESS_INIT(port);
  801. local_irq_save(flags);
  802. SCCmod(TX_CTRL_REG, ~TCR_SEND_BREAK,
  803. break_state ? TCR_SEND_BREAK : 0);
  804. local_irq_restore(flags);
  805. }
  806. /*---------------------------------------------------------------------------
  807. * Serial console stuff...
  808. *--------------------------------------------------------------------------*/
  809. #define scc_delay() do { __asm__ __volatile__ (" nop; nop"); } while (0)
  810. static void scc_ch_write (char ch)
  811. {
  812. volatile char *p = NULL;
  813. #ifdef CONFIG_MVME147_SCC
  814. if (MACH_IS_MVME147)
  815. p = (volatile char *)M147_SCC_A_ADDR;
  816. #endif
  817. #ifdef CONFIG_MVME162_SCC
  818. if (MACH_IS_MVME16x)
  819. p = (volatile char *)MVME_SCC_A_ADDR;
  820. #endif
  821. #ifdef CONFIG_BVME6000_SCC
  822. if (MACH_IS_BVME6000)
  823. p = (volatile char *)BVME_SCC_A_ADDR;
  824. #endif
  825. do {
  826. scc_delay();
  827. }
  828. while (!(*p & 4));
  829. scc_delay();
  830. *p = 8;
  831. scc_delay();
  832. *p = ch;
  833. }
  834. /* The console must be locked when we get here. */
  835. static void scc_console_write (struct console *co, const char *str, unsigned count)
  836. {
  837. unsigned long flags;
  838. local_irq_save(flags);
  839. while (count--)
  840. {
  841. if (*str == '\n')
  842. scc_ch_write ('\r');
  843. scc_ch_write (*str++);
  844. }
  845. local_irq_restore(flags);
  846. }
  847. static struct tty_driver *scc_console_device(struct console *c, int *index)
  848. {
  849. *index = c->index;
  850. return scc_driver;
  851. }
  852. static int __init scc_console_setup(struct console *co, char *options)
  853. {
  854. return 0;
  855. }
  856. static struct console sercons = {
  857. .name = "ttyS",
  858. .write = scc_console_write,
  859. .device = scc_console_device,
  860. .setup = scc_console_setup,
  861. .flags = CON_PRINTBUFFER,
  862. .index = -1,
  863. };
  864. static int __init vme_scc_console_init(void)
  865. {
  866. if (vme_brdtype == VME_TYPE_MVME147 ||
  867. vme_brdtype == VME_TYPE_MVME162 ||
  868. vme_brdtype == VME_TYPE_MVME172 ||
  869. vme_brdtype == VME_TYPE_BVME4000 ||
  870. vme_brdtype == VME_TYPE_BVME6000)
  871. register_console(&sercons);
  872. return 0;
  873. }
  874. console_initcall(vme_scc_console_init);