synclink_cs.c 116 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529
  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/pci.h>
  43. #include <linux/tty.h>
  44. #include <linux/tty_flip.h>
  45. #include <linux/serial.h>
  46. #include <linux/major.h>
  47. #include <linux/string.h>
  48. #include <linux/fcntl.h>
  49. #include <linux/ptrace.h>
  50. #include <linux/ioport.h>
  51. #include <linux/mm.h>
  52. #include <linux/slab.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/vmalloc.h>
  55. #include <linux/init.h>
  56. #include <linux/delay.h>
  57. #include <linux/ioctl.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #ifdef CONFIG_HDLC_MODULE
  73. #define CONFIG_HDLC 1
  74. #endif
  75. #define GET_USER(error,value,addr) error = get_user(value,addr)
  76. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  77. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  78. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  79. #include <asm/uaccess.h>
  80. #include "linux/synclink.h"
  81. static MGSL_PARAMS default_params = {
  82. MGSL_MODE_HDLC, /* unsigned long mode */
  83. 0, /* unsigned char loopback; */
  84. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  85. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  86. 0, /* unsigned long clock_speed; */
  87. 0xff, /* unsigned char addr_filter; */
  88. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  89. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  90. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  91. 9600, /* unsigned long data_rate; */
  92. 8, /* unsigned char data_bits; */
  93. 1, /* unsigned char stop_bits; */
  94. ASYNC_PARITY_NONE /* unsigned char parity; */
  95. };
  96. typedef struct
  97. {
  98. int count;
  99. unsigned char status;
  100. char data[1];
  101. } RXBUF;
  102. /* The queue of BH actions to be performed */
  103. #define BH_RECEIVE 1
  104. #define BH_TRANSMIT 2
  105. #define BH_STATUS 4
  106. #define IO_PIN_SHUTDOWN_LIMIT 100
  107. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  108. struct _input_signal_events {
  109. int ri_up;
  110. int ri_down;
  111. int dsr_up;
  112. int dsr_down;
  113. int dcd_up;
  114. int dcd_down;
  115. int cts_up;
  116. int cts_down;
  117. };
  118. /*
  119. * Device instance data structure
  120. */
  121. typedef struct _mgslpc_info {
  122. void *if_ptr; /* General purpose pointer (used by SPPP) */
  123. int magic;
  124. int flags;
  125. int count; /* count of opens */
  126. int line;
  127. unsigned short close_delay;
  128. unsigned short closing_wait; /* time to wait before closing */
  129. struct mgsl_icount icount;
  130. struct tty_struct *tty;
  131. int timeout;
  132. int x_char; /* xon/xoff character */
  133. int blocked_open; /* # of blocked opens */
  134. unsigned char read_status_mask;
  135. unsigned char ignore_status_mask;
  136. unsigned char *tx_buf;
  137. int tx_put;
  138. int tx_get;
  139. int tx_count;
  140. /* circular list of fixed length rx buffers */
  141. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  142. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  143. int rx_put; /* index of next empty rx buffer */
  144. int rx_get; /* index of next full rx buffer */
  145. int rx_buf_size; /* size in bytes of single rx buffer */
  146. int rx_buf_count; /* total number of rx buffers */
  147. int rx_frame_count; /* number of full rx buffers */
  148. wait_queue_head_t open_wait;
  149. wait_queue_head_t close_wait;
  150. wait_queue_head_t status_event_wait_q;
  151. wait_queue_head_t event_wait_q;
  152. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  153. struct _mgslpc_info *next_device; /* device list link */
  154. unsigned short imra_value;
  155. unsigned short imrb_value;
  156. unsigned char pim_value;
  157. spinlock_t lock;
  158. struct work_struct task; /* task structure for scheduling bh */
  159. u32 max_frame_size;
  160. u32 pending_bh;
  161. int bh_running;
  162. int bh_requested;
  163. int dcd_chkcount; /* check counts to prevent */
  164. int cts_chkcount; /* too many IRQs if a signal */
  165. int dsr_chkcount; /* is floating */
  166. int ri_chkcount;
  167. int rx_enabled;
  168. int rx_overflow;
  169. int tx_enabled;
  170. int tx_active;
  171. int tx_aborting;
  172. u32 idle_mode;
  173. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  174. char device_name[25]; /* device instance name */
  175. unsigned int io_base; /* base I/O address of adapter */
  176. unsigned int irq_level;
  177. MGSL_PARAMS params; /* communications parameters */
  178. unsigned char serial_signals; /* current serial signal states */
  179. char irq_occurred; /* for diagnostics use */
  180. char testing_irq;
  181. unsigned int init_error; /* startup error (DIAGS) */
  182. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  183. BOOLEAN drop_rts_on_tx_done;
  184. struct _input_signal_events input_signal_events;
  185. /* PCMCIA support */
  186. struct pcmcia_device *p_dev;
  187. dev_node_t node;
  188. int stop;
  189. /* SPPP/Cisco HDLC device parts */
  190. int netcount;
  191. int dosyncppp;
  192. spinlock_t netlock;
  193. #ifdef CONFIG_HDLC
  194. struct net_device *netdev;
  195. #endif
  196. } MGSLPC_INFO;
  197. #define MGSLPC_MAGIC 0x5402
  198. /*
  199. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  200. */
  201. #define TXBUFSIZE 4096
  202. #define CHA 0x00 /* channel A offset */
  203. #define CHB 0x40 /* channel B offset */
  204. /*
  205. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  206. */
  207. #undef PVR
  208. #define RXFIFO 0
  209. #define TXFIFO 0
  210. #define STAR 0x20
  211. #define CMDR 0x20
  212. #define RSTA 0x21
  213. #define PRE 0x21
  214. #define MODE 0x22
  215. #define TIMR 0x23
  216. #define XAD1 0x24
  217. #define XAD2 0x25
  218. #define RAH1 0x26
  219. #define RAH2 0x27
  220. #define DAFO 0x27
  221. #define RAL1 0x28
  222. #define RFC 0x28
  223. #define RHCR 0x29
  224. #define RAL2 0x29
  225. #define RBCL 0x2a
  226. #define XBCL 0x2a
  227. #define RBCH 0x2b
  228. #define XBCH 0x2b
  229. #define CCR0 0x2c
  230. #define CCR1 0x2d
  231. #define CCR2 0x2e
  232. #define CCR3 0x2f
  233. #define VSTR 0x34
  234. #define BGR 0x34
  235. #define RLCR 0x35
  236. #define AML 0x36
  237. #define AMH 0x37
  238. #define GIS 0x38
  239. #define IVA 0x38
  240. #define IPC 0x39
  241. #define ISR 0x3a
  242. #define IMR 0x3a
  243. #define PVR 0x3c
  244. #define PIS 0x3d
  245. #define PIM 0x3d
  246. #define PCR 0x3e
  247. #define CCR4 0x3f
  248. // IMR/ISR
  249. #define IRQ_BREAK_ON BIT15 // rx break detected
  250. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  251. #define IRQ_ALLSENT BIT13 // all sent
  252. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  253. #define IRQ_TIMER BIT11 // timer interrupt
  254. #define IRQ_CTS BIT10 // CTS status change
  255. #define IRQ_TXREPEAT BIT9 // tx message repeat
  256. #define IRQ_TXFIFO BIT8 // transmit pool ready
  257. #define IRQ_RXEOM BIT7 // receive message end
  258. #define IRQ_EXITHUNT BIT6 // receive frame start
  259. #define IRQ_RXTIME BIT6 // rx char timeout
  260. #define IRQ_DCD BIT2 // carrier detect status change
  261. #define IRQ_OVERRUN BIT1 // receive frame overflow
  262. #define IRQ_RXFIFO BIT0 // receive pool full
  263. // STAR
  264. #define XFW BIT6 // transmit FIFO write enable
  265. #define CEC BIT2 // command executing
  266. #define CTS BIT1 // CTS state
  267. #define PVR_DTR BIT0
  268. #define PVR_DSR BIT1
  269. #define PVR_RI BIT2
  270. #define PVR_AUTOCTS BIT3
  271. #define PVR_RS232 0x20 /* 0010b */
  272. #define PVR_V35 0xe0 /* 1110b */
  273. #define PVR_RS422 0x40 /* 0100b */
  274. /* Register access functions */
  275. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  276. #define read_reg(info, reg) inb((info)->io_base + (reg))
  277. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  278. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  279. #define set_reg_bits(info, reg, mask) \
  280. write_reg(info, (reg), \
  281. (unsigned char) (read_reg(info, (reg)) | (mask)))
  282. #define clear_reg_bits(info, reg, mask) \
  283. write_reg(info, (reg), \
  284. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  285. /*
  286. * interrupt enable/disable routines
  287. */
  288. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  289. {
  290. if (channel == CHA) {
  291. info->imra_value |= mask;
  292. write_reg16(info, CHA + IMR, info->imra_value);
  293. } else {
  294. info->imrb_value |= mask;
  295. write_reg16(info, CHB + IMR, info->imrb_value);
  296. }
  297. }
  298. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  299. {
  300. if (channel == CHA) {
  301. info->imra_value &= ~mask;
  302. write_reg16(info, CHA + IMR, info->imra_value);
  303. } else {
  304. info->imrb_value &= ~mask;
  305. write_reg16(info, CHB + IMR, info->imrb_value);
  306. }
  307. }
  308. #define port_irq_disable(info, mask) \
  309. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  310. #define port_irq_enable(info, mask) \
  311. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  312. static void rx_start(MGSLPC_INFO *info);
  313. static void rx_stop(MGSLPC_INFO *info);
  314. static void tx_start(MGSLPC_INFO *info);
  315. static void tx_stop(MGSLPC_INFO *info);
  316. static void tx_set_idle(MGSLPC_INFO *info);
  317. static void get_signals(MGSLPC_INFO *info);
  318. static void set_signals(MGSLPC_INFO *info);
  319. static void reset_device(MGSLPC_INFO *info);
  320. static void hdlc_mode(MGSLPC_INFO *info);
  321. static void async_mode(MGSLPC_INFO *info);
  322. static void tx_timeout(unsigned long context);
  323. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  324. #ifdef CONFIG_HDLC
  325. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  326. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  327. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  328. static int hdlcdev_init(MGSLPC_INFO *info);
  329. static void hdlcdev_exit(MGSLPC_INFO *info);
  330. #endif
  331. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  332. static BOOLEAN register_test(MGSLPC_INFO *info);
  333. static BOOLEAN irq_test(MGSLPC_INFO *info);
  334. static int adapter_test(MGSLPC_INFO *info);
  335. static int claim_resources(MGSLPC_INFO *info);
  336. static void release_resources(MGSLPC_INFO *info);
  337. static void mgslpc_add_device(MGSLPC_INFO *info);
  338. static void mgslpc_remove_device(MGSLPC_INFO *info);
  339. static int rx_get_frame(MGSLPC_INFO *info);
  340. static void rx_reset_buffers(MGSLPC_INFO *info);
  341. static int rx_alloc_buffers(MGSLPC_INFO *info);
  342. static void rx_free_buffers(MGSLPC_INFO *info);
  343. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  344. /*
  345. * Bottom half interrupt handlers
  346. */
  347. static void bh_handler(void* Context);
  348. static void bh_transmit(MGSLPC_INFO *info);
  349. static void bh_status(MGSLPC_INFO *info);
  350. /*
  351. * ioctl handlers
  352. */
  353. static int tiocmget(struct tty_struct *tty, struct file *file);
  354. static int tiocmset(struct tty_struct *tty, struct file *file,
  355. unsigned int set, unsigned int clear);
  356. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  357. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  358. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  359. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  360. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  361. static int set_txenable(MGSLPC_INFO *info, int enable);
  362. static int tx_abort(MGSLPC_INFO *info);
  363. static int set_rxenable(MGSLPC_INFO *info, int enable);
  364. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  365. static MGSLPC_INFO *mgslpc_device_list = NULL;
  366. static int mgslpc_device_count = 0;
  367. /*
  368. * Set this param to non-zero to load eax with the
  369. * .text section address and breakpoint on module load.
  370. * This is useful for use with gdb and add-symbol-file command.
  371. */
  372. static int break_on_load=0;
  373. /*
  374. * Driver major number, defaults to zero to get auto
  375. * assigned major number. May be forced as module parameter.
  376. */
  377. static int ttymajor=0;
  378. static int debug_level = 0;
  379. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  380. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  381. module_param(break_on_load, bool, 0);
  382. module_param(ttymajor, int, 0);
  383. module_param(debug_level, int, 0);
  384. module_param_array(maxframe, int, NULL, 0);
  385. module_param_array(dosyncppp, int, NULL, 0);
  386. MODULE_LICENSE("GPL");
  387. static char *driver_name = "SyncLink PC Card driver";
  388. static char *driver_version = "$Revision: 4.34 $";
  389. static struct tty_driver *serial_driver;
  390. /* number of characters left in xmit buffer before we ask for more */
  391. #define WAKEUP_CHARS 256
  392. static void mgslpc_change_params(MGSLPC_INFO *info);
  393. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  394. /* PCMCIA prototypes */
  395. static int mgslpc_config(struct pcmcia_device *link);
  396. static void mgslpc_release(u_long arg);
  397. static void mgslpc_detach(struct pcmcia_device *p_dev);
  398. /*
  399. * 1st function defined in .text section. Calling this function in
  400. * init_module() followed by a breakpoint allows a remote debugger
  401. * (gdb) to get the .text address for the add-symbol-file command.
  402. * This allows remote debugging of dynamically loadable modules.
  403. */
  404. static void* mgslpc_get_text_ptr(void)
  405. {
  406. return mgslpc_get_text_ptr;
  407. }
  408. /**
  409. * line discipline callback wrappers
  410. *
  411. * The wrappers maintain line discipline references
  412. * while calling into the line discipline.
  413. *
  414. * ldisc_flush_buffer - flush line discipline receive buffers
  415. * ldisc_receive_buf - pass receive data to line discipline
  416. */
  417. static void ldisc_flush_buffer(struct tty_struct *tty)
  418. {
  419. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  420. if (ld) {
  421. if (ld->flush_buffer)
  422. ld->flush_buffer(tty);
  423. tty_ldisc_deref(ld);
  424. }
  425. }
  426. static void ldisc_receive_buf(struct tty_struct *tty,
  427. const __u8 *data, char *flags, int count)
  428. {
  429. struct tty_ldisc *ld;
  430. if (!tty)
  431. return;
  432. ld = tty_ldisc_ref(tty);
  433. if (ld) {
  434. if (ld->receive_buf)
  435. ld->receive_buf(tty, data, flags, count);
  436. tty_ldisc_deref(ld);
  437. }
  438. }
  439. static int mgslpc_probe(struct pcmcia_device *link)
  440. {
  441. MGSLPC_INFO *info;
  442. int ret;
  443. if (debug_level >= DEBUG_LEVEL_INFO)
  444. printk("mgslpc_attach\n");
  445. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  446. if (!info) {
  447. printk("Error can't allocate device instance data\n");
  448. return -ENOMEM;
  449. }
  450. memset(info, 0, sizeof(MGSLPC_INFO));
  451. info->magic = MGSLPC_MAGIC;
  452. INIT_WORK(&info->task, bh_handler, info);
  453. info->max_frame_size = 4096;
  454. info->close_delay = 5*HZ/10;
  455. info->closing_wait = 30*HZ;
  456. init_waitqueue_head(&info->open_wait);
  457. init_waitqueue_head(&info->close_wait);
  458. init_waitqueue_head(&info->status_event_wait_q);
  459. init_waitqueue_head(&info->event_wait_q);
  460. spin_lock_init(&info->lock);
  461. spin_lock_init(&info->netlock);
  462. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  463. info->idle_mode = HDLC_TXIDLE_FLAGS;
  464. info->imra_value = 0xffff;
  465. info->imrb_value = 0xffff;
  466. info->pim_value = 0xff;
  467. info->p_dev = link;
  468. link->priv = info;
  469. /* Initialize the struct pcmcia_device structure */
  470. /* Interrupt setup */
  471. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  472. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  473. link->irq.Handler = NULL;
  474. link->conf.Attributes = 0;
  475. link->conf.IntType = INT_MEMORY_AND_IO;
  476. ret = mgslpc_config(link);
  477. if (ret)
  478. return ret;
  479. mgslpc_add_device(info);
  480. return 0;
  481. }
  482. /* Card has been inserted.
  483. */
  484. #define CS_CHECK(fn, ret) \
  485. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  486. static int mgslpc_config(struct pcmcia_device *link)
  487. {
  488. MGSLPC_INFO *info = link->priv;
  489. tuple_t tuple;
  490. cisparse_t parse;
  491. int last_fn, last_ret;
  492. u_char buf[64];
  493. cistpl_cftable_entry_t dflt = { 0 };
  494. cistpl_cftable_entry_t *cfg;
  495. if (debug_level >= DEBUG_LEVEL_INFO)
  496. printk("mgslpc_config(0x%p)\n", link);
  497. /* read CONFIG tuple to find its configuration registers */
  498. tuple.DesiredTuple = CISTPL_CONFIG;
  499. tuple.Attributes = 0;
  500. tuple.TupleData = buf;
  501. tuple.TupleDataMax = sizeof(buf);
  502. tuple.TupleOffset = 0;
  503. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  504. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  505. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  506. link->conf.ConfigBase = parse.config.base;
  507. link->conf.Present = parse.config.rmask[0];
  508. /* get CIS configuration entry */
  509. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  510. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  511. cfg = &(parse.cftable_entry);
  512. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  513. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  514. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  515. if (cfg->index == 0)
  516. goto cs_failed;
  517. link->conf.ConfigIndex = cfg->index;
  518. link->conf.Attributes |= CONF_ENABLE_IRQ;
  519. /* IO window settings */
  520. link->io.NumPorts1 = 0;
  521. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  522. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  523. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  524. if (!(io->flags & CISTPL_IO_8BIT))
  525. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  526. if (!(io->flags & CISTPL_IO_16BIT))
  527. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  528. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  529. link->io.BasePort1 = io->win[0].base;
  530. link->io.NumPorts1 = io->win[0].len;
  531. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  532. }
  533. link->conf.Attributes = CONF_ENABLE_IRQ;
  534. link->conf.IntType = INT_MEMORY_AND_IO;
  535. link->conf.ConfigIndex = 8;
  536. link->conf.Present = PRESENT_OPTION;
  537. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  538. link->irq.Handler = mgslpc_isr;
  539. link->irq.Instance = info;
  540. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  541. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  542. info->io_base = link->io.BasePort1;
  543. info->irq_level = link->irq.AssignedIRQ;
  544. /* add to linked list of devices */
  545. sprintf(info->node.dev_name, "mgslpc0");
  546. info->node.major = info->node.minor = 0;
  547. link->dev_node = &info->node;
  548. printk(KERN_INFO "%s: index 0x%02x:",
  549. info->node.dev_name, link->conf.ConfigIndex);
  550. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  551. printk(", irq %d", link->irq.AssignedIRQ);
  552. if (link->io.NumPorts1)
  553. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  554. link->io.BasePort1+link->io.NumPorts1-1);
  555. printk("\n");
  556. return 0;
  557. cs_failed:
  558. cs_error(link, last_fn, last_ret);
  559. mgslpc_release((u_long)link);
  560. return -ENODEV;
  561. }
  562. /* Card has been removed.
  563. * Unregister device and release PCMCIA configuration.
  564. * If device is open, postpone until it is closed.
  565. */
  566. static void mgslpc_release(u_long arg)
  567. {
  568. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  569. if (debug_level >= DEBUG_LEVEL_INFO)
  570. printk("mgslpc_release(0x%p)\n", link);
  571. pcmcia_disable_device(link);
  572. }
  573. static void mgslpc_detach(struct pcmcia_device *link)
  574. {
  575. if (debug_level >= DEBUG_LEVEL_INFO)
  576. printk("mgslpc_detach(0x%p)\n", link);
  577. ((MGSLPC_INFO *)link->priv)->stop = 1;
  578. mgslpc_release((u_long)link);
  579. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  580. }
  581. static int mgslpc_suspend(struct pcmcia_device *link)
  582. {
  583. MGSLPC_INFO *info = link->priv;
  584. info->stop = 1;
  585. return 0;
  586. }
  587. static int mgslpc_resume(struct pcmcia_device *link)
  588. {
  589. MGSLPC_INFO *info = link->priv;
  590. info->stop = 0;
  591. return 0;
  592. }
  593. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  594. char *name, const char *routine)
  595. {
  596. #ifdef MGSLPC_PARANOIA_CHECK
  597. static const char *badmagic =
  598. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  599. static const char *badinfo =
  600. "Warning: null mgslpc_info for (%s) in %s\n";
  601. if (!info) {
  602. printk(badinfo, name, routine);
  603. return 1;
  604. }
  605. if (info->magic != MGSLPC_MAGIC) {
  606. printk(badmagic, name, routine);
  607. return 1;
  608. }
  609. #else
  610. if (!info)
  611. return 1;
  612. #endif
  613. return 0;
  614. }
  615. #define CMD_RXFIFO BIT7 // release current rx FIFO
  616. #define CMD_RXRESET BIT6 // receiver reset
  617. #define CMD_RXFIFO_READ BIT5
  618. #define CMD_START_TIMER BIT4
  619. #define CMD_TXFIFO BIT3 // release current tx FIFO
  620. #define CMD_TXEOM BIT1 // transmit end message
  621. #define CMD_TXRESET BIT0 // transmit reset
  622. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  623. {
  624. int i = 0;
  625. /* wait for command completion */
  626. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  627. udelay(1);
  628. if (i++ == 1000)
  629. return FALSE;
  630. }
  631. return TRUE;
  632. }
  633. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  634. {
  635. wait_command_complete(info, channel);
  636. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  637. }
  638. static void tx_pause(struct tty_struct *tty)
  639. {
  640. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  641. unsigned long flags;
  642. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  643. return;
  644. if (debug_level >= DEBUG_LEVEL_INFO)
  645. printk("tx_pause(%s)\n",info->device_name);
  646. spin_lock_irqsave(&info->lock,flags);
  647. if (info->tx_enabled)
  648. tx_stop(info);
  649. spin_unlock_irqrestore(&info->lock,flags);
  650. }
  651. static void tx_release(struct tty_struct *tty)
  652. {
  653. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  654. unsigned long flags;
  655. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  656. return;
  657. if (debug_level >= DEBUG_LEVEL_INFO)
  658. printk("tx_release(%s)\n",info->device_name);
  659. spin_lock_irqsave(&info->lock,flags);
  660. if (!info->tx_enabled)
  661. tx_start(info);
  662. spin_unlock_irqrestore(&info->lock,flags);
  663. }
  664. /* Return next bottom half action to perform.
  665. * or 0 if nothing to do.
  666. */
  667. static int bh_action(MGSLPC_INFO *info)
  668. {
  669. unsigned long flags;
  670. int rc = 0;
  671. spin_lock_irqsave(&info->lock,flags);
  672. if (info->pending_bh & BH_RECEIVE) {
  673. info->pending_bh &= ~BH_RECEIVE;
  674. rc = BH_RECEIVE;
  675. } else if (info->pending_bh & BH_TRANSMIT) {
  676. info->pending_bh &= ~BH_TRANSMIT;
  677. rc = BH_TRANSMIT;
  678. } else if (info->pending_bh & BH_STATUS) {
  679. info->pending_bh &= ~BH_STATUS;
  680. rc = BH_STATUS;
  681. }
  682. if (!rc) {
  683. /* Mark BH routine as complete */
  684. info->bh_running = 0;
  685. info->bh_requested = 0;
  686. }
  687. spin_unlock_irqrestore(&info->lock,flags);
  688. return rc;
  689. }
  690. static void bh_handler(void* Context)
  691. {
  692. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  693. int action;
  694. if (!info)
  695. return;
  696. if (debug_level >= DEBUG_LEVEL_BH)
  697. printk( "%s(%d):bh_handler(%s) entry\n",
  698. __FILE__,__LINE__,info->device_name);
  699. info->bh_running = 1;
  700. while((action = bh_action(info)) != 0) {
  701. /* Process work item */
  702. if ( debug_level >= DEBUG_LEVEL_BH )
  703. printk( "%s(%d):bh_handler() work item action=%d\n",
  704. __FILE__,__LINE__,action);
  705. switch (action) {
  706. case BH_RECEIVE:
  707. while(rx_get_frame(info));
  708. break;
  709. case BH_TRANSMIT:
  710. bh_transmit(info);
  711. break;
  712. case BH_STATUS:
  713. bh_status(info);
  714. break;
  715. default:
  716. /* unknown work item ID */
  717. printk("Unknown work item ID=%08X!\n", action);
  718. break;
  719. }
  720. }
  721. if (debug_level >= DEBUG_LEVEL_BH)
  722. printk( "%s(%d):bh_handler(%s) exit\n",
  723. __FILE__,__LINE__,info->device_name);
  724. }
  725. static void bh_transmit(MGSLPC_INFO *info)
  726. {
  727. struct tty_struct *tty = info->tty;
  728. if (debug_level >= DEBUG_LEVEL_BH)
  729. printk("bh_transmit() entry on %s\n", info->device_name);
  730. if (tty) {
  731. tty_wakeup(tty);
  732. wake_up_interruptible(&tty->write_wait);
  733. }
  734. }
  735. static void bh_status(MGSLPC_INFO *info)
  736. {
  737. info->ri_chkcount = 0;
  738. info->dsr_chkcount = 0;
  739. info->dcd_chkcount = 0;
  740. info->cts_chkcount = 0;
  741. }
  742. /* eom: non-zero = end of frame */
  743. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  744. {
  745. unsigned char data[2];
  746. unsigned char fifo_count, read_count, i;
  747. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  748. if (debug_level >= DEBUG_LEVEL_ISR)
  749. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  750. if (!info->rx_enabled)
  751. return;
  752. if (info->rx_frame_count >= info->rx_buf_count) {
  753. /* no more free buffers */
  754. issue_command(info, CHA, CMD_RXRESET);
  755. info->pending_bh |= BH_RECEIVE;
  756. info->rx_overflow = 1;
  757. info->icount.buf_overrun++;
  758. return;
  759. }
  760. if (eom) {
  761. /* end of frame, get FIFO count from RBCL register */
  762. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  763. fifo_count = 32;
  764. } else
  765. fifo_count = 32;
  766. do {
  767. if (fifo_count == 1) {
  768. read_count = 1;
  769. data[0] = read_reg(info, CHA + RXFIFO);
  770. } else {
  771. read_count = 2;
  772. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  773. }
  774. fifo_count -= read_count;
  775. if (!fifo_count && eom)
  776. buf->status = data[--read_count];
  777. for (i = 0; i < read_count; i++) {
  778. if (buf->count >= info->max_frame_size) {
  779. /* frame too large, reset receiver and reset current buffer */
  780. issue_command(info, CHA, CMD_RXRESET);
  781. buf->count = 0;
  782. return;
  783. }
  784. *(buf->data + buf->count) = data[i];
  785. buf->count++;
  786. }
  787. } while (fifo_count);
  788. if (eom) {
  789. info->pending_bh |= BH_RECEIVE;
  790. info->rx_frame_count++;
  791. info->rx_put++;
  792. if (info->rx_put >= info->rx_buf_count)
  793. info->rx_put = 0;
  794. }
  795. issue_command(info, CHA, CMD_RXFIFO);
  796. }
  797. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  798. {
  799. unsigned char data, status, flag;
  800. int fifo_count;
  801. int work = 0;
  802. struct tty_struct *tty = info->tty;
  803. struct mgsl_icount *icount = &info->icount;
  804. if (tcd) {
  805. /* early termination, get FIFO count from RBCL register */
  806. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  807. /* Zero fifo count could mean 0 or 32 bytes available.
  808. * If BIT5 of STAR is set then at least 1 byte is available.
  809. */
  810. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  811. fifo_count = 32;
  812. } else
  813. fifo_count = 32;
  814. tty_buffer_request_room(tty, fifo_count);
  815. /* Flush received async data to receive data buffer. */
  816. while (fifo_count) {
  817. data = read_reg(info, CHA + RXFIFO);
  818. status = read_reg(info, CHA + RXFIFO);
  819. fifo_count -= 2;
  820. icount->rx++;
  821. flag = TTY_NORMAL;
  822. // if no frameing/crc error then save data
  823. // BIT7:parity error
  824. // BIT6:framing error
  825. if (status & (BIT7 + BIT6)) {
  826. if (status & BIT7)
  827. icount->parity++;
  828. else
  829. icount->frame++;
  830. /* discard char if tty control flags say so */
  831. if (status & info->ignore_status_mask)
  832. continue;
  833. status &= info->read_status_mask;
  834. if (status & BIT7)
  835. flag = TTY_PARITY;
  836. else if (status & BIT6)
  837. flag = TTY_FRAME;
  838. }
  839. work += tty_insert_flip_char(tty, data, flag);
  840. }
  841. issue_command(info, CHA, CMD_RXFIFO);
  842. if (debug_level >= DEBUG_LEVEL_ISR) {
  843. printk("%s(%d):rx_ready_async",
  844. __FILE__,__LINE__);
  845. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  846. __FILE__,__LINE__,icount->rx,icount->brk,
  847. icount->parity,icount->frame,icount->overrun);
  848. }
  849. if (work)
  850. tty_flip_buffer_push(tty);
  851. }
  852. static void tx_done(MGSLPC_INFO *info)
  853. {
  854. if (!info->tx_active)
  855. return;
  856. info->tx_active = 0;
  857. info->tx_aborting = 0;
  858. if (info->params.mode == MGSL_MODE_ASYNC)
  859. return;
  860. info->tx_count = info->tx_put = info->tx_get = 0;
  861. del_timer(&info->tx_timer);
  862. if (info->drop_rts_on_tx_done) {
  863. get_signals(info);
  864. if (info->serial_signals & SerialSignal_RTS) {
  865. info->serial_signals &= ~SerialSignal_RTS;
  866. set_signals(info);
  867. }
  868. info->drop_rts_on_tx_done = 0;
  869. }
  870. #ifdef CONFIG_HDLC
  871. if (info->netcount)
  872. hdlcdev_tx_done(info);
  873. else
  874. #endif
  875. {
  876. if (info->tty->stopped || info->tty->hw_stopped) {
  877. tx_stop(info);
  878. return;
  879. }
  880. info->pending_bh |= BH_TRANSMIT;
  881. }
  882. }
  883. static void tx_ready(MGSLPC_INFO *info)
  884. {
  885. unsigned char fifo_count = 32;
  886. int c;
  887. if (debug_level >= DEBUG_LEVEL_ISR)
  888. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  889. if (info->params.mode == MGSL_MODE_HDLC) {
  890. if (!info->tx_active)
  891. return;
  892. } else {
  893. if (info->tty->stopped || info->tty->hw_stopped) {
  894. tx_stop(info);
  895. return;
  896. }
  897. if (!info->tx_count)
  898. info->tx_active = 0;
  899. }
  900. if (!info->tx_count)
  901. return;
  902. while (info->tx_count && fifo_count) {
  903. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  904. if (c == 1) {
  905. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  906. } else {
  907. write_reg16(info, CHA + TXFIFO,
  908. *((unsigned short*)(info->tx_buf + info->tx_get)));
  909. }
  910. info->tx_count -= c;
  911. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  912. fifo_count -= c;
  913. }
  914. if (info->params.mode == MGSL_MODE_ASYNC) {
  915. if (info->tx_count < WAKEUP_CHARS)
  916. info->pending_bh |= BH_TRANSMIT;
  917. issue_command(info, CHA, CMD_TXFIFO);
  918. } else {
  919. if (info->tx_count)
  920. issue_command(info, CHA, CMD_TXFIFO);
  921. else
  922. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  923. }
  924. }
  925. static void cts_change(MGSLPC_INFO *info)
  926. {
  927. get_signals(info);
  928. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  929. irq_disable(info, CHB, IRQ_CTS);
  930. info->icount.cts++;
  931. if (info->serial_signals & SerialSignal_CTS)
  932. info->input_signal_events.cts_up++;
  933. else
  934. info->input_signal_events.cts_down++;
  935. wake_up_interruptible(&info->status_event_wait_q);
  936. wake_up_interruptible(&info->event_wait_q);
  937. if (info->flags & ASYNC_CTS_FLOW) {
  938. if (info->tty->hw_stopped) {
  939. if (info->serial_signals & SerialSignal_CTS) {
  940. if (debug_level >= DEBUG_LEVEL_ISR)
  941. printk("CTS tx start...");
  942. if (info->tty)
  943. info->tty->hw_stopped = 0;
  944. tx_start(info);
  945. info->pending_bh |= BH_TRANSMIT;
  946. return;
  947. }
  948. } else {
  949. if (!(info->serial_signals & SerialSignal_CTS)) {
  950. if (debug_level >= DEBUG_LEVEL_ISR)
  951. printk("CTS tx stop...");
  952. if (info->tty)
  953. info->tty->hw_stopped = 1;
  954. tx_stop(info);
  955. }
  956. }
  957. }
  958. info->pending_bh |= BH_STATUS;
  959. }
  960. static void dcd_change(MGSLPC_INFO *info)
  961. {
  962. get_signals(info);
  963. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  964. irq_disable(info, CHB, IRQ_DCD);
  965. info->icount.dcd++;
  966. if (info->serial_signals & SerialSignal_DCD) {
  967. info->input_signal_events.dcd_up++;
  968. }
  969. else
  970. info->input_signal_events.dcd_down++;
  971. #ifdef CONFIG_HDLC
  972. if (info->netcount) {
  973. if (info->serial_signals & SerialSignal_DCD)
  974. netif_carrier_on(info->netdev);
  975. else
  976. netif_carrier_off(info->netdev);
  977. }
  978. #endif
  979. wake_up_interruptible(&info->status_event_wait_q);
  980. wake_up_interruptible(&info->event_wait_q);
  981. if (info->flags & ASYNC_CHECK_CD) {
  982. if (debug_level >= DEBUG_LEVEL_ISR)
  983. printk("%s CD now %s...", info->device_name,
  984. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  985. if (info->serial_signals & SerialSignal_DCD)
  986. wake_up_interruptible(&info->open_wait);
  987. else {
  988. if (debug_level >= DEBUG_LEVEL_ISR)
  989. printk("doing serial hangup...");
  990. if (info->tty)
  991. tty_hangup(info->tty);
  992. }
  993. }
  994. info->pending_bh |= BH_STATUS;
  995. }
  996. static void dsr_change(MGSLPC_INFO *info)
  997. {
  998. get_signals(info);
  999. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1000. port_irq_disable(info, PVR_DSR);
  1001. info->icount.dsr++;
  1002. if (info->serial_signals & SerialSignal_DSR)
  1003. info->input_signal_events.dsr_up++;
  1004. else
  1005. info->input_signal_events.dsr_down++;
  1006. wake_up_interruptible(&info->status_event_wait_q);
  1007. wake_up_interruptible(&info->event_wait_q);
  1008. info->pending_bh |= BH_STATUS;
  1009. }
  1010. static void ri_change(MGSLPC_INFO *info)
  1011. {
  1012. get_signals(info);
  1013. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1014. port_irq_disable(info, PVR_RI);
  1015. info->icount.rng++;
  1016. if (info->serial_signals & SerialSignal_RI)
  1017. info->input_signal_events.ri_up++;
  1018. else
  1019. info->input_signal_events.ri_down++;
  1020. wake_up_interruptible(&info->status_event_wait_q);
  1021. wake_up_interruptible(&info->event_wait_q);
  1022. info->pending_bh |= BH_STATUS;
  1023. }
  1024. /* Interrupt service routine entry point.
  1025. *
  1026. * Arguments:
  1027. *
  1028. * irq interrupt number that caused interrupt
  1029. * dev_id device ID supplied during interrupt registration
  1030. */
  1031. static irqreturn_t mgslpc_isr(int irq, void *dev_id)
  1032. {
  1033. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1034. unsigned short isr;
  1035. unsigned char gis, pis;
  1036. int count=0;
  1037. if (debug_level >= DEBUG_LEVEL_ISR)
  1038. printk("mgslpc_isr(%d) entry.\n", irq);
  1039. if (!info)
  1040. return IRQ_NONE;
  1041. if (!(info->p_dev->_locked))
  1042. return IRQ_HANDLED;
  1043. spin_lock(&info->lock);
  1044. while ((gis = read_reg(info, CHA + GIS))) {
  1045. if (debug_level >= DEBUG_LEVEL_ISR)
  1046. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1047. if ((gis & 0x70) || count > 1000) {
  1048. printk("synclink_cs:hardware failed or ejected\n");
  1049. break;
  1050. }
  1051. count++;
  1052. if (gis & (BIT1 + BIT0)) {
  1053. isr = read_reg16(info, CHB + ISR);
  1054. if (isr & IRQ_DCD)
  1055. dcd_change(info);
  1056. if (isr & IRQ_CTS)
  1057. cts_change(info);
  1058. }
  1059. if (gis & (BIT3 + BIT2))
  1060. {
  1061. isr = read_reg16(info, CHA + ISR);
  1062. if (isr & IRQ_TIMER) {
  1063. info->irq_occurred = 1;
  1064. irq_disable(info, CHA, IRQ_TIMER);
  1065. }
  1066. /* receive IRQs */
  1067. if (isr & IRQ_EXITHUNT) {
  1068. info->icount.exithunt++;
  1069. wake_up_interruptible(&info->event_wait_q);
  1070. }
  1071. if (isr & IRQ_BREAK_ON) {
  1072. info->icount.brk++;
  1073. if (info->flags & ASYNC_SAK)
  1074. do_SAK(info->tty);
  1075. }
  1076. if (isr & IRQ_RXTIME) {
  1077. issue_command(info, CHA, CMD_RXFIFO_READ);
  1078. }
  1079. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1080. if (info->params.mode == MGSL_MODE_HDLC)
  1081. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1082. else
  1083. rx_ready_async(info, isr & IRQ_RXEOM);
  1084. }
  1085. /* transmit IRQs */
  1086. if (isr & IRQ_UNDERRUN) {
  1087. if (info->tx_aborting)
  1088. info->icount.txabort++;
  1089. else
  1090. info->icount.txunder++;
  1091. tx_done(info);
  1092. }
  1093. else if (isr & IRQ_ALLSENT) {
  1094. info->icount.txok++;
  1095. tx_done(info);
  1096. }
  1097. else if (isr & IRQ_TXFIFO)
  1098. tx_ready(info);
  1099. }
  1100. if (gis & BIT7) {
  1101. pis = read_reg(info, CHA + PIS);
  1102. if (pis & BIT1)
  1103. dsr_change(info);
  1104. if (pis & BIT2)
  1105. ri_change(info);
  1106. }
  1107. }
  1108. /* Request bottom half processing if there's something
  1109. * for it to do and the bh is not already running
  1110. */
  1111. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1112. if ( debug_level >= DEBUG_LEVEL_ISR )
  1113. printk("%s(%d):%s queueing bh task.\n",
  1114. __FILE__,__LINE__,info->device_name);
  1115. schedule_work(&info->task);
  1116. info->bh_requested = 1;
  1117. }
  1118. spin_unlock(&info->lock);
  1119. if (debug_level >= DEBUG_LEVEL_ISR)
  1120. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1121. __FILE__,__LINE__,irq);
  1122. return IRQ_HANDLED;
  1123. }
  1124. /* Initialize and start device.
  1125. */
  1126. static int startup(MGSLPC_INFO * info)
  1127. {
  1128. int retval = 0;
  1129. if (debug_level >= DEBUG_LEVEL_INFO)
  1130. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1131. if (info->flags & ASYNC_INITIALIZED)
  1132. return 0;
  1133. if (!info->tx_buf) {
  1134. /* allocate a page of memory for a transmit buffer */
  1135. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1136. if (!info->tx_buf) {
  1137. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1138. __FILE__,__LINE__,info->device_name);
  1139. return -ENOMEM;
  1140. }
  1141. }
  1142. info->pending_bh = 0;
  1143. memset(&info->icount, 0, sizeof(info->icount));
  1144. init_timer(&info->tx_timer);
  1145. info->tx_timer.data = (unsigned long)info;
  1146. info->tx_timer.function = tx_timeout;
  1147. /* Allocate and claim adapter resources */
  1148. retval = claim_resources(info);
  1149. /* perform existance check and diagnostics */
  1150. if ( !retval )
  1151. retval = adapter_test(info);
  1152. if ( retval ) {
  1153. if (capable(CAP_SYS_ADMIN) && info->tty)
  1154. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1155. release_resources(info);
  1156. return retval;
  1157. }
  1158. /* program hardware for current parameters */
  1159. mgslpc_change_params(info);
  1160. if (info->tty)
  1161. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1162. info->flags |= ASYNC_INITIALIZED;
  1163. return 0;
  1164. }
  1165. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1166. */
  1167. static void shutdown(MGSLPC_INFO * info)
  1168. {
  1169. unsigned long flags;
  1170. if (!(info->flags & ASYNC_INITIALIZED))
  1171. return;
  1172. if (debug_level >= DEBUG_LEVEL_INFO)
  1173. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1174. __FILE__,__LINE__, info->device_name );
  1175. /* clear status wait queue because status changes */
  1176. /* can't happen after shutting down the hardware */
  1177. wake_up_interruptible(&info->status_event_wait_q);
  1178. wake_up_interruptible(&info->event_wait_q);
  1179. del_timer(&info->tx_timer);
  1180. if (info->tx_buf) {
  1181. free_page((unsigned long) info->tx_buf);
  1182. info->tx_buf = NULL;
  1183. }
  1184. spin_lock_irqsave(&info->lock,flags);
  1185. rx_stop(info);
  1186. tx_stop(info);
  1187. /* TODO:disable interrupts instead of reset to preserve signal states */
  1188. reset_device(info);
  1189. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1190. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1191. set_signals(info);
  1192. }
  1193. spin_unlock_irqrestore(&info->lock,flags);
  1194. release_resources(info);
  1195. if (info->tty)
  1196. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1197. info->flags &= ~ASYNC_INITIALIZED;
  1198. }
  1199. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1200. {
  1201. unsigned long flags;
  1202. spin_lock_irqsave(&info->lock,flags);
  1203. rx_stop(info);
  1204. tx_stop(info);
  1205. info->tx_count = info->tx_put = info->tx_get = 0;
  1206. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1207. hdlc_mode(info);
  1208. else
  1209. async_mode(info);
  1210. set_signals(info);
  1211. info->dcd_chkcount = 0;
  1212. info->cts_chkcount = 0;
  1213. info->ri_chkcount = 0;
  1214. info->dsr_chkcount = 0;
  1215. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1216. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1217. get_signals(info);
  1218. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1219. rx_start(info);
  1220. spin_unlock_irqrestore(&info->lock,flags);
  1221. }
  1222. /* Reconfigure adapter based on new parameters
  1223. */
  1224. static void mgslpc_change_params(MGSLPC_INFO *info)
  1225. {
  1226. unsigned cflag;
  1227. int bits_per_char;
  1228. if (!info->tty || !info->tty->termios)
  1229. return;
  1230. if (debug_level >= DEBUG_LEVEL_INFO)
  1231. printk("%s(%d):mgslpc_change_params(%s)\n",
  1232. __FILE__,__LINE__, info->device_name );
  1233. cflag = info->tty->termios->c_cflag;
  1234. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1235. /* otherwise assert DTR and RTS */
  1236. if (cflag & CBAUD)
  1237. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1238. else
  1239. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1240. /* byte size and parity */
  1241. switch (cflag & CSIZE) {
  1242. case CS5: info->params.data_bits = 5; break;
  1243. case CS6: info->params.data_bits = 6; break;
  1244. case CS7: info->params.data_bits = 7; break;
  1245. case CS8: info->params.data_bits = 8; break;
  1246. default: info->params.data_bits = 7; break;
  1247. }
  1248. if (cflag & CSTOPB)
  1249. info->params.stop_bits = 2;
  1250. else
  1251. info->params.stop_bits = 1;
  1252. info->params.parity = ASYNC_PARITY_NONE;
  1253. if (cflag & PARENB) {
  1254. if (cflag & PARODD)
  1255. info->params.parity = ASYNC_PARITY_ODD;
  1256. else
  1257. info->params.parity = ASYNC_PARITY_EVEN;
  1258. #ifdef CMSPAR
  1259. if (cflag & CMSPAR)
  1260. info->params.parity = ASYNC_PARITY_SPACE;
  1261. #endif
  1262. }
  1263. /* calculate number of jiffies to transmit a full
  1264. * FIFO (32 bytes) at specified data rate
  1265. */
  1266. bits_per_char = info->params.data_bits +
  1267. info->params.stop_bits + 1;
  1268. /* if port data rate is set to 460800 or less then
  1269. * allow tty settings to override, otherwise keep the
  1270. * current data rate.
  1271. */
  1272. if (info->params.data_rate <= 460800) {
  1273. info->params.data_rate = tty_get_baud_rate(info->tty);
  1274. }
  1275. if ( info->params.data_rate ) {
  1276. info->timeout = (32*HZ*bits_per_char) /
  1277. info->params.data_rate;
  1278. }
  1279. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1280. if (cflag & CRTSCTS)
  1281. info->flags |= ASYNC_CTS_FLOW;
  1282. else
  1283. info->flags &= ~ASYNC_CTS_FLOW;
  1284. if (cflag & CLOCAL)
  1285. info->flags &= ~ASYNC_CHECK_CD;
  1286. else
  1287. info->flags |= ASYNC_CHECK_CD;
  1288. /* process tty input control flags */
  1289. info->read_status_mask = 0;
  1290. if (I_INPCK(info->tty))
  1291. info->read_status_mask |= BIT7 | BIT6;
  1292. if (I_IGNPAR(info->tty))
  1293. info->ignore_status_mask |= BIT7 | BIT6;
  1294. mgslpc_program_hw(info);
  1295. }
  1296. /* Add a character to the transmit buffer
  1297. */
  1298. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1299. {
  1300. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1301. unsigned long flags;
  1302. if (debug_level >= DEBUG_LEVEL_INFO) {
  1303. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1304. __FILE__,__LINE__,ch,info->device_name);
  1305. }
  1306. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1307. return;
  1308. if (!info->tx_buf)
  1309. return;
  1310. spin_lock_irqsave(&info->lock,flags);
  1311. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1312. if (info->tx_count < TXBUFSIZE - 1) {
  1313. info->tx_buf[info->tx_put++] = ch;
  1314. info->tx_put &= TXBUFSIZE-1;
  1315. info->tx_count++;
  1316. }
  1317. }
  1318. spin_unlock_irqrestore(&info->lock,flags);
  1319. }
  1320. /* Enable transmitter so remaining characters in the
  1321. * transmit buffer are sent.
  1322. */
  1323. static void mgslpc_flush_chars(struct tty_struct *tty)
  1324. {
  1325. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1326. unsigned long flags;
  1327. if (debug_level >= DEBUG_LEVEL_INFO)
  1328. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1329. __FILE__,__LINE__,info->device_name,info->tx_count);
  1330. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1331. return;
  1332. if (info->tx_count <= 0 || tty->stopped ||
  1333. tty->hw_stopped || !info->tx_buf)
  1334. return;
  1335. if (debug_level >= DEBUG_LEVEL_INFO)
  1336. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1337. __FILE__,__LINE__,info->device_name);
  1338. spin_lock_irqsave(&info->lock,flags);
  1339. if (!info->tx_active)
  1340. tx_start(info);
  1341. spin_unlock_irqrestore(&info->lock,flags);
  1342. }
  1343. /* Send a block of data
  1344. *
  1345. * Arguments:
  1346. *
  1347. * tty pointer to tty information structure
  1348. * buf pointer to buffer containing send data
  1349. * count size of send data in bytes
  1350. *
  1351. * Returns: number of characters written
  1352. */
  1353. static int mgslpc_write(struct tty_struct * tty,
  1354. const unsigned char *buf, int count)
  1355. {
  1356. int c, ret = 0;
  1357. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1358. unsigned long flags;
  1359. if (debug_level >= DEBUG_LEVEL_INFO)
  1360. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1361. __FILE__,__LINE__,info->device_name,count);
  1362. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1363. !info->tx_buf)
  1364. goto cleanup;
  1365. if (info->params.mode == MGSL_MODE_HDLC) {
  1366. if (count > TXBUFSIZE) {
  1367. ret = -EIO;
  1368. goto cleanup;
  1369. }
  1370. if (info->tx_active)
  1371. goto cleanup;
  1372. else if (info->tx_count)
  1373. goto start;
  1374. }
  1375. for (;;) {
  1376. c = min(count,
  1377. min(TXBUFSIZE - info->tx_count - 1,
  1378. TXBUFSIZE - info->tx_put));
  1379. if (c <= 0)
  1380. break;
  1381. memcpy(info->tx_buf + info->tx_put, buf, c);
  1382. spin_lock_irqsave(&info->lock,flags);
  1383. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1384. info->tx_count += c;
  1385. spin_unlock_irqrestore(&info->lock,flags);
  1386. buf += c;
  1387. count -= c;
  1388. ret += c;
  1389. }
  1390. start:
  1391. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1392. spin_lock_irqsave(&info->lock,flags);
  1393. if (!info->tx_active)
  1394. tx_start(info);
  1395. spin_unlock_irqrestore(&info->lock,flags);
  1396. }
  1397. cleanup:
  1398. if (debug_level >= DEBUG_LEVEL_INFO)
  1399. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1400. __FILE__,__LINE__,info->device_name,ret);
  1401. return ret;
  1402. }
  1403. /* Return the count of free bytes in transmit buffer
  1404. */
  1405. static int mgslpc_write_room(struct tty_struct *tty)
  1406. {
  1407. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1408. int ret;
  1409. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1410. return 0;
  1411. if (info->params.mode == MGSL_MODE_HDLC) {
  1412. /* HDLC (frame oriented) mode */
  1413. if (info->tx_active)
  1414. return 0;
  1415. else
  1416. return HDLC_MAX_FRAME_SIZE;
  1417. } else {
  1418. ret = TXBUFSIZE - info->tx_count - 1;
  1419. if (ret < 0)
  1420. ret = 0;
  1421. }
  1422. if (debug_level >= DEBUG_LEVEL_INFO)
  1423. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1424. __FILE__,__LINE__, info->device_name, ret);
  1425. return ret;
  1426. }
  1427. /* Return the count of bytes in transmit buffer
  1428. */
  1429. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1430. {
  1431. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1432. int rc;
  1433. if (debug_level >= DEBUG_LEVEL_INFO)
  1434. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1435. __FILE__,__LINE__, info->device_name );
  1436. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1437. return 0;
  1438. if (info->params.mode == MGSL_MODE_HDLC)
  1439. rc = info->tx_active ? info->max_frame_size : 0;
  1440. else
  1441. rc = info->tx_count;
  1442. if (debug_level >= DEBUG_LEVEL_INFO)
  1443. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1444. __FILE__,__LINE__, info->device_name, rc);
  1445. return rc;
  1446. }
  1447. /* Discard all data in the send buffer
  1448. */
  1449. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1450. {
  1451. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1452. unsigned long flags;
  1453. if (debug_level >= DEBUG_LEVEL_INFO)
  1454. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1455. __FILE__,__LINE__, info->device_name );
  1456. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1457. return;
  1458. spin_lock_irqsave(&info->lock,flags);
  1459. info->tx_count = info->tx_put = info->tx_get = 0;
  1460. del_timer(&info->tx_timer);
  1461. spin_unlock_irqrestore(&info->lock,flags);
  1462. wake_up_interruptible(&tty->write_wait);
  1463. tty_wakeup(tty);
  1464. }
  1465. /* Send a high-priority XON/XOFF character
  1466. */
  1467. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1468. {
  1469. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1470. unsigned long flags;
  1471. if (debug_level >= DEBUG_LEVEL_INFO)
  1472. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1473. __FILE__,__LINE__, info->device_name, ch );
  1474. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1475. return;
  1476. info->x_char = ch;
  1477. if (ch) {
  1478. spin_lock_irqsave(&info->lock,flags);
  1479. if (!info->tx_enabled)
  1480. tx_start(info);
  1481. spin_unlock_irqrestore(&info->lock,flags);
  1482. }
  1483. }
  1484. /* Signal remote device to throttle send data (our receive data)
  1485. */
  1486. static void mgslpc_throttle(struct tty_struct * tty)
  1487. {
  1488. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1489. unsigned long flags;
  1490. if (debug_level >= DEBUG_LEVEL_INFO)
  1491. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1492. __FILE__,__LINE__, info->device_name );
  1493. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1494. return;
  1495. if (I_IXOFF(tty))
  1496. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1497. if (tty->termios->c_cflag & CRTSCTS) {
  1498. spin_lock_irqsave(&info->lock,flags);
  1499. info->serial_signals &= ~SerialSignal_RTS;
  1500. set_signals(info);
  1501. spin_unlock_irqrestore(&info->lock,flags);
  1502. }
  1503. }
  1504. /* Signal remote device to stop throttling send data (our receive data)
  1505. */
  1506. static void mgslpc_unthrottle(struct tty_struct * tty)
  1507. {
  1508. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1509. unsigned long flags;
  1510. if (debug_level >= DEBUG_LEVEL_INFO)
  1511. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1512. __FILE__,__LINE__, info->device_name );
  1513. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1514. return;
  1515. if (I_IXOFF(tty)) {
  1516. if (info->x_char)
  1517. info->x_char = 0;
  1518. else
  1519. mgslpc_send_xchar(tty, START_CHAR(tty));
  1520. }
  1521. if (tty->termios->c_cflag & CRTSCTS) {
  1522. spin_lock_irqsave(&info->lock,flags);
  1523. info->serial_signals |= SerialSignal_RTS;
  1524. set_signals(info);
  1525. spin_unlock_irqrestore(&info->lock,flags);
  1526. }
  1527. }
  1528. /* get the current serial statistics
  1529. */
  1530. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1531. {
  1532. int err;
  1533. if (debug_level >= DEBUG_LEVEL_INFO)
  1534. printk("get_params(%s)\n", info->device_name);
  1535. if (!user_icount) {
  1536. memset(&info->icount, 0, sizeof(info->icount));
  1537. } else {
  1538. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1539. if (err)
  1540. return -EFAULT;
  1541. }
  1542. return 0;
  1543. }
  1544. /* get the current serial parameters
  1545. */
  1546. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1547. {
  1548. int err;
  1549. if (debug_level >= DEBUG_LEVEL_INFO)
  1550. printk("get_params(%s)\n", info->device_name);
  1551. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1552. if (err)
  1553. return -EFAULT;
  1554. return 0;
  1555. }
  1556. /* set the serial parameters
  1557. *
  1558. * Arguments:
  1559. *
  1560. * info pointer to device instance data
  1561. * new_params user buffer containing new serial params
  1562. *
  1563. * Returns: 0 if success, otherwise error code
  1564. */
  1565. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1566. {
  1567. unsigned long flags;
  1568. MGSL_PARAMS tmp_params;
  1569. int err;
  1570. if (debug_level >= DEBUG_LEVEL_INFO)
  1571. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1572. info->device_name );
  1573. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1574. if (err) {
  1575. if ( debug_level >= DEBUG_LEVEL_INFO )
  1576. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1577. __FILE__,__LINE__,info->device_name);
  1578. return -EFAULT;
  1579. }
  1580. spin_lock_irqsave(&info->lock,flags);
  1581. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1582. spin_unlock_irqrestore(&info->lock,flags);
  1583. mgslpc_change_params(info);
  1584. return 0;
  1585. }
  1586. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1587. {
  1588. int err;
  1589. if (debug_level >= DEBUG_LEVEL_INFO)
  1590. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1591. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1592. if (err)
  1593. return -EFAULT;
  1594. return 0;
  1595. }
  1596. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1597. {
  1598. unsigned long flags;
  1599. if (debug_level >= DEBUG_LEVEL_INFO)
  1600. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1601. spin_lock_irqsave(&info->lock,flags);
  1602. info->idle_mode = idle_mode;
  1603. tx_set_idle(info);
  1604. spin_unlock_irqrestore(&info->lock,flags);
  1605. return 0;
  1606. }
  1607. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1608. {
  1609. int err;
  1610. if (debug_level >= DEBUG_LEVEL_INFO)
  1611. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1612. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1613. if (err)
  1614. return -EFAULT;
  1615. return 0;
  1616. }
  1617. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1618. {
  1619. unsigned long flags;
  1620. unsigned char val;
  1621. if (debug_level >= DEBUG_LEVEL_INFO)
  1622. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1623. spin_lock_irqsave(&info->lock,flags);
  1624. info->if_mode = if_mode;
  1625. val = read_reg(info, PVR) & 0x0f;
  1626. switch (info->if_mode)
  1627. {
  1628. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1629. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1630. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1631. }
  1632. write_reg(info, PVR, val);
  1633. spin_unlock_irqrestore(&info->lock,flags);
  1634. return 0;
  1635. }
  1636. static int set_txenable(MGSLPC_INFO * info, int enable)
  1637. {
  1638. unsigned long flags;
  1639. if (debug_level >= DEBUG_LEVEL_INFO)
  1640. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1641. spin_lock_irqsave(&info->lock,flags);
  1642. if (enable) {
  1643. if (!info->tx_enabled)
  1644. tx_start(info);
  1645. } else {
  1646. if (info->tx_enabled)
  1647. tx_stop(info);
  1648. }
  1649. spin_unlock_irqrestore(&info->lock,flags);
  1650. return 0;
  1651. }
  1652. static int tx_abort(MGSLPC_INFO * info)
  1653. {
  1654. unsigned long flags;
  1655. if (debug_level >= DEBUG_LEVEL_INFO)
  1656. printk("tx_abort(%s)\n", info->device_name);
  1657. spin_lock_irqsave(&info->lock,flags);
  1658. if (info->tx_active && info->tx_count &&
  1659. info->params.mode == MGSL_MODE_HDLC) {
  1660. /* clear data count so FIFO is not filled on next IRQ.
  1661. * This results in underrun and abort transmission.
  1662. */
  1663. info->tx_count = info->tx_put = info->tx_get = 0;
  1664. info->tx_aborting = TRUE;
  1665. }
  1666. spin_unlock_irqrestore(&info->lock,flags);
  1667. return 0;
  1668. }
  1669. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1670. {
  1671. unsigned long flags;
  1672. if (debug_level >= DEBUG_LEVEL_INFO)
  1673. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1674. spin_lock_irqsave(&info->lock,flags);
  1675. if (enable) {
  1676. if (!info->rx_enabled)
  1677. rx_start(info);
  1678. } else {
  1679. if (info->rx_enabled)
  1680. rx_stop(info);
  1681. }
  1682. spin_unlock_irqrestore(&info->lock,flags);
  1683. return 0;
  1684. }
  1685. /* wait for specified event to occur
  1686. *
  1687. * Arguments: info pointer to device instance data
  1688. * mask pointer to bitmask of events to wait for
  1689. * Return Value: 0 if successful and bit mask updated with
  1690. * of events triggerred,
  1691. * otherwise error code
  1692. */
  1693. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1694. {
  1695. unsigned long flags;
  1696. int s;
  1697. int rc=0;
  1698. struct mgsl_icount cprev, cnow;
  1699. int events;
  1700. int mask;
  1701. struct _input_signal_events oldsigs, newsigs;
  1702. DECLARE_WAITQUEUE(wait, current);
  1703. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1704. if (rc)
  1705. return -EFAULT;
  1706. if (debug_level >= DEBUG_LEVEL_INFO)
  1707. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1708. spin_lock_irqsave(&info->lock,flags);
  1709. /* return immediately if state matches requested events */
  1710. get_signals(info);
  1711. s = info->serial_signals;
  1712. events = mask &
  1713. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1714. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1715. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1716. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1717. if (events) {
  1718. spin_unlock_irqrestore(&info->lock,flags);
  1719. goto exit;
  1720. }
  1721. /* save current irq counts */
  1722. cprev = info->icount;
  1723. oldsigs = info->input_signal_events;
  1724. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1725. (mask & MgslEvent_ExitHuntMode))
  1726. irq_enable(info, CHA, IRQ_EXITHUNT);
  1727. set_current_state(TASK_INTERRUPTIBLE);
  1728. add_wait_queue(&info->event_wait_q, &wait);
  1729. spin_unlock_irqrestore(&info->lock,flags);
  1730. for(;;) {
  1731. schedule();
  1732. if (signal_pending(current)) {
  1733. rc = -ERESTARTSYS;
  1734. break;
  1735. }
  1736. /* get current irq counts */
  1737. spin_lock_irqsave(&info->lock,flags);
  1738. cnow = info->icount;
  1739. newsigs = info->input_signal_events;
  1740. set_current_state(TASK_INTERRUPTIBLE);
  1741. spin_unlock_irqrestore(&info->lock,flags);
  1742. /* if no change, wait aborted for some reason */
  1743. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1744. newsigs.dsr_down == oldsigs.dsr_down &&
  1745. newsigs.dcd_up == oldsigs.dcd_up &&
  1746. newsigs.dcd_down == oldsigs.dcd_down &&
  1747. newsigs.cts_up == oldsigs.cts_up &&
  1748. newsigs.cts_down == oldsigs.cts_down &&
  1749. newsigs.ri_up == oldsigs.ri_up &&
  1750. newsigs.ri_down == oldsigs.ri_down &&
  1751. cnow.exithunt == cprev.exithunt &&
  1752. cnow.rxidle == cprev.rxidle) {
  1753. rc = -EIO;
  1754. break;
  1755. }
  1756. events = mask &
  1757. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1758. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1759. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1760. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1761. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1762. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1763. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1764. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1765. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1766. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1767. if (events)
  1768. break;
  1769. cprev = cnow;
  1770. oldsigs = newsigs;
  1771. }
  1772. remove_wait_queue(&info->event_wait_q, &wait);
  1773. set_current_state(TASK_RUNNING);
  1774. if (mask & MgslEvent_ExitHuntMode) {
  1775. spin_lock_irqsave(&info->lock,flags);
  1776. if (!waitqueue_active(&info->event_wait_q))
  1777. irq_disable(info, CHA, IRQ_EXITHUNT);
  1778. spin_unlock_irqrestore(&info->lock,flags);
  1779. }
  1780. exit:
  1781. if (rc == 0)
  1782. PUT_USER(rc, events, mask_ptr);
  1783. return rc;
  1784. }
  1785. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1786. {
  1787. unsigned long flags;
  1788. int rc;
  1789. struct mgsl_icount cprev, cnow;
  1790. DECLARE_WAITQUEUE(wait, current);
  1791. /* save current irq counts */
  1792. spin_lock_irqsave(&info->lock,flags);
  1793. cprev = info->icount;
  1794. add_wait_queue(&info->status_event_wait_q, &wait);
  1795. set_current_state(TASK_INTERRUPTIBLE);
  1796. spin_unlock_irqrestore(&info->lock,flags);
  1797. for(;;) {
  1798. schedule();
  1799. if (signal_pending(current)) {
  1800. rc = -ERESTARTSYS;
  1801. break;
  1802. }
  1803. /* get new irq counts */
  1804. spin_lock_irqsave(&info->lock,flags);
  1805. cnow = info->icount;
  1806. set_current_state(TASK_INTERRUPTIBLE);
  1807. spin_unlock_irqrestore(&info->lock,flags);
  1808. /* if no change, wait aborted for some reason */
  1809. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1810. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1811. rc = -EIO;
  1812. break;
  1813. }
  1814. /* check for change in caller specified modem input */
  1815. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1816. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1817. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1818. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1819. rc = 0;
  1820. break;
  1821. }
  1822. cprev = cnow;
  1823. }
  1824. remove_wait_queue(&info->status_event_wait_q, &wait);
  1825. set_current_state(TASK_RUNNING);
  1826. return rc;
  1827. }
  1828. /* return the state of the serial control and status signals
  1829. */
  1830. static int tiocmget(struct tty_struct *tty, struct file *file)
  1831. {
  1832. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1833. unsigned int result;
  1834. unsigned long flags;
  1835. spin_lock_irqsave(&info->lock,flags);
  1836. get_signals(info);
  1837. spin_unlock_irqrestore(&info->lock,flags);
  1838. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1839. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1840. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1841. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1842. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1843. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1844. if (debug_level >= DEBUG_LEVEL_INFO)
  1845. printk("%s(%d):%s tiocmget() value=%08X\n",
  1846. __FILE__,__LINE__, info->device_name, result );
  1847. return result;
  1848. }
  1849. /* set modem control signals (DTR/RTS)
  1850. */
  1851. static int tiocmset(struct tty_struct *tty, struct file *file,
  1852. unsigned int set, unsigned int clear)
  1853. {
  1854. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1855. unsigned long flags;
  1856. if (debug_level >= DEBUG_LEVEL_INFO)
  1857. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1858. __FILE__,__LINE__,info->device_name, set, clear);
  1859. if (set & TIOCM_RTS)
  1860. info->serial_signals |= SerialSignal_RTS;
  1861. if (set & TIOCM_DTR)
  1862. info->serial_signals |= SerialSignal_DTR;
  1863. if (clear & TIOCM_RTS)
  1864. info->serial_signals &= ~SerialSignal_RTS;
  1865. if (clear & TIOCM_DTR)
  1866. info->serial_signals &= ~SerialSignal_DTR;
  1867. spin_lock_irqsave(&info->lock,flags);
  1868. set_signals(info);
  1869. spin_unlock_irqrestore(&info->lock,flags);
  1870. return 0;
  1871. }
  1872. /* Set or clear transmit break condition
  1873. *
  1874. * Arguments: tty pointer to tty instance data
  1875. * break_state -1=set break condition, 0=clear
  1876. */
  1877. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1878. {
  1879. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1880. unsigned long flags;
  1881. if (debug_level >= DEBUG_LEVEL_INFO)
  1882. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1883. __FILE__,__LINE__, info->device_name, break_state);
  1884. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1885. return;
  1886. spin_lock_irqsave(&info->lock,flags);
  1887. if (break_state == -1)
  1888. set_reg_bits(info, CHA+DAFO, BIT6);
  1889. else
  1890. clear_reg_bits(info, CHA+DAFO, BIT6);
  1891. spin_unlock_irqrestore(&info->lock,flags);
  1892. }
  1893. /* Service an IOCTL request
  1894. *
  1895. * Arguments:
  1896. *
  1897. * tty pointer to tty instance data
  1898. * file pointer to associated file object for device
  1899. * cmd IOCTL command code
  1900. * arg command argument/context
  1901. *
  1902. * Return Value: 0 if success, otherwise error code
  1903. */
  1904. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1905. unsigned int cmd, unsigned long arg)
  1906. {
  1907. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1908. if (debug_level >= DEBUG_LEVEL_INFO)
  1909. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1910. info->device_name, cmd );
  1911. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1912. return -ENODEV;
  1913. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1914. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1915. if (tty->flags & (1 << TTY_IO_ERROR))
  1916. return -EIO;
  1917. }
  1918. return ioctl_common(info, cmd, arg);
  1919. }
  1920. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1921. {
  1922. int error;
  1923. struct mgsl_icount cnow; /* kernel counter temps */
  1924. struct serial_icounter_struct __user *p_cuser; /* user space */
  1925. void __user *argp = (void __user *)arg;
  1926. unsigned long flags;
  1927. switch (cmd) {
  1928. case MGSL_IOCGPARAMS:
  1929. return get_params(info, argp);
  1930. case MGSL_IOCSPARAMS:
  1931. return set_params(info, argp);
  1932. case MGSL_IOCGTXIDLE:
  1933. return get_txidle(info, argp);
  1934. case MGSL_IOCSTXIDLE:
  1935. return set_txidle(info, (int)arg);
  1936. case MGSL_IOCGIF:
  1937. return get_interface(info, argp);
  1938. case MGSL_IOCSIF:
  1939. return set_interface(info,(int)arg);
  1940. case MGSL_IOCTXENABLE:
  1941. return set_txenable(info,(int)arg);
  1942. case MGSL_IOCRXENABLE:
  1943. return set_rxenable(info,(int)arg);
  1944. case MGSL_IOCTXABORT:
  1945. return tx_abort(info);
  1946. case MGSL_IOCGSTATS:
  1947. return get_stats(info, argp);
  1948. case MGSL_IOCWAITEVENT:
  1949. return wait_events(info, argp);
  1950. case TIOCMIWAIT:
  1951. return modem_input_wait(info,(int)arg);
  1952. case TIOCGICOUNT:
  1953. spin_lock_irqsave(&info->lock,flags);
  1954. cnow = info->icount;
  1955. spin_unlock_irqrestore(&info->lock,flags);
  1956. p_cuser = argp;
  1957. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1958. if (error) return error;
  1959. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1960. if (error) return error;
  1961. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1962. if (error) return error;
  1963. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1964. if (error) return error;
  1965. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1966. if (error) return error;
  1967. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1968. if (error) return error;
  1969. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1970. if (error) return error;
  1971. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1972. if (error) return error;
  1973. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1974. if (error) return error;
  1975. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1976. if (error) return error;
  1977. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1978. if (error) return error;
  1979. return 0;
  1980. default:
  1981. return -ENOIOCTLCMD;
  1982. }
  1983. return 0;
  1984. }
  1985. /* Set new termios settings
  1986. *
  1987. * Arguments:
  1988. *
  1989. * tty pointer to tty structure
  1990. * termios pointer to buffer to hold returned old termios
  1991. */
  1992. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1993. {
  1994. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1995. unsigned long flags;
  1996. if (debug_level >= DEBUG_LEVEL_INFO)
  1997. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1998. tty->driver->name );
  1999. /* just return if nothing has changed */
  2000. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2001. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2002. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2003. return;
  2004. mgslpc_change_params(info);
  2005. /* Handle transition to B0 status */
  2006. if (old_termios->c_cflag & CBAUD &&
  2007. !(tty->termios->c_cflag & CBAUD)) {
  2008. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2009. spin_lock_irqsave(&info->lock,flags);
  2010. set_signals(info);
  2011. spin_unlock_irqrestore(&info->lock,flags);
  2012. }
  2013. /* Handle transition away from B0 status */
  2014. if (!(old_termios->c_cflag & CBAUD) &&
  2015. tty->termios->c_cflag & CBAUD) {
  2016. info->serial_signals |= SerialSignal_DTR;
  2017. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2018. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2019. info->serial_signals |= SerialSignal_RTS;
  2020. }
  2021. spin_lock_irqsave(&info->lock,flags);
  2022. set_signals(info);
  2023. spin_unlock_irqrestore(&info->lock,flags);
  2024. }
  2025. /* Handle turning off CRTSCTS */
  2026. if (old_termios->c_cflag & CRTSCTS &&
  2027. !(tty->termios->c_cflag & CRTSCTS)) {
  2028. tty->hw_stopped = 0;
  2029. tx_release(tty);
  2030. }
  2031. }
  2032. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2033. {
  2034. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2035. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2036. return;
  2037. if (debug_level >= DEBUG_LEVEL_INFO)
  2038. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2039. __FILE__,__LINE__, info->device_name, info->count);
  2040. if (!info->count)
  2041. return;
  2042. if (tty_hung_up_p(filp))
  2043. goto cleanup;
  2044. if ((tty->count == 1) && (info->count != 1)) {
  2045. /*
  2046. * tty->count is 1 and the tty structure will be freed.
  2047. * info->count should be one in this case.
  2048. * if it's not, correct it so that the port is shutdown.
  2049. */
  2050. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2051. "info->count is %d\n", info->count);
  2052. info->count = 1;
  2053. }
  2054. info->count--;
  2055. /* if at least one open remaining, leave hardware active */
  2056. if (info->count)
  2057. goto cleanup;
  2058. info->flags |= ASYNC_CLOSING;
  2059. /* set tty->closing to notify line discipline to
  2060. * only process XON/XOFF characters. Only the N_TTY
  2061. * discipline appears to use this (ppp does not).
  2062. */
  2063. tty->closing = 1;
  2064. /* wait for transmit data to clear all layers */
  2065. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2066. if (debug_level >= DEBUG_LEVEL_INFO)
  2067. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2068. __FILE__,__LINE__, info->device_name );
  2069. tty_wait_until_sent(tty, info->closing_wait);
  2070. }
  2071. if (info->flags & ASYNC_INITIALIZED)
  2072. mgslpc_wait_until_sent(tty, info->timeout);
  2073. if (tty->driver->flush_buffer)
  2074. tty->driver->flush_buffer(tty);
  2075. ldisc_flush_buffer(tty);
  2076. shutdown(info);
  2077. tty->closing = 0;
  2078. info->tty = NULL;
  2079. if (info->blocked_open) {
  2080. if (info->close_delay) {
  2081. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2082. }
  2083. wake_up_interruptible(&info->open_wait);
  2084. }
  2085. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2086. wake_up_interruptible(&info->close_wait);
  2087. cleanup:
  2088. if (debug_level >= DEBUG_LEVEL_INFO)
  2089. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2090. tty->driver->name, info->count);
  2091. }
  2092. /* Wait until the transmitter is empty.
  2093. */
  2094. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2095. {
  2096. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2097. unsigned long orig_jiffies, char_time;
  2098. if (!info )
  2099. return;
  2100. if (debug_level >= DEBUG_LEVEL_INFO)
  2101. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2102. __FILE__,__LINE__, info->device_name );
  2103. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2104. return;
  2105. if (!(info->flags & ASYNC_INITIALIZED))
  2106. goto exit;
  2107. orig_jiffies = jiffies;
  2108. /* Set check interval to 1/5 of estimated time to
  2109. * send a character, and make it at least 1. The check
  2110. * interval should also be less than the timeout.
  2111. * Note: use tight timings here to satisfy the NIST-PCTS.
  2112. */
  2113. if ( info->params.data_rate ) {
  2114. char_time = info->timeout/(32 * 5);
  2115. if (!char_time)
  2116. char_time++;
  2117. } else
  2118. char_time = 1;
  2119. if (timeout)
  2120. char_time = min_t(unsigned long, char_time, timeout);
  2121. if (info->params.mode == MGSL_MODE_HDLC) {
  2122. while (info->tx_active) {
  2123. msleep_interruptible(jiffies_to_msecs(char_time));
  2124. if (signal_pending(current))
  2125. break;
  2126. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2127. break;
  2128. }
  2129. } else {
  2130. while ((info->tx_count || info->tx_active) &&
  2131. info->tx_enabled) {
  2132. msleep_interruptible(jiffies_to_msecs(char_time));
  2133. if (signal_pending(current))
  2134. break;
  2135. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2136. break;
  2137. }
  2138. }
  2139. exit:
  2140. if (debug_level >= DEBUG_LEVEL_INFO)
  2141. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2142. __FILE__,__LINE__, info->device_name );
  2143. }
  2144. /* Called by tty_hangup() when a hangup is signaled.
  2145. * This is the same as closing all open files for the port.
  2146. */
  2147. static void mgslpc_hangup(struct tty_struct *tty)
  2148. {
  2149. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2150. if (debug_level >= DEBUG_LEVEL_INFO)
  2151. printk("%s(%d):mgslpc_hangup(%s)\n",
  2152. __FILE__,__LINE__, info->device_name );
  2153. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2154. return;
  2155. mgslpc_flush_buffer(tty);
  2156. shutdown(info);
  2157. info->count = 0;
  2158. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2159. info->tty = NULL;
  2160. wake_up_interruptible(&info->open_wait);
  2161. }
  2162. /* Block the current process until the specified port
  2163. * is ready to be opened.
  2164. */
  2165. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2166. MGSLPC_INFO *info)
  2167. {
  2168. DECLARE_WAITQUEUE(wait, current);
  2169. int retval;
  2170. int do_clocal = 0, extra_count = 0;
  2171. unsigned long flags;
  2172. if (debug_level >= DEBUG_LEVEL_INFO)
  2173. printk("%s(%d):block_til_ready on %s\n",
  2174. __FILE__,__LINE__, tty->driver->name );
  2175. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2176. /* nonblock mode is set or port is not enabled */
  2177. /* just verify that callout device is not active */
  2178. info->flags |= ASYNC_NORMAL_ACTIVE;
  2179. return 0;
  2180. }
  2181. if (tty->termios->c_cflag & CLOCAL)
  2182. do_clocal = 1;
  2183. /* Wait for carrier detect and the line to become
  2184. * free (i.e., not in use by the callout). While we are in
  2185. * this loop, info->count is dropped by one, so that
  2186. * mgslpc_close() knows when to free things. We restore it upon
  2187. * exit, either normal or abnormal.
  2188. */
  2189. retval = 0;
  2190. add_wait_queue(&info->open_wait, &wait);
  2191. if (debug_level >= DEBUG_LEVEL_INFO)
  2192. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2193. __FILE__,__LINE__, tty->driver->name, info->count );
  2194. spin_lock_irqsave(&info->lock, flags);
  2195. if (!tty_hung_up_p(filp)) {
  2196. extra_count = 1;
  2197. info->count--;
  2198. }
  2199. spin_unlock_irqrestore(&info->lock, flags);
  2200. info->blocked_open++;
  2201. while (1) {
  2202. if ((tty->termios->c_cflag & CBAUD)) {
  2203. spin_lock_irqsave(&info->lock,flags);
  2204. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2205. set_signals(info);
  2206. spin_unlock_irqrestore(&info->lock,flags);
  2207. }
  2208. set_current_state(TASK_INTERRUPTIBLE);
  2209. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2210. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2211. -EAGAIN : -ERESTARTSYS;
  2212. break;
  2213. }
  2214. spin_lock_irqsave(&info->lock,flags);
  2215. get_signals(info);
  2216. spin_unlock_irqrestore(&info->lock,flags);
  2217. if (!(info->flags & ASYNC_CLOSING) &&
  2218. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2219. break;
  2220. }
  2221. if (signal_pending(current)) {
  2222. retval = -ERESTARTSYS;
  2223. break;
  2224. }
  2225. if (debug_level >= DEBUG_LEVEL_INFO)
  2226. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2227. __FILE__,__LINE__, tty->driver->name, info->count );
  2228. schedule();
  2229. }
  2230. set_current_state(TASK_RUNNING);
  2231. remove_wait_queue(&info->open_wait, &wait);
  2232. if (extra_count)
  2233. info->count++;
  2234. info->blocked_open--;
  2235. if (debug_level >= DEBUG_LEVEL_INFO)
  2236. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2237. __FILE__,__LINE__, tty->driver->name, info->count );
  2238. if (!retval)
  2239. info->flags |= ASYNC_NORMAL_ACTIVE;
  2240. return retval;
  2241. }
  2242. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2243. {
  2244. MGSLPC_INFO *info;
  2245. int retval, line;
  2246. unsigned long flags;
  2247. /* verify range of specified line number */
  2248. line = tty->index;
  2249. if ((line < 0) || (line >= mgslpc_device_count)) {
  2250. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2251. __FILE__,__LINE__,line);
  2252. return -ENODEV;
  2253. }
  2254. /* find the info structure for the specified line */
  2255. info = mgslpc_device_list;
  2256. while(info && info->line != line)
  2257. info = info->next_device;
  2258. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2259. return -ENODEV;
  2260. tty->driver_data = info;
  2261. info->tty = tty;
  2262. if (debug_level >= DEBUG_LEVEL_INFO)
  2263. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2264. __FILE__,__LINE__,tty->driver->name, info->count);
  2265. /* If port is closing, signal caller to try again */
  2266. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2267. if (info->flags & ASYNC_CLOSING)
  2268. interruptible_sleep_on(&info->close_wait);
  2269. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2270. -EAGAIN : -ERESTARTSYS);
  2271. goto cleanup;
  2272. }
  2273. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2274. spin_lock_irqsave(&info->netlock, flags);
  2275. if (info->netcount) {
  2276. retval = -EBUSY;
  2277. spin_unlock_irqrestore(&info->netlock, flags);
  2278. goto cleanup;
  2279. }
  2280. info->count++;
  2281. spin_unlock_irqrestore(&info->netlock, flags);
  2282. if (info->count == 1) {
  2283. /* 1st open on this device, init hardware */
  2284. retval = startup(info);
  2285. if (retval < 0)
  2286. goto cleanup;
  2287. }
  2288. retval = block_til_ready(tty, filp, info);
  2289. if (retval) {
  2290. if (debug_level >= DEBUG_LEVEL_INFO)
  2291. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2292. __FILE__,__LINE__, info->device_name, retval);
  2293. goto cleanup;
  2294. }
  2295. if (debug_level >= DEBUG_LEVEL_INFO)
  2296. printk("%s(%d):mgslpc_open(%s) success\n",
  2297. __FILE__,__LINE__, info->device_name);
  2298. retval = 0;
  2299. cleanup:
  2300. if (retval) {
  2301. if (tty->count == 1)
  2302. info->tty = NULL; /* tty layer will release tty struct */
  2303. if(info->count)
  2304. info->count--;
  2305. }
  2306. return retval;
  2307. }
  2308. /*
  2309. * /proc fs routines....
  2310. */
  2311. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2312. {
  2313. char stat_buf[30];
  2314. int ret;
  2315. unsigned long flags;
  2316. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2317. info->device_name, info->io_base, info->irq_level);
  2318. /* output current serial signal states */
  2319. spin_lock_irqsave(&info->lock,flags);
  2320. get_signals(info);
  2321. spin_unlock_irqrestore(&info->lock,flags);
  2322. stat_buf[0] = 0;
  2323. stat_buf[1] = 0;
  2324. if (info->serial_signals & SerialSignal_RTS)
  2325. strcat(stat_buf, "|RTS");
  2326. if (info->serial_signals & SerialSignal_CTS)
  2327. strcat(stat_buf, "|CTS");
  2328. if (info->serial_signals & SerialSignal_DTR)
  2329. strcat(stat_buf, "|DTR");
  2330. if (info->serial_signals & SerialSignal_DSR)
  2331. strcat(stat_buf, "|DSR");
  2332. if (info->serial_signals & SerialSignal_DCD)
  2333. strcat(stat_buf, "|CD");
  2334. if (info->serial_signals & SerialSignal_RI)
  2335. strcat(stat_buf, "|RI");
  2336. if (info->params.mode == MGSL_MODE_HDLC) {
  2337. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2338. info->icount.txok, info->icount.rxok);
  2339. if (info->icount.txunder)
  2340. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2341. if (info->icount.txabort)
  2342. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2343. if (info->icount.rxshort)
  2344. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2345. if (info->icount.rxlong)
  2346. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2347. if (info->icount.rxover)
  2348. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2349. if (info->icount.rxcrc)
  2350. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2351. } else {
  2352. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2353. info->icount.tx, info->icount.rx);
  2354. if (info->icount.frame)
  2355. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2356. if (info->icount.parity)
  2357. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2358. if (info->icount.brk)
  2359. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2360. if (info->icount.overrun)
  2361. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2362. }
  2363. /* Append serial signal status to end */
  2364. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2365. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2366. info->tx_active,info->bh_requested,info->bh_running,
  2367. info->pending_bh);
  2368. return ret;
  2369. }
  2370. /* Called to print information about devices
  2371. */
  2372. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2373. int *eof, void *data)
  2374. {
  2375. int len = 0, l;
  2376. off_t begin = 0;
  2377. MGSLPC_INFO *info;
  2378. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2379. info = mgslpc_device_list;
  2380. while( info ) {
  2381. l = line_info(page + len, info);
  2382. len += l;
  2383. if (len+begin > off+count)
  2384. goto done;
  2385. if (len+begin < off) {
  2386. begin += len;
  2387. len = 0;
  2388. }
  2389. info = info->next_device;
  2390. }
  2391. *eof = 1;
  2392. done:
  2393. if (off >= len+begin)
  2394. return 0;
  2395. *start = page + (off-begin);
  2396. return ((count < begin+len-off) ? count : begin+len-off);
  2397. }
  2398. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2399. {
  2400. /* each buffer has header and data */
  2401. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2402. /* calculate total allocation size for 8 buffers */
  2403. info->rx_buf_total_size = info->rx_buf_size * 8;
  2404. /* limit total allocated memory */
  2405. if (info->rx_buf_total_size > 0x10000)
  2406. info->rx_buf_total_size = 0x10000;
  2407. /* calculate number of buffers */
  2408. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2409. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2410. if (info->rx_buf == NULL)
  2411. return -ENOMEM;
  2412. rx_reset_buffers(info);
  2413. return 0;
  2414. }
  2415. static void rx_free_buffers(MGSLPC_INFO *info)
  2416. {
  2417. kfree(info->rx_buf);
  2418. info->rx_buf = NULL;
  2419. }
  2420. static int claim_resources(MGSLPC_INFO *info)
  2421. {
  2422. if (rx_alloc_buffers(info) < 0 ) {
  2423. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2424. release_resources(info);
  2425. return -ENODEV;
  2426. }
  2427. return 0;
  2428. }
  2429. static void release_resources(MGSLPC_INFO *info)
  2430. {
  2431. if (debug_level >= DEBUG_LEVEL_INFO)
  2432. printk("release_resources(%s)\n", info->device_name);
  2433. rx_free_buffers(info);
  2434. }
  2435. /* Add the specified device instance data structure to the
  2436. * global linked list of devices and increment the device count.
  2437. *
  2438. * Arguments: info pointer to device instance data
  2439. */
  2440. static void mgslpc_add_device(MGSLPC_INFO *info)
  2441. {
  2442. info->next_device = NULL;
  2443. info->line = mgslpc_device_count;
  2444. sprintf(info->device_name,"ttySLP%d",info->line);
  2445. if (info->line < MAX_DEVICE_COUNT) {
  2446. if (maxframe[info->line])
  2447. info->max_frame_size = maxframe[info->line];
  2448. info->dosyncppp = dosyncppp[info->line];
  2449. }
  2450. mgslpc_device_count++;
  2451. if (!mgslpc_device_list)
  2452. mgslpc_device_list = info;
  2453. else {
  2454. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2455. while( current_dev->next_device )
  2456. current_dev = current_dev->next_device;
  2457. current_dev->next_device = info;
  2458. }
  2459. if (info->max_frame_size < 4096)
  2460. info->max_frame_size = 4096;
  2461. else if (info->max_frame_size > 65535)
  2462. info->max_frame_size = 65535;
  2463. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2464. info->device_name, info->io_base, info->irq_level);
  2465. #ifdef CONFIG_HDLC
  2466. hdlcdev_init(info);
  2467. #endif
  2468. }
  2469. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2470. {
  2471. MGSLPC_INFO *info = mgslpc_device_list;
  2472. MGSLPC_INFO *last = NULL;
  2473. while(info) {
  2474. if (info == remove_info) {
  2475. if (last)
  2476. last->next_device = info->next_device;
  2477. else
  2478. mgslpc_device_list = info->next_device;
  2479. #ifdef CONFIG_HDLC
  2480. hdlcdev_exit(info);
  2481. #endif
  2482. release_resources(info);
  2483. kfree(info);
  2484. mgslpc_device_count--;
  2485. return;
  2486. }
  2487. last = info;
  2488. info = info->next_device;
  2489. }
  2490. }
  2491. static struct pcmcia_device_id mgslpc_ids[] = {
  2492. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2493. PCMCIA_DEVICE_NULL
  2494. };
  2495. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2496. static struct pcmcia_driver mgslpc_driver = {
  2497. .owner = THIS_MODULE,
  2498. .drv = {
  2499. .name = "synclink_cs",
  2500. },
  2501. .probe = mgslpc_probe,
  2502. .remove = mgslpc_detach,
  2503. .id_table = mgslpc_ids,
  2504. .suspend = mgslpc_suspend,
  2505. .resume = mgslpc_resume,
  2506. };
  2507. static const struct tty_operations mgslpc_ops = {
  2508. .open = mgslpc_open,
  2509. .close = mgslpc_close,
  2510. .write = mgslpc_write,
  2511. .put_char = mgslpc_put_char,
  2512. .flush_chars = mgslpc_flush_chars,
  2513. .write_room = mgslpc_write_room,
  2514. .chars_in_buffer = mgslpc_chars_in_buffer,
  2515. .flush_buffer = mgslpc_flush_buffer,
  2516. .ioctl = mgslpc_ioctl,
  2517. .throttle = mgslpc_throttle,
  2518. .unthrottle = mgslpc_unthrottle,
  2519. .send_xchar = mgslpc_send_xchar,
  2520. .break_ctl = mgslpc_break,
  2521. .wait_until_sent = mgslpc_wait_until_sent,
  2522. .read_proc = mgslpc_read_proc,
  2523. .set_termios = mgslpc_set_termios,
  2524. .stop = tx_pause,
  2525. .start = tx_release,
  2526. .hangup = mgslpc_hangup,
  2527. .tiocmget = tiocmget,
  2528. .tiocmset = tiocmset,
  2529. };
  2530. static void synclink_cs_cleanup(void)
  2531. {
  2532. int rc;
  2533. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2534. while(mgslpc_device_list)
  2535. mgslpc_remove_device(mgslpc_device_list);
  2536. if (serial_driver) {
  2537. if ((rc = tty_unregister_driver(serial_driver)))
  2538. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2539. __FILE__,__LINE__,rc);
  2540. put_tty_driver(serial_driver);
  2541. }
  2542. pcmcia_unregister_driver(&mgslpc_driver);
  2543. }
  2544. static int __init synclink_cs_init(void)
  2545. {
  2546. int rc;
  2547. if (break_on_load) {
  2548. mgslpc_get_text_ptr();
  2549. BREAKPOINT();
  2550. }
  2551. printk("%s %s\n", driver_name, driver_version);
  2552. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2553. return rc;
  2554. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2555. if (!serial_driver) {
  2556. rc = -ENOMEM;
  2557. goto error;
  2558. }
  2559. /* Initialize the tty_driver structure */
  2560. serial_driver->owner = THIS_MODULE;
  2561. serial_driver->driver_name = "synclink_cs";
  2562. serial_driver->name = "ttySLP";
  2563. serial_driver->major = ttymajor;
  2564. serial_driver->minor_start = 64;
  2565. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2566. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2567. serial_driver->init_termios = tty_std_termios;
  2568. serial_driver->init_termios.c_cflag =
  2569. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2570. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2571. tty_set_operations(serial_driver, &mgslpc_ops);
  2572. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2573. printk("%s(%d):Couldn't register serial driver\n",
  2574. __FILE__,__LINE__);
  2575. put_tty_driver(serial_driver);
  2576. serial_driver = NULL;
  2577. goto error;
  2578. }
  2579. printk("%s %s, tty major#%d\n",
  2580. driver_name, driver_version,
  2581. serial_driver->major);
  2582. return 0;
  2583. error:
  2584. synclink_cs_cleanup();
  2585. return rc;
  2586. }
  2587. static void __exit synclink_cs_exit(void)
  2588. {
  2589. synclink_cs_cleanup();
  2590. }
  2591. module_init(synclink_cs_init);
  2592. module_exit(synclink_cs_exit);
  2593. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2594. {
  2595. unsigned int M, N;
  2596. unsigned char val;
  2597. /* note:standard BRG mode is broken in V3.2 chip
  2598. * so enhanced mode is always used
  2599. */
  2600. if (rate) {
  2601. N = 3686400 / rate;
  2602. if (!N)
  2603. N = 1;
  2604. N >>= 1;
  2605. for (M = 1; N > 64 && M < 16; M++)
  2606. N >>= 1;
  2607. N--;
  2608. /* BGR[5..0] = N
  2609. * BGR[9..6] = M
  2610. * BGR[7..0] contained in BGR register
  2611. * BGR[9..8] contained in CCR2[7..6]
  2612. * divisor = (N+1)*2^M
  2613. *
  2614. * Note: M *must* not be zero (causes asymetric duty cycle)
  2615. */
  2616. write_reg(info, (unsigned char) (channel + BGR),
  2617. (unsigned char) ((M << 6) + N));
  2618. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2619. val |= ((M << 4) & 0xc0);
  2620. write_reg(info, (unsigned char) (channel + CCR2), val);
  2621. }
  2622. }
  2623. /* Enabled the AUX clock output at the specified frequency.
  2624. */
  2625. static void enable_auxclk(MGSLPC_INFO *info)
  2626. {
  2627. unsigned char val;
  2628. /* MODE
  2629. *
  2630. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2631. * 05 ADM Address Mode, 0 = no addr recognition
  2632. * 04 TMD Timer Mode, 0 = external
  2633. * 03 RAC Receiver Active, 0 = inactive
  2634. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2635. * 01 TRS Timer Resolution, 1=512
  2636. * 00 TLP Test Loop, 0 = no loop
  2637. *
  2638. * 1000 0010
  2639. */
  2640. val = 0x82;
  2641. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2642. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2643. val |= BIT2;
  2644. write_reg(info, CHB + MODE, val);
  2645. /* CCR0
  2646. *
  2647. * 07 PU Power Up, 1=active, 0=power down
  2648. * 06 MCE Master Clock Enable, 1=enabled
  2649. * 05 Reserved, 0
  2650. * 04..02 SC[2..0] Encoding
  2651. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2652. *
  2653. * 11000000
  2654. */
  2655. write_reg(info, CHB + CCR0, 0xc0);
  2656. /* CCR1
  2657. *
  2658. * 07 SFLG Shared Flag, 0 = disable shared flags
  2659. * 06 GALP Go Active On Loop, 0 = not used
  2660. * 05 GLP Go On Loop, 0 = not used
  2661. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2662. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2663. * 02..00 CM[2..0] Clock Mode
  2664. *
  2665. * 0001 0111
  2666. */
  2667. write_reg(info, CHB + CCR1, 0x17);
  2668. /* CCR2 (Channel B)
  2669. *
  2670. * 07..06 BGR[9..8] Baud rate bits 9..8
  2671. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2672. * 04 SSEL Clock source select, 1=submode b
  2673. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2674. * 02 RWX Read/Write Exchange 0=disabled
  2675. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2676. * 00 DIV, data inversion 0=disabled, 1=enabled
  2677. *
  2678. * 0011 1000
  2679. */
  2680. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2681. write_reg(info, CHB + CCR2, 0x38);
  2682. else
  2683. write_reg(info, CHB + CCR2, 0x30);
  2684. /* CCR4
  2685. *
  2686. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2687. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2688. * 05 TST1 Test Pin, 0=normal operation
  2689. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2690. * 03..02 Reserved, must be 0
  2691. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2692. *
  2693. * 0101 0000
  2694. */
  2695. write_reg(info, CHB + CCR4, 0x50);
  2696. /* if auxclk not enabled, set internal BRG so
  2697. * CTS transitions can be detected (requires TxC)
  2698. */
  2699. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2700. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2701. else
  2702. mgslpc_set_rate(info, CHB, 921600);
  2703. }
  2704. static void loopback_enable(MGSLPC_INFO *info)
  2705. {
  2706. unsigned char val;
  2707. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2708. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2709. write_reg(info, CHA + CCR1, val);
  2710. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2711. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2712. write_reg(info, CHA + CCR2, val);
  2713. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2714. if (info->params.clock_speed)
  2715. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2716. else
  2717. mgslpc_set_rate(info, CHA, 1843200);
  2718. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2719. val = read_reg(info, CHA + MODE) | BIT0;
  2720. write_reg(info, CHA + MODE, val);
  2721. }
  2722. static void hdlc_mode(MGSLPC_INFO *info)
  2723. {
  2724. unsigned char val;
  2725. unsigned char clkmode, clksubmode;
  2726. /* disable all interrupts */
  2727. irq_disable(info, CHA, 0xffff);
  2728. irq_disable(info, CHB, 0xffff);
  2729. port_irq_disable(info, 0xff);
  2730. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2731. clkmode = clksubmode = 0;
  2732. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2733. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2734. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2735. clkmode = 7;
  2736. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2737. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2738. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2739. clkmode = 7;
  2740. clksubmode = 1;
  2741. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2742. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2743. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2744. clkmode = 6;
  2745. clksubmode = 1;
  2746. } else {
  2747. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2748. clkmode = 6;
  2749. }
  2750. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2751. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2752. clksubmode = 1;
  2753. }
  2754. /* MODE
  2755. *
  2756. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2757. * 05 ADM Address Mode, 0 = no addr recognition
  2758. * 04 TMD Timer Mode, 0 = external
  2759. * 03 RAC Receiver Active, 0 = inactive
  2760. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2761. * 01 TRS Timer Resolution, 1=512
  2762. * 00 TLP Test Loop, 0 = no loop
  2763. *
  2764. * 1000 0010
  2765. */
  2766. val = 0x82;
  2767. if (info->params.loopback)
  2768. val |= BIT0;
  2769. /* preserve RTS state */
  2770. if (info->serial_signals & SerialSignal_RTS)
  2771. val |= BIT2;
  2772. write_reg(info, CHA + MODE, val);
  2773. /* CCR0
  2774. *
  2775. * 07 PU Power Up, 1=active, 0=power down
  2776. * 06 MCE Master Clock Enable, 1=enabled
  2777. * 05 Reserved, 0
  2778. * 04..02 SC[2..0] Encoding
  2779. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2780. *
  2781. * 11000000
  2782. */
  2783. val = 0xc0;
  2784. switch (info->params.encoding)
  2785. {
  2786. case HDLC_ENCODING_NRZI:
  2787. val |= BIT3;
  2788. break;
  2789. case HDLC_ENCODING_BIPHASE_SPACE:
  2790. val |= BIT4;
  2791. break; // FM0
  2792. case HDLC_ENCODING_BIPHASE_MARK:
  2793. val |= BIT4 + BIT2;
  2794. break; // FM1
  2795. case HDLC_ENCODING_BIPHASE_LEVEL:
  2796. val |= BIT4 + BIT3;
  2797. break; // Manchester
  2798. }
  2799. write_reg(info, CHA + CCR0, val);
  2800. /* CCR1
  2801. *
  2802. * 07 SFLG Shared Flag, 0 = disable shared flags
  2803. * 06 GALP Go Active On Loop, 0 = not used
  2804. * 05 GLP Go On Loop, 0 = not used
  2805. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2806. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2807. * 02..00 CM[2..0] Clock Mode
  2808. *
  2809. * 0001 0000
  2810. */
  2811. val = 0x10 + clkmode;
  2812. write_reg(info, CHA + CCR1, val);
  2813. /* CCR2
  2814. *
  2815. * 07..06 BGR[9..8] Baud rate bits 9..8
  2816. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2817. * 04 SSEL Clock source select, 1=submode b
  2818. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2819. * 02 RWX Read/Write Exchange 0=disabled
  2820. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2821. * 00 DIV, data inversion 0=disabled, 1=enabled
  2822. *
  2823. * 0000 0000
  2824. */
  2825. val = 0x00;
  2826. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2827. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2828. val |= BIT5;
  2829. if (clksubmode)
  2830. val |= BIT4;
  2831. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2832. val |= BIT1;
  2833. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2834. val |= BIT0;
  2835. write_reg(info, CHA + CCR2, val);
  2836. /* CCR3
  2837. *
  2838. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2839. * 05 EPT Enable preamble transmission, 1=enabled
  2840. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2841. * 03 CRL CRC Reset Level, 0=FFFF
  2842. * 02 RCRC Rx CRC 0=On 1=Off
  2843. * 01 TCRC Tx CRC 0=On 1=Off
  2844. * 00 PSD DPLL Phase Shift Disable
  2845. *
  2846. * 0000 0000
  2847. */
  2848. val = 0x00;
  2849. if (info->params.crc_type == HDLC_CRC_NONE)
  2850. val |= BIT2 + BIT1;
  2851. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2852. val |= BIT5;
  2853. switch (info->params.preamble_length)
  2854. {
  2855. case HDLC_PREAMBLE_LENGTH_16BITS:
  2856. val |= BIT6;
  2857. break;
  2858. case HDLC_PREAMBLE_LENGTH_32BITS:
  2859. val |= BIT6;
  2860. break;
  2861. case HDLC_PREAMBLE_LENGTH_64BITS:
  2862. val |= BIT7 + BIT6;
  2863. break;
  2864. }
  2865. write_reg(info, CHA + CCR3, val);
  2866. /* PRE - Preamble pattern */
  2867. val = 0;
  2868. switch (info->params.preamble)
  2869. {
  2870. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2871. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2872. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2873. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2874. }
  2875. write_reg(info, CHA + PRE, val);
  2876. /* CCR4
  2877. *
  2878. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2879. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2880. * 05 TST1 Test Pin, 0=normal operation
  2881. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2882. * 03..02 Reserved, must be 0
  2883. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2884. *
  2885. * 0101 0000
  2886. */
  2887. val = 0x50;
  2888. write_reg(info, CHA + CCR4, val);
  2889. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2890. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2891. else
  2892. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2893. /* RLCR Receive length check register
  2894. *
  2895. * 7 1=enable receive length check
  2896. * 6..0 Max frame length = (RL + 1) * 32
  2897. */
  2898. write_reg(info, CHA + RLCR, 0);
  2899. /* XBCH Transmit Byte Count High
  2900. *
  2901. * 07 DMA mode, 0 = interrupt driven
  2902. * 06 NRM, 0=ABM (ignored)
  2903. * 05 CAS Carrier Auto Start
  2904. * 04 XC Transmit Continuously (ignored)
  2905. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2906. *
  2907. * 0000 0000
  2908. */
  2909. val = 0x00;
  2910. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2911. val |= BIT5;
  2912. write_reg(info, CHA + XBCH, val);
  2913. enable_auxclk(info);
  2914. if (info->params.loopback || info->testing_irq)
  2915. loopback_enable(info);
  2916. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2917. {
  2918. irq_enable(info, CHB, IRQ_CTS);
  2919. /* PVR[3] 1=AUTO CTS active */
  2920. set_reg_bits(info, CHA + PVR, BIT3);
  2921. } else
  2922. clear_reg_bits(info, CHA + PVR, BIT3);
  2923. irq_enable(info, CHA,
  2924. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2925. IRQ_UNDERRUN + IRQ_TXFIFO);
  2926. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2927. wait_command_complete(info, CHA);
  2928. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2929. /* Master clock mode enabled above to allow reset commands
  2930. * to complete even if no data clocks are present.
  2931. *
  2932. * Disable master clock mode for normal communications because
  2933. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2934. * IRQ when in master clock mode.
  2935. *
  2936. * Leave master clock mode enabled for IRQ test because the
  2937. * timer IRQ used by the test can only happen in master clock mode.
  2938. */
  2939. if (!info->testing_irq)
  2940. clear_reg_bits(info, CHA + CCR0, BIT6);
  2941. tx_set_idle(info);
  2942. tx_stop(info);
  2943. rx_stop(info);
  2944. }
  2945. static void rx_stop(MGSLPC_INFO *info)
  2946. {
  2947. if (debug_level >= DEBUG_LEVEL_ISR)
  2948. printk("%s(%d):rx_stop(%s)\n",
  2949. __FILE__,__LINE__, info->device_name );
  2950. /* MODE:03 RAC Receiver Active, 0=inactive */
  2951. clear_reg_bits(info, CHA + MODE, BIT3);
  2952. info->rx_enabled = 0;
  2953. info->rx_overflow = 0;
  2954. }
  2955. static void rx_start(MGSLPC_INFO *info)
  2956. {
  2957. if (debug_level >= DEBUG_LEVEL_ISR)
  2958. printk("%s(%d):rx_start(%s)\n",
  2959. __FILE__,__LINE__, info->device_name );
  2960. rx_reset_buffers(info);
  2961. info->rx_enabled = 0;
  2962. info->rx_overflow = 0;
  2963. /* MODE:03 RAC Receiver Active, 1=active */
  2964. set_reg_bits(info, CHA + MODE, BIT3);
  2965. info->rx_enabled = 1;
  2966. }
  2967. static void tx_start(MGSLPC_INFO *info)
  2968. {
  2969. if (debug_level >= DEBUG_LEVEL_ISR)
  2970. printk("%s(%d):tx_start(%s)\n",
  2971. __FILE__,__LINE__, info->device_name );
  2972. if (info->tx_count) {
  2973. /* If auto RTS enabled and RTS is inactive, then assert */
  2974. /* RTS and set a flag indicating that the driver should */
  2975. /* negate RTS when the transmission completes. */
  2976. info->drop_rts_on_tx_done = 0;
  2977. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2978. get_signals(info);
  2979. if (!(info->serial_signals & SerialSignal_RTS)) {
  2980. info->serial_signals |= SerialSignal_RTS;
  2981. set_signals(info);
  2982. info->drop_rts_on_tx_done = 1;
  2983. }
  2984. }
  2985. if (info->params.mode == MGSL_MODE_ASYNC) {
  2986. if (!info->tx_active) {
  2987. info->tx_active = 1;
  2988. tx_ready(info);
  2989. }
  2990. } else {
  2991. info->tx_active = 1;
  2992. tx_ready(info);
  2993. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  2994. add_timer(&info->tx_timer);
  2995. }
  2996. }
  2997. if (!info->tx_enabled)
  2998. info->tx_enabled = 1;
  2999. }
  3000. static void tx_stop(MGSLPC_INFO *info)
  3001. {
  3002. if (debug_level >= DEBUG_LEVEL_ISR)
  3003. printk("%s(%d):tx_stop(%s)\n",
  3004. __FILE__,__LINE__, info->device_name );
  3005. del_timer(&info->tx_timer);
  3006. info->tx_enabled = 0;
  3007. info->tx_active = 0;
  3008. }
  3009. /* Reset the adapter to a known state and prepare it for further use.
  3010. */
  3011. static void reset_device(MGSLPC_INFO *info)
  3012. {
  3013. /* power up both channels (set BIT7) */
  3014. write_reg(info, CHA + CCR0, 0x80);
  3015. write_reg(info, CHB + CCR0, 0x80);
  3016. write_reg(info, CHA + MODE, 0);
  3017. write_reg(info, CHB + MODE, 0);
  3018. /* disable all interrupts */
  3019. irq_disable(info, CHA, 0xffff);
  3020. irq_disable(info, CHB, 0xffff);
  3021. port_irq_disable(info, 0xff);
  3022. /* PCR Port Configuration Register
  3023. *
  3024. * 07..04 DEC[3..0] Serial I/F select outputs
  3025. * 03 output, 1=AUTO CTS control enabled
  3026. * 02 RI Ring Indicator input 0=active
  3027. * 01 DSR input 0=active
  3028. * 00 DTR output 0=active
  3029. *
  3030. * 0000 0110
  3031. */
  3032. write_reg(info, PCR, 0x06);
  3033. /* PVR Port Value Register
  3034. *
  3035. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3036. * 03 AUTO CTS output 1=enabled
  3037. * 02 RI Ring Indicator input
  3038. * 01 DSR input
  3039. * 00 DTR output (1=inactive)
  3040. *
  3041. * 0000 0001
  3042. */
  3043. // write_reg(info, PVR, PVR_DTR);
  3044. /* IPC Interrupt Port Configuration
  3045. *
  3046. * 07 VIS 1=Masked interrupts visible
  3047. * 06..05 Reserved, 0
  3048. * 04..03 SLA Slave address, 00 ignored
  3049. * 02 CASM Cascading Mode, 1=daisy chain
  3050. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3051. *
  3052. * 0000 0101
  3053. */
  3054. write_reg(info, IPC, 0x05);
  3055. }
  3056. static void async_mode(MGSLPC_INFO *info)
  3057. {
  3058. unsigned char val;
  3059. /* disable all interrupts */
  3060. irq_disable(info, CHA, 0xffff);
  3061. irq_disable(info, CHB, 0xffff);
  3062. port_irq_disable(info, 0xff);
  3063. /* MODE
  3064. *
  3065. * 07 Reserved, 0
  3066. * 06 FRTS RTS State, 0=active
  3067. * 05 FCTS Flow Control on CTS
  3068. * 04 FLON Flow Control Enable
  3069. * 03 RAC Receiver Active, 0 = inactive
  3070. * 02 RTS 0=Auto RTS, 1=manual RTS
  3071. * 01 TRS Timer Resolution, 1=512
  3072. * 00 TLP Test Loop, 0 = no loop
  3073. *
  3074. * 0000 0110
  3075. */
  3076. val = 0x06;
  3077. if (info->params.loopback)
  3078. val |= BIT0;
  3079. /* preserve RTS state */
  3080. if (!(info->serial_signals & SerialSignal_RTS))
  3081. val |= BIT6;
  3082. write_reg(info, CHA + MODE, val);
  3083. /* CCR0
  3084. *
  3085. * 07 PU Power Up, 1=active, 0=power down
  3086. * 06 MCE Master Clock Enable, 1=enabled
  3087. * 05 Reserved, 0
  3088. * 04..02 SC[2..0] Encoding, 000=NRZ
  3089. * 01..00 SM[1..0] Serial Mode, 11=Async
  3090. *
  3091. * 1000 0011
  3092. */
  3093. write_reg(info, CHA + CCR0, 0x83);
  3094. /* CCR1
  3095. *
  3096. * 07..05 Reserved, 0
  3097. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3098. * 03 BCR Bit Clock Rate, 1=16x
  3099. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3100. *
  3101. * 0001 1111
  3102. */
  3103. write_reg(info, CHA + CCR1, 0x1f);
  3104. /* CCR2 (channel A)
  3105. *
  3106. * 07..06 BGR[9..8] Baud rate bits 9..8
  3107. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3108. * 04 SSEL Clock source select, 1=submode b
  3109. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3110. * 02 RWX Read/Write Exchange 0=disabled
  3111. * 01 Reserved, 0
  3112. * 00 DIV, data inversion 0=disabled, 1=enabled
  3113. *
  3114. * 0001 0000
  3115. */
  3116. write_reg(info, CHA + CCR2, 0x10);
  3117. /* CCR3
  3118. *
  3119. * 07..01 Reserved, 0
  3120. * 00 PSD DPLL Phase Shift Disable
  3121. *
  3122. * 0000 0000
  3123. */
  3124. write_reg(info, CHA + CCR3, 0);
  3125. /* CCR4
  3126. *
  3127. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3128. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3129. * 05 TST1 Test Pin, 0=normal operation
  3130. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3131. * 03..00 Reserved, must be 0
  3132. *
  3133. * 0101 0000
  3134. */
  3135. write_reg(info, CHA + CCR4, 0x50);
  3136. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3137. /* DAFO Data Format
  3138. *
  3139. * 07 Reserved, 0
  3140. * 06 XBRK transmit break, 0=normal operation
  3141. * 05 Stop bits (0=1, 1=2)
  3142. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3143. * 02 PAREN Parity Enable
  3144. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3145. *
  3146. */
  3147. val = 0x00;
  3148. if (info->params.data_bits != 8)
  3149. val |= BIT0; /* 7 bits */
  3150. if (info->params.stop_bits != 1)
  3151. val |= BIT5;
  3152. if (info->params.parity != ASYNC_PARITY_NONE)
  3153. {
  3154. val |= BIT2; /* Parity enable */
  3155. if (info->params.parity == ASYNC_PARITY_ODD)
  3156. val |= BIT3;
  3157. else
  3158. val |= BIT4;
  3159. }
  3160. write_reg(info, CHA + DAFO, val);
  3161. /* RFC Rx FIFO Control
  3162. *
  3163. * 07 Reserved, 0
  3164. * 06 DPS, 1=parity bit not stored in data byte
  3165. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3166. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3167. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3168. * 01 Reserved, 0
  3169. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3170. *
  3171. * 0101 1100
  3172. */
  3173. write_reg(info, CHA + RFC, 0x5c);
  3174. /* RLCR Receive length check register
  3175. *
  3176. * Max frame length = (RL + 1) * 32
  3177. */
  3178. write_reg(info, CHA + RLCR, 0);
  3179. /* XBCH Transmit Byte Count High
  3180. *
  3181. * 07 DMA mode, 0 = interrupt driven
  3182. * 06 NRM, 0=ABM (ignored)
  3183. * 05 CAS Carrier Auto Start
  3184. * 04 XC Transmit Continuously (ignored)
  3185. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3186. *
  3187. * 0000 0000
  3188. */
  3189. val = 0x00;
  3190. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3191. val |= BIT5;
  3192. write_reg(info, CHA + XBCH, val);
  3193. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3194. irq_enable(info, CHA, IRQ_CTS);
  3195. /* MODE:03 RAC Receiver Active, 1=active */
  3196. set_reg_bits(info, CHA + MODE, BIT3);
  3197. enable_auxclk(info);
  3198. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3199. irq_enable(info, CHB, IRQ_CTS);
  3200. /* PVR[3] 1=AUTO CTS active */
  3201. set_reg_bits(info, CHA + PVR, BIT3);
  3202. } else
  3203. clear_reg_bits(info, CHA + PVR, BIT3);
  3204. irq_enable(info, CHA,
  3205. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3206. IRQ_ALLSENT + IRQ_TXFIFO);
  3207. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3208. wait_command_complete(info, CHA);
  3209. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3210. }
  3211. /* Set the HDLC idle mode for the transmitter.
  3212. */
  3213. static void tx_set_idle(MGSLPC_INFO *info)
  3214. {
  3215. /* Note: ESCC2 only supports flags and one idle modes */
  3216. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3217. set_reg_bits(info, CHA + CCR1, BIT3);
  3218. else
  3219. clear_reg_bits(info, CHA + CCR1, BIT3);
  3220. }
  3221. /* get state of the V24 status (input) signals.
  3222. */
  3223. static void get_signals(MGSLPC_INFO *info)
  3224. {
  3225. unsigned char status = 0;
  3226. /* preserve DTR and RTS */
  3227. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3228. if (read_reg(info, CHB + VSTR) & BIT7)
  3229. info->serial_signals |= SerialSignal_DCD;
  3230. if (read_reg(info, CHB + STAR) & BIT1)
  3231. info->serial_signals |= SerialSignal_CTS;
  3232. status = read_reg(info, CHA + PVR);
  3233. if (!(status & PVR_RI))
  3234. info->serial_signals |= SerialSignal_RI;
  3235. if (!(status & PVR_DSR))
  3236. info->serial_signals |= SerialSignal_DSR;
  3237. }
  3238. /* Set the state of DTR and RTS based on contents of
  3239. * serial_signals member of device extension.
  3240. */
  3241. static void set_signals(MGSLPC_INFO *info)
  3242. {
  3243. unsigned char val;
  3244. val = read_reg(info, CHA + MODE);
  3245. if (info->params.mode == MGSL_MODE_ASYNC) {
  3246. if (info->serial_signals & SerialSignal_RTS)
  3247. val &= ~BIT6;
  3248. else
  3249. val |= BIT6;
  3250. } else {
  3251. if (info->serial_signals & SerialSignal_RTS)
  3252. val |= BIT2;
  3253. else
  3254. val &= ~BIT2;
  3255. }
  3256. write_reg(info, CHA + MODE, val);
  3257. if (info->serial_signals & SerialSignal_DTR)
  3258. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3259. else
  3260. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3261. }
  3262. static void rx_reset_buffers(MGSLPC_INFO *info)
  3263. {
  3264. RXBUF *buf;
  3265. int i;
  3266. info->rx_put = 0;
  3267. info->rx_get = 0;
  3268. info->rx_frame_count = 0;
  3269. for (i=0 ; i < info->rx_buf_count ; i++) {
  3270. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3271. buf->status = buf->count = 0;
  3272. }
  3273. }
  3274. /* Attempt to return a received HDLC frame
  3275. * Only frames received without errors are returned.
  3276. *
  3277. * Returns 1 if frame returned, otherwise 0
  3278. */
  3279. static int rx_get_frame(MGSLPC_INFO *info)
  3280. {
  3281. unsigned short status;
  3282. RXBUF *buf;
  3283. unsigned int framesize = 0;
  3284. unsigned long flags;
  3285. struct tty_struct *tty = info->tty;
  3286. int return_frame = 0;
  3287. if (info->rx_frame_count == 0)
  3288. return 0;
  3289. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3290. status = buf->status;
  3291. /* 07 VFR 1=valid frame
  3292. * 06 RDO 1=data overrun
  3293. * 05 CRC 1=OK, 0=error
  3294. * 04 RAB 1=frame aborted
  3295. */
  3296. if ((status & 0xf0) != 0xA0) {
  3297. if (!(status & BIT7) || (status & BIT4))
  3298. info->icount.rxabort++;
  3299. else if (status & BIT6)
  3300. info->icount.rxover++;
  3301. else if (!(status & BIT5)) {
  3302. info->icount.rxcrc++;
  3303. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3304. return_frame = 1;
  3305. }
  3306. framesize = 0;
  3307. #ifdef CONFIG_HDLC
  3308. {
  3309. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3310. stats->rx_errors++;
  3311. stats->rx_frame_errors++;
  3312. }
  3313. #endif
  3314. } else
  3315. return_frame = 1;
  3316. if (return_frame)
  3317. framesize = buf->count;
  3318. if (debug_level >= DEBUG_LEVEL_BH)
  3319. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3320. __FILE__,__LINE__,info->device_name,status,framesize);
  3321. if (debug_level >= DEBUG_LEVEL_DATA)
  3322. trace_block(info, buf->data, framesize, 0);
  3323. if (framesize) {
  3324. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3325. framesize+1 > info->max_frame_size) ||
  3326. framesize > info->max_frame_size)
  3327. info->icount.rxlong++;
  3328. else {
  3329. if (status & BIT5)
  3330. info->icount.rxok++;
  3331. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3332. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3333. ++framesize;
  3334. }
  3335. #ifdef CONFIG_HDLC
  3336. if (info->netcount)
  3337. hdlcdev_rx(info, buf->data, framesize);
  3338. else
  3339. #endif
  3340. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3341. }
  3342. }
  3343. spin_lock_irqsave(&info->lock,flags);
  3344. buf->status = buf->count = 0;
  3345. info->rx_frame_count--;
  3346. info->rx_get++;
  3347. if (info->rx_get >= info->rx_buf_count)
  3348. info->rx_get = 0;
  3349. spin_unlock_irqrestore(&info->lock,flags);
  3350. return 1;
  3351. }
  3352. static BOOLEAN register_test(MGSLPC_INFO *info)
  3353. {
  3354. static unsigned char patterns[] =
  3355. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3356. static unsigned int count = ARRAY_SIZE(patterns);
  3357. unsigned int i;
  3358. BOOLEAN rc = TRUE;
  3359. unsigned long flags;
  3360. spin_lock_irqsave(&info->lock,flags);
  3361. reset_device(info);
  3362. for (i = 0; i < count; i++) {
  3363. write_reg(info, XAD1, patterns[i]);
  3364. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3365. if ((read_reg(info, XAD1) != patterns[i]) ||
  3366. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3367. rc = FALSE;
  3368. break;
  3369. }
  3370. }
  3371. spin_unlock_irqrestore(&info->lock,flags);
  3372. return rc;
  3373. }
  3374. static BOOLEAN irq_test(MGSLPC_INFO *info)
  3375. {
  3376. unsigned long end_time;
  3377. unsigned long flags;
  3378. spin_lock_irqsave(&info->lock,flags);
  3379. reset_device(info);
  3380. info->testing_irq = TRUE;
  3381. hdlc_mode(info);
  3382. info->irq_occurred = FALSE;
  3383. /* init hdlc mode */
  3384. irq_enable(info, CHA, IRQ_TIMER);
  3385. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3386. issue_command(info, CHA, CMD_START_TIMER);
  3387. spin_unlock_irqrestore(&info->lock,flags);
  3388. end_time=100;
  3389. while(end_time-- && !info->irq_occurred) {
  3390. msleep_interruptible(10);
  3391. }
  3392. info->testing_irq = FALSE;
  3393. spin_lock_irqsave(&info->lock,flags);
  3394. reset_device(info);
  3395. spin_unlock_irqrestore(&info->lock,flags);
  3396. return info->irq_occurred ? TRUE : FALSE;
  3397. }
  3398. static int adapter_test(MGSLPC_INFO *info)
  3399. {
  3400. if (!register_test(info)) {
  3401. info->init_error = DiagStatus_AddressFailure;
  3402. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3403. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3404. return -ENODEV;
  3405. }
  3406. if (!irq_test(info)) {
  3407. info->init_error = DiagStatus_IrqFailure;
  3408. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3409. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3410. return -ENODEV;
  3411. }
  3412. if (debug_level >= DEBUG_LEVEL_INFO)
  3413. printk("%s(%d):device %s passed diagnostics\n",
  3414. __FILE__,__LINE__,info->device_name);
  3415. return 0;
  3416. }
  3417. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3418. {
  3419. int i;
  3420. int linecount;
  3421. if (xmit)
  3422. printk("%s tx data:\n",info->device_name);
  3423. else
  3424. printk("%s rx data:\n",info->device_name);
  3425. while(count) {
  3426. if (count > 16)
  3427. linecount = 16;
  3428. else
  3429. linecount = count;
  3430. for(i=0;i<linecount;i++)
  3431. printk("%02X ",(unsigned char)data[i]);
  3432. for(;i<17;i++)
  3433. printk(" ");
  3434. for(i=0;i<linecount;i++) {
  3435. if (data[i]>=040 && data[i]<=0176)
  3436. printk("%c",data[i]);
  3437. else
  3438. printk(".");
  3439. }
  3440. printk("\n");
  3441. data += linecount;
  3442. count -= linecount;
  3443. }
  3444. }
  3445. /* HDLC frame time out
  3446. * update stats and do tx completion processing
  3447. */
  3448. static void tx_timeout(unsigned long context)
  3449. {
  3450. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3451. unsigned long flags;
  3452. if ( debug_level >= DEBUG_LEVEL_INFO )
  3453. printk( "%s(%d):tx_timeout(%s)\n",
  3454. __FILE__,__LINE__,info->device_name);
  3455. if(info->tx_active &&
  3456. info->params.mode == MGSL_MODE_HDLC) {
  3457. info->icount.txtimeout++;
  3458. }
  3459. spin_lock_irqsave(&info->lock,flags);
  3460. info->tx_active = 0;
  3461. info->tx_count = info->tx_put = info->tx_get = 0;
  3462. spin_unlock_irqrestore(&info->lock,flags);
  3463. #ifdef CONFIG_HDLC
  3464. if (info->netcount)
  3465. hdlcdev_tx_done(info);
  3466. else
  3467. #endif
  3468. bh_transmit(info);
  3469. }
  3470. #ifdef CONFIG_HDLC
  3471. /**
  3472. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3473. * set encoding and frame check sequence (FCS) options
  3474. *
  3475. * dev pointer to network device structure
  3476. * encoding serial encoding setting
  3477. * parity FCS setting
  3478. *
  3479. * returns 0 if success, otherwise error code
  3480. */
  3481. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3482. unsigned short parity)
  3483. {
  3484. MGSLPC_INFO *info = dev_to_port(dev);
  3485. unsigned char new_encoding;
  3486. unsigned short new_crctype;
  3487. /* return error if TTY interface open */
  3488. if (info->count)
  3489. return -EBUSY;
  3490. switch (encoding)
  3491. {
  3492. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3493. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3494. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3495. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3496. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3497. default: return -EINVAL;
  3498. }
  3499. switch (parity)
  3500. {
  3501. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3502. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3503. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3504. default: return -EINVAL;
  3505. }
  3506. info->params.encoding = new_encoding;
  3507. info->params.crc_type = new_crctype;
  3508. /* if network interface up, reprogram hardware */
  3509. if (info->netcount)
  3510. mgslpc_program_hw(info);
  3511. return 0;
  3512. }
  3513. /**
  3514. * called by generic HDLC layer to send frame
  3515. *
  3516. * skb socket buffer containing HDLC frame
  3517. * dev pointer to network device structure
  3518. *
  3519. * returns 0 if success, otherwise error code
  3520. */
  3521. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3522. {
  3523. MGSLPC_INFO *info = dev_to_port(dev);
  3524. struct net_device_stats *stats = hdlc_stats(dev);
  3525. unsigned long flags;
  3526. if (debug_level >= DEBUG_LEVEL_INFO)
  3527. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3528. /* stop sending until this frame completes */
  3529. netif_stop_queue(dev);
  3530. /* copy data to device buffers */
  3531. memcpy(info->tx_buf, skb->data, skb->len);
  3532. info->tx_get = 0;
  3533. info->tx_put = info->tx_count = skb->len;
  3534. /* update network statistics */
  3535. stats->tx_packets++;
  3536. stats->tx_bytes += skb->len;
  3537. /* done with socket buffer, so free it */
  3538. dev_kfree_skb(skb);
  3539. /* save start time for transmit timeout detection */
  3540. dev->trans_start = jiffies;
  3541. /* start hardware transmitter if necessary */
  3542. spin_lock_irqsave(&info->lock,flags);
  3543. if (!info->tx_active)
  3544. tx_start(info);
  3545. spin_unlock_irqrestore(&info->lock,flags);
  3546. return 0;
  3547. }
  3548. /**
  3549. * called by network layer when interface enabled
  3550. * claim resources and initialize hardware
  3551. *
  3552. * dev pointer to network device structure
  3553. *
  3554. * returns 0 if success, otherwise error code
  3555. */
  3556. static int hdlcdev_open(struct net_device *dev)
  3557. {
  3558. MGSLPC_INFO *info = dev_to_port(dev);
  3559. int rc;
  3560. unsigned long flags;
  3561. if (debug_level >= DEBUG_LEVEL_INFO)
  3562. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3563. /* generic HDLC layer open processing */
  3564. if ((rc = hdlc_open(dev)))
  3565. return rc;
  3566. /* arbitrate between network and tty opens */
  3567. spin_lock_irqsave(&info->netlock, flags);
  3568. if (info->count != 0 || info->netcount != 0) {
  3569. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3570. spin_unlock_irqrestore(&info->netlock, flags);
  3571. return -EBUSY;
  3572. }
  3573. info->netcount=1;
  3574. spin_unlock_irqrestore(&info->netlock, flags);
  3575. /* claim resources and init adapter */
  3576. if ((rc = startup(info)) != 0) {
  3577. spin_lock_irqsave(&info->netlock, flags);
  3578. info->netcount=0;
  3579. spin_unlock_irqrestore(&info->netlock, flags);
  3580. return rc;
  3581. }
  3582. /* assert DTR and RTS, apply hardware settings */
  3583. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3584. mgslpc_program_hw(info);
  3585. /* enable network layer transmit */
  3586. dev->trans_start = jiffies;
  3587. netif_start_queue(dev);
  3588. /* inform generic HDLC layer of current DCD status */
  3589. spin_lock_irqsave(&info->lock, flags);
  3590. get_signals(info);
  3591. spin_unlock_irqrestore(&info->lock, flags);
  3592. if (info->serial_signals & SerialSignal_DCD)
  3593. netif_carrier_on(dev);
  3594. else
  3595. netif_carrier_off(dev);
  3596. return 0;
  3597. }
  3598. /**
  3599. * called by network layer when interface is disabled
  3600. * shutdown hardware and release resources
  3601. *
  3602. * dev pointer to network device structure
  3603. *
  3604. * returns 0 if success, otherwise error code
  3605. */
  3606. static int hdlcdev_close(struct net_device *dev)
  3607. {
  3608. MGSLPC_INFO *info = dev_to_port(dev);
  3609. unsigned long flags;
  3610. if (debug_level >= DEBUG_LEVEL_INFO)
  3611. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3612. netif_stop_queue(dev);
  3613. /* shutdown adapter and release resources */
  3614. shutdown(info);
  3615. hdlc_close(dev);
  3616. spin_lock_irqsave(&info->netlock, flags);
  3617. info->netcount=0;
  3618. spin_unlock_irqrestore(&info->netlock, flags);
  3619. return 0;
  3620. }
  3621. /**
  3622. * called by network layer to process IOCTL call to network device
  3623. *
  3624. * dev pointer to network device structure
  3625. * ifr pointer to network interface request structure
  3626. * cmd IOCTL command code
  3627. *
  3628. * returns 0 if success, otherwise error code
  3629. */
  3630. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3631. {
  3632. const size_t size = sizeof(sync_serial_settings);
  3633. sync_serial_settings new_line;
  3634. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3635. MGSLPC_INFO *info = dev_to_port(dev);
  3636. unsigned int flags;
  3637. if (debug_level >= DEBUG_LEVEL_INFO)
  3638. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3639. /* return error if TTY interface open */
  3640. if (info->count)
  3641. return -EBUSY;
  3642. if (cmd != SIOCWANDEV)
  3643. return hdlc_ioctl(dev, ifr, cmd);
  3644. switch(ifr->ifr_settings.type) {
  3645. case IF_GET_IFACE: /* return current sync_serial_settings */
  3646. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3647. if (ifr->ifr_settings.size < size) {
  3648. ifr->ifr_settings.size = size; /* data size wanted */
  3649. return -ENOBUFS;
  3650. }
  3651. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3652. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3653. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3654. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3655. switch (flags){
  3656. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3657. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3658. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3659. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3660. default: new_line.clock_type = CLOCK_DEFAULT;
  3661. }
  3662. new_line.clock_rate = info->params.clock_speed;
  3663. new_line.loopback = info->params.loopback ? 1:0;
  3664. if (copy_to_user(line, &new_line, size))
  3665. return -EFAULT;
  3666. return 0;
  3667. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3668. if(!capable(CAP_NET_ADMIN))
  3669. return -EPERM;
  3670. if (copy_from_user(&new_line, line, size))
  3671. return -EFAULT;
  3672. switch (new_line.clock_type)
  3673. {
  3674. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3675. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3676. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3677. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3678. case CLOCK_DEFAULT: flags = info->params.flags &
  3679. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3680. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3681. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3682. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3683. default: return -EINVAL;
  3684. }
  3685. if (new_line.loopback != 0 && new_line.loopback != 1)
  3686. return -EINVAL;
  3687. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3688. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3689. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3690. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3691. info->params.flags |= flags;
  3692. info->params.loopback = new_line.loopback;
  3693. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3694. info->params.clock_speed = new_line.clock_rate;
  3695. else
  3696. info->params.clock_speed = 0;
  3697. /* if network interface up, reprogram hardware */
  3698. if (info->netcount)
  3699. mgslpc_program_hw(info);
  3700. return 0;
  3701. default:
  3702. return hdlc_ioctl(dev, ifr, cmd);
  3703. }
  3704. }
  3705. /**
  3706. * called by network layer when transmit timeout is detected
  3707. *
  3708. * dev pointer to network device structure
  3709. */
  3710. static void hdlcdev_tx_timeout(struct net_device *dev)
  3711. {
  3712. MGSLPC_INFO *info = dev_to_port(dev);
  3713. struct net_device_stats *stats = hdlc_stats(dev);
  3714. unsigned long flags;
  3715. if (debug_level >= DEBUG_LEVEL_INFO)
  3716. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3717. stats->tx_errors++;
  3718. stats->tx_aborted_errors++;
  3719. spin_lock_irqsave(&info->lock,flags);
  3720. tx_stop(info);
  3721. spin_unlock_irqrestore(&info->lock,flags);
  3722. netif_wake_queue(dev);
  3723. }
  3724. /**
  3725. * called by device driver when transmit completes
  3726. * reenable network layer transmit if stopped
  3727. *
  3728. * info pointer to device instance information
  3729. */
  3730. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3731. {
  3732. if (netif_queue_stopped(info->netdev))
  3733. netif_wake_queue(info->netdev);
  3734. }
  3735. /**
  3736. * called by device driver when frame received
  3737. * pass frame to network layer
  3738. *
  3739. * info pointer to device instance information
  3740. * buf pointer to buffer contianing frame data
  3741. * size count of data bytes in buf
  3742. */
  3743. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3744. {
  3745. struct sk_buff *skb = dev_alloc_skb(size);
  3746. struct net_device *dev = info->netdev;
  3747. struct net_device_stats *stats = hdlc_stats(dev);
  3748. if (debug_level >= DEBUG_LEVEL_INFO)
  3749. printk("hdlcdev_rx(%s)\n",dev->name);
  3750. if (skb == NULL) {
  3751. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3752. stats->rx_dropped++;
  3753. return;
  3754. }
  3755. memcpy(skb_put(skb, size),buf,size);
  3756. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3757. stats->rx_packets++;
  3758. stats->rx_bytes += size;
  3759. netif_rx(skb);
  3760. info->netdev->last_rx = jiffies;
  3761. }
  3762. /**
  3763. * called by device driver when adding device instance
  3764. * do generic HDLC initialization
  3765. *
  3766. * info pointer to device instance information
  3767. *
  3768. * returns 0 if success, otherwise error code
  3769. */
  3770. static int hdlcdev_init(MGSLPC_INFO *info)
  3771. {
  3772. int rc;
  3773. struct net_device *dev;
  3774. hdlc_device *hdlc;
  3775. /* allocate and initialize network and HDLC layer objects */
  3776. if (!(dev = alloc_hdlcdev(info))) {
  3777. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3778. return -ENOMEM;
  3779. }
  3780. /* for network layer reporting purposes only */
  3781. dev->base_addr = info->io_base;
  3782. dev->irq = info->irq_level;
  3783. /* network layer callbacks and settings */
  3784. dev->do_ioctl = hdlcdev_ioctl;
  3785. dev->open = hdlcdev_open;
  3786. dev->stop = hdlcdev_close;
  3787. dev->tx_timeout = hdlcdev_tx_timeout;
  3788. dev->watchdog_timeo = 10*HZ;
  3789. dev->tx_queue_len = 50;
  3790. /* generic HDLC layer callbacks and settings */
  3791. hdlc = dev_to_hdlc(dev);
  3792. hdlc->attach = hdlcdev_attach;
  3793. hdlc->xmit = hdlcdev_xmit;
  3794. /* register objects with HDLC layer */
  3795. if ((rc = register_hdlc_device(dev))) {
  3796. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3797. free_netdev(dev);
  3798. return rc;
  3799. }
  3800. info->netdev = dev;
  3801. return 0;
  3802. }
  3803. /**
  3804. * called by device driver when removing device instance
  3805. * do generic HDLC cleanup
  3806. *
  3807. * info pointer to device instance information
  3808. */
  3809. static void hdlcdev_exit(MGSLPC_INFO *info)
  3810. {
  3811. unregister_hdlc_device(info->netdev);
  3812. free_netdev(info->netdev);
  3813. info->netdev = NULL;
  3814. }
  3815. #endif /* CONFIG_HDLC */