omap-rng.c 4.3 KB

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  1. /*
  2. * drivers/char/hw_random/omap-rng.c
  3. *
  4. * RNG driver for TI OMAP CPU family
  5. *
  6. * Author: Deepak Saxena <dsaxena@plexity.net>
  7. *
  8. * Copyright 2005 (c) MontaVista Software, Inc.
  9. *
  10. * Mostly based on original driver:
  11. *
  12. * Copyright (C) 2005 Nokia Corporation
  13. * Author: Juha Yrj��<juha.yrjola@nokia.com>
  14. *
  15. * This file is licensed under the terms of the GNU General Public
  16. * License version 2. This program is licensed "as is" without any
  17. * warranty of any kind, whether express or implied.
  18. *
  19. * TODO:
  20. *
  21. * - Make status updated be interrupt driven so we don't poll
  22. *
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/random.h>
  27. #include <linux/clk.h>
  28. #include <linux/err.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/hw_random.h>
  31. #include <asm/io.h>
  32. #define RNG_OUT_REG 0x00 /* Output register */
  33. #define RNG_STAT_REG 0x04 /* Status register
  34. [0] = STAT_BUSY */
  35. #define RNG_ALARM_REG 0x24 /* Alarm register
  36. [7:0] = ALARM_COUNTER */
  37. #define RNG_CONFIG_REG 0x28 /* Configuration register
  38. [11:6] = RESET_COUNT
  39. [5:3] = RING2_DELAY
  40. [2:0] = RING1_DELAY */
  41. #define RNG_REV_REG 0x3c /* Revision register
  42. [7:0] = REV_NB */
  43. #define RNG_MASK_REG 0x40 /* Mask and reset register
  44. [2] = IT_EN
  45. [1] = SOFTRESET
  46. [0] = AUTOIDLE */
  47. #define RNG_SYSSTATUS 0x44 /* System status
  48. [0] = RESETDONE */
  49. static void __iomem *rng_base;
  50. static struct clk *rng_ick;
  51. static struct platform_device *rng_dev;
  52. static u32 omap_rng_read_reg(int reg)
  53. {
  54. return __raw_readl(rng_base + reg);
  55. }
  56. static void omap_rng_write_reg(int reg, u32 val)
  57. {
  58. __raw_writel(val, rng_base + reg);
  59. }
  60. /* REVISIT: Does the status bit really work on 16xx? */
  61. static int omap_rng_data_present(struct hwrng *rng)
  62. {
  63. return omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
  64. }
  65. static int omap_rng_data_read(struct hwrng *rng, u32 *data)
  66. {
  67. *data = omap_rng_read_reg(RNG_OUT_REG);
  68. return 4;
  69. }
  70. static struct hwrng omap_rng_ops = {
  71. .name = "omap",
  72. .data_present = omap_rng_data_present,
  73. .data_read = omap_rng_data_read,
  74. };
  75. static int __init omap_rng_probe(struct platform_device *pdev)
  76. {
  77. struct resource *res, *mem;
  78. int ret;
  79. /*
  80. * A bit ugly, and it will never actually happen but there can
  81. * be only one RNG and this catches any bork
  82. */
  83. BUG_ON(rng_dev);
  84. if (cpu_is_omap24xx()) {
  85. rng_ick = clk_get(NULL, "rng_ick");
  86. if (IS_ERR(rng_ick)) {
  87. dev_err(&pdev->dev, "Could not get rng_ick\n");
  88. ret = PTR_ERR(rng_ick);
  89. return ret;
  90. } else
  91. clk_enable(rng_ick);
  92. }
  93. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  94. if (!res)
  95. return -ENOENT;
  96. mem = request_mem_region(res->start, res->end - res->start + 1,
  97. pdev->name);
  98. if (mem == NULL)
  99. return -EBUSY;
  100. dev_set_drvdata(&pdev->dev, mem);
  101. rng_base = (u32 __iomem *)io_p2v(res->start);
  102. ret = hwrng_register(&omap_rng_ops);
  103. if (ret) {
  104. release_resource(mem);
  105. rng_base = NULL;
  106. return ret;
  107. }
  108. dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
  109. omap_rng_read_reg(RNG_REV_REG));
  110. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  111. rng_dev = pdev;
  112. return 0;
  113. }
  114. static int __exit omap_rng_remove(struct platform_device *pdev)
  115. {
  116. struct resource *mem = dev_get_drvdata(&pdev->dev);
  117. hwrng_unregister(&omap_rng_ops);
  118. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  119. if (cpu_is_omap24xx()) {
  120. clk_disable(rng_ick);
  121. clk_put(rng_ick);
  122. }
  123. release_resource(mem);
  124. rng_base = NULL;
  125. return 0;
  126. }
  127. #ifdef CONFIG_PM
  128. static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
  129. {
  130. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  131. return 0;
  132. }
  133. static int omap_rng_resume(struct platform_device *pdev)
  134. {
  135. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  136. return 0;
  137. }
  138. #else
  139. #define omap_rng_suspend NULL
  140. #define omap_rng_resume NULL
  141. #endif
  142. static struct platform_driver omap_rng_driver = {
  143. .driver = {
  144. .name = "omap_rng",
  145. .owner = THIS_MODULE,
  146. },
  147. .probe = omap_rng_probe,
  148. .remove = __exit_p(omap_rng_remove),
  149. .suspend = omap_rng_suspend,
  150. .resume = omap_rng_resume
  151. };
  152. static int __init omap_rng_init(void)
  153. {
  154. if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
  155. return -ENODEV;
  156. return platform_driver_register(&omap_rng_driver);
  157. }
  158. static void __exit omap_rng_exit(void)
  159. {
  160. platform_driver_unregister(&omap_rng_driver);
  161. }
  162. module_init(omap_rng_init);
  163. module_exit(omap_rng_exit);
  164. MODULE_AUTHOR("Deepak Saxena (and others)");
  165. MODULE_LICENSE("GPL");