swim3.c 29 KB

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  1. /*
  2. * Driver for the SWIM3 (Super Woz Integrated Machine 3)
  3. * floppy controller found on Power Macintoshes.
  4. *
  5. * Copyright (C) 1996 Paul Mackerras.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * TODO:
  14. * handle 2 drives
  15. * handle GCR disks
  16. */
  17. #include <linux/stddef.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/timer.h>
  21. #include <linux/delay.h>
  22. #include <linux/fd.h>
  23. #include <linux/ioctl.h>
  24. #include <linux/blkdev.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/module.h>
  27. #include <linux/spinlock.h>
  28. #include <asm/io.h>
  29. #include <asm/dbdma.h>
  30. #include <asm/prom.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/mediabay.h>
  33. #include <asm/machdep.h>
  34. #include <asm/pmac_feature.h>
  35. static struct request_queue *swim3_queue;
  36. static struct gendisk *disks[2];
  37. static struct request *fd_req;
  38. #define MAX_FLOPPIES 2
  39. enum swim_state {
  40. idle,
  41. locating,
  42. seeking,
  43. settling,
  44. do_transfer,
  45. jogging,
  46. available,
  47. revalidating,
  48. ejecting
  49. };
  50. #define REG(x) unsigned char x; char x ## _pad[15];
  51. /*
  52. * The names for these registers mostly represent speculation on my part.
  53. * It will be interesting to see how close they are to the names Apple uses.
  54. */
  55. struct swim3 {
  56. REG(data);
  57. REG(timer); /* counts down at 1MHz */
  58. REG(error);
  59. REG(mode);
  60. REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
  61. REG(setup);
  62. REG(control); /* writing bits clears them */
  63. REG(status); /* writing bits sets them in control */
  64. REG(intr);
  65. REG(nseek); /* # tracks to seek */
  66. REG(ctrack); /* current track number */
  67. REG(csect); /* current sector number */
  68. REG(gap3); /* size of gap 3 in track format */
  69. REG(sector); /* sector # to read or write */
  70. REG(nsect); /* # sectors to read or write */
  71. REG(intr_enable);
  72. };
  73. #define control_bic control
  74. #define control_bis status
  75. /* Bits in select register */
  76. #define CA_MASK 7
  77. #define LSTRB 8
  78. /* Bits in control register */
  79. #define DO_SEEK 0x80
  80. #define FORMAT 0x40
  81. #define SELECT 0x20
  82. #define WRITE_SECTORS 0x10
  83. #define DO_ACTION 0x08
  84. #define DRIVE2_ENABLE 0x04
  85. #define DRIVE_ENABLE 0x02
  86. #define INTR_ENABLE 0x01
  87. /* Bits in status register */
  88. #define FIFO_1BYTE 0x80
  89. #define FIFO_2BYTE 0x40
  90. #define ERROR 0x20
  91. #define DATA 0x08
  92. #define RDDATA 0x04
  93. #define INTR_PENDING 0x02
  94. #define MARK_BYTE 0x01
  95. /* Bits in intr and intr_enable registers */
  96. #define ERROR_INTR 0x20
  97. #define DATA_CHANGED 0x10
  98. #define TRANSFER_DONE 0x08
  99. #define SEEN_SECTOR 0x04
  100. #define SEEK_DONE 0x02
  101. #define TIMER_DONE 0x01
  102. /* Bits in error register */
  103. #define ERR_DATA_CRC 0x80
  104. #define ERR_ADDR_CRC 0x40
  105. #define ERR_OVERRUN 0x04
  106. #define ERR_UNDERRUN 0x01
  107. /* Bits in setup register */
  108. #define S_SW_RESET 0x80
  109. #define S_GCR_WRITE 0x40
  110. #define S_IBM_DRIVE 0x20
  111. #define S_TEST_MODE 0x10
  112. #define S_FCLK_DIV2 0x08
  113. #define S_GCR 0x04
  114. #define S_COPY_PROT 0x02
  115. #define S_INV_WDATA 0x01
  116. /* Select values for swim3_action */
  117. #define SEEK_POSITIVE 0
  118. #define SEEK_NEGATIVE 4
  119. #define STEP 1
  120. #define MOTOR_ON 2
  121. #define MOTOR_OFF 6
  122. #define INDEX 3
  123. #define EJECT 7
  124. #define SETMFM 9
  125. #define SETGCR 13
  126. /* Select values for swim3_select and swim3_readbit */
  127. #define STEP_DIR 0
  128. #define STEPPING 1
  129. #define MOTOR_ON 2
  130. #define RELAX 3 /* also eject in progress */
  131. #define READ_DATA_0 4
  132. #define TWOMEG_DRIVE 5
  133. #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
  134. #define DRIVE_PRESENT 7
  135. #define DISK_IN 8
  136. #define WRITE_PROT 9
  137. #define TRACK_ZERO 10
  138. #define TACHO 11
  139. #define READ_DATA_1 12
  140. #define MFM_MODE 13
  141. #define SEEK_COMPLETE 14
  142. #define ONEMEG_MEDIA 15
  143. /* Definitions of values used in writing and formatting */
  144. #define DATA_ESCAPE 0x99
  145. #define GCR_SYNC_EXC 0x3f
  146. #define GCR_SYNC_CONV 0x80
  147. #define GCR_FIRST_MARK 0xd5
  148. #define GCR_SECOND_MARK 0xaa
  149. #define GCR_ADDR_MARK "\xd5\xaa\x00"
  150. #define GCR_DATA_MARK "\xd5\xaa\x0b"
  151. #define GCR_SLIP_BYTE "\x27\xaa"
  152. #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
  153. #define DATA_99 "\x99\x99"
  154. #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
  155. #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
  156. #define MFM_GAP_LEN 12
  157. struct floppy_state {
  158. enum swim_state state;
  159. spinlock_t lock;
  160. struct swim3 __iomem *swim3; /* hardware registers */
  161. struct dbdma_regs __iomem *dma; /* DMA controller registers */
  162. int swim3_intr; /* interrupt number for SWIM3 */
  163. int dma_intr; /* interrupt number for DMA channel */
  164. int cur_cyl; /* cylinder head is on, or -1 */
  165. int cur_sector; /* last sector we saw go past */
  166. int req_cyl; /* the cylinder for the current r/w request */
  167. int head; /* head number ditto */
  168. int req_sector; /* sector number ditto */
  169. int scount; /* # sectors we're transferring at present */
  170. int retries;
  171. int settle_time;
  172. int secpercyl; /* disk geometry information */
  173. int secpertrack;
  174. int total_secs;
  175. int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
  176. struct dbdma_cmd *dma_cmd;
  177. int ref_count;
  178. int expect_cyl;
  179. struct timer_list timeout;
  180. int timeout_pending;
  181. int ejected;
  182. wait_queue_head_t wait;
  183. int wanted;
  184. struct device_node* media_bay; /* NULL when not in bay */
  185. char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
  186. };
  187. static struct floppy_state floppy_states[MAX_FLOPPIES];
  188. static int floppy_count = 0;
  189. static DEFINE_SPINLOCK(swim3_lock);
  190. static unsigned short write_preamble[] = {
  191. 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
  192. 0, 0, 0, 0, 0, 0, /* sync field */
  193. 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
  194. 0x990f /* no escape for 512 bytes */
  195. };
  196. static unsigned short write_postamble[] = {
  197. 0x9904, /* insert CRC */
  198. 0x4e4e, 0x4e4e,
  199. 0x9908, /* stop writing */
  200. 0, 0, 0, 0, 0, 0
  201. };
  202. static void swim3_select(struct floppy_state *fs, int sel);
  203. static void swim3_action(struct floppy_state *fs, int action);
  204. static int swim3_readbit(struct floppy_state *fs, int bit);
  205. static void do_fd_request(request_queue_t * q);
  206. static void start_request(struct floppy_state *fs);
  207. static void set_timeout(struct floppy_state *fs, int nticks,
  208. void (*proc)(unsigned long));
  209. static void scan_track(struct floppy_state *fs);
  210. static void seek_track(struct floppy_state *fs, int n);
  211. static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
  212. static void setup_transfer(struct floppy_state *fs);
  213. static void act(struct floppy_state *fs);
  214. static void scan_timeout(unsigned long data);
  215. static void seek_timeout(unsigned long data);
  216. static void settle_timeout(unsigned long data);
  217. static void xfer_timeout(unsigned long data);
  218. static irqreturn_t swim3_interrupt(int irq, void *dev_id);
  219. /*static void fd_dma_interrupt(int irq, void *dev_id);*/
  220. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  221. int interruptible);
  222. static void release_drive(struct floppy_state *fs);
  223. static int fd_eject(struct floppy_state *fs);
  224. static int floppy_ioctl(struct inode *inode, struct file *filp,
  225. unsigned int cmd, unsigned long param);
  226. static int floppy_open(struct inode *inode, struct file *filp);
  227. static int floppy_release(struct inode *inode, struct file *filp);
  228. static int floppy_check_change(struct gendisk *disk);
  229. static int floppy_revalidate(struct gendisk *disk);
  230. #ifndef CONFIG_PMAC_MEDIABAY
  231. #define check_media_bay(which, what) 1
  232. #endif
  233. static void swim3_select(struct floppy_state *fs, int sel)
  234. {
  235. struct swim3 __iomem *sw = fs->swim3;
  236. out_8(&sw->select, RELAX);
  237. if (sel & 8)
  238. out_8(&sw->control_bis, SELECT);
  239. else
  240. out_8(&sw->control_bic, SELECT);
  241. out_8(&sw->select, sel & CA_MASK);
  242. }
  243. static void swim3_action(struct floppy_state *fs, int action)
  244. {
  245. struct swim3 __iomem *sw = fs->swim3;
  246. swim3_select(fs, action);
  247. udelay(1);
  248. out_8(&sw->select, sw->select | LSTRB);
  249. udelay(2);
  250. out_8(&sw->select, sw->select & ~LSTRB);
  251. udelay(1);
  252. }
  253. static int swim3_readbit(struct floppy_state *fs, int bit)
  254. {
  255. struct swim3 __iomem *sw = fs->swim3;
  256. int stat;
  257. swim3_select(fs, bit);
  258. udelay(1);
  259. stat = in_8(&sw->status);
  260. return (stat & DATA) == 0;
  261. }
  262. static void do_fd_request(request_queue_t * q)
  263. {
  264. int i;
  265. for(i=0;i<floppy_count;i++)
  266. {
  267. #ifdef CONFIG_PMAC_MEDIABAY
  268. if (floppy_states[i].media_bay &&
  269. check_media_bay(floppy_states[i].media_bay, MB_FD))
  270. continue;
  271. #endif /* CONFIG_PMAC_MEDIABAY */
  272. start_request(&floppy_states[i]);
  273. }
  274. }
  275. static void start_request(struct floppy_state *fs)
  276. {
  277. struct request *req;
  278. unsigned long x;
  279. if (fs->state == idle && fs->wanted) {
  280. fs->state = available;
  281. wake_up(&fs->wait);
  282. return;
  283. }
  284. while (fs->state == idle && (req = elv_next_request(swim3_queue))) {
  285. #if 0
  286. printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%ld buf=%p\n",
  287. req->rq_disk->disk_name, req->cmd,
  288. (long)req->sector, req->nr_sectors, req->buffer);
  289. printk(" errors=%d current_nr_sectors=%ld\n",
  290. req->errors, req->current_nr_sectors);
  291. #endif
  292. if (req->sector < 0 || req->sector >= fs->total_secs) {
  293. end_request(req, 0);
  294. continue;
  295. }
  296. if (req->current_nr_sectors == 0) {
  297. end_request(req, 1);
  298. continue;
  299. }
  300. if (fs->ejected) {
  301. end_request(req, 0);
  302. continue;
  303. }
  304. if (rq_data_dir(req) == WRITE) {
  305. if (fs->write_prot < 0)
  306. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  307. if (fs->write_prot) {
  308. end_request(req, 0);
  309. continue;
  310. }
  311. }
  312. /* Do not remove the cast. req->sector is now a sector_t and
  313. * can be 64 bits, but it will never go past 32 bits for this
  314. * driver anyway, so we can safely cast it down and not have
  315. * to do a 64/32 division
  316. */
  317. fs->req_cyl = ((long)req->sector) / fs->secpercyl;
  318. x = ((long)req->sector) % fs->secpercyl;
  319. fs->head = x / fs->secpertrack;
  320. fs->req_sector = x % fs->secpertrack + 1;
  321. fd_req = req;
  322. fs->state = do_transfer;
  323. fs->retries = 0;
  324. act(fs);
  325. }
  326. }
  327. static void set_timeout(struct floppy_state *fs, int nticks,
  328. void (*proc)(unsigned long))
  329. {
  330. unsigned long flags;
  331. spin_lock_irqsave(&fs->lock, flags);
  332. if (fs->timeout_pending)
  333. del_timer(&fs->timeout);
  334. fs->timeout.expires = jiffies + nticks;
  335. fs->timeout.function = proc;
  336. fs->timeout.data = (unsigned long) fs;
  337. add_timer(&fs->timeout);
  338. fs->timeout_pending = 1;
  339. spin_unlock_irqrestore(&fs->lock, flags);
  340. }
  341. static inline void scan_track(struct floppy_state *fs)
  342. {
  343. struct swim3 __iomem *sw = fs->swim3;
  344. swim3_select(fs, READ_DATA_0);
  345. in_8(&sw->intr); /* clear SEEN_SECTOR bit */
  346. in_8(&sw->error);
  347. out_8(&sw->intr_enable, SEEN_SECTOR);
  348. out_8(&sw->control_bis, DO_ACTION);
  349. /* enable intr when track found */
  350. set_timeout(fs, HZ, scan_timeout); /* enable timeout */
  351. }
  352. static inline void seek_track(struct floppy_state *fs, int n)
  353. {
  354. struct swim3 __iomem *sw = fs->swim3;
  355. if (n >= 0) {
  356. swim3_action(fs, SEEK_POSITIVE);
  357. sw->nseek = n;
  358. } else {
  359. swim3_action(fs, SEEK_NEGATIVE);
  360. sw->nseek = -n;
  361. }
  362. fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
  363. swim3_select(fs, STEP);
  364. in_8(&sw->error);
  365. /* enable intr when seek finished */
  366. out_8(&sw->intr_enable, SEEK_DONE);
  367. out_8(&sw->control_bis, DO_SEEK);
  368. set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
  369. fs->settle_time = 0;
  370. }
  371. static inline void init_dma(struct dbdma_cmd *cp, int cmd,
  372. void *buf, int count)
  373. {
  374. st_le16(&cp->req_count, count);
  375. st_le16(&cp->command, cmd);
  376. st_le32(&cp->phy_addr, virt_to_bus(buf));
  377. cp->xfer_status = 0;
  378. }
  379. static inline void setup_transfer(struct floppy_state *fs)
  380. {
  381. int n;
  382. struct swim3 __iomem *sw = fs->swim3;
  383. struct dbdma_cmd *cp = fs->dma_cmd;
  384. struct dbdma_regs __iomem *dr = fs->dma;
  385. if (fd_req->current_nr_sectors <= 0) {
  386. printk(KERN_ERR "swim3: transfer 0 sectors?\n");
  387. return;
  388. }
  389. if (rq_data_dir(fd_req) == WRITE)
  390. n = 1;
  391. else {
  392. n = fs->secpertrack - fs->req_sector + 1;
  393. if (n > fd_req->current_nr_sectors)
  394. n = fd_req->current_nr_sectors;
  395. }
  396. fs->scount = n;
  397. swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
  398. out_8(&sw->sector, fs->req_sector);
  399. out_8(&sw->nsect, n);
  400. out_8(&sw->gap3, 0);
  401. out_le32(&dr->cmdptr, virt_to_bus(cp));
  402. if (rq_data_dir(fd_req) == WRITE) {
  403. /* Set up 3 dma commands: write preamble, data, postamble */
  404. init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
  405. ++cp;
  406. init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
  407. ++cp;
  408. init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
  409. } else {
  410. init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
  411. }
  412. ++cp;
  413. out_le16(&cp->command, DBDMA_STOP);
  414. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  415. in_8(&sw->error);
  416. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  417. if (rq_data_dir(fd_req) == WRITE)
  418. out_8(&sw->control_bis, WRITE_SECTORS);
  419. in_8(&sw->intr);
  420. out_le32(&dr->control, (RUN << 16) | RUN);
  421. /* enable intr when transfer complete */
  422. out_8(&sw->intr_enable, TRANSFER_DONE);
  423. out_8(&sw->control_bis, DO_ACTION);
  424. set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
  425. }
  426. static void act(struct floppy_state *fs)
  427. {
  428. for (;;) {
  429. switch (fs->state) {
  430. case idle:
  431. return; /* XXX shouldn't get here */
  432. case locating:
  433. if (swim3_readbit(fs, TRACK_ZERO)) {
  434. fs->cur_cyl = 0;
  435. if (fs->req_cyl == 0)
  436. fs->state = do_transfer;
  437. else
  438. fs->state = seeking;
  439. break;
  440. }
  441. scan_track(fs);
  442. return;
  443. case seeking:
  444. if (fs->cur_cyl < 0) {
  445. fs->expect_cyl = -1;
  446. fs->state = locating;
  447. break;
  448. }
  449. if (fs->req_cyl == fs->cur_cyl) {
  450. printk("whoops, seeking 0\n");
  451. fs->state = do_transfer;
  452. break;
  453. }
  454. seek_track(fs, fs->req_cyl - fs->cur_cyl);
  455. return;
  456. case settling:
  457. /* check for SEEK_COMPLETE after 30ms */
  458. fs->settle_time = (HZ + 32) / 33;
  459. set_timeout(fs, fs->settle_time, settle_timeout);
  460. return;
  461. case do_transfer:
  462. if (fs->cur_cyl != fs->req_cyl) {
  463. if (fs->retries > 5) {
  464. end_request(fd_req, 0);
  465. fs->state = idle;
  466. return;
  467. }
  468. fs->state = seeking;
  469. break;
  470. }
  471. setup_transfer(fs);
  472. return;
  473. case jogging:
  474. seek_track(fs, -5);
  475. return;
  476. default:
  477. printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
  478. return;
  479. }
  480. }
  481. }
  482. static void scan_timeout(unsigned long data)
  483. {
  484. struct floppy_state *fs = (struct floppy_state *) data;
  485. struct swim3 __iomem *sw = fs->swim3;
  486. fs->timeout_pending = 0;
  487. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  488. out_8(&sw->select, RELAX);
  489. out_8(&sw->intr_enable, 0);
  490. fs->cur_cyl = -1;
  491. if (fs->retries > 5) {
  492. end_request(fd_req, 0);
  493. fs->state = idle;
  494. start_request(fs);
  495. } else {
  496. fs->state = jogging;
  497. act(fs);
  498. }
  499. }
  500. static void seek_timeout(unsigned long data)
  501. {
  502. struct floppy_state *fs = (struct floppy_state *) data;
  503. struct swim3 __iomem *sw = fs->swim3;
  504. fs->timeout_pending = 0;
  505. out_8(&sw->control_bic, DO_SEEK);
  506. out_8(&sw->select, RELAX);
  507. out_8(&sw->intr_enable, 0);
  508. printk(KERN_ERR "swim3: seek timeout\n");
  509. end_request(fd_req, 0);
  510. fs->state = idle;
  511. start_request(fs);
  512. }
  513. static void settle_timeout(unsigned long data)
  514. {
  515. struct floppy_state *fs = (struct floppy_state *) data;
  516. struct swim3 __iomem *sw = fs->swim3;
  517. fs->timeout_pending = 0;
  518. if (swim3_readbit(fs, SEEK_COMPLETE)) {
  519. out_8(&sw->select, RELAX);
  520. fs->state = locating;
  521. act(fs);
  522. return;
  523. }
  524. out_8(&sw->select, RELAX);
  525. if (fs->settle_time < 2*HZ) {
  526. ++fs->settle_time;
  527. set_timeout(fs, 1, settle_timeout);
  528. return;
  529. }
  530. printk(KERN_ERR "swim3: seek settle timeout\n");
  531. end_request(fd_req, 0);
  532. fs->state = idle;
  533. start_request(fs);
  534. }
  535. static void xfer_timeout(unsigned long data)
  536. {
  537. struct floppy_state *fs = (struct floppy_state *) data;
  538. struct swim3 __iomem *sw = fs->swim3;
  539. struct dbdma_regs __iomem *dr = fs->dma;
  540. struct dbdma_cmd *cp = fs->dma_cmd;
  541. unsigned long s;
  542. int n;
  543. fs->timeout_pending = 0;
  544. out_le32(&dr->control, RUN << 16);
  545. /* We must wait a bit for dbdma to stop */
  546. for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
  547. udelay(1);
  548. out_8(&sw->intr_enable, 0);
  549. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  550. out_8(&sw->select, RELAX);
  551. if (rq_data_dir(fd_req) == WRITE)
  552. ++cp;
  553. if (ld_le16(&cp->xfer_status) != 0)
  554. s = fs->scount - ((ld_le16(&cp->res_count) + 511) >> 9);
  555. else
  556. s = 0;
  557. fd_req->sector += s;
  558. fd_req->current_nr_sectors -= s;
  559. printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
  560. (rq_data_dir(fd_req)==WRITE? "writ": "read"), (long)fd_req->sector);
  561. end_request(fd_req, 0);
  562. fs->state = idle;
  563. start_request(fs);
  564. }
  565. static irqreturn_t swim3_interrupt(int irq, void *dev_id)
  566. {
  567. struct floppy_state *fs = (struct floppy_state *) dev_id;
  568. struct swim3 __iomem *sw = fs->swim3;
  569. int intr, err, n;
  570. int stat, resid;
  571. struct dbdma_regs __iomem *dr;
  572. struct dbdma_cmd *cp;
  573. intr = in_8(&sw->intr);
  574. err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
  575. if ((intr & ERROR_INTR) && fs->state != do_transfer)
  576. printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
  577. fs->state, rq_data_dir(fd_req), intr, err);
  578. switch (fs->state) {
  579. case locating:
  580. if (intr & SEEN_SECTOR) {
  581. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  582. out_8(&sw->select, RELAX);
  583. out_8(&sw->intr_enable, 0);
  584. del_timer(&fs->timeout);
  585. fs->timeout_pending = 0;
  586. if (sw->ctrack == 0xff) {
  587. printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
  588. fs->cur_cyl = -1;
  589. if (fs->retries > 5) {
  590. end_request(fd_req, 0);
  591. fs->state = idle;
  592. start_request(fs);
  593. } else {
  594. fs->state = jogging;
  595. act(fs);
  596. }
  597. break;
  598. }
  599. fs->cur_cyl = sw->ctrack;
  600. fs->cur_sector = sw->csect;
  601. if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
  602. printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
  603. fs->expect_cyl, fs->cur_cyl);
  604. fs->state = do_transfer;
  605. act(fs);
  606. }
  607. break;
  608. case seeking:
  609. case jogging:
  610. if (sw->nseek == 0) {
  611. out_8(&sw->control_bic, DO_SEEK);
  612. out_8(&sw->select, RELAX);
  613. out_8(&sw->intr_enable, 0);
  614. del_timer(&fs->timeout);
  615. fs->timeout_pending = 0;
  616. if (fs->state == seeking)
  617. ++fs->retries;
  618. fs->state = settling;
  619. act(fs);
  620. }
  621. break;
  622. case settling:
  623. out_8(&sw->intr_enable, 0);
  624. del_timer(&fs->timeout);
  625. fs->timeout_pending = 0;
  626. act(fs);
  627. break;
  628. case do_transfer:
  629. if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
  630. break;
  631. out_8(&sw->intr_enable, 0);
  632. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  633. out_8(&sw->select, RELAX);
  634. del_timer(&fs->timeout);
  635. fs->timeout_pending = 0;
  636. dr = fs->dma;
  637. cp = fs->dma_cmd;
  638. if (rq_data_dir(fd_req) == WRITE)
  639. ++cp;
  640. /*
  641. * Check that the main data transfer has finished.
  642. * On writing, the swim3 sometimes doesn't use
  643. * up all the bytes of the postamble, so we can still
  644. * see DMA active here. That doesn't matter as long
  645. * as all the sector data has been transferred.
  646. */
  647. if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
  648. /* wait a little while for DMA to complete */
  649. for (n = 0; n < 100; ++n) {
  650. if (cp->xfer_status != 0)
  651. break;
  652. udelay(1);
  653. barrier();
  654. }
  655. }
  656. /* turn off DMA */
  657. out_le32(&dr->control, (RUN | PAUSE) << 16);
  658. stat = ld_le16(&cp->xfer_status);
  659. resid = ld_le16(&cp->res_count);
  660. if (intr & ERROR_INTR) {
  661. n = fs->scount - 1 - resid / 512;
  662. if (n > 0) {
  663. fd_req->sector += n;
  664. fd_req->current_nr_sectors -= n;
  665. fd_req->buffer += n * 512;
  666. fs->req_sector += n;
  667. }
  668. if (fs->retries < 5) {
  669. ++fs->retries;
  670. act(fs);
  671. } else {
  672. printk("swim3: error %sing block %ld (err=%x)\n",
  673. rq_data_dir(fd_req) == WRITE? "writ": "read",
  674. (long)fd_req->sector, err);
  675. end_request(fd_req, 0);
  676. fs->state = idle;
  677. }
  678. } else {
  679. if ((stat & ACTIVE) == 0 || resid != 0) {
  680. /* musta been an error */
  681. printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
  682. printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
  683. fs->state, rq_data_dir(fd_req), intr, err);
  684. end_request(fd_req, 0);
  685. fs->state = idle;
  686. start_request(fs);
  687. break;
  688. }
  689. fd_req->sector += fs->scount;
  690. fd_req->current_nr_sectors -= fs->scount;
  691. fd_req->buffer += fs->scount * 512;
  692. if (fd_req->current_nr_sectors <= 0) {
  693. end_request(fd_req, 1);
  694. fs->state = idle;
  695. } else {
  696. fs->req_sector += fs->scount;
  697. if (fs->req_sector > fs->secpertrack) {
  698. fs->req_sector -= fs->secpertrack;
  699. if (++fs->head > 1) {
  700. fs->head = 0;
  701. ++fs->req_cyl;
  702. }
  703. }
  704. act(fs);
  705. }
  706. }
  707. if (fs->state == idle)
  708. start_request(fs);
  709. break;
  710. default:
  711. printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
  712. }
  713. return IRQ_HANDLED;
  714. }
  715. /*
  716. static void fd_dma_interrupt(int irq, void *dev_id)
  717. {
  718. }
  719. */
  720. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  721. int interruptible)
  722. {
  723. unsigned long flags;
  724. spin_lock_irqsave(&fs->lock, flags);
  725. if (fs->state != idle) {
  726. ++fs->wanted;
  727. while (fs->state != available) {
  728. if (interruptible && signal_pending(current)) {
  729. --fs->wanted;
  730. spin_unlock_irqrestore(&fs->lock, flags);
  731. return -EINTR;
  732. }
  733. interruptible_sleep_on(&fs->wait);
  734. }
  735. --fs->wanted;
  736. }
  737. fs->state = state;
  738. spin_unlock_irqrestore(&fs->lock, flags);
  739. return 0;
  740. }
  741. static void release_drive(struct floppy_state *fs)
  742. {
  743. unsigned long flags;
  744. spin_lock_irqsave(&fs->lock, flags);
  745. fs->state = idle;
  746. start_request(fs);
  747. spin_unlock_irqrestore(&fs->lock, flags);
  748. }
  749. static int fd_eject(struct floppy_state *fs)
  750. {
  751. int err, n;
  752. err = grab_drive(fs, ejecting, 1);
  753. if (err)
  754. return err;
  755. swim3_action(fs, EJECT);
  756. for (n = 20; n > 0; --n) {
  757. if (signal_pending(current)) {
  758. err = -EINTR;
  759. break;
  760. }
  761. swim3_select(fs, RELAX);
  762. schedule_timeout_interruptible(1);
  763. if (swim3_readbit(fs, DISK_IN) == 0)
  764. break;
  765. }
  766. swim3_select(fs, RELAX);
  767. udelay(150);
  768. fs->ejected = 1;
  769. release_drive(fs);
  770. return err;
  771. }
  772. static struct floppy_struct floppy_type =
  773. { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
  774. static int floppy_ioctl(struct inode *inode, struct file *filp,
  775. unsigned int cmd, unsigned long param)
  776. {
  777. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  778. int err;
  779. if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
  780. return -EPERM;
  781. #ifdef CONFIG_PMAC_MEDIABAY
  782. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  783. return -ENXIO;
  784. #endif
  785. switch (cmd) {
  786. case FDEJECT:
  787. if (fs->ref_count != 1)
  788. return -EBUSY;
  789. err = fd_eject(fs);
  790. return err;
  791. case FDGETPRM:
  792. if (copy_to_user((void __user *) param, &floppy_type,
  793. sizeof(struct floppy_struct)))
  794. return -EFAULT;
  795. return 0;
  796. }
  797. return -ENOTTY;
  798. }
  799. static int floppy_open(struct inode *inode, struct file *filp)
  800. {
  801. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  802. struct swim3 __iomem *sw = fs->swim3;
  803. int n, err = 0;
  804. if (fs->ref_count == 0) {
  805. #ifdef CONFIG_PMAC_MEDIABAY
  806. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  807. return -ENXIO;
  808. #endif
  809. out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
  810. out_8(&sw->control_bic, 0xff);
  811. out_8(&sw->mode, 0x95);
  812. udelay(10);
  813. out_8(&sw->intr_enable, 0);
  814. out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
  815. swim3_action(fs, MOTOR_ON);
  816. fs->write_prot = -1;
  817. fs->cur_cyl = -1;
  818. for (n = 0; n < 2 * HZ; ++n) {
  819. if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
  820. break;
  821. if (signal_pending(current)) {
  822. err = -EINTR;
  823. break;
  824. }
  825. swim3_select(fs, RELAX);
  826. schedule_timeout_interruptible(1);
  827. }
  828. if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
  829. || swim3_readbit(fs, DISK_IN) == 0))
  830. err = -ENXIO;
  831. swim3_action(fs, SETMFM);
  832. swim3_select(fs, RELAX);
  833. } else if (fs->ref_count == -1 || filp->f_flags & O_EXCL)
  834. return -EBUSY;
  835. if (err == 0 && (filp->f_flags & O_NDELAY) == 0
  836. && (filp->f_mode & 3)) {
  837. check_disk_change(inode->i_bdev);
  838. if (fs->ejected)
  839. err = -ENXIO;
  840. }
  841. if (err == 0 && (filp->f_mode & 2)) {
  842. if (fs->write_prot < 0)
  843. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  844. if (fs->write_prot)
  845. err = -EROFS;
  846. }
  847. if (err) {
  848. if (fs->ref_count == 0) {
  849. swim3_action(fs, MOTOR_OFF);
  850. out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
  851. swim3_select(fs, RELAX);
  852. }
  853. return err;
  854. }
  855. if (filp->f_flags & O_EXCL)
  856. fs->ref_count = -1;
  857. else
  858. ++fs->ref_count;
  859. return 0;
  860. }
  861. static int floppy_release(struct inode *inode, struct file *filp)
  862. {
  863. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  864. struct swim3 __iomem *sw = fs->swim3;
  865. if (fs->ref_count > 0 && --fs->ref_count == 0) {
  866. swim3_action(fs, MOTOR_OFF);
  867. out_8(&sw->control_bic, 0xff);
  868. swim3_select(fs, RELAX);
  869. }
  870. return 0;
  871. }
  872. static int floppy_check_change(struct gendisk *disk)
  873. {
  874. struct floppy_state *fs = disk->private_data;
  875. return fs->ejected;
  876. }
  877. static int floppy_revalidate(struct gendisk *disk)
  878. {
  879. struct floppy_state *fs = disk->private_data;
  880. struct swim3 __iomem *sw;
  881. int ret, n;
  882. #ifdef CONFIG_PMAC_MEDIABAY
  883. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  884. return -ENXIO;
  885. #endif
  886. sw = fs->swim3;
  887. grab_drive(fs, revalidating, 0);
  888. out_8(&sw->intr_enable, 0);
  889. out_8(&sw->control_bis, DRIVE_ENABLE);
  890. swim3_action(fs, MOTOR_ON); /* necessary? */
  891. fs->write_prot = -1;
  892. fs->cur_cyl = -1;
  893. mdelay(1);
  894. for (n = HZ; n > 0; --n) {
  895. if (swim3_readbit(fs, SEEK_COMPLETE))
  896. break;
  897. if (signal_pending(current))
  898. break;
  899. swim3_select(fs, RELAX);
  900. schedule_timeout_interruptible(1);
  901. }
  902. ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
  903. || swim3_readbit(fs, DISK_IN) == 0;
  904. if (ret)
  905. swim3_action(fs, MOTOR_OFF);
  906. else {
  907. fs->ejected = 0;
  908. swim3_action(fs, SETMFM);
  909. }
  910. swim3_select(fs, RELAX);
  911. release_drive(fs);
  912. return ret;
  913. }
  914. static struct block_device_operations floppy_fops = {
  915. .open = floppy_open,
  916. .release = floppy_release,
  917. .ioctl = floppy_ioctl,
  918. .media_changed = floppy_check_change,
  919. .revalidate_disk= floppy_revalidate,
  920. };
  921. static int swim3_add_device(struct macio_dev *mdev, int index)
  922. {
  923. struct device_node *swim = mdev->ofdev.node;
  924. struct device_node *mediabay;
  925. struct floppy_state *fs = &floppy_states[index];
  926. int rc = -EBUSY;
  927. /* Check & Request resources */
  928. if (macio_resource_count(mdev) < 2) {
  929. printk(KERN_WARNING "ifd%d: no address for %s\n",
  930. index, swim->full_name);
  931. return -ENXIO;
  932. }
  933. if (macio_irq_count(mdev) < 2) {
  934. printk(KERN_WARNING "fd%d: no intrs for device %s\n",
  935. index, swim->full_name);
  936. }
  937. if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
  938. printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
  939. index, swim->full_name);
  940. return -EBUSY;
  941. }
  942. if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
  943. printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
  944. index, swim->full_name);
  945. macio_release_resource(mdev, 0);
  946. return -EBUSY;
  947. }
  948. dev_set_drvdata(&mdev->ofdev.dev, fs);
  949. mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ?
  950. swim->parent : NULL;
  951. if (mediabay == NULL)
  952. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
  953. memset(fs, 0, sizeof(*fs));
  954. spin_lock_init(&fs->lock);
  955. fs->state = idle;
  956. fs->swim3 = (struct swim3 __iomem *)
  957. ioremap(macio_resource_start(mdev, 0), 0x200);
  958. if (fs->swim3 == NULL) {
  959. printk("fd%d: couldn't map registers for %s\n",
  960. index, swim->full_name);
  961. rc = -ENOMEM;
  962. goto out_release;
  963. }
  964. fs->dma = (struct dbdma_regs __iomem *)
  965. ioremap(macio_resource_start(mdev, 1), 0x200);
  966. if (fs->dma == NULL) {
  967. printk("fd%d: couldn't map DMA for %s\n",
  968. index, swim->full_name);
  969. iounmap(fs->swim3);
  970. rc = -ENOMEM;
  971. goto out_release;
  972. }
  973. fs->swim3_intr = macio_irq(mdev, 0);
  974. fs->dma_intr = macio_irq(mdev, 1);;
  975. fs->cur_cyl = -1;
  976. fs->cur_sector = -1;
  977. fs->secpercyl = 36;
  978. fs->secpertrack = 18;
  979. fs->total_secs = 2880;
  980. fs->media_bay = mediabay;
  981. init_waitqueue_head(&fs->wait);
  982. fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
  983. memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
  984. st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
  985. if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
  986. printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
  987. index, fs->swim3_intr, swim->full_name);
  988. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  989. goto out_unmap;
  990. return -EBUSY;
  991. }
  992. /*
  993. if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
  994. printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
  995. fs->dma_intr);
  996. return -EBUSY;
  997. }
  998. */
  999. init_timer(&fs->timeout);
  1000. printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
  1001. mediabay ? "in media bay" : "");
  1002. return 0;
  1003. out_unmap:
  1004. iounmap(fs->dma);
  1005. iounmap(fs->swim3);
  1006. out_release:
  1007. macio_release_resource(mdev, 0);
  1008. macio_release_resource(mdev, 1);
  1009. return rc;
  1010. }
  1011. static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
  1012. {
  1013. int i, rc;
  1014. struct gendisk *disk;
  1015. /* Add the drive */
  1016. rc = swim3_add_device(mdev, floppy_count);
  1017. if (rc)
  1018. return rc;
  1019. /* Now create the queue if not there yet */
  1020. if (swim3_queue == NULL) {
  1021. /* If we failed, there isn't much we can do as the driver is still
  1022. * too dumb to remove the device, just bail out
  1023. */
  1024. if (register_blkdev(FLOPPY_MAJOR, "fd"))
  1025. return 0;
  1026. swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
  1027. if (swim3_queue == NULL) {
  1028. unregister_blkdev(FLOPPY_MAJOR, "fd");
  1029. return 0;
  1030. }
  1031. }
  1032. /* Now register that disk. Same comment about failure handling */
  1033. i = floppy_count++;
  1034. disk = disks[i] = alloc_disk(1);
  1035. if (disk == NULL)
  1036. return 0;
  1037. disk->major = FLOPPY_MAJOR;
  1038. disk->first_minor = i;
  1039. disk->fops = &floppy_fops;
  1040. disk->private_data = &floppy_states[i];
  1041. disk->queue = swim3_queue;
  1042. disk->flags |= GENHD_FL_REMOVABLE;
  1043. sprintf(disk->disk_name, "fd%d", i);
  1044. set_capacity(disk, 2880);
  1045. add_disk(disk);
  1046. return 0;
  1047. }
  1048. static struct of_device_id swim3_match[] =
  1049. {
  1050. {
  1051. .name = "swim3",
  1052. },
  1053. {
  1054. .compatible = "ohare-swim3"
  1055. },
  1056. {
  1057. .compatible = "swim3"
  1058. },
  1059. };
  1060. static struct macio_driver swim3_driver =
  1061. {
  1062. .name = "swim3",
  1063. .match_table = swim3_match,
  1064. .probe = swim3_attach,
  1065. #if 0
  1066. .suspend = swim3_suspend,
  1067. .resume = swim3_resume,
  1068. #endif
  1069. };
  1070. int swim3_init(void)
  1071. {
  1072. macio_register_driver(&swim3_driver);
  1073. return 0;
  1074. }
  1075. module_init(swim3_init)
  1076. MODULE_LICENSE("GPL");
  1077. MODULE_AUTHOR("Paul Mackerras");
  1078. MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);