cciss.h 6.8 KB

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  1. #ifndef CCISS_H
  2. #define CCISS_H
  3. #include <linux/genhd.h>
  4. #include "cciss_cmd.h"
  5. #define NWD 16
  6. #define NWD_SHIFT 4
  7. #define MAX_PART (1 << NWD_SHIFT)
  8. #define IO_OK 0
  9. #define IO_ERROR 1
  10. struct ctlr_info;
  11. typedef struct ctlr_info ctlr_info_t;
  12. struct access_method {
  13. void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
  14. void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
  15. unsigned long (*fifo_full)(ctlr_info_t *h);
  16. unsigned long (*intr_pending)(ctlr_info_t *h);
  17. unsigned long (*command_completed)(ctlr_info_t *h);
  18. };
  19. typedef struct _drive_info_struct
  20. {
  21. __u32 LunID;
  22. int usage_count;
  23. struct request_queue *queue;
  24. sector_t nr_blocks;
  25. int block_size;
  26. int heads;
  27. int sectors;
  28. int cylinders;
  29. int raid_level; /* set to -1 to indicate that
  30. * the drive is not in use/configured
  31. */
  32. int busy_configuring; /*This is set when the drive is being removed
  33. *to prevent it from being opened or it's queue
  34. *from being started.
  35. */
  36. } drive_info_struct;
  37. #ifdef CONFIG_CISS_SCSI_TAPE
  38. struct sendcmd_reject_list {
  39. int ncompletions;
  40. unsigned long *complete; /* array of NR_CMDS tags */
  41. };
  42. #endif
  43. struct ctlr_info
  44. {
  45. int ctlr;
  46. char devname[8];
  47. char *product_name;
  48. char firm_ver[4]; // Firmware version
  49. struct pci_dev *pdev;
  50. __u32 board_id;
  51. void __iomem *vaddr;
  52. unsigned long paddr;
  53. CfgTable_struct __iomem *cfgtable;
  54. int interrupts_enabled;
  55. int major;
  56. int max_commands;
  57. int commands_outstanding;
  58. int max_outstanding; /* Debug */
  59. int num_luns;
  60. int highest_lun;
  61. int usage_count; /* number of opens all all minor devices */
  62. # define DOORBELL_INT 0
  63. # define PERF_MODE_INT 1
  64. # define SIMPLE_MODE_INT 2
  65. # define MEMQ_MODE_INT 3
  66. unsigned int intr[4];
  67. unsigned int msix_vector;
  68. unsigned int msi_vector;
  69. BYTE cciss_read;
  70. BYTE cciss_write;
  71. BYTE cciss_read_capacity;
  72. // information about each logical volume
  73. drive_info_struct drv[CISS_MAX_LUN];
  74. struct access_method access;
  75. /* queue and queue Info */
  76. CommandList_struct *reqQ;
  77. CommandList_struct *cmpQ;
  78. unsigned int Qdepth;
  79. unsigned int maxQsinceinit;
  80. unsigned int maxSG;
  81. spinlock_t lock;
  82. //* pointers to command and error info pool */
  83. CommandList_struct *cmd_pool;
  84. dma_addr_t cmd_pool_dhandle;
  85. ErrorInfo_struct *errinfo_pool;
  86. dma_addr_t errinfo_pool_dhandle;
  87. unsigned long *cmd_pool_bits;
  88. int nr_allocs;
  89. int nr_frees;
  90. int busy_configuring;
  91. int busy_initializing;
  92. /* This element holds the zero based queue number of the last
  93. * queue to be started. It is used for fairness.
  94. */
  95. int next_to_run;
  96. // Disk structures we need to pass back
  97. struct gendisk *gendisk[NWD];
  98. #ifdef CONFIG_CISS_SCSI_TAPE
  99. void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
  100. /* list of block side commands the scsi error handling sucked up */
  101. /* and saved for later processing */
  102. struct sendcmd_reject_list scsi_rejects;
  103. #endif
  104. unsigned char alive;
  105. };
  106. /* Defining the diffent access_menthods */
  107. /*
  108. * Memory mapped FIFO interface (SMART 53xx cards)
  109. */
  110. #define SA5_DOORBELL 0x20
  111. #define SA5_REQUEST_PORT_OFFSET 0x40
  112. #define SA5_REPLY_INTR_MASK_OFFSET 0x34
  113. #define SA5_REPLY_PORT_OFFSET 0x44
  114. #define SA5_INTR_STATUS 0x30
  115. #define SA5_SCRATCHPAD_OFFSET 0xB0
  116. #define SA5_CTCFG_OFFSET 0xB4
  117. #define SA5_CTMEM_OFFSET 0xB8
  118. #define SA5_INTR_OFF 0x08
  119. #define SA5B_INTR_OFF 0x04
  120. #define SA5_INTR_PENDING 0x08
  121. #define SA5B_INTR_PENDING 0x04
  122. #define FIFO_EMPTY 0xffffffff
  123. #define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
  124. #define CISS_ERROR_BIT 0x02
  125. #define CCISS_INTR_ON 1
  126. #define CCISS_INTR_OFF 0
  127. /*
  128. Send the command to the hardware
  129. */
  130. static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
  131. {
  132. #ifdef CCISS_DEBUG
  133. printk("Sending %x - down to controller\n", c->busaddr );
  134. #endif /* CCISS_DEBUG */
  135. writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
  136. h->commands_outstanding++;
  137. if ( h->commands_outstanding > h->max_outstanding)
  138. h->max_outstanding = h->commands_outstanding;
  139. }
  140. /*
  141. * This card is the opposite of the other cards.
  142. * 0 turns interrupts on...
  143. * 0x08 turns them off...
  144. */
  145. static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
  146. {
  147. if (val)
  148. { /* Turn interrupts on */
  149. h->interrupts_enabled = 1;
  150. writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  151. } else /* Turn them off */
  152. {
  153. h->interrupts_enabled = 0;
  154. writel( SA5_INTR_OFF,
  155. h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  156. }
  157. }
  158. /*
  159. * This card is the opposite of the other cards.
  160. * 0 turns interrupts on...
  161. * 0x04 turns them off...
  162. */
  163. static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
  164. {
  165. if (val)
  166. { /* Turn interrupts on */
  167. h->interrupts_enabled = 1;
  168. writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  169. } else /* Turn them off */
  170. {
  171. h->interrupts_enabled = 0;
  172. writel( SA5B_INTR_OFF,
  173. h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
  174. }
  175. }
  176. /*
  177. * Returns true if fifo is full.
  178. *
  179. */
  180. static unsigned long SA5_fifo_full(ctlr_info_t *h)
  181. {
  182. if( h->commands_outstanding >= h->max_commands)
  183. return(1);
  184. else
  185. return(0);
  186. }
  187. /*
  188. * returns value read from hardware.
  189. * returns FIFO_EMPTY if there is nothing to read
  190. */
  191. static unsigned long SA5_completed(ctlr_info_t *h)
  192. {
  193. unsigned long register_value
  194. = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
  195. if(register_value != FIFO_EMPTY)
  196. {
  197. h->commands_outstanding--;
  198. #ifdef CCISS_DEBUG
  199. printk("cciss: Read %lx back from board\n", register_value);
  200. #endif /* CCISS_DEBUG */
  201. }
  202. #ifdef CCISS_DEBUG
  203. else
  204. {
  205. printk("cciss: FIFO Empty read\n");
  206. }
  207. #endif
  208. return ( register_value);
  209. }
  210. /*
  211. * Returns true if an interrupt is pending..
  212. */
  213. static unsigned long SA5_intr_pending(ctlr_info_t *h)
  214. {
  215. unsigned long register_value =
  216. readl(h->vaddr + SA5_INTR_STATUS);
  217. #ifdef CCISS_DEBUG
  218. printk("cciss: intr_pending %lx\n", register_value);
  219. #endif /* CCISS_DEBUG */
  220. if( register_value & SA5_INTR_PENDING)
  221. return 1;
  222. return 0 ;
  223. }
  224. /*
  225. * Returns true if an interrupt is pending..
  226. */
  227. static unsigned long SA5B_intr_pending(ctlr_info_t *h)
  228. {
  229. unsigned long register_value =
  230. readl(h->vaddr + SA5_INTR_STATUS);
  231. #ifdef CCISS_DEBUG
  232. printk("cciss: intr_pending %lx\n", register_value);
  233. #endif /* CCISS_DEBUG */
  234. if( register_value & SA5B_INTR_PENDING)
  235. return 1;
  236. return 0 ;
  237. }
  238. static struct access_method SA5_access = {
  239. SA5_submit_command,
  240. SA5_intr_mask,
  241. SA5_fifo_full,
  242. SA5_intr_pending,
  243. SA5_completed,
  244. };
  245. static struct access_method SA5B_access = {
  246. SA5_submit_command,
  247. SA5B_intr_mask,
  248. SA5_fifo_full,
  249. SA5B_intr_pending,
  250. SA5_completed,
  251. };
  252. struct board_type {
  253. __u32 board_id;
  254. char *product_name;
  255. struct access_method *access;
  256. };
  257. #define CCISS_LOCK(i) (&hba[i]->lock)
  258. #endif /* CCISS_H */