nicstar.c 88 KB

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  1. /******************************************************************************
  2. *
  3. * nicstar.c
  4. *
  5. * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
  6. *
  7. * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
  8. * It was taken from the frle-0.22 device driver.
  9. * As the file doesn't have a copyright notice, in the file
  10. * nicstarmac.copyright I put the copyright notice from the
  11. * frle-0.22 device driver.
  12. * Some code is based on the nicstar driver by M. Welsh.
  13. *
  14. * Author: Rui Prior (rprior@inescn.pt)
  15. * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
  16. *
  17. *
  18. * (C) INESC 1999
  19. *
  20. *
  21. ******************************************************************************/
  22. /**** IMPORTANT INFORMATION ***************************************************
  23. *
  24. * There are currently three types of spinlocks:
  25. *
  26. * 1 - Per card interrupt spinlock (to protect structures and such)
  27. * 2 - Per SCQ scq spinlock
  28. * 3 - Per card resource spinlock (to access registers, etc.)
  29. *
  30. * These must NEVER be grabbed in reverse order.
  31. *
  32. ******************************************************************************/
  33. /* Header files ***************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/atmdev.h>
  38. #include <linux/atm.h>
  39. #include <linux/pci.h>
  40. #include <linux/types.h>
  41. #include <linux/string.h>
  42. #include <linux/delay.h>
  43. #include <linux/init.h>
  44. #include <linux/sched.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/bitops.h>
  48. #include <asm/io.h>
  49. #include <asm/uaccess.h>
  50. #include <asm/atomic.h>
  51. #include "nicstar.h"
  52. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  53. #include "suni.h"
  54. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  55. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  56. #include "idt77105.h"
  57. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  58. #if BITS_PER_LONG != 32
  59. # error FIXME: this driver requires a 32-bit platform
  60. #endif
  61. /* Additional code ************************************************************/
  62. #include "nicstarmac.c"
  63. /* Configurable parameters ****************************************************/
  64. #undef PHY_LOOPBACK
  65. #undef TX_DEBUG
  66. #undef RX_DEBUG
  67. #undef GENERAL_DEBUG
  68. #undef EXTRA_DEBUG
  69. #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
  70. you're going to use only raw ATM */
  71. /* Do not touch these *********************************************************/
  72. #ifdef TX_DEBUG
  73. #define TXPRINTK(args...) printk(args)
  74. #else
  75. #define TXPRINTK(args...)
  76. #endif /* TX_DEBUG */
  77. #ifdef RX_DEBUG
  78. #define RXPRINTK(args...) printk(args)
  79. #else
  80. #define RXPRINTK(args...)
  81. #endif /* RX_DEBUG */
  82. #ifdef GENERAL_DEBUG
  83. #define PRINTK(args...) printk(args)
  84. #else
  85. #define PRINTK(args...)
  86. #endif /* GENERAL_DEBUG */
  87. #ifdef EXTRA_DEBUG
  88. #define XPRINTK(args...) printk(args)
  89. #else
  90. #define XPRINTK(args...)
  91. #endif /* EXTRA_DEBUG */
  92. /* Macros *********************************************************************/
  93. #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
  94. #define NS_DELAY mdelay(1)
  95. #define ALIGN_BUS_ADDR(addr, alignment) \
  96. ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
  97. #define ALIGN_ADDRESS(addr, alignment) \
  98. bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
  99. #undef CEIL
  100. #ifndef ATM_SKB
  101. #define ATM_SKB(s) (&(s)->atm)
  102. #endif
  103. /* Spinlock debugging stuff */
  104. #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
  105. #define ns_grab_int_lock(card,flags) \
  106. do { \
  107. unsigned long nsdsf, nsdsf2; \
  108. local_irq_save(flags); \
  109. save_flags(nsdsf); cli();\
  110. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  111. (flags)&(1<<9)?"en":"dis"); \
  112. if (spin_is_locked(&(card)->int_lock) && \
  113. (card)->cpu_int == smp_processor_id()) { \
  114. printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
  115. __LINE__, smp_processor_id(), (card)->has_int_lock, \
  116. (card)->cpu_int); \
  117. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  118. } \
  119. if (spin_is_locked(&(card)->res_lock) && \
  120. (card)->cpu_res == smp_processor_id()) { \
  121. printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
  122. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  123. (card)->cpu_res); \
  124. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  125. } \
  126. spin_lock_irq(&(card)->int_lock); \
  127. (card)->has_int_lock = __LINE__; \
  128. (card)->cpu_int = smp_processor_id(); \
  129. restore_flags(nsdsf); } while (0)
  130. #define ns_grab_res_lock(card,flags) \
  131. do { \
  132. unsigned long nsdsf, nsdsf2; \
  133. local_irq_save(flags); \
  134. save_flags(nsdsf); cli();\
  135. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  136. (flags)&(1<<9)?"en":"dis"); \
  137. if (spin_is_locked(&(card)->res_lock) && \
  138. (card)->cpu_res == smp_processor_id()) { \
  139. printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
  140. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  141. (card)->cpu_res); \
  142. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  143. } \
  144. spin_lock_irq(&(card)->res_lock); \
  145. (card)->has_res_lock = __LINE__; \
  146. (card)->cpu_res = smp_processor_id(); \
  147. restore_flags(nsdsf); } while (0)
  148. #define ns_grab_scq_lock(card,scq,flags) \
  149. do { \
  150. unsigned long nsdsf, nsdsf2; \
  151. local_irq_save(flags); \
  152. save_flags(nsdsf); cli();\
  153. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  154. (flags)&(1<<9)?"en":"dis"); \
  155. if (spin_is_locked(&(scq)->lock) && \
  156. (scq)->cpu_lock == smp_processor_id()) { \
  157. printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
  158. __LINE__, smp_processor_id(), (scq)->has_lock, \
  159. (scq)->cpu_lock); \
  160. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  161. } \
  162. if (spin_is_locked(&(card)->res_lock) && \
  163. (card)->cpu_res == smp_processor_id()) { \
  164. printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
  165. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  166. (card)->cpu_res); \
  167. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  168. } \
  169. spin_lock_irq(&(scq)->lock); \
  170. (scq)->has_lock = __LINE__; \
  171. (scq)->cpu_lock = smp_processor_id(); \
  172. restore_flags(nsdsf); } while (0)
  173. #else /* !NS_DEBUG_SPINLOCKS */
  174. #define ns_grab_int_lock(card,flags) \
  175. spin_lock_irqsave(&(card)->int_lock,(flags))
  176. #define ns_grab_res_lock(card,flags) \
  177. spin_lock_irqsave(&(card)->res_lock,(flags))
  178. #define ns_grab_scq_lock(card,scq,flags) \
  179. spin_lock_irqsave(&(scq)->lock,flags)
  180. #endif /* NS_DEBUG_SPINLOCKS */
  181. /* Function declarations ******************************************************/
  182. static u32 ns_read_sram(ns_dev *card, u32 sram_address);
  183. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
  184. static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
  185. static void __devinit ns_init_card_error(ns_dev *card, int error);
  186. static scq_info *get_scq(int size, u32 scd);
  187. static void free_scq(scq_info *scq, struct atm_vcc *vcc);
  188. static void push_rxbufs(ns_dev *, struct sk_buff *);
  189. static irqreturn_t ns_irq_handler(int irq, void *dev_id);
  190. static int ns_open(struct atm_vcc *vcc);
  191. static void ns_close(struct atm_vcc *vcc);
  192. static void fill_tst(ns_dev *card, int n, vc_map *vc);
  193. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
  194. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  195. struct sk_buff *skb);
  196. static void process_tsq(ns_dev *card);
  197. static void drain_scq(ns_dev *card, scq_info *scq, int pos);
  198. static void process_rsq(ns_dev *card);
  199. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
  200. #ifdef NS_USE_DESTRUCTORS
  201. static void ns_sb_destructor(struct sk_buff *sb);
  202. static void ns_lb_destructor(struct sk_buff *lb);
  203. static void ns_hb_destructor(struct sk_buff *hb);
  204. #endif /* NS_USE_DESTRUCTORS */
  205. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
  206. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
  207. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
  208. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
  209. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
  210. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
  211. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
  212. static void which_list(ns_dev *card, struct sk_buff *skb);
  213. static void ns_poll(unsigned long arg);
  214. static int ns_parse_mac(char *mac, unsigned char *esi);
  215. static short ns_h2i(char c);
  216. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  217. unsigned long addr);
  218. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
  219. /* Global variables ***********************************************************/
  220. static struct ns_dev *cards[NS_MAX_CARDS];
  221. static unsigned num_cards;
  222. static struct atmdev_ops atm_ops =
  223. {
  224. .open = ns_open,
  225. .close = ns_close,
  226. .ioctl = ns_ioctl,
  227. .send = ns_send,
  228. .phy_put = ns_phy_put,
  229. .phy_get = ns_phy_get,
  230. .proc_read = ns_proc_read,
  231. .owner = THIS_MODULE,
  232. };
  233. static struct timer_list ns_timer;
  234. static char *mac[NS_MAX_CARDS];
  235. module_param_array(mac, charp, NULL, 0);
  236. MODULE_LICENSE("GPL");
  237. /* Functions*******************************************************************/
  238. static int __devinit nicstar_init_one(struct pci_dev *pcidev,
  239. const struct pci_device_id *ent)
  240. {
  241. static int index = -1;
  242. unsigned int error;
  243. index++;
  244. cards[index] = NULL;
  245. error = ns_init_card(index, pcidev);
  246. if (error) {
  247. cards[index--] = NULL; /* don't increment index */
  248. goto err_out;
  249. }
  250. return 0;
  251. err_out:
  252. return -ENODEV;
  253. }
  254. static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
  255. {
  256. int i, j;
  257. ns_dev *card = pci_get_drvdata(pcidev);
  258. struct sk_buff *hb;
  259. struct sk_buff *iovb;
  260. struct sk_buff *lb;
  261. struct sk_buff *sb;
  262. i = card->index;
  263. if (cards[i] == NULL)
  264. return;
  265. if (card->atmdev->phy && card->atmdev->phy->stop)
  266. card->atmdev->phy->stop(card->atmdev);
  267. /* Stop everything */
  268. writel(0x00000000, card->membase + CFG);
  269. /* De-register device */
  270. atm_dev_deregister(card->atmdev);
  271. /* Disable PCI device */
  272. pci_disable_device(pcidev);
  273. /* Free up resources */
  274. j = 0;
  275. PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
  276. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  277. {
  278. dev_kfree_skb_any(hb);
  279. j++;
  280. }
  281. PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
  282. j = 0;
  283. PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
  284. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  285. {
  286. dev_kfree_skb_any(iovb);
  287. j++;
  288. }
  289. PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
  290. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  291. dev_kfree_skb_any(lb);
  292. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  293. dev_kfree_skb_any(sb);
  294. free_scq(card->scq0, NULL);
  295. for (j = 0; j < NS_FRSCD_NUM; j++)
  296. {
  297. if (card->scd2vc[j] != NULL)
  298. free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
  299. }
  300. kfree(card->rsq.org);
  301. kfree(card->tsq.org);
  302. free_irq(card->pcidev->irq, card);
  303. iounmap(card->membase);
  304. kfree(card);
  305. }
  306. static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
  307. {
  308. {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
  309. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  310. {0,} /* terminate list */
  311. };
  312. MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
  313. static struct pci_driver nicstar_driver = {
  314. .name = "nicstar",
  315. .id_table = nicstar_pci_tbl,
  316. .probe = nicstar_init_one,
  317. .remove = __devexit_p(nicstar_remove_one),
  318. };
  319. static int __init nicstar_init(void)
  320. {
  321. unsigned error = 0; /* Initialized to remove compile warning */
  322. XPRINTK("nicstar: nicstar_init() called.\n");
  323. error = pci_register_driver(&nicstar_driver);
  324. TXPRINTK("nicstar: TX debug enabled.\n");
  325. RXPRINTK("nicstar: RX debug enabled.\n");
  326. PRINTK("nicstar: General debug enabled.\n");
  327. #ifdef PHY_LOOPBACK
  328. printk("nicstar: using PHY loopback.\n");
  329. #endif /* PHY_LOOPBACK */
  330. XPRINTK("nicstar: nicstar_init() returned.\n");
  331. if (!error) {
  332. init_timer(&ns_timer);
  333. ns_timer.expires = jiffies + NS_POLL_PERIOD;
  334. ns_timer.data = 0UL;
  335. ns_timer.function = ns_poll;
  336. add_timer(&ns_timer);
  337. }
  338. return error;
  339. }
  340. static void __exit nicstar_cleanup(void)
  341. {
  342. XPRINTK("nicstar: nicstar_cleanup() called.\n");
  343. del_timer(&ns_timer);
  344. pci_unregister_driver(&nicstar_driver);
  345. XPRINTK("nicstar: nicstar_cleanup() returned.\n");
  346. }
  347. static u32 ns_read_sram(ns_dev *card, u32 sram_address)
  348. {
  349. unsigned long flags;
  350. u32 data;
  351. sram_address <<= 2;
  352. sram_address &= 0x0007FFFC; /* address must be dword aligned */
  353. sram_address |= 0x50000000; /* SRAM read command */
  354. ns_grab_res_lock(card, flags);
  355. while (CMD_BUSY(card));
  356. writel(sram_address, card->membase + CMD);
  357. while (CMD_BUSY(card));
  358. data = readl(card->membase + DR0);
  359. spin_unlock_irqrestore(&card->res_lock, flags);
  360. return data;
  361. }
  362. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
  363. {
  364. unsigned long flags;
  365. int i, c;
  366. count--; /* count range now is 0..3 instead of 1..4 */
  367. c = count;
  368. c <<= 2; /* to use increments of 4 */
  369. ns_grab_res_lock(card, flags);
  370. while (CMD_BUSY(card));
  371. for (i = 0; i <= c; i += 4)
  372. writel(*(value++), card->membase + i);
  373. /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
  374. so card->membase + DR0 == card->membase */
  375. sram_address <<= 2;
  376. sram_address &= 0x0007FFFC;
  377. sram_address |= (0x40000000 | count);
  378. writel(sram_address, card->membase + CMD);
  379. spin_unlock_irqrestore(&card->res_lock, flags);
  380. }
  381. static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
  382. {
  383. int j;
  384. struct ns_dev *card = NULL;
  385. unsigned char pci_latency;
  386. unsigned error;
  387. u32 data;
  388. u32 u32d[4];
  389. u32 ns_cfg_rctsize;
  390. int bcount;
  391. unsigned long membase;
  392. error = 0;
  393. if (pci_enable_device(pcidev))
  394. {
  395. printk("nicstar%d: can't enable PCI device\n", i);
  396. error = 2;
  397. ns_init_card_error(card, error);
  398. return error;
  399. }
  400. if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
  401. {
  402. printk("nicstar%d: can't allocate memory for device structure.\n", i);
  403. error = 2;
  404. ns_init_card_error(card, error);
  405. return error;
  406. }
  407. cards[i] = card;
  408. spin_lock_init(&card->int_lock);
  409. spin_lock_init(&card->res_lock);
  410. pci_set_drvdata(pcidev, card);
  411. card->index = i;
  412. card->atmdev = NULL;
  413. card->pcidev = pcidev;
  414. membase = pci_resource_start(pcidev, 1);
  415. card->membase = ioremap(membase, NS_IOREMAP_SIZE);
  416. if (card->membase == 0)
  417. {
  418. printk("nicstar%d: can't ioremap() membase.\n",i);
  419. error = 3;
  420. ns_init_card_error(card, error);
  421. return error;
  422. }
  423. PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
  424. pci_set_master(pcidev);
  425. if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
  426. {
  427. printk("nicstar%d: can't read PCI latency timer.\n", i);
  428. error = 6;
  429. ns_init_card_error(card, error);
  430. return error;
  431. }
  432. #ifdef NS_PCI_LATENCY
  433. if (pci_latency < NS_PCI_LATENCY)
  434. {
  435. PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  436. for (j = 1; j < 4; j++)
  437. {
  438. if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
  439. break;
  440. }
  441. if (j == 4)
  442. {
  443. printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  444. error = 7;
  445. ns_init_card_error(card, error);
  446. return error;
  447. }
  448. }
  449. #endif /* NS_PCI_LATENCY */
  450. /* Clear timer overflow */
  451. data = readl(card->membase + STAT);
  452. if (data & NS_STAT_TMROF)
  453. writel(NS_STAT_TMROF, card->membase + STAT);
  454. /* Software reset */
  455. writel(NS_CFG_SWRST, card->membase + CFG);
  456. NS_DELAY;
  457. writel(0x00000000, card->membase + CFG);
  458. /* PHY reset */
  459. writel(0x00000008, card->membase + GP);
  460. NS_DELAY;
  461. writel(0x00000001, card->membase + GP);
  462. NS_DELAY;
  463. while (CMD_BUSY(card));
  464. writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
  465. NS_DELAY;
  466. /* Detect PHY type */
  467. while (CMD_BUSY(card));
  468. writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
  469. while (CMD_BUSY(card));
  470. data = readl(card->membase + DR0);
  471. switch(data) {
  472. case 0x00000009:
  473. printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
  474. card->max_pcr = ATM_25_PCR;
  475. while(CMD_BUSY(card));
  476. writel(0x00000008, card->membase + DR0);
  477. writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
  478. /* Clear an eventual pending interrupt */
  479. writel(NS_STAT_SFBQF, card->membase + STAT);
  480. #ifdef PHY_LOOPBACK
  481. while(CMD_BUSY(card));
  482. writel(0x00000022, card->membase + DR0);
  483. writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
  484. #endif /* PHY_LOOPBACK */
  485. break;
  486. case 0x00000030:
  487. case 0x00000031:
  488. printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
  489. card->max_pcr = ATM_OC3_PCR;
  490. #ifdef PHY_LOOPBACK
  491. while(CMD_BUSY(card));
  492. writel(0x00000002, card->membase + DR0);
  493. writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
  494. #endif /* PHY_LOOPBACK */
  495. break;
  496. default:
  497. printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
  498. error = 8;
  499. ns_init_card_error(card, error);
  500. return error;
  501. }
  502. writel(0x00000000, card->membase + GP);
  503. /* Determine SRAM size */
  504. data = 0x76543210;
  505. ns_write_sram(card, 0x1C003, &data, 1);
  506. data = 0x89ABCDEF;
  507. ns_write_sram(card, 0x14003, &data, 1);
  508. if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
  509. ns_read_sram(card, 0x1C003) == 0x76543210)
  510. card->sram_size = 128;
  511. else
  512. card->sram_size = 32;
  513. PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
  514. card->rct_size = NS_MAX_RCTSIZE;
  515. #if (NS_MAX_RCTSIZE == 4096)
  516. if (card->sram_size == 128)
  517. printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  518. #elif (NS_MAX_RCTSIZE == 16384)
  519. if (card->sram_size == 32)
  520. {
  521. printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  522. card->rct_size = 4096;
  523. }
  524. #else
  525. #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
  526. #endif
  527. card->vpibits = NS_VPIBITS;
  528. if (card->rct_size == 4096)
  529. card->vcibits = 12 - NS_VPIBITS;
  530. else /* card->rct_size == 16384 */
  531. card->vcibits = 14 - NS_VPIBITS;
  532. /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
  533. if (mac[i] == NULL)
  534. nicstar_init_eprom(card->membase);
  535. if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0)
  536. {
  537. printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
  538. error = 9;
  539. ns_init_card_error(card, error);
  540. return error;
  541. }
  542. /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
  543. writel(0x00000000, card->membase + VPM);
  544. /* Initialize TSQ */
  545. card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
  546. if (card->tsq.org == NULL)
  547. {
  548. printk("nicstar%d: can't allocate TSQ.\n", i);
  549. error = 10;
  550. ns_init_card_error(card, error);
  551. return error;
  552. }
  553. card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
  554. card->tsq.next = card->tsq.base;
  555. card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
  556. for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
  557. ns_tsi_init(card->tsq.base + j);
  558. writel(0x00000000, card->membase + TSQH);
  559. writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
  560. PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
  561. (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
  562. /* Initialize RSQ */
  563. card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
  564. if (card->rsq.org == NULL)
  565. {
  566. printk("nicstar%d: can't allocate RSQ.\n", i);
  567. error = 11;
  568. ns_init_card_error(card, error);
  569. return error;
  570. }
  571. card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
  572. card->rsq.next = card->rsq.base;
  573. card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
  574. for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
  575. ns_rsqe_init(card->rsq.base + j);
  576. writel(0x00000000, card->membase + RSQH);
  577. writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
  578. PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
  579. /* Initialize SCQ0, the only VBR SCQ used */
  580. card->scq1 = NULL;
  581. card->scq2 = NULL;
  582. card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
  583. if (card->scq0 == NULL)
  584. {
  585. printk("nicstar%d: can't get SCQ0.\n", i);
  586. error = 12;
  587. ns_init_card_error(card, error);
  588. return error;
  589. }
  590. u32d[0] = (u32) virt_to_bus(card->scq0->base);
  591. u32d[1] = (u32) 0x00000000;
  592. u32d[2] = (u32) 0xffffffff;
  593. u32d[3] = (u32) 0x00000000;
  594. ns_write_sram(card, NS_VRSCD0, u32d, 4);
  595. ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
  596. ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
  597. card->scq0->scd = NS_VRSCD0;
  598. PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
  599. /* Initialize TSTs */
  600. card->tst_addr = NS_TST0;
  601. card->tst_free_entries = NS_TST_NUM_ENTRIES;
  602. data = NS_TST_OPCODE_VARIABLE;
  603. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  604. ns_write_sram(card, NS_TST0 + j, &data, 1);
  605. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
  606. ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
  607. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  608. ns_write_sram(card, NS_TST1 + j, &data, 1);
  609. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
  610. ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
  611. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  612. card->tste2vc[j] = NULL;
  613. writel(NS_TST0 << 2, card->membase + TSTB);
  614. /* Initialize RCT. AAL type is set on opening the VC. */
  615. #ifdef RCQ_SUPPORT
  616. u32d[0] = NS_RCTE_RAWCELLINTEN;
  617. #else
  618. u32d[0] = 0x00000000;
  619. #endif /* RCQ_SUPPORT */
  620. u32d[1] = 0x00000000;
  621. u32d[2] = 0x00000000;
  622. u32d[3] = 0xFFFFFFFF;
  623. for (j = 0; j < card->rct_size; j++)
  624. ns_write_sram(card, j * 4, u32d, 4);
  625. memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
  626. for (j = 0; j < NS_FRSCD_NUM; j++)
  627. card->scd2vc[j] = NULL;
  628. /* Initialize buffer levels */
  629. card->sbnr.min = MIN_SB;
  630. card->sbnr.init = NUM_SB;
  631. card->sbnr.max = MAX_SB;
  632. card->lbnr.min = MIN_LB;
  633. card->lbnr.init = NUM_LB;
  634. card->lbnr.max = MAX_LB;
  635. card->iovnr.min = MIN_IOVB;
  636. card->iovnr.init = NUM_IOVB;
  637. card->iovnr.max = MAX_IOVB;
  638. card->hbnr.min = MIN_HB;
  639. card->hbnr.init = NUM_HB;
  640. card->hbnr.max = MAX_HB;
  641. card->sm_handle = 0x00000000;
  642. card->sm_addr = 0x00000000;
  643. card->lg_handle = 0x00000000;
  644. card->lg_addr = 0x00000000;
  645. card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
  646. /* Pre-allocate some huge buffers */
  647. skb_queue_head_init(&card->hbpool.queue);
  648. card->hbpool.count = 0;
  649. for (j = 0; j < NUM_HB; j++)
  650. {
  651. struct sk_buff *hb;
  652. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  653. if (hb == NULL)
  654. {
  655. printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
  656. i, j, NUM_HB);
  657. error = 13;
  658. ns_init_card_error(card, error);
  659. return error;
  660. }
  661. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  662. skb_queue_tail(&card->hbpool.queue, hb);
  663. card->hbpool.count++;
  664. }
  665. /* Allocate large buffers */
  666. skb_queue_head_init(&card->lbpool.queue);
  667. card->lbpool.count = 0; /* Not used */
  668. for (j = 0; j < NUM_LB; j++)
  669. {
  670. struct sk_buff *lb;
  671. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  672. if (lb == NULL)
  673. {
  674. printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
  675. i, j, NUM_LB);
  676. error = 14;
  677. ns_init_card_error(card, error);
  678. return error;
  679. }
  680. NS_SKB_CB(lb)->buf_type = BUF_LG;
  681. skb_queue_tail(&card->lbpool.queue, lb);
  682. skb_reserve(lb, NS_SMBUFSIZE);
  683. push_rxbufs(card, lb);
  684. /* Due to the implementation of push_rxbufs() this is 1, not 0 */
  685. if (j == 1)
  686. {
  687. card->rcbuf = lb;
  688. card->rawch = (u32) virt_to_bus(lb->data);
  689. }
  690. }
  691. /* Test for strange behaviour which leads to crashes */
  692. if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
  693. {
  694. printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
  695. i, j, bcount);
  696. error = 14;
  697. ns_init_card_error(card, error);
  698. return error;
  699. }
  700. /* Allocate small buffers */
  701. skb_queue_head_init(&card->sbpool.queue);
  702. card->sbpool.count = 0; /* Not used */
  703. for (j = 0; j < NUM_SB; j++)
  704. {
  705. struct sk_buff *sb;
  706. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  707. if (sb == NULL)
  708. {
  709. printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
  710. i, j, NUM_SB);
  711. error = 15;
  712. ns_init_card_error(card, error);
  713. return error;
  714. }
  715. NS_SKB_CB(sb)->buf_type = BUF_SM;
  716. skb_queue_tail(&card->sbpool.queue, sb);
  717. skb_reserve(sb, NS_AAL0_HEADER);
  718. push_rxbufs(card, sb);
  719. }
  720. /* Test for strange behaviour which leads to crashes */
  721. if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
  722. {
  723. printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
  724. i, j, bcount);
  725. error = 15;
  726. ns_init_card_error(card, error);
  727. return error;
  728. }
  729. /* Allocate iovec buffers */
  730. skb_queue_head_init(&card->iovpool.queue);
  731. card->iovpool.count = 0;
  732. for (j = 0; j < NUM_IOVB; j++)
  733. {
  734. struct sk_buff *iovb;
  735. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  736. if (iovb == NULL)
  737. {
  738. printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
  739. i, j, NUM_IOVB);
  740. error = 16;
  741. ns_init_card_error(card, error);
  742. return error;
  743. }
  744. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  745. skb_queue_tail(&card->iovpool.queue, iovb);
  746. card->iovpool.count++;
  747. }
  748. card->intcnt = 0;
  749. /* Configure NICStAR */
  750. if (card->rct_size == 4096)
  751. ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
  752. else /* (card->rct_size == 16384) */
  753. ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
  754. card->efbie = 1;
  755. /* Register device */
  756. card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
  757. if (card->atmdev == NULL)
  758. {
  759. printk("nicstar%d: can't register device.\n", i);
  760. error = 17;
  761. ns_init_card_error(card, error);
  762. return error;
  763. }
  764. if (ns_parse_mac(mac[i], card->atmdev->esi)) {
  765. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
  766. card->atmdev->esi, 6);
  767. if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
  768. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
  769. card->atmdev->esi, 6);
  770. }
  771. }
  772. printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
  773. card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
  774. card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
  775. card->atmdev->dev_data = card;
  776. card->atmdev->ci_range.vpi_bits = card->vpibits;
  777. card->atmdev->ci_range.vci_bits = card->vcibits;
  778. card->atmdev->link_rate = card->max_pcr;
  779. card->atmdev->phy = NULL;
  780. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  781. if (card->max_pcr == ATM_OC3_PCR)
  782. suni_init(card->atmdev);
  783. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  784. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  785. if (card->max_pcr == ATM_25_PCR)
  786. idt77105_init(card->atmdev);
  787. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  788. if (card->atmdev->phy && card->atmdev->phy->start)
  789. card->atmdev->phy->start(card->atmdev);
  790. writel(NS_CFG_RXPATH |
  791. NS_CFG_SMBUFSIZE |
  792. NS_CFG_LGBUFSIZE |
  793. NS_CFG_EFBIE |
  794. NS_CFG_RSQSIZE |
  795. NS_CFG_VPIBITS |
  796. ns_cfg_rctsize |
  797. NS_CFG_RXINT_NODELAY |
  798. NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
  799. NS_CFG_RSQAFIE |
  800. NS_CFG_TXEN |
  801. NS_CFG_TXIE |
  802. NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
  803. NS_CFG_PHYIE,
  804. card->membase + CFG);
  805. num_cards++;
  806. return error;
  807. }
  808. static void __devinit ns_init_card_error(ns_dev *card, int error)
  809. {
  810. if (error >= 17)
  811. {
  812. writel(0x00000000, card->membase + CFG);
  813. }
  814. if (error >= 16)
  815. {
  816. struct sk_buff *iovb;
  817. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  818. dev_kfree_skb_any(iovb);
  819. }
  820. if (error >= 15)
  821. {
  822. struct sk_buff *sb;
  823. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  824. dev_kfree_skb_any(sb);
  825. free_scq(card->scq0, NULL);
  826. }
  827. if (error >= 14)
  828. {
  829. struct sk_buff *lb;
  830. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  831. dev_kfree_skb_any(lb);
  832. }
  833. if (error >= 13)
  834. {
  835. struct sk_buff *hb;
  836. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  837. dev_kfree_skb_any(hb);
  838. }
  839. if (error >= 12)
  840. {
  841. kfree(card->rsq.org);
  842. }
  843. if (error >= 11)
  844. {
  845. kfree(card->tsq.org);
  846. }
  847. if (error >= 10)
  848. {
  849. free_irq(card->pcidev->irq, card);
  850. }
  851. if (error >= 4)
  852. {
  853. iounmap(card->membase);
  854. }
  855. if (error >= 3)
  856. {
  857. pci_disable_device(card->pcidev);
  858. kfree(card);
  859. }
  860. }
  861. static scq_info *get_scq(int size, u32 scd)
  862. {
  863. scq_info *scq;
  864. int i;
  865. if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
  866. return NULL;
  867. scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
  868. if (scq == NULL)
  869. return NULL;
  870. scq->org = kmalloc(2 * size, GFP_KERNEL);
  871. if (scq->org == NULL)
  872. {
  873. kfree(scq);
  874. return NULL;
  875. }
  876. scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
  877. (size / NS_SCQE_SIZE), GFP_KERNEL);
  878. if (scq->skb == NULL)
  879. {
  880. kfree(scq->org);
  881. kfree(scq);
  882. return NULL;
  883. }
  884. scq->num_entries = size / NS_SCQE_SIZE;
  885. scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
  886. scq->next = scq->base;
  887. scq->last = scq->base + (scq->num_entries - 1);
  888. scq->tail = scq->last;
  889. scq->scd = scd;
  890. scq->num_entries = size / NS_SCQE_SIZE;
  891. scq->tbd_count = 0;
  892. init_waitqueue_head(&scq->scqfull_waitq);
  893. scq->full = 0;
  894. spin_lock_init(&scq->lock);
  895. for (i = 0; i < scq->num_entries; i++)
  896. scq->skb[i] = NULL;
  897. return scq;
  898. }
  899. /* For variable rate SCQ vcc must be NULL */
  900. static void free_scq(scq_info *scq, struct atm_vcc *vcc)
  901. {
  902. int i;
  903. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  904. for (i = 0; i < scq->num_entries; i++)
  905. {
  906. if (scq->skb[i] != NULL)
  907. {
  908. vcc = ATM_SKB(scq->skb[i])->vcc;
  909. if (vcc->pop != NULL)
  910. vcc->pop(vcc, scq->skb[i]);
  911. else
  912. dev_kfree_skb_any(scq->skb[i]);
  913. }
  914. }
  915. else /* vcc must be != NULL */
  916. {
  917. if (vcc == NULL)
  918. {
  919. printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
  920. for (i = 0; i < scq->num_entries; i++)
  921. dev_kfree_skb_any(scq->skb[i]);
  922. }
  923. else
  924. for (i = 0; i < scq->num_entries; i++)
  925. {
  926. if (scq->skb[i] != NULL)
  927. {
  928. if (vcc->pop != NULL)
  929. vcc->pop(vcc, scq->skb[i]);
  930. else
  931. dev_kfree_skb_any(scq->skb[i]);
  932. }
  933. }
  934. }
  935. kfree(scq->skb);
  936. kfree(scq->org);
  937. kfree(scq);
  938. }
  939. /* The handles passed must be pointers to the sk_buff containing the small
  940. or large buffer(s) cast to u32. */
  941. static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
  942. {
  943. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  944. u32 handle1, addr1;
  945. u32 handle2, addr2;
  946. u32 stat;
  947. unsigned long flags;
  948. /* *BARF* */
  949. handle2 = addr2 = 0;
  950. handle1 = (u32)skb;
  951. addr1 = (u32)virt_to_bus(skb->data);
  952. #ifdef GENERAL_DEBUG
  953. if (!addr1)
  954. printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
  955. #endif /* GENERAL_DEBUG */
  956. stat = readl(card->membase + STAT);
  957. card->sbfqc = ns_stat_sfbqc_get(stat);
  958. card->lbfqc = ns_stat_lfbqc_get(stat);
  959. if (cb->buf_type == BUF_SM)
  960. {
  961. if (!addr2)
  962. {
  963. if (card->sm_addr)
  964. {
  965. addr2 = card->sm_addr;
  966. handle2 = card->sm_handle;
  967. card->sm_addr = 0x00000000;
  968. card->sm_handle = 0x00000000;
  969. }
  970. else /* (!sm_addr) */
  971. {
  972. card->sm_addr = addr1;
  973. card->sm_handle = handle1;
  974. }
  975. }
  976. }
  977. else /* buf_type == BUF_LG */
  978. {
  979. if (!addr2)
  980. {
  981. if (card->lg_addr)
  982. {
  983. addr2 = card->lg_addr;
  984. handle2 = card->lg_handle;
  985. card->lg_addr = 0x00000000;
  986. card->lg_handle = 0x00000000;
  987. }
  988. else /* (!lg_addr) */
  989. {
  990. card->lg_addr = addr1;
  991. card->lg_handle = handle1;
  992. }
  993. }
  994. }
  995. if (addr2)
  996. {
  997. if (cb->buf_type == BUF_SM)
  998. {
  999. if (card->sbfqc >= card->sbnr.max)
  1000. {
  1001. skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
  1002. dev_kfree_skb_any((struct sk_buff *) handle1);
  1003. skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
  1004. dev_kfree_skb_any((struct sk_buff *) handle2);
  1005. return;
  1006. }
  1007. else
  1008. card->sbfqc += 2;
  1009. }
  1010. else /* (buf_type == BUF_LG) */
  1011. {
  1012. if (card->lbfqc >= card->lbnr.max)
  1013. {
  1014. skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
  1015. dev_kfree_skb_any((struct sk_buff *) handle1);
  1016. skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
  1017. dev_kfree_skb_any((struct sk_buff *) handle2);
  1018. return;
  1019. }
  1020. else
  1021. card->lbfqc += 2;
  1022. }
  1023. ns_grab_res_lock(card, flags);
  1024. while (CMD_BUSY(card));
  1025. writel(addr2, card->membase + DR3);
  1026. writel(handle2, card->membase + DR2);
  1027. writel(addr1, card->membase + DR1);
  1028. writel(handle1, card->membase + DR0);
  1029. writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
  1030. spin_unlock_irqrestore(&card->res_lock, flags);
  1031. XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
  1032. (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
  1033. }
  1034. if (!card->efbie && card->sbfqc >= card->sbnr.min &&
  1035. card->lbfqc >= card->lbnr.min)
  1036. {
  1037. card->efbie = 1;
  1038. writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
  1039. }
  1040. return;
  1041. }
  1042. static irqreturn_t ns_irq_handler(int irq, void *dev_id)
  1043. {
  1044. u32 stat_r;
  1045. ns_dev *card;
  1046. struct atm_dev *dev;
  1047. unsigned long flags;
  1048. card = (ns_dev *) dev_id;
  1049. dev = card->atmdev;
  1050. card->intcnt++;
  1051. PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
  1052. ns_grab_int_lock(card, flags);
  1053. stat_r = readl(card->membase + STAT);
  1054. /* Transmit Status Indicator has been written to T. S. Queue */
  1055. if (stat_r & NS_STAT_TSIF)
  1056. {
  1057. TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
  1058. process_tsq(card);
  1059. writel(NS_STAT_TSIF, card->membase + STAT);
  1060. }
  1061. /* Incomplete CS-PDU has been transmitted */
  1062. if (stat_r & NS_STAT_TXICP)
  1063. {
  1064. writel(NS_STAT_TXICP, card->membase + STAT);
  1065. TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
  1066. card->index);
  1067. }
  1068. /* Transmit Status Queue 7/8 full */
  1069. if (stat_r & NS_STAT_TSQF)
  1070. {
  1071. writel(NS_STAT_TSQF, card->membase + STAT);
  1072. PRINTK("nicstar%d: TSQ full.\n", card->index);
  1073. process_tsq(card);
  1074. }
  1075. /* Timer overflow */
  1076. if (stat_r & NS_STAT_TMROF)
  1077. {
  1078. writel(NS_STAT_TMROF, card->membase + STAT);
  1079. PRINTK("nicstar%d: Timer overflow.\n", card->index);
  1080. }
  1081. /* PHY device interrupt signal active */
  1082. if (stat_r & NS_STAT_PHYI)
  1083. {
  1084. writel(NS_STAT_PHYI, card->membase + STAT);
  1085. PRINTK("nicstar%d: PHY interrupt.\n", card->index);
  1086. if (dev->phy && dev->phy->interrupt) {
  1087. dev->phy->interrupt(dev);
  1088. }
  1089. }
  1090. /* Small Buffer Queue is full */
  1091. if (stat_r & NS_STAT_SFBQF)
  1092. {
  1093. writel(NS_STAT_SFBQF, card->membase + STAT);
  1094. printk("nicstar%d: Small free buffer queue is full.\n", card->index);
  1095. }
  1096. /* Large Buffer Queue is full */
  1097. if (stat_r & NS_STAT_LFBQF)
  1098. {
  1099. writel(NS_STAT_LFBQF, card->membase + STAT);
  1100. printk("nicstar%d: Large free buffer queue is full.\n", card->index);
  1101. }
  1102. /* Receive Status Queue is full */
  1103. if (stat_r & NS_STAT_RSQF)
  1104. {
  1105. writel(NS_STAT_RSQF, card->membase + STAT);
  1106. printk("nicstar%d: RSQ full.\n", card->index);
  1107. process_rsq(card);
  1108. }
  1109. /* Complete CS-PDU received */
  1110. if (stat_r & NS_STAT_EOPDU)
  1111. {
  1112. RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
  1113. process_rsq(card);
  1114. writel(NS_STAT_EOPDU, card->membase + STAT);
  1115. }
  1116. /* Raw cell received */
  1117. if (stat_r & NS_STAT_RAWCF)
  1118. {
  1119. writel(NS_STAT_RAWCF, card->membase + STAT);
  1120. #ifndef RCQ_SUPPORT
  1121. printk("nicstar%d: Raw cell received and no support yet...\n",
  1122. card->index);
  1123. #endif /* RCQ_SUPPORT */
  1124. /* NOTE: the following procedure may keep a raw cell pending until the
  1125. next interrupt. As this preliminary support is only meant to
  1126. avoid buffer leakage, this is not an issue. */
  1127. while (readl(card->membase + RAWCT) != card->rawch)
  1128. {
  1129. ns_rcqe *rawcell;
  1130. rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
  1131. if (ns_rcqe_islast(rawcell))
  1132. {
  1133. struct sk_buff *oldbuf;
  1134. oldbuf = card->rcbuf;
  1135. card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
  1136. card->rawch = (u32) virt_to_bus(card->rcbuf->data);
  1137. recycle_rx_buf(card, oldbuf);
  1138. }
  1139. else
  1140. card->rawch += NS_RCQE_SIZE;
  1141. }
  1142. }
  1143. /* Small buffer queue is empty */
  1144. if (stat_r & NS_STAT_SFBQE)
  1145. {
  1146. int i;
  1147. struct sk_buff *sb;
  1148. writel(NS_STAT_SFBQE, card->membase + STAT);
  1149. printk("nicstar%d: Small free buffer queue empty.\n",
  1150. card->index);
  1151. for (i = 0; i < card->sbnr.min; i++)
  1152. {
  1153. sb = dev_alloc_skb(NS_SMSKBSIZE);
  1154. if (sb == NULL)
  1155. {
  1156. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1157. card->efbie = 0;
  1158. break;
  1159. }
  1160. NS_SKB_CB(sb)->buf_type = BUF_SM;
  1161. skb_queue_tail(&card->sbpool.queue, sb);
  1162. skb_reserve(sb, NS_AAL0_HEADER);
  1163. push_rxbufs(card, sb);
  1164. }
  1165. card->sbfqc = i;
  1166. process_rsq(card);
  1167. }
  1168. /* Large buffer queue empty */
  1169. if (stat_r & NS_STAT_LFBQE)
  1170. {
  1171. int i;
  1172. struct sk_buff *lb;
  1173. writel(NS_STAT_LFBQE, card->membase + STAT);
  1174. printk("nicstar%d: Large free buffer queue empty.\n",
  1175. card->index);
  1176. for (i = 0; i < card->lbnr.min; i++)
  1177. {
  1178. lb = dev_alloc_skb(NS_LGSKBSIZE);
  1179. if (lb == NULL)
  1180. {
  1181. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1182. card->efbie = 0;
  1183. break;
  1184. }
  1185. NS_SKB_CB(lb)->buf_type = BUF_LG;
  1186. skb_queue_tail(&card->lbpool.queue, lb);
  1187. skb_reserve(lb, NS_SMBUFSIZE);
  1188. push_rxbufs(card, lb);
  1189. }
  1190. card->lbfqc = i;
  1191. process_rsq(card);
  1192. }
  1193. /* Receive Status Queue is 7/8 full */
  1194. if (stat_r & NS_STAT_RSQAF)
  1195. {
  1196. writel(NS_STAT_RSQAF, card->membase + STAT);
  1197. RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
  1198. process_rsq(card);
  1199. }
  1200. spin_unlock_irqrestore(&card->int_lock, flags);
  1201. PRINTK("nicstar%d: end of interrupt service\n", card->index);
  1202. return IRQ_HANDLED;
  1203. }
  1204. static int ns_open(struct atm_vcc *vcc)
  1205. {
  1206. ns_dev *card;
  1207. vc_map *vc;
  1208. unsigned long tmpl, modl;
  1209. int tcr, tcra; /* target cell rate, and absolute value */
  1210. int n = 0; /* Number of entries in the TST. Initialized to remove
  1211. the compiler warning. */
  1212. u32 u32d[4];
  1213. int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
  1214. warning. How I wish compilers were clever enough to
  1215. tell which variables can truly be used
  1216. uninitialized... */
  1217. int inuse; /* tx or rx vc already in use by another vcc */
  1218. short vpi = vcc->vpi;
  1219. int vci = vcc->vci;
  1220. card = (ns_dev *) vcc->dev->dev_data;
  1221. PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
  1222. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1223. {
  1224. PRINTK("nicstar%d: unsupported AAL.\n", card->index);
  1225. return -EINVAL;
  1226. }
  1227. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1228. vcc->dev_data = vc;
  1229. inuse = 0;
  1230. if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
  1231. inuse = 1;
  1232. if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
  1233. inuse += 2;
  1234. if (inuse)
  1235. {
  1236. printk("nicstar%d: %s vci already in use.\n", card->index,
  1237. inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
  1238. return -EINVAL;
  1239. }
  1240. set_bit(ATM_VF_ADDR,&vcc->flags);
  1241. /* NOTE: You are not allowed to modify an open connection's QOS. To change
  1242. that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
  1243. needed to do that. */
  1244. if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
  1245. {
  1246. scq_info *scq;
  1247. set_bit(ATM_VF_PARTIAL,&vcc->flags);
  1248. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1249. {
  1250. /* Check requested cell rate and availability of SCD */
  1251. if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
  1252. vcc->qos.txtp.min_pcr == 0)
  1253. {
  1254. PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
  1255. card->index);
  1256. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1257. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1258. return -EINVAL;
  1259. }
  1260. tcr = atm_pcr_goal(&(vcc->qos.txtp));
  1261. tcra = tcr >= 0 ? tcr : -tcr;
  1262. PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
  1263. vcc->qos.txtp.max_pcr);
  1264. tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
  1265. modl = tmpl % card->max_pcr;
  1266. n = (int)(tmpl / card->max_pcr);
  1267. if (tcr > 0)
  1268. {
  1269. if (modl > 0) n++;
  1270. }
  1271. else if (tcr == 0)
  1272. {
  1273. if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
  1274. {
  1275. PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
  1276. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1277. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1278. return -EINVAL;
  1279. }
  1280. }
  1281. if (n == 0)
  1282. {
  1283. printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
  1284. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1285. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1286. return -EINVAL;
  1287. }
  1288. if (n > (card->tst_free_entries - NS_TST_RESERVED))
  1289. {
  1290. PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
  1291. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1292. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1293. return -EINVAL;
  1294. }
  1295. else
  1296. card->tst_free_entries -= n;
  1297. XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
  1298. for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
  1299. {
  1300. if (card->scd2vc[frscdi] == NULL)
  1301. {
  1302. card->scd2vc[frscdi] = vc;
  1303. break;
  1304. }
  1305. }
  1306. if (frscdi == NS_FRSCD_NUM)
  1307. {
  1308. PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
  1309. card->tst_free_entries += n;
  1310. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1311. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1312. return -EBUSY;
  1313. }
  1314. vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
  1315. scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
  1316. if (scq == NULL)
  1317. {
  1318. PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
  1319. card->scd2vc[frscdi] = NULL;
  1320. card->tst_free_entries += n;
  1321. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1322. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1323. return -ENOMEM;
  1324. }
  1325. vc->scq = scq;
  1326. u32d[0] = (u32) virt_to_bus(scq->base);
  1327. u32d[1] = (u32) 0x00000000;
  1328. u32d[2] = (u32) 0xffffffff;
  1329. u32d[3] = (u32) 0x00000000;
  1330. ns_write_sram(card, vc->cbr_scd, u32d, 4);
  1331. fill_tst(card, n, vc);
  1332. }
  1333. else if (vcc->qos.txtp.traffic_class == ATM_UBR)
  1334. {
  1335. vc->cbr_scd = 0x00000000;
  1336. vc->scq = card->scq0;
  1337. }
  1338. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1339. {
  1340. vc->tx = 1;
  1341. vc->tx_vcc = vcc;
  1342. vc->tbd_count = 0;
  1343. }
  1344. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1345. {
  1346. u32 status;
  1347. vc->rx = 1;
  1348. vc->rx_vcc = vcc;
  1349. vc->rx_iov = NULL;
  1350. /* Open the connection in hardware */
  1351. if (vcc->qos.aal == ATM_AAL5)
  1352. status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
  1353. else /* vcc->qos.aal == ATM_AAL0 */
  1354. status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
  1355. #ifdef RCQ_SUPPORT
  1356. status |= NS_RCTE_RAWCELLINTEN;
  1357. #endif /* RCQ_SUPPORT */
  1358. ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
  1359. NS_RCT_ENTRY_SIZE, &status, 1);
  1360. }
  1361. }
  1362. set_bit(ATM_VF_READY,&vcc->flags);
  1363. return 0;
  1364. }
  1365. static void ns_close(struct atm_vcc *vcc)
  1366. {
  1367. vc_map *vc;
  1368. ns_dev *card;
  1369. u32 data;
  1370. int i;
  1371. vc = vcc->dev_data;
  1372. card = vcc->dev->dev_data;
  1373. PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
  1374. (int) vcc->vpi, vcc->vci);
  1375. clear_bit(ATM_VF_READY,&vcc->flags);
  1376. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1377. {
  1378. u32 addr;
  1379. unsigned long flags;
  1380. addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
  1381. ns_grab_res_lock(card, flags);
  1382. while(CMD_BUSY(card));
  1383. writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
  1384. spin_unlock_irqrestore(&card->res_lock, flags);
  1385. vc->rx = 0;
  1386. if (vc->rx_iov != NULL)
  1387. {
  1388. struct sk_buff *iovb;
  1389. u32 stat;
  1390. stat = readl(card->membase + STAT);
  1391. card->sbfqc = ns_stat_sfbqc_get(stat);
  1392. card->lbfqc = ns_stat_lfbqc_get(stat);
  1393. PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
  1394. card->index);
  1395. iovb = vc->rx_iov;
  1396. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1397. NS_SKB(iovb)->iovcnt);
  1398. NS_SKB(iovb)->iovcnt = 0;
  1399. NS_SKB(iovb)->vcc = NULL;
  1400. ns_grab_int_lock(card, flags);
  1401. recycle_iov_buf(card, iovb);
  1402. spin_unlock_irqrestore(&card->int_lock, flags);
  1403. vc->rx_iov = NULL;
  1404. }
  1405. }
  1406. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1407. {
  1408. vc->tx = 0;
  1409. }
  1410. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1411. {
  1412. unsigned long flags;
  1413. ns_scqe *scqep;
  1414. scq_info *scq;
  1415. scq = vc->scq;
  1416. for (;;)
  1417. {
  1418. ns_grab_scq_lock(card, scq, flags);
  1419. scqep = scq->next;
  1420. if (scqep == scq->base)
  1421. scqep = scq->last;
  1422. else
  1423. scqep--;
  1424. if (scqep == scq->tail)
  1425. {
  1426. spin_unlock_irqrestore(&scq->lock, flags);
  1427. break;
  1428. }
  1429. /* If the last entry is not a TSR, place one in the SCQ in order to
  1430. be able to completely drain it and then close. */
  1431. if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
  1432. {
  1433. ns_scqe tsr;
  1434. u32 scdi, scqi;
  1435. u32 data;
  1436. int index;
  1437. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1438. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1439. scqi = scq->next - scq->base;
  1440. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1441. tsr.word_3 = 0x00000000;
  1442. tsr.word_4 = 0x00000000;
  1443. *scq->next = tsr;
  1444. index = (int) scqi;
  1445. scq->skb[index] = NULL;
  1446. if (scq->next == scq->last)
  1447. scq->next = scq->base;
  1448. else
  1449. scq->next++;
  1450. data = (u32) virt_to_bus(scq->next);
  1451. ns_write_sram(card, scq->scd, &data, 1);
  1452. }
  1453. spin_unlock_irqrestore(&scq->lock, flags);
  1454. schedule();
  1455. }
  1456. /* Free all TST entries */
  1457. data = NS_TST_OPCODE_VARIABLE;
  1458. for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
  1459. {
  1460. if (card->tste2vc[i] == vc)
  1461. {
  1462. ns_write_sram(card, card->tst_addr + i, &data, 1);
  1463. card->tste2vc[i] = NULL;
  1464. card->tst_free_entries++;
  1465. }
  1466. }
  1467. card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
  1468. free_scq(vc->scq, vcc);
  1469. }
  1470. /* remove all references to vcc before deleting it */
  1471. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1472. {
  1473. unsigned long flags;
  1474. scq_info *scq = card->scq0;
  1475. ns_grab_scq_lock(card, scq, flags);
  1476. for(i = 0; i < scq->num_entries; i++) {
  1477. if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
  1478. ATM_SKB(scq->skb[i])->vcc = NULL;
  1479. atm_return(vcc, scq->skb[i]->truesize);
  1480. PRINTK("nicstar: deleted pending vcc mapping\n");
  1481. }
  1482. }
  1483. spin_unlock_irqrestore(&scq->lock, flags);
  1484. }
  1485. vcc->dev_data = NULL;
  1486. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1487. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1488. #ifdef RX_DEBUG
  1489. {
  1490. u32 stat, cfg;
  1491. stat = readl(card->membase + STAT);
  1492. cfg = readl(card->membase + CFG);
  1493. printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
  1494. printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
  1495. (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
  1496. readl(card->membase + TSQT));
  1497. printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
  1498. (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
  1499. readl(card->membase + RSQT));
  1500. printk("Empty free buffer queue interrupt %s \n",
  1501. card->efbie ? "enabled" : "disabled");
  1502. printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
  1503. ns_stat_sfbqc_get(stat), card->sbpool.count,
  1504. ns_stat_lfbqc_get(stat), card->lbpool.count);
  1505. printk("hbpool.count = %d iovpool.count = %d \n",
  1506. card->hbpool.count, card->iovpool.count);
  1507. }
  1508. #endif /* RX_DEBUG */
  1509. }
  1510. static void fill_tst(ns_dev *card, int n, vc_map *vc)
  1511. {
  1512. u32 new_tst;
  1513. unsigned long cl;
  1514. int e, r;
  1515. u32 data;
  1516. /* It would be very complicated to keep the two TSTs synchronized while
  1517. assuring that writes are only made to the inactive TST. So, for now I
  1518. will use only one TST. If problems occur, I will change this again */
  1519. new_tst = card->tst_addr;
  1520. /* Fill procedure */
  1521. for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
  1522. {
  1523. if (card->tste2vc[e] == NULL)
  1524. break;
  1525. }
  1526. if (e == NS_TST_NUM_ENTRIES) {
  1527. printk("nicstar%d: No free TST entries found. \n", card->index);
  1528. return;
  1529. }
  1530. r = n;
  1531. cl = NS_TST_NUM_ENTRIES;
  1532. data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
  1533. while (r > 0)
  1534. {
  1535. if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
  1536. {
  1537. card->tste2vc[e] = vc;
  1538. ns_write_sram(card, new_tst + e, &data, 1);
  1539. cl -= NS_TST_NUM_ENTRIES;
  1540. r--;
  1541. }
  1542. if (++e == NS_TST_NUM_ENTRIES) {
  1543. e = 0;
  1544. }
  1545. cl += n;
  1546. }
  1547. /* End of fill procedure */
  1548. data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
  1549. ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
  1550. ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
  1551. card->tst_addr = new_tst;
  1552. }
  1553. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
  1554. {
  1555. ns_dev *card;
  1556. vc_map *vc;
  1557. scq_info *scq;
  1558. unsigned long buflen;
  1559. ns_scqe scqe;
  1560. u32 flags; /* TBD flags, not CPU flags */
  1561. card = vcc->dev->dev_data;
  1562. TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
  1563. if ((vc = (vc_map *) vcc->dev_data) == NULL)
  1564. {
  1565. printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
  1566. atomic_inc(&vcc->stats->tx_err);
  1567. dev_kfree_skb_any(skb);
  1568. return -EINVAL;
  1569. }
  1570. if (!vc->tx)
  1571. {
  1572. printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
  1573. atomic_inc(&vcc->stats->tx_err);
  1574. dev_kfree_skb_any(skb);
  1575. return -EINVAL;
  1576. }
  1577. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1578. {
  1579. printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
  1580. atomic_inc(&vcc->stats->tx_err);
  1581. dev_kfree_skb_any(skb);
  1582. return -EINVAL;
  1583. }
  1584. if (skb_shinfo(skb)->nr_frags != 0)
  1585. {
  1586. printk("nicstar%d: No scatter-gather yet.\n", card->index);
  1587. atomic_inc(&vcc->stats->tx_err);
  1588. dev_kfree_skb_any(skb);
  1589. return -EINVAL;
  1590. }
  1591. ATM_SKB(skb)->vcc = vcc;
  1592. if (vcc->qos.aal == ATM_AAL5)
  1593. {
  1594. buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
  1595. flags = NS_TBD_AAL5;
  1596. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
  1597. scqe.word_3 = cpu_to_le32((u32) skb->len);
  1598. scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
  1599. ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
  1600. flags |= NS_TBD_EOPDU;
  1601. }
  1602. else /* (vcc->qos.aal == ATM_AAL0) */
  1603. {
  1604. buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
  1605. flags = NS_TBD_AAL0;
  1606. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
  1607. scqe.word_3 = cpu_to_le32(0x00000000);
  1608. if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
  1609. flags |= NS_TBD_EOPDU;
  1610. scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
  1611. /* Force the VPI/VCI to be the same as in VCC struct */
  1612. scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
  1613. ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
  1614. NS_TBD_VC_MASK);
  1615. }
  1616. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1617. {
  1618. scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
  1619. scq = ((vc_map *) vcc->dev_data)->scq;
  1620. }
  1621. else
  1622. {
  1623. scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
  1624. scq = card->scq0;
  1625. }
  1626. if (push_scqe(card, vc, scq, &scqe, skb) != 0)
  1627. {
  1628. atomic_inc(&vcc->stats->tx_err);
  1629. dev_kfree_skb_any(skb);
  1630. return -EIO;
  1631. }
  1632. atomic_inc(&vcc->stats->tx);
  1633. return 0;
  1634. }
  1635. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  1636. struct sk_buff *skb)
  1637. {
  1638. unsigned long flags;
  1639. ns_scqe tsr;
  1640. u32 scdi, scqi;
  1641. int scq_is_vbr;
  1642. u32 data;
  1643. int index;
  1644. ns_grab_scq_lock(card, scq, flags);
  1645. while (scq->tail == scq->next)
  1646. {
  1647. if (in_interrupt()) {
  1648. spin_unlock_irqrestore(&scq->lock, flags);
  1649. printk("nicstar%d: Error pushing TBD.\n", card->index);
  1650. return 1;
  1651. }
  1652. scq->full = 1;
  1653. spin_unlock_irqrestore(&scq->lock, flags);
  1654. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1655. ns_grab_scq_lock(card, scq, flags);
  1656. if (scq->full) {
  1657. spin_unlock_irqrestore(&scq->lock, flags);
  1658. printk("nicstar%d: Timeout pushing TBD.\n", card->index);
  1659. return 1;
  1660. }
  1661. }
  1662. *scq->next = *tbd;
  1663. index = (int) (scq->next - scq->base);
  1664. scq->skb[index] = skb;
  1665. XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
  1666. card->index, (u32) skb, index);
  1667. XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1668. card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
  1669. le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
  1670. (u32) scq->next);
  1671. if (scq->next == scq->last)
  1672. scq->next = scq->base;
  1673. else
  1674. scq->next++;
  1675. vc->tbd_count++;
  1676. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  1677. {
  1678. scq->tbd_count++;
  1679. scq_is_vbr = 1;
  1680. }
  1681. else
  1682. scq_is_vbr = 0;
  1683. if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
  1684. {
  1685. int has_run = 0;
  1686. while (scq->tail == scq->next)
  1687. {
  1688. if (in_interrupt()) {
  1689. data = (u32) virt_to_bus(scq->next);
  1690. ns_write_sram(card, scq->scd, &data, 1);
  1691. spin_unlock_irqrestore(&scq->lock, flags);
  1692. printk("nicstar%d: Error pushing TSR.\n", card->index);
  1693. return 0;
  1694. }
  1695. scq->full = 1;
  1696. if (has_run++) break;
  1697. spin_unlock_irqrestore(&scq->lock, flags);
  1698. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1699. ns_grab_scq_lock(card, scq, flags);
  1700. }
  1701. if (!scq->full)
  1702. {
  1703. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1704. if (scq_is_vbr)
  1705. scdi = NS_TSR_SCDISVBR;
  1706. else
  1707. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1708. scqi = scq->next - scq->base;
  1709. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1710. tsr.word_3 = 0x00000000;
  1711. tsr.word_4 = 0x00000000;
  1712. *scq->next = tsr;
  1713. index = (int) scqi;
  1714. scq->skb[index] = NULL;
  1715. XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1716. card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
  1717. le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
  1718. (u32) scq->next);
  1719. if (scq->next == scq->last)
  1720. scq->next = scq->base;
  1721. else
  1722. scq->next++;
  1723. vc->tbd_count = 0;
  1724. scq->tbd_count = 0;
  1725. }
  1726. else
  1727. PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
  1728. }
  1729. data = (u32) virt_to_bus(scq->next);
  1730. ns_write_sram(card, scq->scd, &data, 1);
  1731. spin_unlock_irqrestore(&scq->lock, flags);
  1732. return 0;
  1733. }
  1734. static void process_tsq(ns_dev *card)
  1735. {
  1736. u32 scdi;
  1737. scq_info *scq;
  1738. ns_tsi *previous = NULL, *one_ahead, *two_ahead;
  1739. int serviced_entries; /* flag indicating at least on entry was serviced */
  1740. serviced_entries = 0;
  1741. if (card->tsq.next == card->tsq.last)
  1742. one_ahead = card->tsq.base;
  1743. else
  1744. one_ahead = card->tsq.next + 1;
  1745. if (one_ahead == card->tsq.last)
  1746. two_ahead = card->tsq.base;
  1747. else
  1748. two_ahead = one_ahead + 1;
  1749. while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
  1750. !ns_tsi_isempty(two_ahead))
  1751. /* At most two empty, as stated in the 77201 errata */
  1752. {
  1753. serviced_entries = 1;
  1754. /* Skip the one or two possible empty entries */
  1755. while (ns_tsi_isempty(card->tsq.next)) {
  1756. if (card->tsq.next == card->tsq.last)
  1757. card->tsq.next = card->tsq.base;
  1758. else
  1759. card->tsq.next++;
  1760. }
  1761. if (!ns_tsi_tmrof(card->tsq.next))
  1762. {
  1763. scdi = ns_tsi_getscdindex(card->tsq.next);
  1764. if (scdi == NS_TSI_SCDISVBR)
  1765. scq = card->scq0;
  1766. else
  1767. {
  1768. if (card->scd2vc[scdi] == NULL)
  1769. {
  1770. printk("nicstar%d: could not find VC from SCD index.\n",
  1771. card->index);
  1772. ns_tsi_init(card->tsq.next);
  1773. return;
  1774. }
  1775. scq = card->scd2vc[scdi]->scq;
  1776. }
  1777. drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
  1778. scq->full = 0;
  1779. wake_up_interruptible(&(scq->scqfull_waitq));
  1780. }
  1781. ns_tsi_init(card->tsq.next);
  1782. previous = card->tsq.next;
  1783. if (card->tsq.next == card->tsq.last)
  1784. card->tsq.next = card->tsq.base;
  1785. else
  1786. card->tsq.next++;
  1787. if (card->tsq.next == card->tsq.last)
  1788. one_ahead = card->tsq.base;
  1789. else
  1790. one_ahead = card->tsq.next + 1;
  1791. if (one_ahead == card->tsq.last)
  1792. two_ahead = card->tsq.base;
  1793. else
  1794. two_ahead = one_ahead + 1;
  1795. }
  1796. if (serviced_entries) {
  1797. writel((((u32) previous) - ((u32) card->tsq.base)),
  1798. card->membase + TSQH);
  1799. }
  1800. }
  1801. static void drain_scq(ns_dev *card, scq_info *scq, int pos)
  1802. {
  1803. struct atm_vcc *vcc;
  1804. struct sk_buff *skb;
  1805. int i;
  1806. unsigned long flags;
  1807. XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
  1808. card->index, (u32) scq, pos);
  1809. if (pos >= scq->num_entries)
  1810. {
  1811. printk("nicstar%d: Bad index on drain_scq().\n", card->index);
  1812. return;
  1813. }
  1814. ns_grab_scq_lock(card, scq, flags);
  1815. i = (int) (scq->tail - scq->base);
  1816. if (++i == scq->num_entries)
  1817. i = 0;
  1818. while (i != pos)
  1819. {
  1820. skb = scq->skb[i];
  1821. XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
  1822. card->index, (u32) skb, i);
  1823. if (skb != NULL)
  1824. {
  1825. vcc = ATM_SKB(skb)->vcc;
  1826. if (vcc && vcc->pop != NULL) {
  1827. vcc->pop(vcc, skb);
  1828. } else {
  1829. dev_kfree_skb_irq(skb);
  1830. }
  1831. scq->skb[i] = NULL;
  1832. }
  1833. if (++i == scq->num_entries)
  1834. i = 0;
  1835. }
  1836. scq->tail = scq->base + pos;
  1837. spin_unlock_irqrestore(&scq->lock, flags);
  1838. }
  1839. static void process_rsq(ns_dev *card)
  1840. {
  1841. ns_rsqe *previous;
  1842. if (!ns_rsqe_valid(card->rsq.next))
  1843. return;
  1844. do {
  1845. dequeue_rx(card, card->rsq.next);
  1846. ns_rsqe_init(card->rsq.next);
  1847. previous = card->rsq.next;
  1848. if (card->rsq.next == card->rsq.last)
  1849. card->rsq.next = card->rsq.base;
  1850. else
  1851. card->rsq.next++;
  1852. } while (ns_rsqe_valid(card->rsq.next));
  1853. writel((((u32) previous) - ((u32) card->rsq.base)),
  1854. card->membase + RSQH);
  1855. }
  1856. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
  1857. {
  1858. u32 vpi, vci;
  1859. vc_map *vc;
  1860. struct sk_buff *iovb;
  1861. struct iovec *iov;
  1862. struct atm_vcc *vcc;
  1863. struct sk_buff *skb;
  1864. unsigned short aal5_len;
  1865. int len;
  1866. u32 stat;
  1867. stat = readl(card->membase + STAT);
  1868. card->sbfqc = ns_stat_sfbqc_get(stat);
  1869. card->lbfqc = ns_stat_lfbqc_get(stat);
  1870. skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
  1871. vpi = ns_rsqe_vpi(rsqe);
  1872. vci = ns_rsqe_vci(rsqe);
  1873. if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
  1874. {
  1875. printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
  1876. card->index, vpi, vci);
  1877. recycle_rx_buf(card, skb);
  1878. return;
  1879. }
  1880. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1881. if (!vc->rx)
  1882. {
  1883. RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
  1884. card->index, vpi, vci);
  1885. recycle_rx_buf(card, skb);
  1886. return;
  1887. }
  1888. vcc = vc->rx_vcc;
  1889. if (vcc->qos.aal == ATM_AAL0)
  1890. {
  1891. struct sk_buff *sb;
  1892. unsigned char *cell;
  1893. int i;
  1894. cell = skb->data;
  1895. for (i = ns_rsqe_cellcount(rsqe); i; i--)
  1896. {
  1897. if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
  1898. {
  1899. printk("nicstar%d: Can't allocate buffers for aal0.\n",
  1900. card->index);
  1901. atomic_add(i,&vcc->stats->rx_drop);
  1902. break;
  1903. }
  1904. if (!atm_charge(vcc, sb->truesize))
  1905. {
  1906. RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
  1907. card->index);
  1908. atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
  1909. dev_kfree_skb_any(sb);
  1910. break;
  1911. }
  1912. /* Rebuild the header */
  1913. *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
  1914. (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
  1915. if (i == 1 && ns_rsqe_eopdu(rsqe))
  1916. *((u32 *) sb->data) |= 0x00000002;
  1917. skb_put(sb, NS_AAL0_HEADER);
  1918. memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
  1919. skb_put(sb, ATM_CELL_PAYLOAD);
  1920. ATM_SKB(sb)->vcc = vcc;
  1921. __net_timestamp(sb);
  1922. vcc->push(vcc, sb);
  1923. atomic_inc(&vcc->stats->rx);
  1924. cell += ATM_CELL_PAYLOAD;
  1925. }
  1926. recycle_rx_buf(card, skb);
  1927. return;
  1928. }
  1929. /* To reach this point, the AAL layer can only be AAL5 */
  1930. if ((iovb = vc->rx_iov) == NULL)
  1931. {
  1932. iovb = skb_dequeue(&(card->iovpool.queue));
  1933. if (iovb == NULL) /* No buffers in the queue */
  1934. {
  1935. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
  1936. if (iovb == NULL)
  1937. {
  1938. printk("nicstar%d: Out of iovec buffers.\n", card->index);
  1939. atomic_inc(&vcc->stats->rx_drop);
  1940. recycle_rx_buf(card, skb);
  1941. return;
  1942. }
  1943. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1944. }
  1945. else
  1946. if (--card->iovpool.count < card->iovnr.min)
  1947. {
  1948. struct sk_buff *new_iovb;
  1949. if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
  1950. {
  1951. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1952. skb_queue_tail(&card->iovpool.queue, new_iovb);
  1953. card->iovpool.count++;
  1954. }
  1955. }
  1956. vc->rx_iov = iovb;
  1957. NS_SKB(iovb)->iovcnt = 0;
  1958. iovb->len = 0;
  1959. iovb->tail = iovb->data = iovb->head;
  1960. NS_SKB(iovb)->vcc = vcc;
  1961. /* IMPORTANT: a pointer to the sk_buff containing the small or large
  1962. buffer is stored as iovec base, NOT a pointer to the
  1963. small or large buffer itself. */
  1964. }
  1965. else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
  1966. {
  1967. printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
  1968. atomic_inc(&vcc->stats->rx_err);
  1969. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
  1970. NS_SKB(iovb)->iovcnt = 0;
  1971. iovb->len = 0;
  1972. iovb->tail = iovb->data = iovb->head;
  1973. NS_SKB(iovb)->vcc = vcc;
  1974. }
  1975. iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
  1976. iov->iov_base = (void *) skb;
  1977. iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
  1978. iovb->len += iov->iov_len;
  1979. if (NS_SKB(iovb)->iovcnt == 1)
  1980. {
  1981. if (NS_SKB_CB(skb)->buf_type != BUF_SM)
  1982. {
  1983. printk("nicstar%d: Expected a small buffer, and this is not one.\n",
  1984. card->index);
  1985. which_list(card, skb);
  1986. atomic_inc(&vcc->stats->rx_err);
  1987. recycle_rx_buf(card, skb);
  1988. vc->rx_iov = NULL;
  1989. recycle_iov_buf(card, iovb);
  1990. return;
  1991. }
  1992. }
  1993. else /* NS_SKB(iovb)->iovcnt >= 2 */
  1994. {
  1995. if (NS_SKB_CB(skb)->buf_type != BUF_LG)
  1996. {
  1997. printk("nicstar%d: Expected a large buffer, and this is not one.\n",
  1998. card->index);
  1999. which_list(card, skb);
  2000. atomic_inc(&vcc->stats->rx_err);
  2001. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2002. NS_SKB(iovb)->iovcnt);
  2003. vc->rx_iov = NULL;
  2004. recycle_iov_buf(card, iovb);
  2005. return;
  2006. }
  2007. }
  2008. if (ns_rsqe_eopdu(rsqe))
  2009. {
  2010. /* This works correctly regardless of the endianness of the host */
  2011. unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
  2012. iov->iov_len - 6);
  2013. aal5_len = L1L2[0] << 8 | L1L2[1];
  2014. len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
  2015. if (ns_rsqe_crcerr(rsqe) ||
  2016. len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  2017. {
  2018. printk("nicstar%d: AAL5 CRC error", card->index);
  2019. if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  2020. printk(" - PDU size mismatch.\n");
  2021. else
  2022. printk(".\n");
  2023. atomic_inc(&vcc->stats->rx_err);
  2024. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2025. NS_SKB(iovb)->iovcnt);
  2026. vc->rx_iov = NULL;
  2027. recycle_iov_buf(card, iovb);
  2028. return;
  2029. }
  2030. /* By this point we (hopefully) have a complete SDU without errors. */
  2031. if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
  2032. {
  2033. /* skb points to a small buffer */
  2034. if (!atm_charge(vcc, skb->truesize))
  2035. {
  2036. push_rxbufs(card, skb);
  2037. atomic_inc(&vcc->stats->rx_drop);
  2038. }
  2039. else
  2040. {
  2041. skb_put(skb, len);
  2042. dequeue_sm_buf(card, skb);
  2043. #ifdef NS_USE_DESTRUCTORS
  2044. skb->destructor = ns_sb_destructor;
  2045. #endif /* NS_USE_DESTRUCTORS */
  2046. ATM_SKB(skb)->vcc = vcc;
  2047. __net_timestamp(skb);
  2048. vcc->push(vcc, skb);
  2049. atomic_inc(&vcc->stats->rx);
  2050. }
  2051. }
  2052. else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
  2053. {
  2054. struct sk_buff *sb;
  2055. sb = (struct sk_buff *) (iov - 1)->iov_base;
  2056. /* skb points to a large buffer */
  2057. if (len <= NS_SMBUFSIZE)
  2058. {
  2059. if (!atm_charge(vcc, sb->truesize))
  2060. {
  2061. push_rxbufs(card, sb);
  2062. atomic_inc(&vcc->stats->rx_drop);
  2063. }
  2064. else
  2065. {
  2066. skb_put(sb, len);
  2067. dequeue_sm_buf(card, sb);
  2068. #ifdef NS_USE_DESTRUCTORS
  2069. sb->destructor = ns_sb_destructor;
  2070. #endif /* NS_USE_DESTRUCTORS */
  2071. ATM_SKB(sb)->vcc = vcc;
  2072. __net_timestamp(sb);
  2073. vcc->push(vcc, sb);
  2074. atomic_inc(&vcc->stats->rx);
  2075. }
  2076. push_rxbufs(card, skb);
  2077. }
  2078. else /* len > NS_SMBUFSIZE, the usual case */
  2079. {
  2080. if (!atm_charge(vcc, skb->truesize))
  2081. {
  2082. push_rxbufs(card, skb);
  2083. atomic_inc(&vcc->stats->rx_drop);
  2084. }
  2085. else
  2086. {
  2087. dequeue_lg_buf(card, skb);
  2088. #ifdef NS_USE_DESTRUCTORS
  2089. skb->destructor = ns_lb_destructor;
  2090. #endif /* NS_USE_DESTRUCTORS */
  2091. skb_push(skb, NS_SMBUFSIZE);
  2092. memcpy(skb->data, sb->data, NS_SMBUFSIZE);
  2093. skb_put(skb, len - NS_SMBUFSIZE);
  2094. ATM_SKB(skb)->vcc = vcc;
  2095. __net_timestamp(skb);
  2096. vcc->push(vcc, skb);
  2097. atomic_inc(&vcc->stats->rx);
  2098. }
  2099. push_rxbufs(card, sb);
  2100. }
  2101. }
  2102. else /* Must push a huge buffer */
  2103. {
  2104. struct sk_buff *hb, *sb, *lb;
  2105. int remaining, tocopy;
  2106. int j;
  2107. hb = skb_dequeue(&(card->hbpool.queue));
  2108. if (hb == NULL) /* No buffers in the queue */
  2109. {
  2110. hb = dev_alloc_skb(NS_HBUFSIZE);
  2111. if (hb == NULL)
  2112. {
  2113. printk("nicstar%d: Out of huge buffers.\n", card->index);
  2114. atomic_inc(&vcc->stats->rx_drop);
  2115. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2116. NS_SKB(iovb)->iovcnt);
  2117. vc->rx_iov = NULL;
  2118. recycle_iov_buf(card, iovb);
  2119. return;
  2120. }
  2121. else if (card->hbpool.count < card->hbnr.min)
  2122. {
  2123. struct sk_buff *new_hb;
  2124. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2125. {
  2126. skb_queue_tail(&card->hbpool.queue, new_hb);
  2127. card->hbpool.count++;
  2128. }
  2129. }
  2130. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2131. }
  2132. else
  2133. if (--card->hbpool.count < card->hbnr.min)
  2134. {
  2135. struct sk_buff *new_hb;
  2136. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2137. {
  2138. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2139. skb_queue_tail(&card->hbpool.queue, new_hb);
  2140. card->hbpool.count++;
  2141. }
  2142. if (card->hbpool.count < card->hbnr.min)
  2143. {
  2144. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2145. {
  2146. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2147. skb_queue_tail(&card->hbpool.queue, new_hb);
  2148. card->hbpool.count++;
  2149. }
  2150. }
  2151. }
  2152. iov = (struct iovec *) iovb->data;
  2153. if (!atm_charge(vcc, hb->truesize))
  2154. {
  2155. recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
  2156. if (card->hbpool.count < card->hbnr.max)
  2157. {
  2158. skb_queue_tail(&card->hbpool.queue, hb);
  2159. card->hbpool.count++;
  2160. }
  2161. else
  2162. dev_kfree_skb_any(hb);
  2163. atomic_inc(&vcc->stats->rx_drop);
  2164. }
  2165. else
  2166. {
  2167. /* Copy the small buffer to the huge buffer */
  2168. sb = (struct sk_buff *) iov->iov_base;
  2169. memcpy(hb->data, sb->data, iov->iov_len);
  2170. skb_put(hb, iov->iov_len);
  2171. remaining = len - iov->iov_len;
  2172. iov++;
  2173. /* Free the small buffer */
  2174. push_rxbufs(card, sb);
  2175. /* Copy all large buffers to the huge buffer and free them */
  2176. for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
  2177. {
  2178. lb = (struct sk_buff *) iov->iov_base;
  2179. tocopy = min_t(int, remaining, iov->iov_len);
  2180. memcpy(hb->tail, lb->data, tocopy);
  2181. skb_put(hb, tocopy);
  2182. iov++;
  2183. remaining -= tocopy;
  2184. push_rxbufs(card, lb);
  2185. }
  2186. #ifdef EXTRA_DEBUG
  2187. if (remaining != 0 || hb->len != len)
  2188. printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
  2189. #endif /* EXTRA_DEBUG */
  2190. ATM_SKB(hb)->vcc = vcc;
  2191. #ifdef NS_USE_DESTRUCTORS
  2192. hb->destructor = ns_hb_destructor;
  2193. #endif /* NS_USE_DESTRUCTORS */
  2194. __net_timestamp(hb);
  2195. vcc->push(vcc, hb);
  2196. atomic_inc(&vcc->stats->rx);
  2197. }
  2198. }
  2199. vc->rx_iov = NULL;
  2200. recycle_iov_buf(card, iovb);
  2201. }
  2202. }
  2203. #ifdef NS_USE_DESTRUCTORS
  2204. static void ns_sb_destructor(struct sk_buff *sb)
  2205. {
  2206. ns_dev *card;
  2207. u32 stat;
  2208. card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
  2209. stat = readl(card->membase + STAT);
  2210. card->sbfqc = ns_stat_sfbqc_get(stat);
  2211. card->lbfqc = ns_stat_lfbqc_get(stat);
  2212. do
  2213. {
  2214. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2215. if (sb == NULL)
  2216. break;
  2217. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2218. skb_queue_tail(&card->sbpool.queue, sb);
  2219. skb_reserve(sb, NS_AAL0_HEADER);
  2220. push_rxbufs(card, sb);
  2221. } while (card->sbfqc < card->sbnr.min);
  2222. }
  2223. static void ns_lb_destructor(struct sk_buff *lb)
  2224. {
  2225. ns_dev *card;
  2226. u32 stat;
  2227. card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
  2228. stat = readl(card->membase + STAT);
  2229. card->sbfqc = ns_stat_sfbqc_get(stat);
  2230. card->lbfqc = ns_stat_lfbqc_get(stat);
  2231. do
  2232. {
  2233. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2234. if (lb == NULL)
  2235. break;
  2236. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2237. skb_queue_tail(&card->lbpool.queue, lb);
  2238. skb_reserve(lb, NS_SMBUFSIZE);
  2239. push_rxbufs(card, lb);
  2240. } while (card->lbfqc < card->lbnr.min);
  2241. }
  2242. static void ns_hb_destructor(struct sk_buff *hb)
  2243. {
  2244. ns_dev *card;
  2245. card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
  2246. while (card->hbpool.count < card->hbnr.init)
  2247. {
  2248. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2249. if (hb == NULL)
  2250. break;
  2251. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2252. skb_queue_tail(&card->hbpool.queue, hb);
  2253. card->hbpool.count++;
  2254. }
  2255. }
  2256. #endif /* NS_USE_DESTRUCTORS */
  2257. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
  2258. {
  2259. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  2260. if (unlikely(cb->buf_type == BUF_NONE)) {
  2261. printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
  2262. dev_kfree_skb_any(skb);
  2263. } else
  2264. push_rxbufs(card, skb);
  2265. }
  2266. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
  2267. {
  2268. while (count-- > 0)
  2269. recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
  2270. }
  2271. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
  2272. {
  2273. if (card->iovpool.count < card->iovnr.max)
  2274. {
  2275. skb_queue_tail(&card->iovpool.queue, iovb);
  2276. card->iovpool.count++;
  2277. }
  2278. else
  2279. dev_kfree_skb_any(iovb);
  2280. }
  2281. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
  2282. {
  2283. skb_unlink(sb, &card->sbpool.queue);
  2284. #ifdef NS_USE_DESTRUCTORS
  2285. if (card->sbfqc < card->sbnr.min)
  2286. #else
  2287. if (card->sbfqc < card->sbnr.init)
  2288. {
  2289. struct sk_buff *new_sb;
  2290. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2291. {
  2292. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2293. skb_queue_tail(&card->sbpool.queue, new_sb);
  2294. skb_reserve(new_sb, NS_AAL0_HEADER);
  2295. push_rxbufs(card, new_sb);
  2296. }
  2297. }
  2298. if (card->sbfqc < card->sbnr.init)
  2299. #endif /* NS_USE_DESTRUCTORS */
  2300. {
  2301. struct sk_buff *new_sb;
  2302. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2303. {
  2304. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2305. skb_queue_tail(&card->sbpool.queue, new_sb);
  2306. skb_reserve(new_sb, NS_AAL0_HEADER);
  2307. push_rxbufs(card, new_sb);
  2308. }
  2309. }
  2310. }
  2311. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
  2312. {
  2313. skb_unlink(lb, &card->lbpool.queue);
  2314. #ifdef NS_USE_DESTRUCTORS
  2315. if (card->lbfqc < card->lbnr.min)
  2316. #else
  2317. if (card->lbfqc < card->lbnr.init)
  2318. {
  2319. struct sk_buff *new_lb;
  2320. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2321. {
  2322. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2323. skb_queue_tail(&card->lbpool.queue, new_lb);
  2324. skb_reserve(new_lb, NS_SMBUFSIZE);
  2325. push_rxbufs(card, new_lb);
  2326. }
  2327. }
  2328. if (card->lbfqc < card->lbnr.init)
  2329. #endif /* NS_USE_DESTRUCTORS */
  2330. {
  2331. struct sk_buff *new_lb;
  2332. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2333. {
  2334. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2335. skb_queue_tail(&card->lbpool.queue, new_lb);
  2336. skb_reserve(new_lb, NS_SMBUFSIZE);
  2337. push_rxbufs(card, new_lb);
  2338. }
  2339. }
  2340. }
  2341. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
  2342. {
  2343. u32 stat;
  2344. ns_dev *card;
  2345. int left;
  2346. left = (int) *pos;
  2347. card = (ns_dev *) dev->dev_data;
  2348. stat = readl(card->membase + STAT);
  2349. if (!left--)
  2350. return sprintf(page, "Pool count min init max \n");
  2351. if (!left--)
  2352. return sprintf(page, "Small %5d %5d %5d %5d \n",
  2353. ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
  2354. card->sbnr.max);
  2355. if (!left--)
  2356. return sprintf(page, "Large %5d %5d %5d %5d \n",
  2357. ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
  2358. card->lbnr.max);
  2359. if (!left--)
  2360. return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
  2361. card->hbnr.min, card->hbnr.init, card->hbnr.max);
  2362. if (!left--)
  2363. return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
  2364. card->iovnr.min, card->iovnr.init, card->iovnr.max);
  2365. if (!left--)
  2366. {
  2367. int retval;
  2368. retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
  2369. card->intcnt = 0;
  2370. return retval;
  2371. }
  2372. #if 0
  2373. /* Dump 25.6 Mbps PHY registers */
  2374. /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
  2375. here just in case it's needed for debugging. */
  2376. if (card->max_pcr == ATM_25_PCR && !left--)
  2377. {
  2378. u32 phy_regs[4];
  2379. u32 i;
  2380. for (i = 0; i < 4; i++)
  2381. {
  2382. while (CMD_BUSY(card));
  2383. writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
  2384. while (CMD_BUSY(card));
  2385. phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
  2386. }
  2387. return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
  2388. phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
  2389. }
  2390. #endif /* 0 - Dump 25.6 Mbps PHY registers */
  2391. #if 0
  2392. /* Dump TST */
  2393. if (left-- < NS_TST_NUM_ENTRIES)
  2394. {
  2395. if (card->tste2vc[left + 1] == NULL)
  2396. return sprintf(page, "%5d - VBR/UBR \n", left + 1);
  2397. else
  2398. return sprintf(page, "%5d - %d %d \n", left + 1,
  2399. card->tste2vc[left + 1]->tx_vcc->vpi,
  2400. card->tste2vc[left + 1]->tx_vcc->vci);
  2401. }
  2402. #endif /* 0 */
  2403. return 0;
  2404. }
  2405. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
  2406. {
  2407. ns_dev *card;
  2408. pool_levels pl;
  2409. long btype;
  2410. unsigned long flags;
  2411. card = dev->dev_data;
  2412. switch (cmd)
  2413. {
  2414. case NS_GETPSTAT:
  2415. if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
  2416. return -EFAULT;
  2417. switch (pl.buftype)
  2418. {
  2419. case NS_BUFTYPE_SMALL:
  2420. pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
  2421. pl.level.min = card->sbnr.min;
  2422. pl.level.init = card->sbnr.init;
  2423. pl.level.max = card->sbnr.max;
  2424. break;
  2425. case NS_BUFTYPE_LARGE:
  2426. pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
  2427. pl.level.min = card->lbnr.min;
  2428. pl.level.init = card->lbnr.init;
  2429. pl.level.max = card->lbnr.max;
  2430. break;
  2431. case NS_BUFTYPE_HUGE:
  2432. pl.count = card->hbpool.count;
  2433. pl.level.min = card->hbnr.min;
  2434. pl.level.init = card->hbnr.init;
  2435. pl.level.max = card->hbnr.max;
  2436. break;
  2437. case NS_BUFTYPE_IOVEC:
  2438. pl.count = card->iovpool.count;
  2439. pl.level.min = card->iovnr.min;
  2440. pl.level.init = card->iovnr.init;
  2441. pl.level.max = card->iovnr.max;
  2442. break;
  2443. default:
  2444. return -ENOIOCTLCMD;
  2445. }
  2446. if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
  2447. return (sizeof(pl));
  2448. else
  2449. return -EFAULT;
  2450. case NS_SETBUFLEV:
  2451. if (!capable(CAP_NET_ADMIN))
  2452. return -EPERM;
  2453. if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
  2454. return -EFAULT;
  2455. if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
  2456. return -EINVAL;
  2457. if (pl.level.min == 0)
  2458. return -EINVAL;
  2459. switch (pl.buftype)
  2460. {
  2461. case NS_BUFTYPE_SMALL:
  2462. if (pl.level.max > TOP_SB)
  2463. return -EINVAL;
  2464. card->sbnr.min = pl.level.min;
  2465. card->sbnr.init = pl.level.init;
  2466. card->sbnr.max = pl.level.max;
  2467. break;
  2468. case NS_BUFTYPE_LARGE:
  2469. if (pl.level.max > TOP_LB)
  2470. return -EINVAL;
  2471. card->lbnr.min = pl.level.min;
  2472. card->lbnr.init = pl.level.init;
  2473. card->lbnr.max = pl.level.max;
  2474. break;
  2475. case NS_BUFTYPE_HUGE:
  2476. if (pl.level.max > TOP_HB)
  2477. return -EINVAL;
  2478. card->hbnr.min = pl.level.min;
  2479. card->hbnr.init = pl.level.init;
  2480. card->hbnr.max = pl.level.max;
  2481. break;
  2482. case NS_BUFTYPE_IOVEC:
  2483. if (pl.level.max > TOP_IOVB)
  2484. return -EINVAL;
  2485. card->iovnr.min = pl.level.min;
  2486. card->iovnr.init = pl.level.init;
  2487. card->iovnr.max = pl.level.max;
  2488. break;
  2489. default:
  2490. return -EINVAL;
  2491. }
  2492. return 0;
  2493. case NS_ADJBUFLEV:
  2494. if (!capable(CAP_NET_ADMIN))
  2495. return -EPERM;
  2496. btype = (long) arg; /* a long is the same size as a pointer or bigger */
  2497. switch (btype)
  2498. {
  2499. case NS_BUFTYPE_SMALL:
  2500. while (card->sbfqc < card->sbnr.init)
  2501. {
  2502. struct sk_buff *sb;
  2503. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2504. if (sb == NULL)
  2505. return -ENOMEM;
  2506. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2507. skb_queue_tail(&card->sbpool.queue, sb);
  2508. skb_reserve(sb, NS_AAL0_HEADER);
  2509. push_rxbufs(card, sb);
  2510. }
  2511. break;
  2512. case NS_BUFTYPE_LARGE:
  2513. while (card->lbfqc < card->lbnr.init)
  2514. {
  2515. struct sk_buff *lb;
  2516. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2517. if (lb == NULL)
  2518. return -ENOMEM;
  2519. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2520. skb_queue_tail(&card->lbpool.queue, lb);
  2521. skb_reserve(lb, NS_SMBUFSIZE);
  2522. push_rxbufs(card, lb);
  2523. }
  2524. break;
  2525. case NS_BUFTYPE_HUGE:
  2526. while (card->hbpool.count > card->hbnr.init)
  2527. {
  2528. struct sk_buff *hb;
  2529. ns_grab_int_lock(card, flags);
  2530. hb = skb_dequeue(&card->hbpool.queue);
  2531. card->hbpool.count--;
  2532. spin_unlock_irqrestore(&card->int_lock, flags);
  2533. if (hb == NULL)
  2534. printk("nicstar%d: huge buffer count inconsistent.\n",
  2535. card->index);
  2536. else
  2537. dev_kfree_skb_any(hb);
  2538. }
  2539. while (card->hbpool.count < card->hbnr.init)
  2540. {
  2541. struct sk_buff *hb;
  2542. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2543. if (hb == NULL)
  2544. return -ENOMEM;
  2545. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2546. ns_grab_int_lock(card, flags);
  2547. skb_queue_tail(&card->hbpool.queue, hb);
  2548. card->hbpool.count++;
  2549. spin_unlock_irqrestore(&card->int_lock, flags);
  2550. }
  2551. break;
  2552. case NS_BUFTYPE_IOVEC:
  2553. while (card->iovpool.count > card->iovnr.init)
  2554. {
  2555. struct sk_buff *iovb;
  2556. ns_grab_int_lock(card, flags);
  2557. iovb = skb_dequeue(&card->iovpool.queue);
  2558. card->iovpool.count--;
  2559. spin_unlock_irqrestore(&card->int_lock, flags);
  2560. if (iovb == NULL)
  2561. printk("nicstar%d: iovec buffer count inconsistent.\n",
  2562. card->index);
  2563. else
  2564. dev_kfree_skb_any(iovb);
  2565. }
  2566. while (card->iovpool.count < card->iovnr.init)
  2567. {
  2568. struct sk_buff *iovb;
  2569. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  2570. if (iovb == NULL)
  2571. return -ENOMEM;
  2572. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  2573. ns_grab_int_lock(card, flags);
  2574. skb_queue_tail(&card->iovpool.queue, iovb);
  2575. card->iovpool.count++;
  2576. spin_unlock_irqrestore(&card->int_lock, flags);
  2577. }
  2578. break;
  2579. default:
  2580. return -EINVAL;
  2581. }
  2582. return 0;
  2583. default:
  2584. if (dev->phy && dev->phy->ioctl) {
  2585. return dev->phy->ioctl(dev, cmd, arg);
  2586. }
  2587. else {
  2588. printk("nicstar%d: %s == NULL \n", card->index,
  2589. dev->phy ? "dev->phy->ioctl" : "dev->phy");
  2590. return -ENOIOCTLCMD;
  2591. }
  2592. }
  2593. }
  2594. static void which_list(ns_dev *card, struct sk_buff *skb)
  2595. {
  2596. printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
  2597. }
  2598. static void ns_poll(unsigned long arg)
  2599. {
  2600. int i;
  2601. ns_dev *card;
  2602. unsigned long flags;
  2603. u32 stat_r, stat_w;
  2604. PRINTK("nicstar: Entering ns_poll().\n");
  2605. for (i = 0; i < num_cards; i++)
  2606. {
  2607. card = cards[i];
  2608. if (spin_is_locked(&card->int_lock)) {
  2609. /* Probably it isn't worth spinning */
  2610. continue;
  2611. }
  2612. ns_grab_int_lock(card, flags);
  2613. stat_w = 0;
  2614. stat_r = readl(card->membase + STAT);
  2615. if (stat_r & NS_STAT_TSIF)
  2616. stat_w |= NS_STAT_TSIF;
  2617. if (stat_r & NS_STAT_EOPDU)
  2618. stat_w |= NS_STAT_EOPDU;
  2619. process_tsq(card);
  2620. process_rsq(card);
  2621. writel(stat_w, card->membase + STAT);
  2622. spin_unlock_irqrestore(&card->int_lock, flags);
  2623. }
  2624. mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
  2625. PRINTK("nicstar: Leaving ns_poll().\n");
  2626. }
  2627. static int ns_parse_mac(char *mac, unsigned char *esi)
  2628. {
  2629. int i, j;
  2630. short byte1, byte0;
  2631. if (mac == NULL || esi == NULL)
  2632. return -1;
  2633. j = 0;
  2634. for (i = 0; i < 6; i++)
  2635. {
  2636. if ((byte1 = ns_h2i(mac[j++])) < 0)
  2637. return -1;
  2638. if ((byte0 = ns_h2i(mac[j++])) < 0)
  2639. return -1;
  2640. esi[i] = (unsigned char) (byte1 * 16 + byte0);
  2641. if (i < 5)
  2642. {
  2643. if (mac[j++] != ':')
  2644. return -1;
  2645. }
  2646. }
  2647. return 0;
  2648. }
  2649. static short ns_h2i(char c)
  2650. {
  2651. if (c >= '0' && c <= '9')
  2652. return (short) (c - '0');
  2653. if (c >= 'A' && c <= 'F')
  2654. return (short) (c - 'A' + 10);
  2655. if (c >= 'a' && c <= 'f')
  2656. return (short) (c - 'a' + 10);
  2657. return -1;
  2658. }
  2659. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  2660. unsigned long addr)
  2661. {
  2662. ns_dev *card;
  2663. unsigned long flags;
  2664. card = dev->dev_data;
  2665. ns_grab_res_lock(card, flags);
  2666. while(CMD_BUSY(card));
  2667. writel((unsigned long) value, card->membase + DR0);
  2668. writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2669. card->membase + CMD);
  2670. spin_unlock_irqrestore(&card->res_lock, flags);
  2671. }
  2672. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
  2673. {
  2674. ns_dev *card;
  2675. unsigned long flags;
  2676. unsigned long data;
  2677. card = dev->dev_data;
  2678. ns_grab_res_lock(card, flags);
  2679. while(CMD_BUSY(card));
  2680. writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2681. card->membase + CMD);
  2682. while(CMD_BUSY(card));
  2683. data = readl(card->membase + DR0) & 0x000000FF;
  2684. spin_unlock_irqrestore(&card->res_lock, flags);
  2685. return (unsigned char) data;
  2686. }
  2687. module_init(nicstar_init);
  2688. module_exit(nicstar_cleanup);