pata_via.c 16 KB

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  1. /*
  2. * pata_via.c - VIA PATA for new ATA layer
  3. * (C) 2005-2006 Red Hat Inc
  4. * Alan Cox <alan@redhat.com>
  5. *
  6. * Documentation
  7. * Most chipset documentation available under NDA only
  8. *
  9. * VIA version guide
  10. * VIA VT82C561 - early design, uses ata_generic currently
  11. * VIA VT82C576 - MWDMA, 33Mhz
  12. * VIA VT82C586 - MWDMA, 33Mhz
  13. * VIA VT82C586a - Added UDMA to 33Mhz
  14. * VIA VT82C586b - UDMA33
  15. * VIA VT82C596a - Nonfunctional UDMA66
  16. * VIA VT82C596b - Working UDMA66
  17. * VIA VT82C686 - Nonfunctional UDMA66
  18. * VIA VT82C686a - Working UDMA66
  19. * VIA VT82C686b - Updated to UDMA100
  20. * VIA VT8231 - UDMA100
  21. * VIA VT8233 - UDMA100
  22. * VIA VT8233a - UDMA133
  23. * VIA VT8233c - UDMA100
  24. * VIA VT8235 - UDMA133
  25. * VIA VT8237 - UDMA133
  26. *
  27. * Most registers remain compatible across chips. Others start reserved
  28. * and acquire sensible semantics if set to 1 (eg cable detect). A few
  29. * exceptions exist, notably around the FIFO settings.
  30. *
  31. * One additional quirk of the VIA design is that like ALi they use few
  32. * PCI IDs for a lot of chips.
  33. *
  34. * Based heavily on:
  35. *
  36. * Version 3.38
  37. *
  38. * VIA IDE driver for Linux. Supported southbridges:
  39. *
  40. * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  41. * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  42. * vt8235, vt8237
  43. *
  44. * Copyright (c) 2000-2002 Vojtech Pavlik
  45. *
  46. * Based on the work of:
  47. * Michel Aubry
  48. * Jeff Garzik
  49. * Andre Hedrick
  50. */
  51. #include <linux/kernel.h>
  52. #include <linux/module.h>
  53. #include <linux/pci.h>
  54. #include <linux/init.h>
  55. #include <linux/blkdev.h>
  56. #include <linux/delay.h>
  57. #include <scsi/scsi_host.h>
  58. #include <linux/libata.h>
  59. #define DRV_NAME "pata_via"
  60. #define DRV_VERSION "0.1.14"
  61. /*
  62. * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
  63. * driver.
  64. */
  65. enum {
  66. VIA_UDMA = 0x007,
  67. VIA_UDMA_NONE = 0x000,
  68. VIA_UDMA_33 = 0x001,
  69. VIA_UDMA_66 = 0x002,
  70. VIA_UDMA_100 = 0x003,
  71. VIA_UDMA_133 = 0x004,
  72. VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
  73. VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
  74. VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
  75. VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
  76. VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
  77. VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
  78. VIA_NO_ENABLES = 0x400, /* Has no enablebits */
  79. };
  80. /*
  81. * VIA SouthBridge chips.
  82. */
  83. static const struct via_isa_bridge {
  84. const char *name;
  85. u16 id;
  86. u8 rev_min;
  87. u8 rev_max;
  88. u16 flags;
  89. } via_isa_bridges[] = {
  90. { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  91. { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
  92. { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  93. { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  94. { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  95. { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  96. { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
  97. { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
  98. { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
  99. { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
  100. { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
  101. { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
  102. { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
  103. { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
  104. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
  105. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
  106. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
  107. { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
  108. { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
  109. { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
  110. { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
  111. { NULL }
  112. };
  113. /**
  114. * via_cable_detect - cable detection
  115. * @ap: ATA port
  116. *
  117. * Perform cable detection. Actually for the VIA case the BIOS
  118. * already did this for us. We read the values provided by the
  119. * BIOS. If you are using an 8235 in a non-PC configuration you
  120. * may need to update this code.
  121. *
  122. * Hotplug also impacts on this.
  123. */
  124. static int via_cable_detect(struct ata_port *ap) {
  125. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  126. u32 ata66;
  127. pci_read_config_dword(pdev, 0x50, &ata66);
  128. /* Check both the drive cable reporting bits, we might not have
  129. two drives */
  130. if (ata66 & (0x10100000 >> (16 * ap->port_no)))
  131. return ATA_CBL_PATA80;
  132. else
  133. return ATA_CBL_PATA40;
  134. }
  135. static int via_pre_reset(struct ata_port *ap)
  136. {
  137. const struct via_isa_bridge *config = ap->host->private_data;
  138. if (!(config->flags & VIA_NO_ENABLES)) {
  139. static const struct pci_bits via_enable_bits[] = {
  140. { 0x40, 1, 0x02, 0x02 },
  141. { 0x40, 1, 0x01, 0x01 }
  142. };
  143. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  144. if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
  145. return -ENOENT;
  146. }
  147. if ((config->flags & VIA_UDMA) >= VIA_UDMA_66)
  148. ap->cbl = via_cable_detect(ap);
  149. else
  150. ap->cbl = ATA_CBL_PATA40;
  151. return ata_std_prereset(ap);
  152. }
  153. /**
  154. * via_error_handler - reset for VIA chips
  155. * @ap: ATA port
  156. *
  157. * Handle the reset callback for the later chips with cable detect
  158. */
  159. static void via_error_handler(struct ata_port *ap)
  160. {
  161. ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
  162. }
  163. /**
  164. * via_do_set_mode - set initial PIO mode data
  165. * @ap: ATA interface
  166. * @adev: ATA device
  167. * @mode: ATA mode being programmed
  168. * @tdiv: Clocks per PCI clock
  169. * @set_ast: Set to program address setup
  170. * @udma_type: UDMA mode/format of registers
  171. *
  172. * Program the VIA registers for DMA and PIO modes. Uses the ata timing
  173. * support in order to compute modes.
  174. *
  175. * FIXME: Hotplug will require we serialize multiple mode changes
  176. * on the two channels.
  177. */
  178. static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
  179. {
  180. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  181. struct ata_device *peer = ata_dev_pair(adev);
  182. struct ata_timing t, p;
  183. static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
  184. unsigned long T = 1000000000 / via_clock;
  185. unsigned long UT = T/tdiv;
  186. int ut;
  187. int offset = 3 - (2*ap->port_no) - adev->devno;
  188. /* Calculate the timing values we require */
  189. ata_timing_compute(adev, mode, &t, T, UT);
  190. /* We share 8bit timing so we must merge the constraints */
  191. if (peer) {
  192. if (peer->pio_mode) {
  193. ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
  194. ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
  195. }
  196. }
  197. /* Address setup is programmable but breaks on UDMA133 setups */
  198. if (set_ast) {
  199. u8 setup; /* 2 bits per drive */
  200. int shift = 2 * offset;
  201. pci_read_config_byte(pdev, 0x4C, &setup);
  202. setup &= ~(3 << shift);
  203. setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
  204. pci_write_config_byte(pdev, 0x4C, setup);
  205. }
  206. /* Load the PIO mode bits */
  207. pci_write_config_byte(pdev, 0x4F - ap->port_no,
  208. ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
  209. pci_write_config_byte(pdev, 0x48 + offset,
  210. ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
  211. /* Load the UDMA bits according to type */
  212. switch(udma_type) {
  213. default:
  214. /* BUG() ? */
  215. /* fall through */
  216. case 33:
  217. ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
  218. break;
  219. case 66:
  220. ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
  221. break;
  222. case 100:
  223. ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
  224. break;
  225. case 133:
  226. ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
  227. break;
  228. }
  229. /* Set UDMA unless device is not UDMA capable */
  230. if (udma_type)
  231. pci_write_config_byte(pdev, 0x50 + offset, ut);
  232. }
  233. static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
  234. {
  235. const struct via_isa_bridge *config = ap->host->private_data;
  236. int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
  237. int mode = config->flags & VIA_UDMA;
  238. static u8 tclock[5] = { 1, 1, 2, 3, 4 };
  239. static u8 udma[5] = { 0, 33, 66, 100, 133 };
  240. via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
  241. }
  242. static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  243. {
  244. const struct via_isa_bridge *config = ap->host->private_data;
  245. int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
  246. int mode = config->flags & VIA_UDMA;
  247. static u8 tclock[5] = { 1, 1, 2, 3, 4 };
  248. static u8 udma[5] = { 0, 33, 66, 100, 133 };
  249. via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
  250. }
  251. static struct scsi_host_template via_sht = {
  252. .module = THIS_MODULE,
  253. .name = DRV_NAME,
  254. .ioctl = ata_scsi_ioctl,
  255. .queuecommand = ata_scsi_queuecmd,
  256. .can_queue = ATA_DEF_QUEUE,
  257. .this_id = ATA_SHT_THIS_ID,
  258. .sg_tablesize = LIBATA_MAX_PRD,
  259. .max_sectors = ATA_MAX_SECTORS,
  260. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  261. .emulated = ATA_SHT_EMULATED,
  262. .use_clustering = ATA_SHT_USE_CLUSTERING,
  263. .proc_name = DRV_NAME,
  264. .dma_boundary = ATA_DMA_BOUNDARY,
  265. .slave_configure = ata_scsi_slave_config,
  266. .bios_param = ata_std_bios_param,
  267. };
  268. static struct ata_port_operations via_port_ops = {
  269. .port_disable = ata_port_disable,
  270. .set_piomode = via_set_piomode,
  271. .set_dmamode = via_set_dmamode,
  272. .mode_filter = ata_pci_default_filter,
  273. .tf_load = ata_tf_load,
  274. .tf_read = ata_tf_read,
  275. .check_status = ata_check_status,
  276. .exec_command = ata_exec_command,
  277. .dev_select = ata_std_dev_select,
  278. .freeze = ata_bmdma_freeze,
  279. .thaw = ata_bmdma_thaw,
  280. .error_handler = via_error_handler,
  281. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  282. .bmdma_setup = ata_bmdma_setup,
  283. .bmdma_start = ata_bmdma_start,
  284. .bmdma_stop = ata_bmdma_stop,
  285. .bmdma_status = ata_bmdma_status,
  286. .qc_prep = ata_qc_prep,
  287. .qc_issue = ata_qc_issue_prot,
  288. .data_xfer = ata_pio_data_xfer,
  289. .irq_handler = ata_interrupt,
  290. .irq_clear = ata_bmdma_irq_clear,
  291. .port_start = ata_port_start,
  292. .port_stop = ata_port_stop,
  293. .host_stop = ata_host_stop
  294. };
  295. static struct ata_port_operations via_port_ops_noirq = {
  296. .port_disable = ata_port_disable,
  297. .set_piomode = via_set_piomode,
  298. .set_dmamode = via_set_dmamode,
  299. .mode_filter = ata_pci_default_filter,
  300. .tf_load = ata_tf_load,
  301. .tf_read = ata_tf_read,
  302. .check_status = ata_check_status,
  303. .exec_command = ata_exec_command,
  304. .dev_select = ata_std_dev_select,
  305. .freeze = ata_bmdma_freeze,
  306. .thaw = ata_bmdma_thaw,
  307. .error_handler = via_error_handler,
  308. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  309. .bmdma_setup = ata_bmdma_setup,
  310. .bmdma_start = ata_bmdma_start,
  311. .bmdma_stop = ata_bmdma_stop,
  312. .bmdma_status = ata_bmdma_status,
  313. .qc_prep = ata_qc_prep,
  314. .qc_issue = ata_qc_issue_prot,
  315. .data_xfer = ata_pio_data_xfer_noirq,
  316. .irq_handler = ata_interrupt,
  317. .irq_clear = ata_bmdma_irq_clear,
  318. .port_start = ata_port_start,
  319. .port_stop = ata_port_stop,
  320. .host_stop = ata_host_stop
  321. };
  322. /**
  323. * via_init_one - discovery callback
  324. * @pdev: PCI device ID
  325. * @id: PCI table info
  326. *
  327. * A VIA IDE interface has been discovered. Figure out what revision
  328. * and perform configuration work before handing it to the ATA layer
  329. */
  330. static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
  331. {
  332. /* Early VIA without UDMA support */
  333. static struct ata_port_info via_mwdma_info = {
  334. .sht = &via_sht,
  335. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  336. .pio_mask = 0x1f,
  337. .mwdma_mask = 0x07,
  338. .port_ops = &via_port_ops
  339. };
  340. /* Ditto with IRQ masking required */
  341. static struct ata_port_info via_mwdma_info_borked = {
  342. .sht = &via_sht,
  343. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  344. .pio_mask = 0x1f,
  345. .mwdma_mask = 0x07,
  346. .port_ops = &via_port_ops_noirq,
  347. };
  348. /* VIA UDMA 33 devices (and borked 66) */
  349. static struct ata_port_info via_udma33_info = {
  350. .sht = &via_sht,
  351. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  352. .pio_mask = 0x1f,
  353. .mwdma_mask = 0x07,
  354. .udma_mask = 0x7,
  355. .port_ops = &via_port_ops
  356. };
  357. /* VIA UDMA 66 devices */
  358. static struct ata_port_info via_udma66_info = {
  359. .sht = &via_sht,
  360. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  361. .pio_mask = 0x1f,
  362. .mwdma_mask = 0x07,
  363. .udma_mask = 0x1f,
  364. .port_ops = &via_port_ops
  365. };
  366. /* VIA UDMA 100 devices */
  367. static struct ata_port_info via_udma100_info = {
  368. .sht = &via_sht,
  369. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  370. .pio_mask = 0x1f,
  371. .mwdma_mask = 0x07,
  372. .udma_mask = 0x3f,
  373. .port_ops = &via_port_ops
  374. };
  375. /* UDMA133 with bad AST (All current 133) */
  376. static struct ata_port_info via_udma133_info = {
  377. .sht = &via_sht,
  378. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  379. .pio_mask = 0x1f,
  380. .mwdma_mask = 0x07,
  381. .udma_mask = 0x7f, /* FIXME: should check north bridge */
  382. .port_ops = &via_port_ops
  383. };
  384. struct ata_port_info *port_info[2], *type;
  385. struct pci_dev *isa = NULL;
  386. const struct via_isa_bridge *config;
  387. static int printed_version;
  388. u8 t;
  389. u8 enable;
  390. u32 timing;
  391. if (!printed_version++)
  392. dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
  393. /* To find out how the IDE will behave and what features we
  394. actually have to look at the bridge not the IDE controller */
  395. for (config = via_isa_bridges; config->id; config++)
  396. if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
  397. !!(config->flags & VIA_BAD_ID),
  398. config->id, NULL))) {
  399. pci_read_config_byte(isa, PCI_REVISION_ID, &t);
  400. if (t >= config->rev_min &&
  401. t <= config->rev_max)
  402. break;
  403. pci_dev_put(isa);
  404. }
  405. if (!config->id) {
  406. printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
  407. return -ENODEV;
  408. }
  409. pci_dev_put(isa);
  410. /* 0x40 low bits indicate enabled channels */
  411. pci_read_config_byte(pdev, 0x40 , &enable);
  412. enable &= 3;
  413. if (enable == 0) {
  414. return -ENODEV;
  415. }
  416. /* Initialise the FIFO for the enabled channels. */
  417. if (config->flags & VIA_SET_FIFO) {
  418. u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
  419. u8 fifo;
  420. pci_read_config_byte(pdev, 0x43, &fifo);
  421. /* Clear PREQ# until DDACK# for errata */
  422. if (config->flags & VIA_BAD_PREQ)
  423. fifo &= 0x7F;
  424. else
  425. fifo &= 0x9f;
  426. /* Turn on FIFO for enabled channels */
  427. fifo |= fifo_setting[enable];
  428. pci_write_config_byte(pdev, 0x43, fifo);
  429. }
  430. /* Clock set up */
  431. switch(config->flags & VIA_UDMA) {
  432. case VIA_UDMA_NONE:
  433. if (config->flags & VIA_NO_UNMASK)
  434. type = &via_mwdma_info_borked;
  435. else
  436. type = &via_mwdma_info;
  437. break;
  438. case VIA_UDMA_33:
  439. type = &via_udma33_info;
  440. break;
  441. case VIA_UDMA_66:
  442. type = &via_udma66_info;
  443. /* The 66 MHz devices require we enable the clock */
  444. pci_read_config_dword(pdev, 0x50, &timing);
  445. timing |= 0x80008;
  446. pci_write_config_dword(pdev, 0x50, timing);
  447. break;
  448. case VIA_UDMA_100:
  449. type = &via_udma100_info;
  450. break;
  451. case VIA_UDMA_133:
  452. type = &via_udma133_info;
  453. break;
  454. default:
  455. WARN_ON(1);
  456. return -ENODEV;
  457. }
  458. if (config->flags & VIA_BAD_CLK66) {
  459. /* Disable the 66MHz clock on problem devices */
  460. pci_read_config_dword(pdev, 0x50, &timing);
  461. timing &= ~0x80008;
  462. pci_write_config_dword(pdev, 0x50, timing);
  463. }
  464. /* We have established the device type, now fire it up */
  465. type->private_data = (void *)config;
  466. port_info[0] = port_info[1] = type;
  467. return ata_pci_init_one(pdev, port_info, 2);
  468. }
  469. static const struct pci_device_id via[] = {
  470. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1), },
  471. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1), },
  472. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410), },
  473. { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), },
  474. { },
  475. };
  476. static struct pci_driver via_pci_driver = {
  477. .name = DRV_NAME,
  478. .id_table = via,
  479. .probe = via_init_one,
  480. .remove = ata_pci_remove_one
  481. };
  482. static int __init via_init(void)
  483. {
  484. return pci_register_driver(&via_pci_driver);
  485. }
  486. static void __exit via_exit(void)
  487. {
  488. pci_unregister_driver(&via_pci_driver);
  489. }
  490. MODULE_AUTHOR("Alan Cox");
  491. MODULE_DESCRIPTION("low-level driver for VIA PATA");
  492. MODULE_LICENSE("GPL");
  493. MODULE_DEVICE_TABLE(pci, via);
  494. MODULE_VERSION(DRV_VERSION);
  495. module_init(via_init);
  496. module_exit(via_exit);