pata_radisys.c 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333
  1. /*
  2. * pata_radisys.c - Intel PATA/SATA controllers
  3. *
  4. * (C) 2006 Red Hat <alan@redhat.com>
  5. *
  6. * Some parts based on ata_piix.c by Jeff Garzik and others.
  7. *
  8. * A PIIX relative, this device has a single ATA channel and no
  9. * slave timings, SITRE or PPE. In that sense it is a close relative
  10. * of the original PIIX. It does however support UDMA 33/66 per channel
  11. * although no other modes/timings. Also lacking is 32bit I/O on the ATA
  12. * port.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/delay.h>
  20. #include <linux/device.h>
  21. #include <scsi/scsi_host.h>
  22. #include <linux/libata.h>
  23. #include <linux/ata.h>
  24. #define DRV_NAME "pata_radisys"
  25. #define DRV_VERSION "0.4.1"
  26. /**
  27. * radisys_probe_init - probe begin
  28. * @ap: ATA port
  29. *
  30. * Set up cable type and use generic probe init
  31. */
  32. static int radisys_pre_reset(struct ata_port *ap)
  33. {
  34. ap->cbl = ATA_CBL_PATA80;
  35. return ata_std_prereset(ap);
  36. }
  37. /**
  38. * radisys_pata_error_handler - Probe specified port on PATA host controller
  39. * @ap: Port to probe
  40. * @classes:
  41. *
  42. * LOCKING:
  43. * None (inherited from caller).
  44. */
  45. static void radisys_pata_error_handler(struct ata_port *ap)
  46. {
  47. ata_bmdma_drive_eh(ap, radisys_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
  48. }
  49. /**
  50. * radisys_set_piomode - Initialize host controller PATA PIO timings
  51. * @ap: Port whose timings we are configuring
  52. * @adev: um
  53. *
  54. * Set PIO mode for device, in host controller PCI config space.
  55. *
  56. * LOCKING:
  57. * None (inherited from caller).
  58. */
  59. static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
  60. {
  61. unsigned int pio = adev->pio_mode - XFER_PIO_0;
  62. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  63. u16 idetm_data;
  64. int control = 0;
  65. /*
  66. * See Intel Document 298600-004 for the timing programing rules
  67. * for PIIX/ICH. Note that the early PIIX does not have the slave
  68. * timing port at 0x44. The Radisys is a relative of the PIIX
  69. * but not the same so be careful.
  70. */
  71. static const /* ISP RTC */
  72. u8 timings[][2] = { { 0, 0 }, /* Check me */
  73. { 0, 0 },
  74. { 1, 1 },
  75. { 2, 2 },
  76. { 3, 3 }, };
  77. if (pio > 0)
  78. control |= 1; /* TIME1 enable */
  79. if (ata_pio_need_iordy(adev))
  80. control |= 2; /* IE IORDY */
  81. pci_read_config_word(dev, 0x40, &idetm_data);
  82. /* Enable IE and TIME as appropriate. Clear the other
  83. drive timing bits */
  84. idetm_data &= 0xCCCC;
  85. idetm_data |= (control << (4 * adev->devno));
  86. idetm_data |= (timings[pio][0] << 12) |
  87. (timings[pio][1] << 8);
  88. pci_write_config_word(dev, 0x40, idetm_data);
  89. /* Track which port is configured */
  90. ap->private_data = adev;
  91. }
  92. /**
  93. * radisys_set_dmamode - Initialize host controller PATA DMA timings
  94. * @ap: Port whose timings we are configuring
  95. * @adev: Device to program
  96. * @isich: True if the device is an ICH and has IOCFG registers
  97. *
  98. * Set MWDMA mode for device, in host controller PCI config space.
  99. *
  100. * LOCKING:
  101. * None (inherited from caller).
  102. */
  103. static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
  104. {
  105. struct pci_dev *dev = to_pci_dev(ap->host->dev);
  106. u16 idetm_data;
  107. u8 udma_enable;
  108. static const /* ISP RTC */
  109. u8 timings[][2] = { { 0, 0 },
  110. { 0, 0 },
  111. { 1, 1 },
  112. { 2, 2 },
  113. { 3, 3 }, };
  114. /*
  115. * MWDMA is driven by the PIO timings. We must also enable
  116. * IORDY unconditionally.
  117. */
  118. pci_read_config_word(dev, 0x40, &idetm_data);
  119. pci_read_config_byte(dev, 0x48, &udma_enable);
  120. if (adev->dma_mode < XFER_UDMA_0) {
  121. unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
  122. const unsigned int needed_pio[3] = {
  123. XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
  124. };
  125. int pio = needed_pio[mwdma] - XFER_PIO_0;
  126. int control = 3; /* IORDY|TIME0 */
  127. /* If the drive MWDMA is faster than it can do PIO then
  128. we must force PIO0 for PIO cycles. */
  129. if (adev->pio_mode < needed_pio[mwdma])
  130. control = 1;
  131. /* Mask out the relevant control and timing bits we will load. Also
  132. clear the other drive TIME register as a precaution */
  133. idetm_data &= 0xCCCC;
  134. idetm_data |= control << (4 * adev->devno);
  135. idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
  136. udma_enable &= ~(1 << adev->devno);
  137. } else {
  138. u8 udma_mode;
  139. /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
  140. pci_read_config_byte(dev, 0x4A, &udma_mode);
  141. if (adev->xfer_mode == XFER_UDMA_2)
  142. udma_mode &= ~ (1 << adev->devno);
  143. else /* UDMA 4 */
  144. udma_mode |= (1 << adev->devno);
  145. pci_write_config_byte(dev, 0x4A, udma_mode);
  146. udma_enable |= (1 << adev->devno);
  147. }
  148. pci_write_config_word(dev, 0x40, idetm_data);
  149. pci_write_config_byte(dev, 0x48, udma_enable);
  150. /* Track which port is configured */
  151. ap->private_data = adev;
  152. }
  153. /**
  154. * radisys_qc_issue_prot - command issue
  155. * @qc: command pending
  156. *
  157. * Called when the libata layer is about to issue a command. We wrap
  158. * this interface so that we can load the correct ATA timings if
  159. * neccessary. Our logic also clears TIME0/TIME1 for the other device so
  160. * that, even if we get this wrong, cycles to the other device will
  161. * be made PIO0.
  162. */
  163. static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc)
  164. {
  165. struct ata_port *ap = qc->ap;
  166. struct ata_device *adev = qc->dev;
  167. if (adev != ap->private_data) {
  168. /* UDMA timing is not shared */
  169. if (adev->dma_mode < XFER_UDMA_0) {
  170. if (adev->dma_mode)
  171. radisys_set_dmamode(ap, adev);
  172. else if (adev->pio_mode)
  173. radisys_set_piomode(ap, adev);
  174. }
  175. }
  176. return ata_qc_issue_prot(qc);
  177. }
  178. static struct scsi_host_template radisys_sht = {
  179. .module = THIS_MODULE,
  180. .name = DRV_NAME,
  181. .ioctl = ata_scsi_ioctl,
  182. .queuecommand = ata_scsi_queuecmd,
  183. .can_queue = ATA_DEF_QUEUE,
  184. .this_id = ATA_SHT_THIS_ID,
  185. .sg_tablesize = LIBATA_MAX_PRD,
  186. .max_sectors = ATA_MAX_SECTORS,
  187. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  188. .emulated = ATA_SHT_EMULATED,
  189. .use_clustering = ATA_SHT_USE_CLUSTERING,
  190. .proc_name = DRV_NAME,
  191. .dma_boundary = ATA_DMA_BOUNDARY,
  192. .slave_configure = ata_scsi_slave_config,
  193. .bios_param = ata_std_bios_param,
  194. };
  195. static const struct ata_port_operations radisys_pata_ops = {
  196. .port_disable = ata_port_disable,
  197. .set_piomode = radisys_set_piomode,
  198. .set_dmamode = radisys_set_dmamode,
  199. .mode_filter = ata_pci_default_filter,
  200. .tf_load = ata_tf_load,
  201. .tf_read = ata_tf_read,
  202. .check_status = ata_check_status,
  203. .exec_command = ata_exec_command,
  204. .dev_select = ata_std_dev_select,
  205. .freeze = ata_bmdma_freeze,
  206. .thaw = ata_bmdma_thaw,
  207. .error_handler = radisys_pata_error_handler,
  208. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  209. .bmdma_setup = ata_bmdma_setup,
  210. .bmdma_start = ata_bmdma_start,
  211. .bmdma_stop = ata_bmdma_stop,
  212. .bmdma_status = ata_bmdma_status,
  213. .qc_prep = ata_qc_prep,
  214. .qc_issue = radisys_qc_issue_prot,
  215. .data_xfer = ata_pio_data_xfer,
  216. .irq_handler = ata_interrupt,
  217. .irq_clear = ata_bmdma_irq_clear,
  218. .port_start = ata_port_start,
  219. .port_stop = ata_port_stop,
  220. .host_stop = ata_host_stop,
  221. };
  222. /**
  223. * radisys_init_one - Register PIIX ATA PCI device with kernel services
  224. * @pdev: PCI device to register
  225. * @ent: Entry in radisys_pci_tbl matching with @pdev
  226. *
  227. * Called from kernel PCI layer. We probe for combined mode (sigh),
  228. * and then hand over control to libata, for it to do the rest.
  229. *
  230. * LOCKING:
  231. * Inherited from PCI layer (may sleep).
  232. *
  233. * RETURNS:
  234. * Zero on success, or -ERRNO value.
  235. */
  236. static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  237. {
  238. static int printed_version;
  239. static struct ata_port_info info = {
  240. .sht = &radisys_sht,
  241. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  242. .pio_mask = 0x1f, /* pio0-4 */
  243. .mwdma_mask = 0x07, /* mwdma1-2 */
  244. .udma_mask = 0x14, /* UDMA33/66 only */
  245. .port_ops = &radisys_pata_ops,
  246. };
  247. static struct ata_port_info *port_info[2] = { &info, &info };
  248. if (!printed_version++)
  249. dev_printk(KERN_DEBUG, &pdev->dev,
  250. "version " DRV_VERSION "\n");
  251. return ata_pci_init_one(pdev, port_info, 2);
  252. }
  253. static const struct pci_device_id radisys_pci_tbl[] = {
  254. { PCI_VDEVICE(RADISYS, 0x8201), },
  255. { } /* terminate list */
  256. };
  257. static struct pci_driver radisys_pci_driver = {
  258. .name = DRV_NAME,
  259. .id_table = radisys_pci_tbl,
  260. .probe = radisys_init_one,
  261. .remove = ata_pci_remove_one,
  262. };
  263. static int __init radisys_init(void)
  264. {
  265. return pci_register_driver(&radisys_pci_driver);
  266. }
  267. static void __exit radisys_exit(void)
  268. {
  269. pci_unregister_driver(&radisys_pci_driver);
  270. }
  271. module_init(radisys_init);
  272. module_exit(radisys_exit);
  273. MODULE_AUTHOR("Alan Cox");
  274. MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
  275. MODULE_LICENSE("GPL");
  276. MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
  277. MODULE_VERSION(DRV_VERSION);