pata_atiixp.c 8.2 KB

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  1. /*
  2. * pata_atiixp.c - ATI PATA for new ATA layer
  3. * (C) 2005 Red Hat Inc
  4. * Alan Cox <alan@redhat.com>
  5. *
  6. * Based on
  7. *
  8. * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
  9. *
  10. * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
  11. * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/blkdev.h>
  19. #include <linux/delay.h>
  20. #include <scsi/scsi_host.h>
  21. #include <linux/libata.h>
  22. #define DRV_NAME "pata_atiixp"
  23. #define DRV_VERSION "0.4.3"
  24. enum {
  25. ATIIXP_IDE_PIO_TIMING = 0x40,
  26. ATIIXP_IDE_MWDMA_TIMING = 0x44,
  27. ATIIXP_IDE_PIO_CONTROL = 0x48,
  28. ATIIXP_IDE_PIO_MODE = 0x4a,
  29. ATIIXP_IDE_UDMA_CONTROL = 0x54,
  30. ATIIXP_IDE_UDMA_MODE = 0x56
  31. };
  32. static int atiixp_pre_reset(struct ata_port *ap)
  33. {
  34. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  35. static struct pci_bits atiixp_enable_bits[] = {
  36. { 0x48, 1, 0x01, 0x00 },
  37. { 0x48, 1, 0x08, 0x00 }
  38. };
  39. if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no]))
  40. return -ENOENT;
  41. ap->cbl = ATA_CBL_PATA80;
  42. return ata_std_prereset(ap);
  43. }
  44. static void atiixp_error_handler(struct ata_port *ap)
  45. {
  46. ata_bmdma_drive_eh(ap, atiixp_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
  47. }
  48. /**
  49. * atiixp_set_pio_timing - set initial PIO mode data
  50. * @ap: ATA interface
  51. * @adev: ATA device
  52. *
  53. * Called by both the pio and dma setup functions to set the controller
  54. * timings for PIO transfers. We must load both the mode number and
  55. * timing values into the controller.
  56. */
  57. static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev, int pio)
  58. {
  59. static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
  60. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  61. int dn = 2 * ap->port_no + adev->devno;
  62. /* Check this is correct - the order is odd in both drivers */
  63. int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  64. u16 pio_mode_data, pio_timing_data;
  65. pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  66. pio_mode_data &= ~(0x7 << (4 * dn));
  67. pio_mode_data |= pio << (4 * dn);
  68. pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  69. pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  70. pio_mode_data &= ~(0xFF << timing_shift);
  71. pio_mode_data |= (pio_timings[pio] << timing_shift);
  72. pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  73. }
  74. /**
  75. * atiixp_set_piomode - set initial PIO mode data
  76. * @ap: ATA interface
  77. * @adev: ATA device
  78. *
  79. * Called to do the PIO mode setup. We use a shared helper for this
  80. * as the DMA setup must also adjust the PIO timing information.
  81. */
  82. static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
  83. {
  84. atiixp_set_pio_timing(ap, adev, adev->pio_mode - XFER_PIO_0);
  85. }
  86. /**
  87. * atiixp_set_dmamode - set initial DMA mode data
  88. * @ap: ATA interface
  89. * @adev: ATA device
  90. *
  91. * Called to do the DMA mode setup. We use timing tables for most
  92. * modes but must tune an appropriate PIO mode to match.
  93. */
  94. static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  95. {
  96. static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
  97. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  98. int dma = adev->dma_mode;
  99. int dn = 2 * ap->port_no + adev->devno;
  100. int wanted_pio;
  101. if (adev->dma_mode >= XFER_UDMA_0) {
  102. u16 udma_mode_data;
  103. dma -= XFER_UDMA_0;
  104. pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
  105. udma_mode_data &= ~(0x7 << (4 * dn));
  106. udma_mode_data |= dma << (4 * dn);
  107. pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
  108. } else {
  109. u16 mwdma_timing_data;
  110. /* Check this is correct - the order is odd in both drivers */
  111. int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
  112. dma -= XFER_MW_DMA_0;
  113. pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data);
  114. mwdma_timing_data &= ~(0xFF << timing_shift);
  115. mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
  116. pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data);
  117. }
  118. /*
  119. * We must now look at the PIO mode situation. We may need to
  120. * adjust the PIO mode to keep the timings acceptable
  121. */
  122. if (adev->dma_mode >= XFER_MW_DMA_2)
  123. wanted_pio = 4;
  124. else if (adev->dma_mode == XFER_MW_DMA_1)
  125. wanted_pio = 3;
  126. else if (adev->dma_mode == XFER_MW_DMA_0)
  127. wanted_pio = 0;
  128. else BUG();
  129. if (adev->pio_mode != wanted_pio)
  130. atiixp_set_pio_timing(ap, adev, wanted_pio);
  131. }
  132. /**
  133. * atiixp_bmdma_start - DMA start callback
  134. * @qc: Command in progress
  135. *
  136. * When DMA begins we need to ensure that the UDMA control
  137. * register for the channel is correctly set.
  138. */
  139. static void atiixp_bmdma_start(struct ata_queued_cmd *qc)
  140. {
  141. struct ata_port *ap = qc->ap;
  142. struct ata_device *adev = qc->dev;
  143. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  144. int dn = (2 * ap->port_no) + adev->devno;
  145. u16 tmp16;
  146. pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
  147. if (adev->dma_mode >= XFER_UDMA_0)
  148. tmp16 |= (1 << dn);
  149. else
  150. tmp16 &= ~(1 << dn);
  151. pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
  152. ata_bmdma_start(qc);
  153. }
  154. /**
  155. * atiixp_dma_stop - DMA stop callback
  156. * @qc: Command in progress
  157. *
  158. * DMA has completed. Clear the UDMA flag as the next operations will
  159. * be PIO ones not UDMA data transfer.
  160. */
  161. static void atiixp_bmdma_stop(struct ata_queued_cmd *qc)
  162. {
  163. struct ata_port *ap = qc->ap;
  164. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  165. int dn = (2 * ap->port_no) + qc->dev->devno;
  166. u16 tmp16;
  167. pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
  168. tmp16 &= ~(1 << dn);
  169. pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
  170. ata_bmdma_stop(qc);
  171. }
  172. static struct scsi_host_template atiixp_sht = {
  173. .module = THIS_MODULE,
  174. .name = DRV_NAME,
  175. .ioctl = ata_scsi_ioctl,
  176. .queuecommand = ata_scsi_queuecmd,
  177. .can_queue = ATA_DEF_QUEUE,
  178. .this_id = ATA_SHT_THIS_ID,
  179. .sg_tablesize = LIBATA_MAX_PRD,
  180. .max_sectors = ATA_MAX_SECTORS,
  181. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  182. .emulated = ATA_SHT_EMULATED,
  183. .use_clustering = ATA_SHT_USE_CLUSTERING,
  184. .proc_name = DRV_NAME,
  185. .dma_boundary = ATA_DMA_BOUNDARY,
  186. .slave_configure = ata_scsi_slave_config,
  187. .bios_param = ata_std_bios_param,
  188. };
  189. static struct ata_port_operations atiixp_port_ops = {
  190. .port_disable = ata_port_disable,
  191. .set_piomode = atiixp_set_piomode,
  192. .set_dmamode = atiixp_set_dmamode,
  193. .mode_filter = ata_pci_default_filter,
  194. .tf_load = ata_tf_load,
  195. .tf_read = ata_tf_read,
  196. .check_status = ata_check_status,
  197. .exec_command = ata_exec_command,
  198. .dev_select = ata_std_dev_select,
  199. .freeze = ata_bmdma_freeze,
  200. .thaw = ata_bmdma_thaw,
  201. .error_handler = atiixp_error_handler,
  202. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  203. .bmdma_setup = ata_bmdma_setup,
  204. .bmdma_start = atiixp_bmdma_start,
  205. .bmdma_stop = atiixp_bmdma_stop,
  206. .bmdma_status = ata_bmdma_status,
  207. .qc_prep = ata_qc_prep,
  208. .qc_issue = ata_qc_issue_prot,
  209. .data_xfer = ata_pio_data_xfer,
  210. .irq_handler = ata_interrupt,
  211. .irq_clear = ata_bmdma_irq_clear,
  212. .port_start = ata_port_start,
  213. .port_stop = ata_port_stop,
  214. .host_stop = ata_host_stop
  215. };
  216. static int atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  217. {
  218. static struct ata_port_info info = {
  219. .sht = &atiixp_sht,
  220. .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
  221. .pio_mask = 0x1f,
  222. .mwdma_mask = 0x06, /* No MWDMA0 support */
  223. .udma_mask = 0x3F,
  224. .port_ops = &atiixp_port_ops
  225. };
  226. static struct ata_port_info *port_info[2] = { &info, &info };
  227. return ata_pci_init_one(dev, port_info, 2);
  228. }
  229. static const struct pci_device_id atiixp[] = {
  230. { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), },
  231. { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), },
  232. { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
  233. { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
  234. { },
  235. };
  236. static struct pci_driver atiixp_pci_driver = {
  237. .name = DRV_NAME,
  238. .id_table = atiixp,
  239. .probe = atiixp_init_one,
  240. .remove = ata_pci_remove_one
  241. };
  242. static int __init atiixp_init(void)
  243. {
  244. return pci_register_driver(&atiixp_pci_driver);
  245. }
  246. static void __exit atiixp_exit(void)
  247. {
  248. pci_unregister_driver(&atiixp_pci_driver);
  249. }
  250. MODULE_AUTHOR("Alan Cox");
  251. MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
  252. MODULE_LICENSE("GPL");
  253. MODULE_DEVICE_TABLE(pci, atiixp);
  254. MODULE_VERSION(DRV_VERSION);
  255. module_init(atiixp_init);
  256. module_exit(atiixp_exit);