setup.c 11 KB

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  1. /*
  2. * arch/xtensa/kernel/setup.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 1995 Linus Torvalds
  9. * Copyright (C) 2001 - 2005 Tensilica Inc.
  10. *
  11. * Chris Zankel <chris@zankel.net>
  12. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  13. * Kevin Chea
  14. * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/init.h>
  18. #include <linux/proc_fs.h>
  19. #include <linux/screen_info.h>
  20. #include <linux/bootmem.h>
  21. #include <linux/kernel.h>
  22. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  23. # include <linux/console.h>
  24. #endif
  25. #ifdef CONFIG_RTC
  26. # include <linux/timex.h>
  27. #endif
  28. #ifdef CONFIG_PROC_FS
  29. # include <linux/seq_file.h>
  30. #endif
  31. #include <asm/system.h>
  32. #include <asm/bootparam.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/processor.h>
  35. #include <asm/timex.h>
  36. #include <asm/platform.h>
  37. #include <asm/page.h>
  38. #include <asm/setup.h>
  39. #include <xtensa/config/system.h>
  40. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  41. struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
  42. #endif
  43. #ifdef CONFIG_BLK_DEV_FD
  44. extern struct fd_ops no_fd_ops;
  45. struct fd_ops *fd_ops;
  46. #endif
  47. #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
  48. extern struct ide_ops no_ide_ops;
  49. struct ide_ops *ide_ops;
  50. #endif
  51. extern struct rtc_ops no_rtc_ops;
  52. struct rtc_ops *rtc_ops;
  53. #ifdef CONFIG_PC_KEYB
  54. extern struct kbd_ops no_kbd_ops;
  55. struct kbd_ops *kbd_ops;
  56. #endif
  57. #ifdef CONFIG_BLK_DEV_INITRD
  58. extern void *initrd_start;
  59. extern void *initrd_end;
  60. extern void *__initrd_start;
  61. extern void *__initrd_end;
  62. int initrd_is_mapped = 0;
  63. extern int initrd_below_start_ok;
  64. #endif
  65. unsigned char aux_device_present;
  66. extern unsigned long loops_per_jiffy;
  67. /* Command line specified as configuration option. */
  68. static char command_line[COMMAND_LINE_SIZE];
  69. #ifdef CONFIG_CMDLINE_BOOL
  70. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  71. #endif
  72. sysmem_info_t __initdata sysmem;
  73. #ifdef CONFIG_BLK_DEV_INITRD
  74. int initrd_is_mapped;
  75. #endif
  76. extern void init_mmu(void);
  77. /*
  78. * Boot parameter parsing.
  79. *
  80. * The Xtensa port uses a list of variable-sized tags to pass data to
  81. * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
  82. * to be recognised. The list is terminated with a zero-sized
  83. * BP_TAG_LAST tag.
  84. */
  85. typedef struct tagtable {
  86. u32 tag;
  87. int (*parse)(const bp_tag_t*);
  88. } tagtable_t;
  89. #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
  90. __attribute__((unused, __section__(".taglist"))) = { tag, fn }
  91. /* parse current tag */
  92. static int __init parse_tag_mem(const bp_tag_t *tag)
  93. {
  94. meminfo_t *mi = (meminfo_t*)(tag->data);
  95. if (mi->type != MEMORY_TYPE_CONVENTIONAL)
  96. return -1;
  97. if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
  98. printk(KERN_WARNING
  99. "Ignoring memory bank 0x%08lx size %ldKB\n",
  100. (unsigned long)mi->start,
  101. (unsigned long)mi->end - (unsigned long)mi->start);
  102. return -EINVAL;
  103. }
  104. sysmem.bank[sysmem.nr_banks].type = mi->type;
  105. sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
  106. sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE;
  107. sysmem.nr_banks++;
  108. return 0;
  109. }
  110. __tagtable(BP_TAG_MEMORY, parse_tag_mem);
  111. #ifdef CONFIG_BLK_DEV_INITRD
  112. static int __init parse_tag_initrd(const bp_tag_t* tag)
  113. {
  114. meminfo_t* mi;
  115. mi = (meminfo_t*)(tag->data);
  116. initrd_start = (void*)(mi->start);
  117. initrd_end = (void*)(mi->end);
  118. return 0;
  119. }
  120. __tagtable(BP_TAG_INITRD, parse_tag_initrd);
  121. #endif /* CONFIG_BLK_DEV_INITRD */
  122. static int __init parse_tag_cmdline(const bp_tag_t* tag)
  123. {
  124. strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
  125. command_line[COMMAND_LINE_SIZE - 1] = '\0';
  126. return 0;
  127. }
  128. __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
  129. static int __init parse_bootparam(const bp_tag_t* tag)
  130. {
  131. extern tagtable_t __tagtable_begin, __tagtable_end;
  132. tagtable_t *t;
  133. /* Boot parameters must start with a BP_TAG_FIRST tag. */
  134. if (tag->id != BP_TAG_FIRST) {
  135. printk(KERN_WARNING "Invalid boot parameters!\n");
  136. return 0;
  137. }
  138. tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
  139. /* Parse all tags. */
  140. while (tag != NULL && tag->id != BP_TAG_LAST) {
  141. for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
  142. if (tag->id == t->tag) {
  143. t->parse(tag);
  144. break;
  145. }
  146. }
  147. if (t == &__tagtable_end)
  148. printk(KERN_WARNING "Ignoring tag "
  149. "0x%08x\n", tag->id);
  150. tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
  151. }
  152. return 0;
  153. }
  154. /*
  155. * Initialize architecture. (Early stage)
  156. */
  157. void __init init_arch(bp_tag_t *bp_start)
  158. {
  159. #ifdef CONFIG_BLK_DEV_INITRD
  160. initrd_start = &__initrd_start;
  161. initrd_end = &__initrd_end;
  162. #endif
  163. sysmem.nr_banks = 0;
  164. #ifdef CONFIG_CMDLINE_BOOL
  165. strcpy(command_line, default_command_line);
  166. #endif
  167. /* Parse boot parameters */
  168. if (bp_start)
  169. parse_bootparam(bp_start);
  170. if (sysmem.nr_banks == 0) {
  171. sysmem.nr_banks = 1;
  172. sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
  173. sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
  174. + PLATFORM_DEFAULT_MEM_SIZE;
  175. }
  176. /* Early hook for platforms */
  177. platform_init(bp_start);
  178. /* Initialize MMU. */
  179. init_mmu();
  180. }
  181. /*
  182. * Initialize system. Setup memory and reserve regions.
  183. */
  184. extern char _end;
  185. extern char _stext;
  186. extern char _WindowVectors_text_start;
  187. extern char _WindowVectors_text_end;
  188. extern char _DebugInterruptVector_literal_start;
  189. extern char _DebugInterruptVector_text_end;
  190. extern char _KernelExceptionVector_literal_start;
  191. extern char _KernelExceptionVector_text_end;
  192. extern char _UserExceptionVector_literal_start;
  193. extern char _UserExceptionVector_text_end;
  194. extern char _DoubleExceptionVector_literal_start;
  195. extern char _DoubleExceptionVector_text_end;
  196. void __init setup_arch(char **cmdline_p)
  197. {
  198. extern int mem_reserve(unsigned long, unsigned long, int);
  199. extern void bootmem_init(void);
  200. memcpy(saved_command_line, command_line, COMMAND_LINE_SIZE);
  201. saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
  202. *cmdline_p = command_line;
  203. /* Reserve some memory regions */
  204. #ifdef CONFIG_BLK_DEV_INITRD
  205. if (initrd_start < initrd_end) {
  206. initrd_is_mapped = mem_reserve(__pa(initrd_start),
  207. __pa(initrd_end), 0);
  208. initrd_below_start_ok = 1;
  209. } else {
  210. initrd_start = 0;
  211. }
  212. #endif
  213. mem_reserve(__pa(&_stext),__pa(&_end), 1);
  214. mem_reserve(__pa(&_WindowVectors_text_start),
  215. __pa(&_WindowVectors_text_end), 0);
  216. mem_reserve(__pa(&_DebugInterruptVector_literal_start),
  217. __pa(&_DebugInterruptVector_text_end), 0);
  218. mem_reserve(__pa(&_KernelExceptionVector_literal_start),
  219. __pa(&_KernelExceptionVector_text_end), 0);
  220. mem_reserve(__pa(&_UserExceptionVector_literal_start),
  221. __pa(&_UserExceptionVector_text_end), 0);
  222. mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
  223. __pa(&_DoubleExceptionVector_text_end), 0);
  224. bootmem_init();
  225. platform_setup(cmdline_p);
  226. paging_init();
  227. #ifdef CONFIG_VT
  228. # if defined(CONFIG_VGA_CONSOLE)
  229. conswitchp = &vga_con;
  230. # elif defined(CONFIG_DUMMY_CONSOLE)
  231. conswitchp = &dummy_con;
  232. # endif
  233. #endif
  234. #ifdef CONFIG_PCI
  235. platform_pcibios_init();
  236. #endif
  237. }
  238. void machine_restart(char * cmd)
  239. {
  240. platform_restart();
  241. }
  242. void machine_halt(void)
  243. {
  244. platform_halt();
  245. while (1);
  246. }
  247. void machine_power_off(void)
  248. {
  249. platform_power_off();
  250. while (1);
  251. }
  252. #ifdef CONFIG_PROC_FS
  253. /*
  254. * Display some core information through /proc/cpuinfo.
  255. */
  256. static int
  257. c_show(struct seq_file *f, void *slot)
  258. {
  259. /* high-level stuff */
  260. seq_printf(f,"processor\t: 0\n"
  261. "vendor_id\t: Tensilica\n"
  262. "model\t\t: Xtensa " XCHAL_HW_RELEASE_NAME "\n"
  263. "core ID\t\t: " XCHAL_CORE_ID "\n"
  264. "build ID\t: 0x%x\n"
  265. "byte order\t: %s\n"
  266. "cpu MHz\t\t: %lu.%02lu\n"
  267. "bogomips\t: %lu.%02lu\n",
  268. XCHAL_BUILD_UNIQUE_ID,
  269. XCHAL_HAVE_BE ? "big" : "little",
  270. CCOUNT_PER_JIFFY/(1000000/HZ),
  271. (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
  272. loops_per_jiffy/(500000/HZ),
  273. (loops_per_jiffy/(5000/HZ)) % 100);
  274. seq_printf(f,"flags\t\t: "
  275. #if XCHAL_HAVE_NMI
  276. "nmi "
  277. #endif
  278. #if XCHAL_HAVE_DEBUG
  279. "debug "
  280. # if XCHAL_HAVE_OCD
  281. "ocd "
  282. # endif
  283. #endif
  284. #if XCHAL_HAVE_DENSITY
  285. "density "
  286. #endif
  287. #if XCHAL_HAVE_BOOLEANS
  288. "boolean "
  289. #endif
  290. #if XCHAL_HAVE_LOOPS
  291. "loop "
  292. #endif
  293. #if XCHAL_HAVE_NSA
  294. "nsa "
  295. #endif
  296. #if XCHAL_HAVE_MINMAX
  297. "minmax "
  298. #endif
  299. #if XCHAL_HAVE_SEXT
  300. "sext "
  301. #endif
  302. #if XCHAL_HAVE_CLAMPS
  303. "clamps "
  304. #endif
  305. #if XCHAL_HAVE_MAC16
  306. "mac16 "
  307. #endif
  308. #if XCHAL_HAVE_MUL16
  309. "mul16 "
  310. #endif
  311. #if XCHAL_HAVE_MUL32
  312. "mul32 "
  313. #endif
  314. #if XCHAL_HAVE_MUL32_HIGH
  315. "mul32h "
  316. #endif
  317. #if XCHAL_HAVE_FP
  318. "fpu "
  319. #endif
  320. "\n");
  321. /* Registers. */
  322. seq_printf(f,"physical aregs\t: %d\n"
  323. "misc regs\t: %d\n"
  324. "ibreak\t\t: %d\n"
  325. "dbreak\t\t: %d\n",
  326. XCHAL_NUM_AREGS,
  327. XCHAL_NUM_MISC_REGS,
  328. XCHAL_NUM_IBREAK,
  329. XCHAL_NUM_DBREAK);
  330. /* Interrupt. */
  331. seq_printf(f,"num ints\t: %d\n"
  332. "ext ints\t: %d\n"
  333. "int levels\t: %d\n"
  334. "timers\t\t: %d\n"
  335. "debug level\t: %d\n",
  336. XCHAL_NUM_INTERRUPTS,
  337. XCHAL_NUM_EXTINTERRUPTS,
  338. XCHAL_NUM_INTLEVELS,
  339. XCHAL_NUM_TIMERS,
  340. XCHAL_DEBUGLEVEL);
  341. /* Coprocessors */
  342. #if XCHAL_HAVE_CP
  343. seq_printf(f, "coprocessors\t: %d\n", XCHAL_CP_NUM);
  344. #else
  345. seq_printf(f, "coprocessors\t: none\n");
  346. #endif
  347. /* {I,D}{RAM,ROM} and XLMI */
  348. seq_printf(f,"inst ROMs\t: %d\n"
  349. "inst RAMs\t: %d\n"
  350. "data ROMs\t: %d\n"
  351. "data RAMs\t: %d\n"
  352. "XLMI ports\t: %d\n",
  353. XCHAL_NUM_IROM,
  354. XCHAL_NUM_IRAM,
  355. XCHAL_NUM_DROM,
  356. XCHAL_NUM_DRAM,
  357. XCHAL_NUM_XLMI);
  358. /* Cache */
  359. seq_printf(f,"icache line size: %d\n"
  360. "icache ways\t: %d\n"
  361. "icache size\t: %d\n"
  362. "icache flags\t: "
  363. #if XCHAL_ICACHE_LINE_LOCKABLE
  364. "lock"
  365. #endif
  366. "\n"
  367. "dcache line size: %d\n"
  368. "dcache ways\t: %d\n"
  369. "dcache size\t: %d\n"
  370. "dcache flags\t: "
  371. #if XCHAL_DCACHE_IS_WRITEBACK
  372. "writeback"
  373. #endif
  374. #if XCHAL_DCACHE_LINE_LOCKABLE
  375. "lock"
  376. #endif
  377. "\n",
  378. XCHAL_ICACHE_LINESIZE,
  379. XCHAL_ICACHE_WAYS,
  380. XCHAL_ICACHE_SIZE,
  381. XCHAL_DCACHE_LINESIZE,
  382. XCHAL_DCACHE_WAYS,
  383. XCHAL_DCACHE_SIZE);
  384. /* MMU */
  385. seq_printf(f,"ASID bits\t: %d\n"
  386. "ASID invalid\t: %d\n"
  387. "ASID kernel\t: %d\n"
  388. "rings\t\t: %d\n"
  389. "itlb ways\t: %d\n"
  390. "itlb AR ways\t: %d\n"
  391. "dtlb ways\t: %d\n"
  392. "dtlb AR ways\t: %d\n",
  393. XCHAL_MMU_ASID_BITS,
  394. XCHAL_MMU_ASID_INVALID,
  395. XCHAL_MMU_ASID_KERNEL,
  396. XCHAL_MMU_RINGS,
  397. XCHAL_ITLB_WAYS,
  398. XCHAL_ITLB_ARF_WAYS,
  399. XCHAL_DTLB_WAYS,
  400. XCHAL_DTLB_ARF_WAYS);
  401. return 0;
  402. }
  403. /*
  404. * We show only CPU #0 info.
  405. */
  406. static void *
  407. c_start(struct seq_file *f, loff_t *pos)
  408. {
  409. return (void *) ((*pos == 0) ? (void *)1 : NULL);
  410. }
  411. static void *
  412. c_next(struct seq_file *f, void *v, loff_t *pos)
  413. {
  414. return NULL;
  415. }
  416. static void
  417. c_stop(struct seq_file *f, void *v)
  418. {
  419. }
  420. struct seq_operations cpuinfo_op =
  421. {
  422. start: c_start,
  423. next: c_next,
  424. stop: c_stop,
  425. show: c_show
  426. };
  427. #endif /* CONFIG_PROC_FS */