Kconfig 7.0 KB

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  1. menu "Processor selection"
  2. #
  3. # Processor families
  4. #
  5. config CPU_SH2
  6. bool
  7. select SH_WRITETHROUGH
  8. config CPU_SH3
  9. bool
  10. select CPU_HAS_INTEVT
  11. select CPU_HAS_SR_RB
  12. config CPU_SH4
  13. bool
  14. select CPU_HAS_INTEVT
  15. select CPU_HAS_SR_RB
  16. config CPU_SH4A
  17. bool
  18. select CPU_SH4
  19. config CPU_SH4AL_DSP
  20. bool
  21. select CPU_SH4A
  22. config CPU_SUBTYPE_ST40
  23. bool
  24. select CPU_SH4
  25. select CPU_HAS_INTC2_IRQ
  26. #
  27. # Processor subtypes
  28. #
  29. comment "SH-2 Processor Support"
  30. config CPU_SUBTYPE_SH7604
  31. bool "Support SH7604 processor"
  32. select CPU_SH2
  33. comment "SH-3 Processor Support"
  34. config CPU_SUBTYPE_SH7300
  35. bool "Support SH7300 processor"
  36. select CPU_SH3
  37. config CPU_SUBTYPE_SH7705
  38. bool "Support SH7705 processor"
  39. select CPU_SH3
  40. select CPU_HAS_PINT_IRQ
  41. config CPU_SUBTYPE_SH7706
  42. bool "Support SH7706 processor"
  43. select CPU_SH3
  44. help
  45. Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
  46. config CPU_SUBTYPE_SH7707
  47. bool "Support SH7707 processor"
  48. select CPU_SH3
  49. select CPU_HAS_PINT_IRQ
  50. help
  51. Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
  52. config CPU_SUBTYPE_SH7708
  53. bool "Support SH7708 processor"
  54. select CPU_SH3
  55. help
  56. Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
  57. if you have a 100 Mhz SH-3 HD6417708R CPU.
  58. config CPU_SUBTYPE_SH7709
  59. bool "Support SH7709 processor"
  60. select CPU_SH3
  61. select CPU_HAS_PINT_IRQ
  62. help
  63. Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
  64. config CPU_SUBTYPE_SH7710
  65. bool "Support SH7710 processor"
  66. select CPU_SH3
  67. help
  68. Select SH7710 if you have a SH3-DSP SH7710 CPU.
  69. comment "SH-4 Processor Support"
  70. config CPU_SUBTYPE_SH7750
  71. bool "Support SH7750 processor"
  72. select CPU_SH4
  73. help
  74. Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
  75. config CPU_SUBTYPE_SH7091
  76. bool "Support SH7091 processor"
  77. select CPU_SH4
  78. select CPU_SUBTYPE_SH7750
  79. help
  80. Select SH7091 if you have an SH-4 based Sega device (such as
  81. the Dreamcast, Naomi, and Naomi 2).
  82. config CPU_SUBTYPE_SH7750R
  83. bool "Support SH7750R processor"
  84. select CPU_SH4
  85. select CPU_SUBTYPE_SH7750
  86. config CPU_SUBTYPE_SH7750S
  87. bool "Support SH7750S processor"
  88. select CPU_SH4
  89. select CPU_SUBTYPE_SH7750
  90. config CPU_SUBTYPE_SH7751
  91. bool "Support SH7751 processor"
  92. select CPU_SH4
  93. help
  94. Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
  95. or if you have a HD6417751R CPU.
  96. config CPU_SUBTYPE_SH7751R
  97. bool "Support SH7751R processor"
  98. select CPU_SH4
  99. select CPU_SUBTYPE_SH7751
  100. config CPU_SUBTYPE_SH7760
  101. bool "Support SH7760 processor"
  102. select CPU_SH4
  103. select CPU_HAS_INTC2_IRQ
  104. config CPU_SUBTYPE_SH4_202
  105. bool "Support SH4-202 processor"
  106. select CPU_SH4
  107. comment "ST40 Processor Support"
  108. config CPU_SUBTYPE_ST40STB1
  109. bool "Support ST40STB1/ST40RA processors"
  110. select CPU_SUBTYPE_ST40
  111. help
  112. Select ST40STB1 if you have a ST40RA CPU.
  113. This was previously called the ST40STB1, hence the option name.
  114. config CPU_SUBTYPE_ST40GX1
  115. bool "Support ST40GX1 processor"
  116. select CPU_SUBTYPE_ST40
  117. help
  118. Select ST40GX1 if you have a ST40GX1 CPU.
  119. comment "SH-4A Processor Support"
  120. config CPU_SUBTYPE_SH7770
  121. bool "Support SH7770 processor"
  122. select CPU_SH4A
  123. config CPU_SUBTYPE_SH7780
  124. bool "Support SH7780 processor"
  125. select CPU_SH4A
  126. select CPU_HAS_INTC2_IRQ
  127. comment "SH4AL-DSP Processor Support"
  128. config CPU_SUBTYPE_SH73180
  129. bool "Support SH73180 processor"
  130. select CPU_SH4AL_DSP
  131. config CPU_SUBTYPE_SH7343
  132. bool "Support SH7343 processor"
  133. select CPU_SH4AL_DSP
  134. endmenu
  135. menu "Memory management options"
  136. config MMU
  137. bool "Support for memory management hardware"
  138. depends on !CPU_SH2
  139. default y
  140. help
  141. Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
  142. boot on these systems, this option must not be set.
  143. On other systems (such as the SH-3 and 4) where an MMU exists,
  144. turning this off will boot the kernel on these machines with the
  145. MMU implicitly switched off.
  146. config PAGE_OFFSET
  147. hex
  148. default "0x80000000" if MMU
  149. default "0x00000000"
  150. config MEMORY_START
  151. hex "Physical memory start address"
  152. default "0x08000000"
  153. ---help---
  154. Computers built with Hitachi SuperH processors always
  155. map the ROM starting at address zero. But the processor
  156. does not specify the range that RAM takes.
  157. The physical memory (RAM) start address will be automatically
  158. set to 08000000. Other platforms, such as the Solution Engine
  159. boards typically map RAM at 0C000000.
  160. Tweak this only when porting to a new machine which does not
  161. already have a defconfig. Changing it from the known correct
  162. value on any of the known systems will only lead to disaster.
  163. config MEMORY_SIZE
  164. hex "Physical memory size"
  165. default "0x00400000"
  166. help
  167. This sets the default memory size assumed by your SH kernel. It can
  168. be overridden as normal by the 'mem=' argument on the kernel command
  169. line. If unsure, consult your board specifications or just leave it
  170. as 0x00400000 which was the default value before this became
  171. configurable.
  172. config 32BIT
  173. bool "Support 32-bit physical addressing through PMB"
  174. depends on CPU_SH4A && MMU
  175. default y
  176. help
  177. If you say Y here, physical addressing will be extended to
  178. 32-bits through the SH-4A PMB. If this is not set, legacy
  179. 29-bit physical addressing will be used.
  180. config VSYSCALL
  181. bool "Support vsyscall page"
  182. depends on MMU
  183. default y
  184. help
  185. This will enable support for the kernel mapping a vDSO page
  186. in process space, and subsequently handing down the entry point
  187. to the libc through the ELF auxiliary vector.
  188. From the kernel side this is used for the signal trampoline.
  189. For systems with an MMU that can afford to give up a page,
  190. (the default value) say Y.
  191. choice
  192. prompt "HugeTLB page size"
  193. depends on HUGETLB_PAGE && CPU_SH4 && MMU
  194. default HUGETLB_PAGE_SIZE_64K
  195. config HUGETLB_PAGE_SIZE_64K
  196. bool "64K"
  197. config HUGETLB_PAGE_SIZE_1MB
  198. bool "1MB"
  199. endchoice
  200. source "mm/Kconfig"
  201. endmenu
  202. menu "Cache configuration"
  203. config SH7705_CACHE_32KB
  204. bool "Enable 32KB cache size for SH7705"
  205. depends on CPU_SUBTYPE_SH7705
  206. default y
  207. config SH_DIRECT_MAPPED
  208. bool "Use direct-mapped caching"
  209. default n
  210. help
  211. Selecting this option will configure the caches to be direct-mapped,
  212. even if the cache supports a 2 or 4-way mode. This is useful primarily
  213. for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
  214. SH4-202, SH4-501, etc.)
  215. Turn this option off for platforms that do not have a direct-mapped
  216. cache, and you have no need to run the caches in such a configuration.
  217. config SH_WRITETHROUGH
  218. bool "Use write-through caching"
  219. default y if CPU_SH2
  220. help
  221. Selecting this option will configure the caches in write-through
  222. mode, as opposed to the default write-back configuration.
  223. Since there's sill some aliasing issues on SH-4, this option will
  224. unfortunately still require the majority of flushing functions to
  225. be implemented to deal with aliasing.
  226. If unsure, say N.
  227. config SH_OCRAM
  228. bool "Operand Cache RAM (OCRAM) support"
  229. help
  230. Selecting this option will automatically tear down the number of
  231. sets in the dcache by half, which in turn exposes a memory range.
  232. The addresses for the OC RAM base will vary according to the
  233. processor version. Consult vendor documentation for specifics.
  234. If unsure, say N.
  235. endmenu