irq.c 3.0 KB

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  1. /*
  2. * arch/sh/boards/se/73180/irq.c
  3. *
  4. * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
  5. * Based on arch/sh/boards/se/7300/irq.c
  6. *
  7. * Modified for SH-Mobile SolutionEngine 73180 Support
  8. * by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
  9. *
  10. */
  11. #include <linux/init.h>
  12. #include <linux/irq.h>
  13. #include <asm/irq.h>
  14. #include <asm/io.h>
  15. #include <asm/mach/se73180.h>
  16. static int
  17. irq2intreq(int irq)
  18. {
  19. if (irq == 10)
  20. return 5;
  21. return 7 - (irq - 32);
  22. }
  23. static void
  24. disable_intreq_irq(unsigned int irq)
  25. {
  26. ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSK0);
  27. }
  28. static void
  29. enable_intreq_irq(unsigned int irq)
  30. {
  31. ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSKCLR0);
  32. }
  33. static void
  34. mask_and_ack_intreq_irq(unsigned int irq)
  35. {
  36. disable_intreq_irq(irq);
  37. }
  38. static unsigned int
  39. startup_intreq_irq(unsigned int irq)
  40. {
  41. enable_intreq_irq(irq);
  42. return 0;
  43. }
  44. static void
  45. shutdown_intreq_irq(unsigned int irq)
  46. {
  47. disable_intreq_irq(irq);
  48. }
  49. static void
  50. end_intreq_irq(unsigned int irq)
  51. {
  52. if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
  53. enable_intreq_irq(irq);
  54. }
  55. static struct hw_interrupt_type intreq_irq_type = {
  56. .typename = "intreq",
  57. .startup = startup_intreq_irq,
  58. .shutdown = shutdown_intreq_irq,
  59. .enable = enable_intreq_irq,
  60. .disable = disable_intreq_irq,
  61. .ack = mask_and_ack_intreq_irq,
  62. .end = end_intreq_irq
  63. };
  64. void
  65. make_intreq_irq(unsigned int irq)
  66. {
  67. disable_irq_nosync(irq);
  68. irq_desc[irq].chip = &intreq_irq_type;
  69. disable_intreq_irq(irq);
  70. }
  71. int
  72. shmse_irq_demux(int irq)
  73. {
  74. if (irq == IRQ5_IRQ)
  75. return 10;
  76. return irq;
  77. }
  78. /*
  79. * Initialize IRQ setting
  80. */
  81. void __init
  82. init_73180se_IRQ(void)
  83. {
  84. make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
  85. ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
  86. ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */
  87. ctrl_outl(3 << ((7 - 5) * 4), INTC_INTPRI0); /* irq5 pri=3 */
  88. ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */
  89. make_intreq_irq(10);
  90. make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
  91. ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
  92. make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
  93. make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
  94. make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
  95. make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
  96. make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
  97. IIC0_PRIORITY);
  98. make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
  99. IIC0_PRIORITY);
  100. make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
  101. make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
  102. make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
  103. /* VIO interrupt */
  104. make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
  105. make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
  106. make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
  107. make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
  108. ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
  109. }