smp.c 20 KB

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  1. /*
  2. * arch/s390/kernel/smp.c
  3. *
  4. * Copyright (C) IBM Corp. 1999,2006
  5. * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  6. * Martin Schwidefsky (schwidefsky@de.ibm.com)
  7. * Heiko Carstens (heiko.carstens@de.ibm.com)
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * We work with logical cpu numbering everywhere we can. The only
  14. * functions using the real cpu address (got from STAP) are the sigp
  15. * functions. For all other functions we use the identity mapping.
  16. * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
  17. * used e.g. to find the idle task belonging to a logical cpu. Every array
  18. * in the kernel is sorted by the logical cpu number and not by the physical
  19. * one which is causing all the confusion with __cpu_logical_map and
  20. * cpu_number_map in other architectures.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/init.h>
  24. #include <linux/mm.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/kernel_stat.h>
  27. #include <linux/smp_lock.h>
  28. #include <linux/delay.h>
  29. #include <linux/cache.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/cpu.h>
  32. #include <asm/sigp.h>
  33. #include <asm/pgalloc.h>
  34. #include <asm/irq.h>
  35. #include <asm/s390_ext.h>
  36. #include <asm/cpcmd.h>
  37. #include <asm/tlbflush.h>
  38. extern volatile int __cpu_logical_map[];
  39. /*
  40. * An array with a pointer the lowcore of every CPU.
  41. */
  42. struct _lowcore *lowcore_ptr[NR_CPUS];
  43. cpumask_t cpu_online_map = CPU_MASK_NONE;
  44. cpumask_t cpu_possible_map = CPU_MASK_NONE;
  45. static struct task_struct *current_set[NR_CPUS];
  46. /*
  47. * Reboot, halt and power_off routines for SMP.
  48. */
  49. extern char vmhalt_cmd[];
  50. extern char vmpoff_cmd[];
  51. static void smp_ext_bitcall(int, ec_bit_sig);
  52. static void smp_ext_bitcall_others(ec_bit_sig);
  53. /*
  54. 5B * Structure and data for smp_call_function(). This is designed to minimise
  55. * static memory requirements. It also looks cleaner.
  56. */
  57. static DEFINE_SPINLOCK(call_lock);
  58. struct call_data_struct {
  59. void (*func) (void *info);
  60. void *info;
  61. atomic_t started;
  62. atomic_t finished;
  63. int wait;
  64. };
  65. static struct call_data_struct * call_data;
  66. /*
  67. * 'Call function' interrupt callback
  68. */
  69. static void do_call_function(void)
  70. {
  71. void (*func) (void *info) = call_data->func;
  72. void *info = call_data->info;
  73. int wait = call_data->wait;
  74. atomic_inc(&call_data->started);
  75. (*func)(info);
  76. if (wait)
  77. atomic_inc(&call_data->finished);
  78. }
  79. /*
  80. * this function sends a 'generic call function' IPI to all other CPUs
  81. * in the system.
  82. */
  83. int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
  84. int wait)
  85. /*
  86. * [SUMMARY] Run a function on all other CPUs.
  87. * <func> The function to run. This must be fast and non-blocking.
  88. * <info> An arbitrary pointer to pass to the function.
  89. * <nonatomic> currently unused.
  90. * <wait> If true, wait (atomically) until function has completed on other CPUs.
  91. * [RETURNS] 0 on success, else a negative status code. Does not return until
  92. * remote CPUs are nearly ready to execute <<func>> or are or have executed.
  93. *
  94. * You must not call this function with disabled interrupts or from a
  95. * hardware interrupt handler or from a bottom half handler.
  96. */
  97. {
  98. struct call_data_struct data;
  99. int cpus = num_online_cpus()-1;
  100. if (cpus <= 0)
  101. return 0;
  102. /* Can deadlock when called with interrupts disabled */
  103. WARN_ON(irqs_disabled());
  104. data.func = func;
  105. data.info = info;
  106. atomic_set(&data.started, 0);
  107. data.wait = wait;
  108. if (wait)
  109. atomic_set(&data.finished, 0);
  110. spin_lock(&call_lock);
  111. call_data = &data;
  112. /* Send a message to all other CPUs and wait for them to respond */
  113. smp_ext_bitcall_others(ec_call_function);
  114. /* Wait for response */
  115. while (atomic_read(&data.started) != cpus)
  116. cpu_relax();
  117. if (wait)
  118. while (atomic_read(&data.finished) != cpus)
  119. cpu_relax();
  120. spin_unlock(&call_lock);
  121. return 0;
  122. }
  123. /*
  124. * Call a function on one CPU
  125. * cpu : the CPU the function should be executed on
  126. *
  127. * You must not call this function with disabled interrupts or from a
  128. * hardware interrupt handler. You may call it from a bottom half.
  129. *
  130. * It is guaranteed that the called function runs on the specified CPU,
  131. * preemption is disabled.
  132. */
  133. int smp_call_function_on(void (*func) (void *info), void *info,
  134. int nonatomic, int wait, int cpu)
  135. {
  136. struct call_data_struct data;
  137. int curr_cpu;
  138. if (!cpu_online(cpu))
  139. return -EINVAL;
  140. /* disable preemption for local function call */
  141. curr_cpu = get_cpu();
  142. if (curr_cpu == cpu) {
  143. /* direct call to function */
  144. func(info);
  145. put_cpu();
  146. return 0;
  147. }
  148. data.func = func;
  149. data.info = info;
  150. atomic_set(&data.started, 0);
  151. data.wait = wait;
  152. if (wait)
  153. atomic_set(&data.finished, 0);
  154. spin_lock_bh(&call_lock);
  155. call_data = &data;
  156. smp_ext_bitcall(cpu, ec_call_function);
  157. /* Wait for response */
  158. while (atomic_read(&data.started) != 1)
  159. cpu_relax();
  160. if (wait)
  161. while (atomic_read(&data.finished) != 1)
  162. cpu_relax();
  163. spin_unlock_bh(&call_lock);
  164. put_cpu();
  165. return 0;
  166. }
  167. EXPORT_SYMBOL(smp_call_function_on);
  168. static inline void do_send_stop(void)
  169. {
  170. int cpu, rc;
  171. /* stop all processors */
  172. for_each_online_cpu(cpu) {
  173. if (cpu == smp_processor_id())
  174. continue;
  175. do {
  176. rc = signal_processor(cpu, sigp_stop);
  177. } while (rc == sigp_busy);
  178. }
  179. }
  180. static inline void do_store_status(void)
  181. {
  182. int cpu, rc;
  183. /* store status of all processors in their lowcores (real 0) */
  184. for_each_online_cpu(cpu) {
  185. if (cpu == smp_processor_id())
  186. continue;
  187. do {
  188. rc = signal_processor_p(
  189. (__u32)(unsigned long) lowcore_ptr[cpu], cpu,
  190. sigp_store_status_at_address);
  191. } while(rc == sigp_busy);
  192. }
  193. }
  194. /*
  195. * this function sends a 'stop' sigp to all other CPUs in the system.
  196. * it goes straight through.
  197. */
  198. void smp_send_stop(void)
  199. {
  200. /* write magic number to zero page (absolute 0) */
  201. lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC;
  202. /* stop other processors. */
  203. do_send_stop();
  204. /* store status of other processors. */
  205. do_store_status();
  206. }
  207. /*
  208. * Reboot, halt and power_off routines for SMP.
  209. */
  210. static void do_machine_restart(void * __unused)
  211. {
  212. int cpu;
  213. static atomic_t cpuid = ATOMIC_INIT(-1);
  214. if (atomic_cmpxchg(&cpuid, -1, smp_processor_id()) != -1)
  215. signal_processor(smp_processor_id(), sigp_stop);
  216. /* Wait for all other cpus to enter stopped state */
  217. for_each_online_cpu(cpu) {
  218. if (cpu == smp_processor_id())
  219. continue;
  220. while(!smp_cpu_not_running(cpu))
  221. cpu_relax();
  222. }
  223. /* Store status of other cpus. */
  224. do_store_status();
  225. /*
  226. * Finally call reipl. Because we waited for all other
  227. * cpus to enter this function we know that they do
  228. * not hold any s390irq-locks (the cpus have been
  229. * interrupted by an external interrupt and s390irq
  230. * locks are always held disabled).
  231. */
  232. do_reipl();
  233. }
  234. void machine_restart_smp(char * __unused)
  235. {
  236. on_each_cpu(do_machine_restart, NULL, 0, 0);
  237. }
  238. static void do_wait_for_stop(void)
  239. {
  240. unsigned long cr[16];
  241. __ctl_store(cr, 0, 15);
  242. cr[0] &= ~0xffff;
  243. cr[6] = 0;
  244. __ctl_load(cr, 0, 15);
  245. for (;;)
  246. enabled_wait();
  247. }
  248. static void do_machine_halt(void * __unused)
  249. {
  250. static atomic_t cpuid = ATOMIC_INIT(-1);
  251. if (atomic_cmpxchg(&cpuid, -1, smp_processor_id()) == -1) {
  252. smp_send_stop();
  253. if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0)
  254. cpcmd(vmhalt_cmd, NULL, 0, NULL);
  255. signal_processor(smp_processor_id(),
  256. sigp_stop_and_store_status);
  257. }
  258. do_wait_for_stop();
  259. }
  260. void machine_halt_smp(void)
  261. {
  262. on_each_cpu(do_machine_halt, NULL, 0, 0);
  263. }
  264. static void do_machine_power_off(void * __unused)
  265. {
  266. static atomic_t cpuid = ATOMIC_INIT(-1);
  267. if (atomic_cmpxchg(&cpuid, -1, smp_processor_id()) == -1) {
  268. smp_send_stop();
  269. if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0)
  270. cpcmd(vmpoff_cmd, NULL, 0, NULL);
  271. signal_processor(smp_processor_id(),
  272. sigp_stop_and_store_status);
  273. }
  274. do_wait_for_stop();
  275. }
  276. void machine_power_off_smp(void)
  277. {
  278. on_each_cpu(do_machine_power_off, NULL, 0, 0);
  279. }
  280. /*
  281. * This is the main routine where commands issued by other
  282. * cpus are handled.
  283. */
  284. void do_ext_call_interrupt(__u16 code)
  285. {
  286. unsigned long bits;
  287. /*
  288. * handle bit signal external calls
  289. *
  290. * For the ec_schedule signal we have to do nothing. All the work
  291. * is done automatically when we return from the interrupt.
  292. */
  293. bits = xchg(&S390_lowcore.ext_call_fast, 0);
  294. if (test_bit(ec_call_function, &bits))
  295. do_call_function();
  296. }
  297. /*
  298. * Send an external call sigp to another cpu and return without waiting
  299. * for its completion.
  300. */
  301. static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
  302. {
  303. /*
  304. * Set signaling bit in lowcore of target cpu and kick it
  305. */
  306. set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
  307. while(signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
  308. udelay(10);
  309. }
  310. /*
  311. * Send an external call sigp to every other cpu in the system and
  312. * return without waiting for its completion.
  313. */
  314. static void smp_ext_bitcall_others(ec_bit_sig sig)
  315. {
  316. int cpu;
  317. for_each_online_cpu(cpu) {
  318. if (cpu == smp_processor_id())
  319. continue;
  320. /*
  321. * Set signaling bit in lowcore of target cpu and kick it
  322. */
  323. set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
  324. while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
  325. udelay(10);
  326. }
  327. }
  328. #ifndef CONFIG_64BIT
  329. /*
  330. * this function sends a 'purge tlb' signal to another CPU.
  331. */
  332. void smp_ptlb_callback(void *info)
  333. {
  334. local_flush_tlb();
  335. }
  336. void smp_ptlb_all(void)
  337. {
  338. on_each_cpu(smp_ptlb_callback, NULL, 0, 1);
  339. }
  340. EXPORT_SYMBOL(smp_ptlb_all);
  341. #endif /* ! CONFIG_64BIT */
  342. /*
  343. * this function sends a 'reschedule' IPI to another CPU.
  344. * it goes straight through and wastes no time serializing
  345. * anything. Worst case is that we lose a reschedule ...
  346. */
  347. void smp_send_reschedule(int cpu)
  348. {
  349. smp_ext_bitcall(cpu, ec_schedule);
  350. }
  351. /*
  352. * parameter area for the set/clear control bit callbacks
  353. */
  354. struct ec_creg_mask_parms {
  355. unsigned long orvals[16];
  356. unsigned long andvals[16];
  357. };
  358. /*
  359. * callback for setting/clearing control bits
  360. */
  361. void smp_ctl_bit_callback(void *info) {
  362. struct ec_creg_mask_parms *pp = info;
  363. unsigned long cregs[16];
  364. int i;
  365. __ctl_store(cregs, 0, 15);
  366. for (i = 0; i <= 15; i++)
  367. cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
  368. __ctl_load(cregs, 0, 15);
  369. }
  370. /*
  371. * Set a bit in a control register of all cpus
  372. */
  373. void smp_ctl_set_bit(int cr, int bit)
  374. {
  375. struct ec_creg_mask_parms parms;
  376. memset(&parms.orvals, 0, sizeof(parms.orvals));
  377. memset(&parms.andvals, 0xff, sizeof(parms.andvals));
  378. parms.orvals[cr] = 1 << bit;
  379. on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1);
  380. }
  381. /*
  382. * Clear a bit in a control register of all cpus
  383. */
  384. void smp_ctl_clear_bit(int cr, int bit)
  385. {
  386. struct ec_creg_mask_parms parms;
  387. memset(&parms.orvals, 0, sizeof(parms.orvals));
  388. memset(&parms.andvals, 0xff, sizeof(parms.andvals));
  389. parms.andvals[cr] = ~(1L << bit);
  390. on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1);
  391. }
  392. /*
  393. * Lets check how many CPUs we have.
  394. */
  395. static unsigned int
  396. __init smp_count_cpus(void)
  397. {
  398. unsigned int cpu, num_cpus;
  399. __u16 boot_cpu_addr;
  400. /*
  401. * cpu 0 is the boot cpu. See smp_prepare_boot_cpu.
  402. */
  403. boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
  404. current_thread_info()->cpu = 0;
  405. num_cpus = 1;
  406. for (cpu = 0; cpu <= 65535; cpu++) {
  407. if ((__u16) cpu == boot_cpu_addr)
  408. continue;
  409. __cpu_logical_map[1] = (__u16) cpu;
  410. if (signal_processor(1, sigp_sense) ==
  411. sigp_not_operational)
  412. continue;
  413. num_cpus++;
  414. }
  415. printk("Detected %d CPU's\n",(int) num_cpus);
  416. printk("Boot cpu address %2X\n", boot_cpu_addr);
  417. return num_cpus;
  418. }
  419. /*
  420. * Activate a secondary processor.
  421. */
  422. extern void init_cpu_timer(void);
  423. extern void init_cpu_vtimer(void);
  424. extern int pfault_init(void);
  425. extern void pfault_fini(void);
  426. int __devinit start_secondary(void *cpuvoid)
  427. {
  428. /* Setup the cpu */
  429. cpu_init();
  430. preempt_disable();
  431. /* init per CPU timer */
  432. init_cpu_timer();
  433. #ifdef CONFIG_VIRT_TIMER
  434. init_cpu_vtimer();
  435. #endif
  436. #ifdef CONFIG_PFAULT
  437. /* Enable pfault pseudo page faults on this cpu. */
  438. if (MACHINE_IS_VM)
  439. pfault_init();
  440. #endif
  441. /* Mark this cpu as online */
  442. cpu_set(smp_processor_id(), cpu_online_map);
  443. /* Switch on interrupts */
  444. local_irq_enable();
  445. /* Print info about this processor */
  446. print_cpu_info(&S390_lowcore.cpu_data);
  447. /* cpu_idle will call schedule for us */
  448. cpu_idle();
  449. return 0;
  450. }
  451. static void __init smp_create_idle(unsigned int cpu)
  452. {
  453. struct task_struct *p;
  454. /*
  455. * don't care about the psw and regs settings since we'll never
  456. * reschedule the forked task.
  457. */
  458. p = fork_idle(cpu);
  459. if (IS_ERR(p))
  460. panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
  461. current_set[cpu] = p;
  462. }
  463. /* Reserving and releasing of CPUs */
  464. static DEFINE_SPINLOCK(smp_reserve_lock);
  465. static int smp_cpu_reserved[NR_CPUS];
  466. int
  467. smp_get_cpu(cpumask_t cpu_mask)
  468. {
  469. unsigned long flags;
  470. int cpu;
  471. spin_lock_irqsave(&smp_reserve_lock, flags);
  472. /* Try to find an already reserved cpu. */
  473. for_each_cpu_mask(cpu, cpu_mask) {
  474. if (smp_cpu_reserved[cpu] != 0) {
  475. smp_cpu_reserved[cpu]++;
  476. /* Found one. */
  477. goto out;
  478. }
  479. }
  480. /* Reserve a new cpu from cpu_mask. */
  481. for_each_cpu_mask(cpu, cpu_mask) {
  482. if (cpu_online(cpu)) {
  483. smp_cpu_reserved[cpu]++;
  484. goto out;
  485. }
  486. }
  487. cpu = -ENODEV;
  488. out:
  489. spin_unlock_irqrestore(&smp_reserve_lock, flags);
  490. return cpu;
  491. }
  492. void
  493. smp_put_cpu(int cpu)
  494. {
  495. unsigned long flags;
  496. spin_lock_irqsave(&smp_reserve_lock, flags);
  497. smp_cpu_reserved[cpu]--;
  498. spin_unlock_irqrestore(&smp_reserve_lock, flags);
  499. }
  500. static inline int
  501. cpu_stopped(int cpu)
  502. {
  503. __u32 status;
  504. /* Check for stopped state */
  505. if (signal_processor_ps(&status, 0, cpu, sigp_sense) == sigp_status_stored) {
  506. if (status & 0x40)
  507. return 1;
  508. }
  509. return 0;
  510. }
  511. /* Upping and downing of CPUs */
  512. int
  513. __cpu_up(unsigned int cpu)
  514. {
  515. struct task_struct *idle;
  516. struct _lowcore *cpu_lowcore;
  517. struct stack_frame *sf;
  518. sigp_ccode ccode;
  519. int curr_cpu;
  520. for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) {
  521. __cpu_logical_map[cpu] = (__u16) curr_cpu;
  522. if (cpu_stopped(cpu))
  523. break;
  524. }
  525. if (!cpu_stopped(cpu))
  526. return -ENODEV;
  527. ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
  528. cpu, sigp_set_prefix);
  529. if (ccode){
  530. printk("sigp_set_prefix failed for cpu %d "
  531. "with condition code %d\n",
  532. (int) cpu, (int) ccode);
  533. return -EIO;
  534. }
  535. idle = current_set[cpu];
  536. cpu_lowcore = lowcore_ptr[cpu];
  537. cpu_lowcore->kernel_stack = (unsigned long)
  538. task_stack_page(idle) + (THREAD_SIZE);
  539. sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
  540. - sizeof(struct pt_regs)
  541. - sizeof(struct stack_frame));
  542. memset(sf, 0, sizeof(struct stack_frame));
  543. sf->gprs[9] = (unsigned long) sf;
  544. cpu_lowcore->save_area[15] = (unsigned long) sf;
  545. __ctl_store(cpu_lowcore->cregs_save_area[0], 0, 15);
  546. asm volatile(
  547. " stam 0,15,0(%0)"
  548. : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
  549. cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
  550. cpu_lowcore->current_task = (unsigned long) idle;
  551. cpu_lowcore->cpu_data.cpu_nr = cpu;
  552. eieio();
  553. while (signal_processor(cpu,sigp_restart) == sigp_busy)
  554. udelay(10);
  555. while (!cpu_online(cpu))
  556. cpu_relax();
  557. return 0;
  558. }
  559. static unsigned int __initdata additional_cpus;
  560. static unsigned int __initdata possible_cpus;
  561. void __init smp_setup_cpu_possible_map(void)
  562. {
  563. unsigned int phy_cpus, pos_cpus, cpu;
  564. phy_cpus = smp_count_cpus();
  565. pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS);
  566. if (possible_cpus)
  567. pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS);
  568. for (cpu = 0; cpu < pos_cpus; cpu++)
  569. cpu_set(cpu, cpu_possible_map);
  570. phy_cpus = min(phy_cpus, pos_cpus);
  571. for (cpu = 0; cpu < phy_cpus; cpu++)
  572. cpu_set(cpu, cpu_present_map);
  573. }
  574. #ifdef CONFIG_HOTPLUG_CPU
  575. static int __init setup_additional_cpus(char *s)
  576. {
  577. additional_cpus = simple_strtoul(s, NULL, 0);
  578. return 0;
  579. }
  580. early_param("additional_cpus", setup_additional_cpus);
  581. static int __init setup_possible_cpus(char *s)
  582. {
  583. possible_cpus = simple_strtoul(s, NULL, 0);
  584. return 0;
  585. }
  586. early_param("possible_cpus", setup_possible_cpus);
  587. int
  588. __cpu_disable(void)
  589. {
  590. unsigned long flags;
  591. struct ec_creg_mask_parms cr_parms;
  592. int cpu = smp_processor_id();
  593. spin_lock_irqsave(&smp_reserve_lock, flags);
  594. if (smp_cpu_reserved[cpu] != 0) {
  595. spin_unlock_irqrestore(&smp_reserve_lock, flags);
  596. return -EBUSY;
  597. }
  598. cpu_clear(cpu, cpu_online_map);
  599. #ifdef CONFIG_PFAULT
  600. /* Disable pfault pseudo page faults on this cpu. */
  601. if (MACHINE_IS_VM)
  602. pfault_fini();
  603. #endif
  604. memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
  605. memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
  606. /* disable all external interrupts */
  607. cr_parms.orvals[0] = 0;
  608. cr_parms.andvals[0] = ~(1<<15 | 1<<14 | 1<<13 | 1<<12 |
  609. 1<<11 | 1<<10 | 1<< 6 | 1<< 4);
  610. /* disable all I/O interrupts */
  611. cr_parms.orvals[6] = 0;
  612. cr_parms.andvals[6] = ~(1<<31 | 1<<30 | 1<<29 | 1<<28 |
  613. 1<<27 | 1<<26 | 1<<25 | 1<<24);
  614. /* disable most machine checks */
  615. cr_parms.orvals[14] = 0;
  616. cr_parms.andvals[14] = ~(1<<28 | 1<<27 | 1<<26 | 1<<25 | 1<<24);
  617. smp_ctl_bit_callback(&cr_parms);
  618. spin_unlock_irqrestore(&smp_reserve_lock, flags);
  619. return 0;
  620. }
  621. void
  622. __cpu_die(unsigned int cpu)
  623. {
  624. /* Wait until target cpu is down */
  625. while (!smp_cpu_not_running(cpu))
  626. cpu_relax();
  627. printk("Processor %d spun down\n", cpu);
  628. }
  629. void
  630. cpu_die(void)
  631. {
  632. idle_task_exit();
  633. signal_processor(smp_processor_id(), sigp_stop);
  634. BUG();
  635. for(;;);
  636. }
  637. #endif /* CONFIG_HOTPLUG_CPU */
  638. /*
  639. * Cycle through the processors and setup structures.
  640. */
  641. void __init smp_prepare_cpus(unsigned int max_cpus)
  642. {
  643. unsigned long stack;
  644. unsigned int cpu;
  645. int i;
  646. /* request the 0x1201 emergency signal external interrupt */
  647. if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
  648. panic("Couldn't request external interrupt 0x1201");
  649. memset(lowcore_ptr,0,sizeof(lowcore_ptr));
  650. /*
  651. * Initialize prefix pages and stacks for all possible cpus
  652. */
  653. print_cpu_info(&S390_lowcore.cpu_data);
  654. for_each_possible_cpu(i) {
  655. lowcore_ptr[i] = (struct _lowcore *)
  656. __get_free_pages(GFP_KERNEL|GFP_DMA,
  657. sizeof(void*) == 8 ? 1 : 0);
  658. stack = __get_free_pages(GFP_KERNEL,ASYNC_ORDER);
  659. if (lowcore_ptr[i] == NULL || stack == 0ULL)
  660. panic("smp_boot_cpus failed to allocate memory\n");
  661. *(lowcore_ptr[i]) = S390_lowcore;
  662. lowcore_ptr[i]->async_stack = stack + (ASYNC_SIZE);
  663. stack = __get_free_pages(GFP_KERNEL,0);
  664. if (stack == 0ULL)
  665. panic("smp_boot_cpus failed to allocate memory\n");
  666. lowcore_ptr[i]->panic_stack = stack + (PAGE_SIZE);
  667. #ifndef CONFIG_64BIT
  668. if (MACHINE_HAS_IEEE) {
  669. lowcore_ptr[i]->extended_save_area_addr =
  670. (__u32) __get_free_pages(GFP_KERNEL,0);
  671. if (lowcore_ptr[i]->extended_save_area_addr == 0)
  672. panic("smp_boot_cpus failed to "
  673. "allocate memory\n");
  674. }
  675. #endif
  676. }
  677. #ifndef CONFIG_64BIT
  678. if (MACHINE_HAS_IEEE)
  679. ctl_set_bit(14, 29); /* enable extended save area */
  680. #endif
  681. set_prefix((u32)(unsigned long) lowcore_ptr[smp_processor_id()]);
  682. for_each_possible_cpu(cpu)
  683. if (cpu != smp_processor_id())
  684. smp_create_idle(cpu);
  685. }
  686. void __devinit smp_prepare_boot_cpu(void)
  687. {
  688. BUG_ON(smp_processor_id() != 0);
  689. cpu_set(0, cpu_online_map);
  690. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  691. current_set[0] = current;
  692. }
  693. void smp_cpus_done(unsigned int max_cpus)
  694. {
  695. cpu_present_map = cpu_possible_map;
  696. }
  697. /*
  698. * the frequency of the profiling timer can be changed
  699. * by writing a multiplier value into /proc/profile.
  700. *
  701. * usually you want to run this on all CPUs ;)
  702. */
  703. int setup_profiling_timer(unsigned int multiplier)
  704. {
  705. return 0;
  706. }
  707. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  708. static int __init topology_init(void)
  709. {
  710. int cpu;
  711. int ret;
  712. for_each_possible_cpu(cpu) {
  713. ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu);
  714. if (ret)
  715. printk(KERN_WARNING "topology_init: register_cpu %d "
  716. "failed (%d)\n", cpu, ret);
  717. }
  718. return 0;
  719. }
  720. subsys_initcall(topology_init);
  721. EXPORT_SYMBOL(cpu_online_map);
  722. EXPORT_SYMBOL(cpu_possible_map);
  723. EXPORT_SYMBOL(lowcore_ptr);
  724. EXPORT_SYMBOL(smp_ctl_set_bit);
  725. EXPORT_SYMBOL(smp_ctl_clear_bit);
  726. EXPORT_SYMBOL(smp_call_function);
  727. EXPORT_SYMBOL(smp_get_cpu);
  728. EXPORT_SYMBOL(smp_put_cpu);