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phyus
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linux-vybrid_public
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linux-vybrid_pu...
/
arch
/
ppc
/
syslib
/
ppc85xx_setup.h

ppc85xx_setup.h 1.4 KB
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  1. /*
    2. 

  2.  * MPC85XX common board definitions
    3. 

  3.  *
    4. 

  4.  * Maintainer: Kumar Gala <galak@kernel.crashing.org>
    5. 

  5.  *
    6. 

  6.  * Copyright 2004 Freescale Semiconductor Inc.
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute  it and/or modify it
    9. 

  9.  * under  the terms of  the GNU General  Public License as published by the
    10. 

  10.  * Free Software Foundation;  either version 2 of the  License, or (at your
    11. 

  11.  * option) any later version.
    12. 

  12.  *
    13. 

  13.  */
    14. 

  14. 

  15. #ifndef __PPC_SYSLIB_PPC85XX_SETUP_H
    16. 

  16. #define __PPC_SYSLIB_PPC85XX_SETUP_H
    17. 

  17. 

  18. #include <linux/init.h>
    19. 

  19. #include <asm/ppcboot.h>
    20. 

  20. 

  21. extern unsigned long mpc85xx_find_end_of_memory(void) __init;
    22. 

  22. extern void mpc85xx_calibrate_decr(void) __init;
    23. 

  23. extern void mpc85xx_early_serial_map(void) __init;
    24. 

  24. extern void mpc85xx_restart(char *cmd);
    25. 

  25. extern void mpc85xx_power_off(void);
    26. 

  26. extern void mpc85xx_halt(void);
    27. 

  27. extern void mpc85xx_setup_hose(void) __init;
    28. 

  28. 

  29. /* PCI config */
    30. 

  30. #define PCI1_CFG_ADDR_OFFSET	(0x8000)
    31. 

  31. #define PCI1_CFG_DATA_OFFSET	(0x8004)
    32. 

  32. 

  33. #define PCI2_CFG_ADDR_OFFSET	(0x9000)
    34. 

  34. #define PCI2_CFG_DATA_OFFSET	(0x9004)
    35. 

  35. 

  36. /* Additional register for PCI-X configuration */
    37. 

  37. #define PCIX_NEXT_CAP	0x60
    38. 

  38. #define PCIX_CAP_ID	0x61
    39. 

  39. #define PCIX_COMMAND	0x62
    40. 

  40. #define PCIX_STATUS	0x64
    41. 

  41. 

  42. /* Serial Config */
    43. 

  43. #ifdef CONFIG_SERIAL_MANY_PORTS
    44. 

  44. #define RS_TABLE_SIZE  64
    45. 

  45. #else
    46. 

  46. #define RS_TABLE_SIZE  2
    47. 

  47. #endif
    48. 

  48. 

  49. #ifndef BASE_BAUD
    50. 

  50. #define BASE_BAUD 115200
    51. 

  51. #endif
    52. 

  52. 

  53. /* Offset of CPM register space */
    54. 

  54. #define CPM_MAP_ADDR	(CCSRBAR + MPC85xx_CPM_OFFSET)
    55. 

  55. 

  56. #endif /* __PPC_SYSLIB_PPC85XX_SETUP_H */
    57.