ppc85xx_rio.c 25 KB

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  1. /*
  2. * MPC85xx RapidIO support
  3. *
  4. * Copyright 2005 MontaVista Software, Inc.
  5. * Matt Porter <mporter@kernel.crashing.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/types.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/rio.h>
  18. #include <linux/rio_drv.h>
  19. #include <asm/io.h>
  20. #define RIO_REGS_BASE (CCSRBAR + 0xc0000)
  21. #define RIO_ATMU_REGS_OFFSET 0x10c00
  22. #define RIO_MSG_REGS_OFFSET 0x11000
  23. #define RIO_MAINT_WIN_SIZE 0x400000
  24. #define RIO_DBELL_WIN_SIZE 0x1000
  25. #define RIO_MSG_OMR_MUI 0x00000002
  26. #define RIO_MSG_OSR_TE 0x00000080
  27. #define RIO_MSG_OSR_QOI 0x00000020
  28. #define RIO_MSG_OSR_QFI 0x00000010
  29. #define RIO_MSG_OSR_MUB 0x00000004
  30. #define RIO_MSG_OSR_EOMI 0x00000002
  31. #define RIO_MSG_OSR_QEI 0x00000001
  32. #define RIO_MSG_IMR_MI 0x00000002
  33. #define RIO_MSG_ISR_TE 0x00000080
  34. #define RIO_MSG_ISR_QFI 0x00000010
  35. #define RIO_MSG_ISR_DIQI 0x00000001
  36. #define RIO_MSG_DESC_SIZE 32
  37. #define RIO_MSG_BUFFER_SIZE 4096
  38. #define RIO_MIN_TX_RING_SIZE 2
  39. #define RIO_MAX_TX_RING_SIZE 2048
  40. #define RIO_MIN_RX_RING_SIZE 2
  41. #define RIO_MAX_RX_RING_SIZE 2048
  42. #define DOORBELL_DMR_DI 0x00000002
  43. #define DOORBELL_DSR_TE 0x00000080
  44. #define DOORBELL_DSR_QFI 0x00000010
  45. #define DOORBELL_DSR_DIQI 0x00000001
  46. #define DOORBELL_TID_OFFSET 0x03
  47. #define DOORBELL_SID_OFFSET 0x05
  48. #define DOORBELL_INFO_OFFSET 0x06
  49. #define DOORBELL_MESSAGE_SIZE 0x08
  50. #define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET))
  51. #define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
  52. #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
  53. #define is_power_of_2(x) (((x) & ((x) - 1)) == 0)
  54. struct rio_atmu_regs {
  55. u32 rowtar;
  56. u32 pad1;
  57. u32 rowbar;
  58. u32 pad2;
  59. u32 rowar;
  60. u32 pad3[3];
  61. };
  62. struct rio_msg_regs {
  63. u32 omr;
  64. u32 osr;
  65. u32 pad1;
  66. u32 odqdpar;
  67. u32 pad2;
  68. u32 osar;
  69. u32 odpr;
  70. u32 odatr;
  71. u32 odcr;
  72. u32 pad3;
  73. u32 odqepar;
  74. u32 pad4[13];
  75. u32 imr;
  76. u32 isr;
  77. u32 pad5;
  78. u32 ifqdpar;
  79. u32 pad6;
  80. u32 ifqepar;
  81. u32 pad7[250];
  82. u32 dmr;
  83. u32 dsr;
  84. u32 pad8;
  85. u32 dqdpar;
  86. u32 pad9;
  87. u32 dqepar;
  88. u32 pad10[26];
  89. u32 pwmr;
  90. u32 pwsr;
  91. u32 pad11;
  92. u32 pwqbar;
  93. };
  94. struct rio_tx_desc {
  95. u32 res1;
  96. u32 saddr;
  97. u32 dport;
  98. u32 dattr;
  99. u32 res2;
  100. u32 res3;
  101. u32 dwcnt;
  102. u32 res4;
  103. };
  104. static u32 regs_win;
  105. static struct rio_atmu_regs *atmu_regs;
  106. static struct rio_atmu_regs *maint_atmu_regs;
  107. static struct rio_atmu_regs *dbell_atmu_regs;
  108. static u32 dbell_win;
  109. static u32 maint_win;
  110. static struct rio_msg_regs *msg_regs;
  111. static struct rio_dbell_ring {
  112. void *virt;
  113. dma_addr_t phys;
  114. } dbell_ring;
  115. static struct rio_msg_tx_ring {
  116. void *virt;
  117. dma_addr_t phys;
  118. void *virt_buffer[RIO_MAX_TX_RING_SIZE];
  119. dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
  120. int tx_slot;
  121. int size;
  122. void *dev_id;
  123. } msg_tx_ring;
  124. static struct rio_msg_rx_ring {
  125. void *virt;
  126. dma_addr_t phys;
  127. void *virt_buffer[RIO_MAX_RX_RING_SIZE];
  128. int rx_slot;
  129. int size;
  130. void *dev_id;
  131. } msg_rx_ring;
  132. /**
  133. * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message
  134. * @index: ID of RapidIO interface
  135. * @destid: Destination ID of target device
  136. * @data: 16-bit info field of RapidIO doorbell message
  137. *
  138. * Sends a MPC85xx doorbell message. Returns %0 on success or
  139. * %-EINVAL on failure.
  140. */
  141. static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data)
  142. {
  143. pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n",
  144. index, destid, data);
  145. out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22);
  146. out_be16((void *)(dbell_win), data);
  147. return 0;
  148. }
  149. /**
  150. * mpc85xx_local_config_read - Generate a MPC85xx local config space read
  151. * @index: ID of RapdiIO interface
  152. * @offset: Offset into configuration space
  153. * @len: Length (in bytes) of the maintenance transaction
  154. * @data: Value to be read into
  155. *
  156. * Generates a MPC85xx local configuration space read. Returns %0 on
  157. * success or %-EINVAL on failure.
  158. */
  159. static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data)
  160. {
  161. pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index,
  162. offset);
  163. *data = in_be32((void *)(regs_win + offset));
  164. return 0;
  165. }
  166. /**
  167. * mpc85xx_local_config_write - Generate a MPC85xx local config space write
  168. * @index: ID of RapdiIO interface
  169. * @offset: Offset into configuration space
  170. * @len: Length (in bytes) of the maintenance transaction
  171. * @data: Value to be written
  172. *
  173. * Generates a MPC85xx local configuration space write. Returns %0 on
  174. * success or %-EINVAL on failure.
  175. */
  176. static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data)
  177. {
  178. pr_debug
  179. ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n",
  180. index, offset, data);
  181. out_be32((void *)(regs_win + offset), data);
  182. return 0;
  183. }
  184. /**
  185. * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction
  186. * @index: ID of RapdiIO interface
  187. * @destid: Destination ID of transaction
  188. * @hopcount: Number of hops to target device
  189. * @offset: Offset into configuration space
  190. * @len: Length (in bytes) of the maintenance transaction
  191. * @val: Location to be read into
  192. *
  193. * Generates a MPC85xx read maintenance transaction. Returns %0 on
  194. * success or %-EINVAL on failure.
  195. */
  196. static int
  197. mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len,
  198. u32 * val)
  199. {
  200. u8 *data;
  201. pr_debug
  202. ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
  203. index, destid, hopcount, offset, len);
  204. out_be32((void *)&maint_atmu_regs->rowtar,
  205. (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
  206. data = (u8 *) maint_win + offset;
  207. switch (len) {
  208. case 1:
  209. *val = in_8((u8 *) data);
  210. break;
  211. case 2:
  212. *val = in_be16((u16 *) data);
  213. break;
  214. default:
  215. *val = in_be32((u32 *) data);
  216. break;
  217. }
  218. return 0;
  219. }
  220. /**
  221. * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction
  222. * @index: ID of RapdiIO interface
  223. * @destid: Destination ID of transaction
  224. * @hopcount: Number of hops to target device
  225. * @offset: Offset into configuration space
  226. * @len: Length (in bytes) of the maintenance transaction
  227. * @val: Value to be written
  228. *
  229. * Generates an MPC85xx write maintenance transaction. Returns %0 on
  230. * success or %-EINVAL on failure.
  231. */
  232. static int
  233. mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset,
  234. int len, u32 val)
  235. {
  236. u8 *data;
  237. pr_debug
  238. ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
  239. index, destid, hopcount, offset, len, val);
  240. out_be32((void *)&maint_atmu_regs->rowtar,
  241. (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
  242. data = (u8 *) maint_win + offset;
  243. switch (len) {
  244. case 1:
  245. out_8((u8 *) data, val);
  246. break;
  247. case 2:
  248. out_be16((u16 *) data, val);
  249. break;
  250. default:
  251. out_be32((u32 *) data, val);
  252. break;
  253. }
  254. return 0;
  255. }
  256. /**
  257. * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
  258. * @mport: Master port with outbound message queue
  259. * @rdev: Target of outbound message
  260. * @mbox: Outbound mailbox
  261. * @buffer: Message to add to outbound queue
  262. * @len: Length of message
  263. *
  264. * Adds the @buffer message to the MPC85xx outbound message queue. Returns
  265. * %0 on success or %-EINVAL on failure.
  266. */
  267. int
  268. rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
  269. void *buffer, size_t len)
  270. {
  271. u32 omr;
  272. struct rio_tx_desc *desc =
  273. (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot;
  274. int ret = 0;
  275. pr_debug
  276. ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
  277. rdev->destid, mbox, (int)buffer, len);
  278. if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
  279. ret = -EINVAL;
  280. goto out;
  281. }
  282. /* Copy and clear rest of buffer */
  283. memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len);
  284. if (len < (RIO_MAX_MSG_SIZE - 4))
  285. memset((void *)((u32) msg_tx_ring.
  286. virt_buffer[msg_tx_ring.tx_slot] + len), 0,
  287. RIO_MAX_MSG_SIZE - len);
  288. /* Set mbox field for message */
  289. desc->dport = mbox & 0x3;
  290. /* Enable EOMI interrupt, set priority, and set destid */
  291. desc->dattr = 0x28000000 | (rdev->destid << 2);
  292. /* Set transfer size aligned to next power of 2 (in double words) */
  293. desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
  294. /* Set snooping and source buffer address */
  295. desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot];
  296. /* Increment enqueue pointer */
  297. omr = in_be32((void *)&msg_regs->omr);
  298. out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI);
  299. /* Go to next descriptor */
  300. if (++msg_tx_ring.tx_slot == msg_tx_ring.size)
  301. msg_tx_ring.tx_slot = 0;
  302. out:
  303. return ret;
  304. }
  305. EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
  306. /**
  307. * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler
  308. * @irq: Linux interrupt number
  309. * @dev_instance: Pointer to interrupt-specific data
  310. *
  311. * Handles outbound message interrupts. Executes a register outbound
  312. * mailbox event handler and acks the interrupt occurence.
  313. */
  314. static irqreturn_t
  315. mpc85xx_rio_tx_handler(int irq, void *dev_instance)
  316. {
  317. int osr;
  318. struct rio_mport *port = (struct rio_mport *)dev_instance;
  319. osr = in_be32((void *)&msg_regs->osr);
  320. if (osr & RIO_MSG_OSR_TE) {
  321. pr_info("RIO: outbound message transmission error\n");
  322. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE);
  323. goto out;
  324. }
  325. if (osr & RIO_MSG_OSR_QOI) {
  326. pr_info("RIO: outbound message queue overflow\n");
  327. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI);
  328. goto out;
  329. }
  330. if (osr & RIO_MSG_OSR_EOMI) {
  331. u32 dqp = in_be32((void *)&msg_regs->odqdpar);
  332. int slot = (dqp - msg_tx_ring.phys) >> 5;
  333. port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot);
  334. /* Ack the end-of-message interrupt */
  335. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI);
  336. }
  337. out:
  338. return IRQ_HANDLED;
  339. }
  340. /**
  341. * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
  342. * @mport: Master port implementing the outbound message unit
  343. * @dev_id: Device specific pointer to pass on event
  344. * @mbox: Mailbox to open
  345. * @entries: Number of entries in the outbound mailbox ring
  346. *
  347. * Initializes buffer ring, request the outbound message interrupt,
  348. * and enables the outbound message unit. Returns %0 on success and
  349. * %-EINVAL or %-ENOMEM on failure.
  350. */
  351. int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
  352. {
  353. int i, j, rc = 0;
  354. if ((entries < RIO_MIN_TX_RING_SIZE) ||
  355. (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
  356. rc = -EINVAL;
  357. goto out;
  358. }
  359. /* Initialize shadow copy ring */
  360. msg_tx_ring.dev_id = dev_id;
  361. msg_tx_ring.size = entries;
  362. for (i = 0; i < msg_tx_ring.size; i++) {
  363. if (!
  364. (msg_tx_ring.virt_buffer[i] =
  365. dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  366. &msg_tx_ring.phys_buffer[i],
  367. GFP_KERNEL))) {
  368. rc = -ENOMEM;
  369. for (j = 0; j < msg_tx_ring.size; j++)
  370. if (msg_tx_ring.virt_buffer[j])
  371. dma_free_coherent(NULL,
  372. RIO_MSG_BUFFER_SIZE,
  373. msg_tx_ring.
  374. virt_buffer[j],
  375. msg_tx_ring.
  376. phys_buffer[j]);
  377. goto out;
  378. }
  379. }
  380. /* Initialize outbound message descriptor ring */
  381. if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL,
  382. msg_tx_ring.size *
  383. RIO_MSG_DESC_SIZE,
  384. &msg_tx_ring.phys,
  385. GFP_KERNEL))) {
  386. rc = -ENOMEM;
  387. goto out_dma;
  388. }
  389. memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE);
  390. msg_tx_ring.tx_slot = 0;
  391. /* Point dequeue/enqueue pointers at first entry in ring */
  392. out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys);
  393. out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys);
  394. /* Configure for snooping */
  395. out_be32((void *)&msg_regs->osar, 0x00000004);
  396. /* Clear interrupt status */
  397. out_be32((void *)&msg_regs->osr, 0x000000b3);
  398. /* Hook up outbound message handler */
  399. if ((rc =
  400. request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0,
  401. "msg_tx", (void *)mport)) < 0)
  402. goto out_irq;
  403. /*
  404. * Configure outbound message unit
  405. * Snooping
  406. * Interrupts (all enabled, except QEIE)
  407. * Chaining mode
  408. * Disable
  409. */
  410. out_be32((void *)&msg_regs->omr, 0x00100220);
  411. /* Set number of entries */
  412. out_be32((void *)&msg_regs->omr,
  413. in_be32((void *)&msg_regs->omr) |
  414. ((get_bitmask_order(entries) - 2) << 12));
  415. /* Now enable the unit */
  416. out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1);
  417. out:
  418. return rc;
  419. out_irq:
  420. dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
  421. msg_tx_ring.virt, msg_tx_ring.phys);
  422. out_dma:
  423. for (i = 0; i < msg_tx_ring.size; i++)
  424. dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  425. msg_tx_ring.virt_buffer[i],
  426. msg_tx_ring.phys_buffer[i]);
  427. return rc;
  428. }
  429. /**
  430. * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
  431. * @mport: Master port implementing the outbound message unit
  432. * @mbox: Mailbox to close
  433. *
  434. * Disables the outbound message unit, free all buffers, and
  435. * frees the outbound message interrupt.
  436. */
  437. void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
  438. {
  439. /* Disable inbound message unit */
  440. out_be32((void *)&msg_regs->omr, 0);
  441. /* Free ring */
  442. dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
  443. msg_tx_ring.virt, msg_tx_ring.phys);
  444. /* Free interrupt */
  445. free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport);
  446. }
  447. /**
  448. * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler
  449. * @irq: Linux interrupt number
  450. * @dev_instance: Pointer to interrupt-specific data
  451. *
  452. * Handles inbound message interrupts. Executes a registered inbound
  453. * mailbox event handler and acks the interrupt occurence.
  454. */
  455. static irqreturn_t
  456. mpc85xx_rio_rx_handler(int irq, void *dev_instance)
  457. {
  458. int isr;
  459. struct rio_mport *port = (struct rio_mport *)dev_instance;
  460. isr = in_be32((void *)&msg_regs->isr);
  461. if (isr & RIO_MSG_ISR_TE) {
  462. pr_info("RIO: inbound message reception error\n");
  463. out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE);
  464. goto out;
  465. }
  466. /* XXX Need to check/dispatch until queue empty */
  467. if (isr & RIO_MSG_ISR_DIQI) {
  468. /*
  469. * We implement *only* mailbox 0, but can receive messages
  470. * for any mailbox/letter to that mailbox destination. So,
  471. * make the callback with an unknown/invalid mailbox number
  472. * argument.
  473. */
  474. port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1);
  475. /* Ack the queueing interrupt */
  476. out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI);
  477. }
  478. out:
  479. return IRQ_HANDLED;
  480. }
  481. /**
  482. * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
  483. * @mport: Master port implementing the inbound message unit
  484. * @dev_id: Device specific pointer to pass on event
  485. * @mbox: Mailbox to open
  486. * @entries: Number of entries in the inbound mailbox ring
  487. *
  488. * Initializes buffer ring, request the inbound message interrupt,
  489. * and enables the inbound message unit. Returns %0 on success
  490. * and %-EINVAL or %-ENOMEM on failure.
  491. */
  492. int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
  493. {
  494. int i, rc = 0;
  495. if ((entries < RIO_MIN_RX_RING_SIZE) ||
  496. (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
  497. rc = -EINVAL;
  498. goto out;
  499. }
  500. /* Initialize client buffer ring */
  501. msg_rx_ring.dev_id = dev_id;
  502. msg_rx_ring.size = entries;
  503. msg_rx_ring.rx_slot = 0;
  504. for (i = 0; i < msg_rx_ring.size; i++)
  505. msg_rx_ring.virt_buffer[i] = NULL;
  506. /* Initialize inbound message ring */
  507. if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL,
  508. msg_rx_ring.size *
  509. RIO_MAX_MSG_SIZE,
  510. &msg_rx_ring.phys,
  511. GFP_KERNEL))) {
  512. rc = -ENOMEM;
  513. goto out;
  514. }
  515. /* Point dequeue/enqueue pointers at first entry in ring */
  516. out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys);
  517. out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys);
  518. /* Clear interrupt status */
  519. out_be32((void *)&msg_regs->isr, 0x00000091);
  520. /* Hook up inbound message handler */
  521. if ((rc =
  522. request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0,
  523. "msg_rx", (void *)mport)) < 0) {
  524. dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  525. msg_tx_ring.virt_buffer[i],
  526. msg_tx_ring.phys_buffer[i]);
  527. goto out;
  528. }
  529. /*
  530. * Configure inbound message unit:
  531. * Snooping
  532. * 4KB max message size
  533. * Unmask all interrupt sources
  534. * Disable
  535. */
  536. out_be32((void *)&msg_regs->imr, 0x001b0060);
  537. /* Set number of queue entries */
  538. out_be32((void *)&msg_regs->imr,
  539. in_be32((void *)&msg_regs->imr) |
  540. ((get_bitmask_order(entries) - 2) << 12));
  541. /* Now enable the unit */
  542. out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1);
  543. out:
  544. return rc;
  545. }
  546. /**
  547. * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
  548. * @mport: Master port implementing the inbound message unit
  549. * @mbox: Mailbox to close
  550. *
  551. * Disables the inbound message unit, free all buffers, and
  552. * frees the inbound message interrupt.
  553. */
  554. void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
  555. {
  556. /* Disable inbound message unit */
  557. out_be32((void *)&msg_regs->imr, 0);
  558. /* Free ring */
  559. dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE,
  560. msg_rx_ring.virt, msg_rx_ring.phys);
  561. /* Free interrupt */
  562. free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport);
  563. }
  564. /**
  565. * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
  566. * @mport: Master port implementing the inbound message unit
  567. * @mbox: Inbound mailbox number
  568. * @buf: Buffer to add to inbound queue
  569. *
  570. * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
  571. * %0 on success or %-EINVAL on failure.
  572. */
  573. int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
  574. {
  575. int rc = 0;
  576. pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
  577. msg_rx_ring.rx_slot);
  578. if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) {
  579. printk(KERN_ERR
  580. "RIO: error adding inbound buffer %d, buffer exists\n",
  581. msg_rx_ring.rx_slot);
  582. rc = -EINVAL;
  583. goto out;
  584. }
  585. msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf;
  586. if (++msg_rx_ring.rx_slot == msg_rx_ring.size)
  587. msg_rx_ring.rx_slot = 0;
  588. out:
  589. return rc;
  590. }
  591. EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
  592. /**
  593. * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
  594. * @mport: Master port implementing the inbound message unit
  595. * @mbox: Inbound mailbox number
  596. *
  597. * Gets the next available inbound message from the inbound message queue.
  598. * A pointer to the message is returned on success or NULL on failure.
  599. */
  600. void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
  601. {
  602. u32 imr;
  603. u32 phys_buf, virt_buf;
  604. void *buf = NULL;
  605. int buf_idx;
  606. phys_buf = in_be32((void *)&msg_regs->ifqdpar);
  607. /* If no more messages, then bail out */
  608. if (phys_buf == in_be32((void *)&msg_regs->ifqepar))
  609. goto out2;
  610. virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys);
  611. buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
  612. buf = msg_rx_ring.virt_buffer[buf_idx];
  613. if (!buf) {
  614. printk(KERN_ERR
  615. "RIO: inbound message copy failed, no buffers\n");
  616. goto out1;
  617. }
  618. /* Copy max message size, caller is expected to allocate that big */
  619. memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
  620. /* Clear the available buffer */
  621. msg_rx_ring.virt_buffer[buf_idx] = NULL;
  622. out1:
  623. imr = in_be32((void *)&msg_regs->imr);
  624. out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI);
  625. out2:
  626. return buf;
  627. }
  628. EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
  629. /**
  630. * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler
  631. * @irq: Linux interrupt number
  632. * @dev_instance: Pointer to interrupt-specific data
  633. *
  634. * Handles doorbell interrupts. Parses a list of registered
  635. * doorbell event handlers and executes a matching event handler.
  636. */
  637. static irqreturn_t
  638. mpc85xx_rio_dbell_handler(int irq, void *dev_instance)
  639. {
  640. int dsr;
  641. struct rio_mport *port = (struct rio_mport *)dev_instance;
  642. dsr = in_be32((void *)&msg_regs->dsr);
  643. if (dsr & DOORBELL_DSR_TE) {
  644. pr_info("RIO: doorbell reception error\n");
  645. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE);
  646. goto out;
  647. }
  648. if (dsr & DOORBELL_DSR_QFI) {
  649. pr_info("RIO: doorbell queue full\n");
  650. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI);
  651. goto out;
  652. }
  653. /* XXX Need to check/dispatch until queue empty */
  654. if (dsr & DOORBELL_DSR_DIQI) {
  655. u32 dmsg =
  656. (u32) dbell_ring.virt +
  657. (in_be32((void *)&msg_regs->dqdpar) & 0xfff);
  658. u32 dmr;
  659. struct rio_dbell *dbell;
  660. int found = 0;
  661. pr_debug
  662. ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
  663. DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
  664. list_for_each_entry(dbell, &port->dbells, node) {
  665. if ((dbell->res->start <= DBELL_INF(dmsg)) &&
  666. (dbell->res->end >= DBELL_INF(dmsg))) {
  667. found = 1;
  668. break;
  669. }
  670. }
  671. if (found) {
  672. dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
  673. DBELL_INF(dmsg));
  674. } else {
  675. pr_debug
  676. ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
  677. DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
  678. }
  679. dmr = in_be32((void *)&msg_regs->dmr);
  680. out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI);
  681. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI);
  682. }
  683. out:
  684. return IRQ_HANDLED;
  685. }
  686. /**
  687. * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init
  688. * @mport: Master port implementing the inbound doorbell unit
  689. *
  690. * Initializes doorbell unit hardware and inbound DMA buffer
  691. * ring. Called from mpc85xx_rio_setup(). Returns %0 on success
  692. * or %-ENOMEM on failure.
  693. */
  694. static int mpc85xx_rio_doorbell_init(struct rio_mport *mport)
  695. {
  696. int rc = 0;
  697. /* Map outbound doorbell window immediately after maintenance window */
  698. if (!(dbell_win =
  699. (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
  700. RIO_DBELL_WIN_SIZE))) {
  701. printk(KERN_ERR
  702. "RIO: unable to map outbound doorbell window\n");
  703. rc = -ENOMEM;
  704. goto out;
  705. }
  706. /* Initialize inbound doorbells */
  707. if (!(dbell_ring.virt = dma_alloc_coherent(NULL,
  708. 512 * DOORBELL_MESSAGE_SIZE,
  709. &dbell_ring.phys,
  710. GFP_KERNEL))) {
  711. printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
  712. rc = -ENOMEM;
  713. iounmap((void *)dbell_win);
  714. goto out;
  715. }
  716. /* Point dequeue/enqueue pointers at first entry in ring */
  717. out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys);
  718. out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys);
  719. /* Clear interrupt status */
  720. out_be32((void *)&msg_regs->dsr, 0x00000091);
  721. /* Hook up doorbell handler */
  722. if ((rc =
  723. request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0,
  724. "dbell_rx", (void *)mport) < 0)) {
  725. iounmap((void *)dbell_win);
  726. dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
  727. dbell_ring.virt, dbell_ring.phys);
  728. printk(KERN_ERR
  729. "MPC85xx RIO: unable to request inbound doorbell irq");
  730. goto out;
  731. }
  732. /* Configure doorbells for snooping, 512 entries, and enable */
  733. out_be32((void *)&msg_regs->dmr, 0x00108161);
  734. out:
  735. return rc;
  736. }
  737. static char *cmdline = NULL;
  738. static int mpc85xx_rio_get_hdid(int index)
  739. {
  740. /* XXX Need to parse multiple entries in some format */
  741. if (!cmdline)
  742. return -1;
  743. return simple_strtol(cmdline, NULL, 0);
  744. }
  745. static int mpc85xx_rio_get_cmdline(char *s)
  746. {
  747. if (!s)
  748. return 0;
  749. cmdline = s;
  750. return 1;
  751. }
  752. __setup("riohdid=", mpc85xx_rio_get_cmdline);
  753. /**
  754. * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface
  755. * @law_start: Starting physical address of RapidIO LAW
  756. * @law_size: Size of RapidIO LAW
  757. *
  758. * Initializes MPC85xx RapidIO hardware interface, configures
  759. * master port with system-specific info, and registers the
  760. * master port with the RapidIO subsystem.
  761. */
  762. void mpc85xx_rio_setup(int law_start, int law_size)
  763. {
  764. struct rio_ops *ops;
  765. struct rio_mport *port;
  766. ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
  767. ops->lcread = mpc85xx_local_config_read;
  768. ops->lcwrite = mpc85xx_local_config_write;
  769. ops->cread = mpc85xx_rio_config_read;
  770. ops->cwrite = mpc85xx_rio_config_write;
  771. ops->dsend = mpc85xx_rio_doorbell_send;
  772. port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL);
  773. port->id = 0;
  774. port->index = 0;
  775. INIT_LIST_HEAD(&port->dbells);
  776. port->iores.start = law_start;
  777. port->iores.end = law_start + law_size;
  778. port->iores.flags = IORESOURCE_MEM;
  779. rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
  780. rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
  781. rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
  782. strcpy(port->name, "RIO0 mport");
  783. port->ops = ops;
  784. port->host_deviceid = mpc85xx_rio_get_hdid(port->id);
  785. rio_register_mport(port);
  786. regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000);
  787. atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET);
  788. maint_atmu_regs = atmu_regs + 1;
  789. dbell_atmu_regs = atmu_regs + 2;
  790. msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET);
  791. /* Configure maintenance transaction window */
  792. out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000);
  793. out_be32((void *)&maint_atmu_regs->rowar, 0x80077015);
  794. maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE);
  795. /* Configure outbound doorbell window */
  796. out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400);
  797. out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b);
  798. mpc85xx_rio_doorbell_init(port);
  799. }