mvme5100.h 2.8 KB

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  1. /*
  2. * arch/ppc/platforms/mvme5100.h
  3. *
  4. * Definitions for Motorola MVME5100.
  5. *
  6. * Author: Matt Porter <mporter@mvista.com>
  7. *
  8. * 2001 (c) MontaVista, Software, Inc. This file is licensed under
  9. * the terms of the GNU General Public License version 2. This program
  10. * is licensed "as is" without any warranty of any kind, whether express
  11. * or implied.
  12. */
  13. #ifdef __KERNEL__
  14. #ifndef __ASM_MVME5100_H__
  15. #define __ASM_MVME5100_H__
  16. #define MVME5100_HAWK_SMC_BASE 0xfef80000
  17. #define MVME5100_PCI_CONFIG_ADDR 0xfe000cf8
  18. #define MVME5100_PCI_CONFIG_DATA 0xfe000cfc
  19. #define MVME5100_PCI_IO_BASE 0xfe000000
  20. #define MVME5100_PCI_MEM_BASE 0x80000000
  21. #define MVME5100_PCI_MEM_OFFSET 0x00000000
  22. #define MVME5100_PCI_DRAM_OFFSET 0x00000000
  23. #define MVME5100_ISA_MEM_BASE 0x00000000
  24. #define MVME5100_ISA_IO_BASE MVME5100_PCI_IO_BASE
  25. #define MVME5100_PCI_LOWER_MEM 0x80000000
  26. #define MVME5100_PCI_UPPER_MEM 0xf3f7ffff
  27. #define MVME5100_PCI_LOWER_IO 0x00000000
  28. #define MVME5100_PCI_UPPER_IO 0x0077ffff
  29. /* MVME5100 board register addresses. */
  30. #define MVME5100_BOARD_STATUS_REG 0xfef88080
  31. #define MVME5100_BOARD_MODFAIL_REG 0xfef88090
  32. #define MVME5100_BOARD_MODRST_REG 0xfef880a0
  33. #define MVME5100_BOARD_TBEN_REG 0xfef880c0
  34. #define MVME5100_BOARD_SW_READ_REG 0xfef880e0
  35. #define MVME5100_BOARD_GEO_ADDR_REG 0xfef880e8
  36. #define MVME5100_BOARD_EXT_FEATURE1_REG 0xfef880f0
  37. #define MVME5100_BOARD_EXT_FEATURE2_REG 0xfef88100
  38. /* Define the NVRAM/RTC address strobe & data registers */
  39. #define MVME5100_PHYS_NVRAM_AS0 0xfef880c8
  40. #define MVME5100_PHYS_NVRAM_AS1 0xfef880d0
  41. #define MVME5100_PHYS_NVRAM_DATA 0xfef880d8
  42. #define MVME5100_NVRAM_AS0 (MVME5100_PHYS_NVRAM_AS0 - MVME5100_ISA_IO_BASE)
  43. #define MVME5100_NVRAM_AS1 (MVME5100_PHYS_NVRAM_AS1 - MVME5100_ISA_IO_BASE)
  44. #define MVME5100_NVRAM_DATA (MVME5100_PHYS_NVRAM_DATA - MVME5100_ISA_IO_BASE)
  45. /* UART clock, addresses, and irq */
  46. #define MVME5100_BASE_BAUD 1843200
  47. #define MVME5100_SERIAL_1 0xfef88000
  48. #define MVME5100_SERIAL_2 0xfef88200
  49. #ifdef CONFIG_MVME5100_IPMC761_PRESENT
  50. #define MVME5100_SERIAL_IRQ 17
  51. #else
  52. #define MVME5100_SERIAL_IRQ 1
  53. #endif
  54. #define RS_TABLE_SIZE 4
  55. #define BASE_BAUD ( MVME5100_BASE_BAUD / 16 )
  56. #define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
  57. /* All UART IRQ's are wire-OR'd to one MPIC IRQ */
  58. #define STD_SERIAL_PORT_DFNS \
  59. { 0, BASE_BAUD, MVME5100_SERIAL_1, \
  60. MVME5100_SERIAL_IRQ, \
  61. STD_COM_FLAGS, /* ttyS0 */ \
  62. iomem_base: (unsigned char *)MVME5100_SERIAL_1, \
  63. iomem_reg_shift: 4, \
  64. io_type: SERIAL_IO_MEM }, \
  65. { 0, BASE_BAUD, MVME5100_SERIAL_2, \
  66. MVME5100_SERIAL_IRQ, \
  67. STD_COM_FLAGS, /* ttyS1 */ \
  68. iomem_base: (unsigned char *)MVME5100_SERIAL_2, \
  69. iomem_reg_shift: 4, \
  70. io_type: SERIAL_IO_MEM },
  71. #define SERIAL_PORT_DFNS \
  72. STD_SERIAL_PORT_DFNS
  73. #endif /* __ASM_MVME5100_H__ */
  74. #endif /* __KERNEL__ */