ibm440sp.c 3.5 KB

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  1. /*
  2. * PPC440SP I/O descriptions
  3. *
  4. * Matt Porter <mporter@kernel.crashing.org>
  5. * Copyright 2002-2005 MontaVista Software Inc.
  6. *
  7. * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  8. * Copyright (c) 2003, 2004 Zultys Technologies
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <platforms/4xx/ibm440sp.h>
  19. #include <asm/ocp.h>
  20. static struct ocp_func_emac_data ibm440sp_emac0_def = {
  21. .rgmii_idx = -1, /* No RGMII */
  22. .rgmii_mux = -1, /* No RGMII */
  23. .zmii_idx = -1, /* No ZMII */
  24. .zmii_mux = -1, /* No ZMII */
  25. .mal_idx = 0, /* MAL device index */
  26. .mal_rx_chan = 0, /* MAL rx channel number */
  27. .mal_tx_chan = 0, /* MAL tx channel number */
  28. .wol_irq = 61, /* WOL interrupt number */
  29. .mdio_idx = -1, /* No shared MDIO */
  30. .tah_idx = -1, /* No TAH */
  31. };
  32. OCP_SYSFS_EMAC_DATA()
  33. static struct ocp_func_mal_data ibm440sp_mal0_def = {
  34. .num_tx_chans = 1, /* Number of TX channels */
  35. .num_rx_chans = 1, /* Number of RX channels */
  36. .txeob_irq = 38, /* TX End Of Buffer IRQ */
  37. .rxeob_irq = 39, /* RX End Of Buffer IRQ */
  38. .txde_irq = 34, /* TX Descriptor Error IRQ */
  39. .rxde_irq = 35, /* RX Descriptor Error IRQ */
  40. .serr_irq = 33, /* MAL System Error IRQ */
  41. .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
  42. };
  43. OCP_SYSFS_MAL_DATA()
  44. static struct ocp_func_iic_data ibm440sp_iic0_def = {
  45. .fast_mode = 0, /* Use standad mode (100Khz) */
  46. };
  47. static struct ocp_func_iic_data ibm440sp_iic1_def = {
  48. .fast_mode = 0, /* Use standad mode (100Khz) */
  49. };
  50. OCP_SYSFS_IIC_DATA()
  51. struct ocp_def core_ocp[] = {
  52. { .vendor = OCP_VENDOR_IBM,
  53. .function = OCP_FUNC_OPB,
  54. .index = 0,
  55. .paddr = 0x0000000140000000ULL,
  56. .irq = OCP_IRQ_NA,
  57. .pm = OCP_CPM_NA,
  58. },
  59. { .vendor = OCP_VENDOR_IBM,
  60. .function = OCP_FUNC_16550,
  61. .index = 0,
  62. .paddr = PPC440SP_UART0_ADDR,
  63. .irq = UART0_INT,
  64. .pm = IBM_CPM_UART0,
  65. },
  66. { .vendor = OCP_VENDOR_IBM,
  67. .function = OCP_FUNC_16550,
  68. .index = 1,
  69. .paddr = PPC440SP_UART1_ADDR,
  70. .irq = UART1_INT,
  71. .pm = IBM_CPM_UART1,
  72. },
  73. { .vendor = OCP_VENDOR_IBM,
  74. .function = OCP_FUNC_16550,
  75. .index = 2,
  76. .paddr = PPC440SP_UART2_ADDR,
  77. .irq = UART2_INT,
  78. .pm = IBM_CPM_UART2,
  79. },
  80. { .vendor = OCP_VENDOR_IBM,
  81. .function = OCP_FUNC_IIC,
  82. .index = 0,
  83. .paddr = 0x00000001f0000400ULL,
  84. .irq = 2,
  85. .pm = IBM_CPM_IIC0,
  86. .additions = &ibm440sp_iic0_def,
  87. .show = &ocp_show_iic_data
  88. },
  89. { .vendor = OCP_VENDOR_IBM,
  90. .function = OCP_FUNC_IIC,
  91. .index = 1,
  92. .paddr = 0x00000001f0000500ULL,
  93. .irq = 3,
  94. .pm = IBM_CPM_IIC1,
  95. .additions = &ibm440sp_iic1_def,
  96. .show = &ocp_show_iic_data
  97. },
  98. { .vendor = OCP_VENDOR_IBM,
  99. .function = OCP_FUNC_GPIO,
  100. .index = 0,
  101. .paddr = 0x00000001f0000700ULL,
  102. .irq = OCP_IRQ_NA,
  103. .pm = IBM_CPM_GPIO0,
  104. },
  105. { .vendor = OCP_VENDOR_IBM,
  106. .function = OCP_FUNC_MAL,
  107. .paddr = OCP_PADDR_NA,
  108. .irq = OCP_IRQ_NA,
  109. .pm = OCP_CPM_NA,
  110. .additions = &ibm440sp_mal0_def,
  111. .show = &ocp_show_mal_data,
  112. },
  113. { .vendor = OCP_VENDOR_IBM,
  114. .function = OCP_FUNC_EMAC,
  115. .index = 0,
  116. .paddr = 0x00000001f0000800ULL,
  117. .irq = 60,
  118. .pm = OCP_CPM_NA,
  119. .additions = &ibm440sp_emac0_def,
  120. .show = &ocp_show_emac_data,
  121. },
  122. { .vendor = OCP_VENDOR_INVALID
  123. }
  124. };