ppc_htab.c 11 KB

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  1. /*
  2. * PowerPC hash table management proc entry. Will show information
  3. * about the current hash table and will allow changes to it.
  4. *
  5. * Written by Cort Dougan (cort@cs.nmt.edu)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/sched.h>
  14. #include <linux/proc_fs.h>
  15. #include <linux/stat.h>
  16. #include <linux/sysctl.h>
  17. #include <linux/capability.h>
  18. #include <linux/ctype.h>
  19. #include <linux/threads.h>
  20. #include <linux/smp_lock.h>
  21. #include <linux/seq_file.h>
  22. #include <linux/init.h>
  23. #include <linux/bitops.h>
  24. #include <asm/uaccess.h>
  25. #include <asm/mmu.h>
  26. #include <asm/residual.h>
  27. #include <asm/io.h>
  28. #include <asm/pgtable.h>
  29. #include <asm/cputable.h>
  30. #include <asm/system.h>
  31. #include <asm/reg.h>
  32. static int ppc_htab_show(struct seq_file *m, void *v);
  33. static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
  34. size_t count, loff_t *ppos);
  35. extern PTE *Hash, *Hash_end;
  36. extern unsigned long Hash_size, Hash_mask;
  37. extern unsigned long _SDR1;
  38. extern unsigned long htab_reloads;
  39. extern unsigned long htab_preloads;
  40. extern unsigned long htab_evicts;
  41. extern unsigned long pte_misses;
  42. extern unsigned long pte_errors;
  43. extern unsigned int primary_pteg_full;
  44. extern unsigned int htab_hash_searches;
  45. static int ppc_htab_open(struct inode *inode, struct file *file)
  46. {
  47. return single_open(file, ppc_htab_show, NULL);
  48. }
  49. const struct file_operations ppc_htab_operations = {
  50. .open = ppc_htab_open,
  51. .read = seq_read,
  52. .llseek = seq_lseek,
  53. .write = ppc_htab_write,
  54. .release = single_release,
  55. };
  56. static char *pmc1_lookup(unsigned long mmcr0)
  57. {
  58. switch ( mmcr0 & (0x7f<<7) )
  59. {
  60. case 0x0:
  61. return "none";
  62. case MMCR0_PMC1_CYCLES:
  63. return "cycles";
  64. case MMCR0_PMC1_ICACHEMISS:
  65. return "ic miss";
  66. case MMCR0_PMC1_DTLB:
  67. return "dtlb miss";
  68. default:
  69. return "unknown";
  70. }
  71. }
  72. static char *pmc2_lookup(unsigned long mmcr0)
  73. {
  74. switch ( mmcr0 & 0x3f )
  75. {
  76. case 0x0:
  77. return "none";
  78. case MMCR0_PMC2_CYCLES:
  79. return "cycles";
  80. case MMCR0_PMC2_DCACHEMISS:
  81. return "dc miss";
  82. case MMCR0_PMC2_ITLB:
  83. return "itlb miss";
  84. case MMCR0_PMC2_LOADMISSTIME:
  85. return "load miss time";
  86. default:
  87. return "unknown";
  88. }
  89. }
  90. /*
  91. * print some useful info about the hash table. This function
  92. * is _REALLY_ slow (see the nested for loops below) but nothing
  93. * in here should be really timing critical. -- Cort
  94. */
  95. static int ppc_htab_show(struct seq_file *m, void *v)
  96. {
  97. unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
  98. #if defined(CONFIG_PPC_STD_MMU)
  99. unsigned int kptes = 0, uptes = 0;
  100. PTE *ptr;
  101. #endif /* CONFIG_PPC_STD_MMU */
  102. if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
  103. mmcr0 = mfspr(SPRN_MMCR0);
  104. pmc1 = mfspr(SPRN_PMC1);
  105. pmc2 = mfspr(SPRN_PMC2);
  106. seq_printf(m,
  107. "604 Performance Monitoring\n"
  108. "MMCR0\t\t: %08lx %s%s ",
  109. mmcr0,
  110. ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
  111. ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
  112. seq_printf(m,
  113. "\nPMC1\t\t: %08lx (%s)\n"
  114. "PMC2\t\t: %08lx (%s)\n",
  115. pmc1, pmc1_lookup(mmcr0),
  116. pmc2, pmc2_lookup(mmcr0));
  117. }
  118. #ifdef CONFIG_PPC_STD_MMU
  119. /* if we don't have a htab */
  120. if ( Hash_size == 0 ) {
  121. seq_printf(m, "No Hash Table used\n");
  122. return 0;
  123. }
  124. for (ptr = Hash; ptr < Hash_end; ptr++) {
  125. unsigned int mctx, vsid;
  126. if (!ptr->v)
  127. continue;
  128. /* undo the esid skew */
  129. vsid = ptr->vsid;
  130. mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
  131. if (mctx == 0)
  132. kptes++;
  133. else
  134. uptes++;
  135. }
  136. seq_printf(m,
  137. "PTE Hash Table Information\n"
  138. "Size\t\t: %luKb\n"
  139. "Buckets\t\t: %lu\n"
  140. "Address\t\t: %08lx\n"
  141. "Entries\t\t: %lu\n"
  142. "User ptes\t: %u\n"
  143. "Kernel ptes\t: %u\n"
  144. "Percent full\t: %lu%%\n"
  145. , (unsigned long)(Hash_size>>10),
  146. (Hash_size/(sizeof(PTE)*8)),
  147. (unsigned long)Hash,
  148. Hash_size/sizeof(PTE)
  149. , uptes,
  150. kptes,
  151. ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
  152. );
  153. seq_printf(m,
  154. "Reloads\t\t: %lu\n"
  155. "Preloads\t: %lu\n"
  156. "Searches\t: %u\n"
  157. "Overflows\t: %u\n"
  158. "Evicts\t\t: %lu\n",
  159. htab_reloads, htab_preloads, htab_hash_searches,
  160. primary_pteg_full, htab_evicts);
  161. #endif /* CONFIG_PPC_STD_MMU */
  162. seq_printf(m,
  163. "Non-error misses: %lu\n"
  164. "Error misses\t: %lu\n",
  165. pte_misses, pte_errors);
  166. return 0;
  167. }
  168. /*
  169. * Allow user to define performance counters and resize the hash table
  170. */
  171. static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
  172. size_t count, loff_t *ppos)
  173. {
  174. #ifdef CONFIG_PPC_STD_MMU
  175. unsigned long tmp;
  176. char buffer[16];
  177. if (!capable(CAP_SYS_ADMIN))
  178. return -EACCES;
  179. if (strncpy_from_user(buffer, ubuffer, 15))
  180. return -EFAULT;
  181. buffer[15] = 0;
  182. /* don't set the htab size for now */
  183. if ( !strncmp( buffer, "size ", 5) )
  184. return -EBUSY;
  185. if ( !strncmp( buffer, "reset", 5) )
  186. {
  187. if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
  188. /* reset PMC1 and PMC2 */
  189. mtspr(SPRN_PMC1, 0);
  190. mtspr(SPRN_PMC2, 0);
  191. }
  192. htab_reloads = 0;
  193. htab_evicts = 0;
  194. pte_misses = 0;
  195. pte_errors = 0;
  196. }
  197. /* Everything below here requires the performance monitor feature. */
  198. if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
  199. return count;
  200. /* turn off performance monitoring */
  201. if ( !strncmp( buffer, "off", 3) )
  202. {
  203. mtspr(SPRN_MMCR0, 0);
  204. mtspr(SPRN_PMC1, 0);
  205. mtspr(SPRN_PMC2, 0);
  206. }
  207. if ( !strncmp( buffer, "user", 4) )
  208. {
  209. /* setup mmcr0 and clear the correct pmc */
  210. tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
  211. mtspr(SPRN_MMCR0, tmp);
  212. mtspr(SPRN_PMC1, 0);
  213. mtspr(SPRN_PMC2, 0);
  214. }
  215. if ( !strncmp( buffer, "kernel", 6) )
  216. {
  217. /* setup mmcr0 and clear the correct pmc */
  218. tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
  219. mtspr(SPRN_MMCR0, tmp);
  220. mtspr(SPRN_PMC1, 0);
  221. mtspr(SPRN_PMC2, 0);
  222. }
  223. /* PMC1 values */
  224. if ( !strncmp( buffer, "dtlb", 4) )
  225. {
  226. /* setup mmcr0 and clear the correct pmc */
  227. tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
  228. mtspr(SPRN_MMCR0, tmp);
  229. mtspr(SPRN_PMC1, 0);
  230. }
  231. if ( !strncmp( buffer, "ic miss", 7) )
  232. {
  233. /* setup mmcr0 and clear the correct pmc */
  234. tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
  235. mtspr(SPRN_MMCR0, tmp);
  236. mtspr(SPRN_PMC1, 0);
  237. }
  238. /* PMC2 values */
  239. if ( !strncmp( buffer, "load miss time", 14) )
  240. {
  241. /* setup mmcr0 and clear the correct pmc */
  242. asm volatile(
  243. "mfspr %0,%1\n\t" /* get current mccr0 */
  244. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  245. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  246. "mtspr %1,%0 \n\t" /* set new mccr0 */
  247. "mtspr %3,%4 \n\t" /* reset the pmc */
  248. : "=r" (tmp)
  249. : "i" (SPRN_MMCR0),
  250. "i" (MMCR0_PMC2_LOADMISSTIME),
  251. "i" (SPRN_PMC2), "r" (0) );
  252. }
  253. if ( !strncmp( buffer, "itlb", 4) )
  254. {
  255. /* setup mmcr0 and clear the correct pmc */
  256. asm volatile(
  257. "mfspr %0,%1\n\t" /* get current mccr0 */
  258. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  259. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  260. "mtspr %1,%0 \n\t" /* set new mccr0 */
  261. "mtspr %3,%4 \n\t" /* reset the pmc */
  262. : "=r" (tmp)
  263. : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
  264. "i" (SPRN_PMC2), "r" (0) );
  265. }
  266. if ( !strncmp( buffer, "dc miss", 7) )
  267. {
  268. /* setup mmcr0 and clear the correct pmc */
  269. asm volatile(
  270. "mfspr %0,%1\n\t" /* get current mccr0 */
  271. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  272. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  273. "mtspr %1,%0 \n\t" /* set new mccr0 */
  274. "mtspr %3,%4 \n\t" /* reset the pmc */
  275. : "=r" (tmp)
  276. : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
  277. "i" (SPRN_PMC2), "r" (0) );
  278. }
  279. return count;
  280. #else /* CONFIG_PPC_STD_MMU */
  281. return 0;
  282. #endif /* CONFIG_PPC_STD_MMU */
  283. }
  284. int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
  285. void __user *buffer_arg, size_t *lenp, loff_t *ppos)
  286. {
  287. int vleft, first=1, len, left, val;
  288. char __user *buffer = (char __user *) buffer_arg;
  289. #define TMPBUFLEN 256
  290. char buf[TMPBUFLEN], *p;
  291. static const char *sizestrings[4] = {
  292. "2MB", "256KB", "512KB", "1MB"
  293. };
  294. static const char *clockstrings[8] = {
  295. "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
  296. "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
  297. };
  298. static const char *typestrings[4] = {
  299. "flow-through burst SRAM", "reserved SRAM",
  300. "pipelined burst SRAM", "pipelined late-write SRAM"
  301. };
  302. static const char *holdstrings[4] = {
  303. "0.5", "1.0", "(reserved2)", "(reserved3)"
  304. };
  305. if (!cpu_has_feature(CPU_FTR_L2CR))
  306. return -EFAULT;
  307. if ( /*!table->maxlen ||*/ (*ppos && !write)) {
  308. *lenp = 0;
  309. return 0;
  310. }
  311. vleft = table->maxlen / sizeof(int);
  312. left = *lenp;
  313. for (; left /*&& vleft--*/; first=0) {
  314. if (write) {
  315. while (left) {
  316. char c;
  317. if(get_user(c, buffer))
  318. return -EFAULT;
  319. if (!isspace(c))
  320. break;
  321. left--;
  322. buffer++;
  323. }
  324. if (!left)
  325. break;
  326. len = left;
  327. if (len > TMPBUFLEN-1)
  328. len = TMPBUFLEN-1;
  329. if(copy_from_user(buf, buffer, len))
  330. return -EFAULT;
  331. buf[len] = 0;
  332. p = buf;
  333. if (*p < '0' || *p > '9')
  334. break;
  335. val = simple_strtoul(p, &p, 0);
  336. len = p-buf;
  337. if ((len < left) && *p && !isspace(*p))
  338. break;
  339. buffer += len;
  340. left -= len;
  341. _set_L2CR(val);
  342. } else {
  343. p = buf;
  344. if (!first)
  345. *p++ = '\t';
  346. val = _get_L2CR();
  347. p += sprintf(p, "0x%08x: ", val);
  348. p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
  349. "disabled");
  350. p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
  351. p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
  352. p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
  353. p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
  354. p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
  355. p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
  356. p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
  357. "copy-back");
  358. p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
  359. p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
  360. p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
  361. p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
  362. p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
  363. p += sprintf(p,"\n");
  364. len = strlen(buf);
  365. if (len > left)
  366. len = left;
  367. if (copy_to_user(buffer, buf, len))
  368. return -EFAULT;
  369. left -= len;
  370. buffer += len;
  371. break;
  372. }
  373. }
  374. if (!write && !first && left) {
  375. if(put_user('\n', (char __user *) buffer))
  376. return -EFAULT;
  377. left--, buffer++;
  378. }
  379. if (write) {
  380. char __user *s = (char __user *) buffer;
  381. while (left) {
  382. char c;
  383. if(get_user(c, s++))
  384. return -EFAULT;
  385. if (!isspace(c))
  386. break;
  387. left--;
  388. }
  389. }
  390. if (write && first)
  391. return -EINVAL;
  392. *lenp -= left;
  393. *ppos += *lenp;
  394. return 0;
  395. }
  396. #ifdef CONFIG_SYSCTL
  397. /*
  398. * Register our sysctl.
  399. */
  400. static ctl_table htab_ctl_table[]={
  401. {
  402. .ctl_name = KERN_PPC_L2CR,
  403. .procname = "l2cr",
  404. .mode = 0644,
  405. .proc_handler = &proc_dol2crvec,
  406. },
  407. { 0, },
  408. };
  409. static ctl_table htab_sysctl_root[] = {
  410. { 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
  411. { 0,},
  412. };
  413. static int __init
  414. register_ppc_htab_sysctl(void)
  415. {
  416. register_sysctl_table(htab_sysctl_root, 0);
  417. return 0;
  418. }
  419. __initcall(register_ppc_htab_sysctl);
  420. #endif