irq.c 10 KB

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  1. /*
  2. * This module supports the iSeries PCI bus interrupt handling
  3. * Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
  4. * Copyright (C) 2004-2005 IBM Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the:
  18. * Free Software Foundation, Inc.,
  19. * 59 Temple Place, Suite 330,
  20. * Boston, MA 02111-1307 USA
  21. *
  22. * Change Activity:
  23. * Created, December 13, 2000 by Wayne Holm
  24. * End Change Activity
  25. */
  26. #include <linux/pci.h>
  27. #include <linux/init.h>
  28. #include <linux/threads.h>
  29. #include <linux/smp.h>
  30. #include <linux/param.h>
  31. #include <linux/string.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/ide.h>
  34. #include <linux/irq.h>
  35. #include <linux/spinlock.h>
  36. #include <asm/paca.h>
  37. #include <asm/iseries/hv_types.h>
  38. #include <asm/iseries/hv_lp_event.h>
  39. #include <asm/iseries/hv_call_xm.h>
  40. #include <asm/iseries/it_lp_queue.h>
  41. #include "irq.h"
  42. #include "pci.h"
  43. #include "call_pci.h"
  44. #include "smp.h"
  45. #ifdef CONFIG_PCI
  46. enum pci_event_type {
  47. pe_bus_created = 0, /* PHB has been created */
  48. pe_bus_error = 1, /* PHB has failed */
  49. pe_bus_failed = 2, /* Msg to Secondary, Primary failed bus */
  50. pe_node_failed = 4, /* Multi-adapter bridge has failed */
  51. pe_node_recovered = 5, /* Multi-adapter bridge has recovered */
  52. pe_bus_recovered = 12, /* PHB has been recovered */
  53. pe_unquiese_bus = 18, /* Secondary bus unqiescing */
  54. pe_bridge_error = 21, /* Bridge Error */
  55. pe_slot_interrupt = 22 /* Slot interrupt */
  56. };
  57. struct pci_event {
  58. struct HvLpEvent event;
  59. union {
  60. u64 __align; /* Align on an 8-byte boundary */
  61. struct {
  62. u32 fisr;
  63. HvBusNumber bus_number;
  64. HvSubBusNumber sub_bus_number;
  65. HvAgentId dev_id;
  66. } slot;
  67. struct {
  68. HvBusNumber bus_number;
  69. HvSubBusNumber sub_bus_number;
  70. } bus;
  71. struct {
  72. HvBusNumber bus_number;
  73. HvSubBusNumber sub_bus_number;
  74. HvAgentId dev_id;
  75. } node;
  76. } data;
  77. };
  78. static DEFINE_SPINLOCK(pending_irqs_lock);
  79. static int num_pending_irqs;
  80. static int pending_irqs[NR_IRQS];
  81. static void int_received(struct pci_event *event)
  82. {
  83. int irq;
  84. switch (event->event.xSubtype) {
  85. case pe_slot_interrupt:
  86. irq = event->event.xCorrelationToken;
  87. if (irq < NR_IRQS) {
  88. spin_lock(&pending_irqs_lock);
  89. pending_irqs[irq]++;
  90. num_pending_irqs++;
  91. spin_unlock(&pending_irqs_lock);
  92. } else {
  93. printk(KERN_WARNING "int_received: bad irq number %d\n",
  94. irq);
  95. HvCallPci_eoi(event->data.slot.bus_number,
  96. event->data.slot.sub_bus_number,
  97. event->data.slot.dev_id);
  98. }
  99. break;
  100. /* Ignore error recovery events for now */
  101. case pe_bus_created:
  102. printk(KERN_INFO "int_received: system bus %d created\n",
  103. event->data.bus.bus_number);
  104. break;
  105. case pe_bus_error:
  106. case pe_bus_failed:
  107. printk(KERN_INFO "int_received: system bus %d failed\n",
  108. event->data.bus.bus_number);
  109. break;
  110. case pe_bus_recovered:
  111. case pe_unquiese_bus:
  112. printk(KERN_INFO "int_received: system bus %d recovered\n",
  113. event->data.bus.bus_number);
  114. break;
  115. case pe_node_failed:
  116. case pe_bridge_error:
  117. printk(KERN_INFO
  118. "int_received: multi-adapter bridge %d/%d/%d failed\n",
  119. event->data.node.bus_number,
  120. event->data.node.sub_bus_number,
  121. event->data.node.dev_id);
  122. break;
  123. case pe_node_recovered:
  124. printk(KERN_INFO
  125. "int_received: multi-adapter bridge %d/%d/%d recovered\n",
  126. event->data.node.bus_number,
  127. event->data.node.sub_bus_number,
  128. event->data.node.dev_id);
  129. break;
  130. default:
  131. printk(KERN_ERR
  132. "int_received: unrecognized event subtype 0x%x\n",
  133. event->event.xSubtype);
  134. break;
  135. }
  136. }
  137. static void pci_event_handler(struct HvLpEvent *event)
  138. {
  139. if (event && (event->xType == HvLpEvent_Type_PciIo)) {
  140. if (hvlpevent_is_int(event))
  141. int_received((struct pci_event *)event);
  142. else
  143. printk(KERN_ERR
  144. "pci_event_handler: unexpected ack received\n");
  145. } else if (event)
  146. printk(KERN_ERR
  147. "pci_event_handler: Unrecognized PCI event type 0x%x\n",
  148. (int)event->xType);
  149. else
  150. printk(KERN_ERR "pci_event_handler: NULL event received\n");
  151. }
  152. #define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff)
  153. #define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
  154. #define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
  155. #define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
  156. /*
  157. * This will be called by device drivers (via enable_IRQ)
  158. * to enable INTA in the bridge interrupt status register.
  159. */
  160. static void iseries_enable_IRQ(unsigned int irq)
  161. {
  162. u32 bus, dev_id, function, mask;
  163. const u32 sub_bus = 0;
  164. unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
  165. /* The IRQ has already been locked by the caller */
  166. bus = REAL_IRQ_TO_BUS(rirq);
  167. function = REAL_IRQ_TO_FUNC(rirq);
  168. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  169. /* Unmask secondary INTA */
  170. mask = 0x80000000;
  171. HvCallPci_unmaskInterrupts(bus, sub_bus, dev_id, mask);
  172. }
  173. /* This is called by iseries_activate_IRQs */
  174. static unsigned int iseries_startup_IRQ(unsigned int irq)
  175. {
  176. u32 bus, dev_id, function, mask;
  177. const u32 sub_bus = 0;
  178. unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
  179. bus = REAL_IRQ_TO_BUS(rirq);
  180. function = REAL_IRQ_TO_FUNC(rirq);
  181. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  182. /* Link the IRQ number to the bridge */
  183. HvCallXm_connectBusUnit(bus, sub_bus, dev_id, irq);
  184. /* Unmask bridge interrupts in the FISR */
  185. mask = 0x01010000 << function;
  186. HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
  187. iseries_enable_IRQ(irq);
  188. return 0;
  189. }
  190. /*
  191. * This is called out of iSeries_fixup to activate interrupt
  192. * generation for usable slots
  193. */
  194. void __init iSeries_activate_IRQs()
  195. {
  196. int irq;
  197. unsigned long flags;
  198. for_each_irq (irq) {
  199. irq_desc_t *desc = get_irq_desc(irq);
  200. if (desc && desc->chip && desc->chip->startup) {
  201. spin_lock_irqsave(&desc->lock, flags);
  202. desc->chip->startup(irq);
  203. spin_unlock_irqrestore(&desc->lock, flags);
  204. }
  205. }
  206. }
  207. /* this is not called anywhere currently */
  208. static void iseries_shutdown_IRQ(unsigned int irq)
  209. {
  210. u32 bus, dev_id, function, mask;
  211. const u32 sub_bus = 0;
  212. unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
  213. /* irq should be locked by the caller */
  214. bus = REAL_IRQ_TO_BUS(rirq);
  215. function = REAL_IRQ_TO_FUNC(rirq);
  216. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  217. /* Invalidate the IRQ number in the bridge */
  218. HvCallXm_connectBusUnit(bus, sub_bus, dev_id, 0);
  219. /* Mask bridge interrupts in the FISR */
  220. mask = 0x01010000 << function;
  221. HvCallPci_maskFisr(bus, sub_bus, dev_id, mask);
  222. }
  223. /*
  224. * This will be called by device drivers (via disable_IRQ)
  225. * to disable INTA in the bridge interrupt status register.
  226. */
  227. static void iseries_disable_IRQ(unsigned int irq)
  228. {
  229. u32 bus, dev_id, function, mask;
  230. const u32 sub_bus = 0;
  231. unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
  232. /* The IRQ has already been locked by the caller */
  233. bus = REAL_IRQ_TO_BUS(rirq);
  234. function = REAL_IRQ_TO_FUNC(rirq);
  235. dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
  236. /* Mask secondary INTA */
  237. mask = 0x80000000;
  238. HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
  239. }
  240. static void iseries_end_IRQ(unsigned int irq)
  241. {
  242. unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
  243. HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
  244. (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
  245. }
  246. static struct irq_chip iseries_pic = {
  247. .typename = "iSeries irq controller",
  248. .startup = iseries_startup_IRQ,
  249. .shutdown = iseries_shutdown_IRQ,
  250. .unmask = iseries_enable_IRQ,
  251. .mask = iseries_disable_IRQ,
  252. .eoi = iseries_end_IRQ
  253. };
  254. /*
  255. * This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
  256. * It calculates the irq value for the slot.
  257. * Note that sub_bus is always 0 (at the moment at least).
  258. */
  259. int __init iSeries_allocate_IRQ(HvBusNumber bus,
  260. HvSubBusNumber sub_bus, u32 bsubbus)
  261. {
  262. unsigned int realirq;
  263. u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
  264. u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
  265. realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
  266. + function;
  267. return irq_create_mapping(NULL, realirq);
  268. }
  269. #endif /* CONFIG_PCI */
  270. /*
  271. * Get the next pending IRQ.
  272. */
  273. unsigned int iSeries_get_irq(void)
  274. {
  275. int irq = NO_IRQ_IGNORE;
  276. #ifdef CONFIG_SMP
  277. if (get_lppaca()->int_dword.fields.ipi_cnt) {
  278. get_lppaca()->int_dword.fields.ipi_cnt = 0;
  279. iSeries_smp_message_recv();
  280. }
  281. #endif /* CONFIG_SMP */
  282. if (hvlpevent_is_pending())
  283. process_hvlpevents();
  284. #ifdef CONFIG_PCI
  285. if (num_pending_irqs) {
  286. spin_lock(&pending_irqs_lock);
  287. for (irq = 0; irq < NR_IRQS; irq++) {
  288. if (pending_irqs[irq]) {
  289. pending_irqs[irq]--;
  290. num_pending_irqs--;
  291. break;
  292. }
  293. }
  294. spin_unlock(&pending_irqs_lock);
  295. if (irq >= NR_IRQS)
  296. irq = NO_IRQ_IGNORE;
  297. }
  298. #endif
  299. return irq;
  300. }
  301. static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
  302. irq_hw_number_t hw)
  303. {
  304. set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
  305. return 0;
  306. }
  307. static struct irq_host_ops iseries_irq_host_ops = {
  308. .map = iseries_irq_host_map,
  309. };
  310. /*
  311. * This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
  312. * It must be called before the bus walk.
  313. */
  314. void __init iSeries_init_IRQ(void)
  315. {
  316. /* Register PCI event handler and open an event path */
  317. struct irq_host *host;
  318. int ret;
  319. /*
  320. * The Hypervisor only allows us up to 256 interrupt
  321. * sources (the irq number is passed in a u8).
  322. */
  323. irq_set_virq_count(256);
  324. /* Create irq host. No need for a revmap since HV will give us
  325. * back our virtual irq number
  326. */
  327. host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &iseries_irq_host_ops, 0);
  328. BUG_ON(host == NULL);
  329. irq_set_default_host(host);
  330. ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
  331. &pci_event_handler);
  332. if (ret == 0) {
  333. ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
  334. if (ret != 0)
  335. printk(KERN_ERR "iseries_init_IRQ: open event path "
  336. "failed with rc 0x%x\n", ret);
  337. } else
  338. printk(KERN_ERR "iseries_init_IRQ: register handler "
  339. "failed with rc 0x%x\n", ret);
  340. }