setup.c 4.1 KB

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  1. /*
  2. * linux/arch/powerpc/platforms/cell/cell_setup.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. * Modified by Cell Team, IBM Deutschland Entwicklung GmbH
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * as published by the Free Software Foundation; either version
  13. * 2 of the License, or (at your option) any later version.
  14. */
  15. #undef DEBUG
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/stddef.h>
  20. #include <linux/unistd.h>
  21. #include <linux/slab.h>
  22. #include <linux/user.h>
  23. #include <linux/reboot.h>
  24. #include <linux/init.h>
  25. #include <linux/delay.h>
  26. #include <linux/irq.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/root_dev.h>
  29. #include <linux/console.h>
  30. #include <linux/mutex.h>
  31. #include <linux/memory_hotplug.h>
  32. #include <asm/mmu.h>
  33. #include <asm/processor.h>
  34. #include <asm/io.h>
  35. #include <asm/kexec.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/prom.h>
  38. #include <asm/rtas.h>
  39. #include <asm/pci-bridge.h>
  40. #include <asm/iommu.h>
  41. #include <asm/dma.h>
  42. #include <asm/machdep.h>
  43. #include <asm/time.h>
  44. #include <asm/nvram.h>
  45. #include <asm/cputable.h>
  46. #include <asm/ppc-pci.h>
  47. #include <asm/irq.h>
  48. #include <asm/spu.h>
  49. #include <asm/spu_priv1.h>
  50. #include <asm/udbg.h>
  51. #include "interrupt.h"
  52. #include "iommu.h"
  53. #include "cbe_regs.h"
  54. #include "pervasive.h"
  55. #include "ras.h"
  56. #ifdef DEBUG
  57. #define DBG(fmt...) udbg_printf(fmt)
  58. #else
  59. #define DBG(fmt...)
  60. #endif
  61. static void cell_show_cpuinfo(struct seq_file *m)
  62. {
  63. struct device_node *root;
  64. const char *model = "";
  65. root = of_find_node_by_path("/");
  66. if (root)
  67. model = get_property(root, "model", NULL);
  68. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  69. of_node_put(root);
  70. }
  71. static void cell_progress(char *s, unsigned short hex)
  72. {
  73. printk("*** %04x : %s\n", hex, s ? s : "");
  74. }
  75. static void __init cell_pcibios_fixup(void)
  76. {
  77. struct pci_dev *dev = NULL;
  78. for_each_pci_dev(dev)
  79. pci_read_irq_line(dev);
  80. }
  81. static void __init cell_init_irq(void)
  82. {
  83. iic_init_IRQ();
  84. spider_init_IRQ();
  85. }
  86. static void __init cell_setup_arch(void)
  87. {
  88. #ifdef CONFIG_SPU_BASE
  89. spu_priv1_ops = &spu_priv1_mmio_ops;
  90. #endif
  91. cbe_regs_init();
  92. #ifdef CONFIG_CBE_RAS
  93. cbe_ras_init();
  94. #endif
  95. #ifdef CONFIG_SMP
  96. smp_init_cell();
  97. #endif
  98. /* init to some ~sane value until calibrate_delay() runs */
  99. loops_per_jiffy = 50000000;
  100. if (ROOT_DEV == 0) {
  101. printk("No ramdisk, default root is /dev/hda2\n");
  102. ROOT_DEV = Root_HDA2;
  103. }
  104. /* Find and initialize PCI host bridges */
  105. init_pci_config_tokens();
  106. find_and_init_phbs();
  107. cbe_pervasive_init();
  108. #ifdef CONFIG_DUMMY_CONSOLE
  109. conswitchp = &dummy_con;
  110. #endif
  111. mmio_nvram_init();
  112. }
  113. /*
  114. * Early initialization. Relocation is on but do not reference unbolted pages
  115. */
  116. static void __init cell_init_early(void)
  117. {
  118. DBG(" -> cell_init_early()\n");
  119. cell_init_iommu();
  120. DBG(" <- cell_init_early()\n");
  121. }
  122. static int __init cell_probe(void)
  123. {
  124. unsigned long root = of_get_flat_dt_root();
  125. if (!of_flat_dt_is_compatible(root, "IBM,CBEA") &&
  126. !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
  127. return 0;
  128. hpte_init_native();
  129. return 1;
  130. }
  131. /*
  132. * Cell has no legacy IO; anything calling this function has to
  133. * fail or bad things will happen
  134. */
  135. static int cell_check_legacy_ioport(unsigned int baseport)
  136. {
  137. return -ENODEV;
  138. }
  139. define_machine(cell) {
  140. .name = "Cell",
  141. .probe = cell_probe,
  142. .setup_arch = cell_setup_arch,
  143. .init_early = cell_init_early,
  144. .show_cpuinfo = cell_show_cpuinfo,
  145. .restart = rtas_restart,
  146. .power_off = rtas_power_off,
  147. .halt = rtas_halt,
  148. .get_boot_time = rtas_get_boot_time,
  149. .get_rtc_time = rtas_get_rtc_time,
  150. .set_rtc_time = rtas_set_rtc_time,
  151. .calibrate_decr = generic_calibrate_decr,
  152. .check_legacy_ioport = cell_check_legacy_ioport,
  153. .progress = cell_progress,
  154. .init_IRQ = cell_init_irq,
  155. .pcibios_fixup = cell_pcibios_fixup,
  156. #ifdef CONFIG_KEXEC
  157. .machine_kexec = default_machine_kexec,
  158. .machine_kexec_prepare = default_machine_kexec_prepare,
  159. .machine_crash_shutdown = default_machine_crash_shutdown,
  160. #endif
  161. };