pq2ads.h 2.2 KB

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  1. /*
  2. * PQ2/mpc8260 board-specific stuff
  3. *
  4. * A collection of structures, addresses, and values associated with
  5. * the Freescale MPC8260ADS/MPC8266ADS-PCI boards.
  6. * Copied from the RPX-Classic and SBS8260 stuff.
  7. *
  8. * Author: Vitaly Bordug <vbordug@ru.mvista.com>
  9. *
  10. * Originally written by Dan Malek for Motorola MPC8260 family
  11. *
  12. * Copyright (c) 2001 Dan Malek <dan@embeddedalley.com>
  13. * Copyright (c) 2006 MontaVista Software, Inc.
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #ifdef __KERNEL__
  21. #ifndef __MACH_ADS8260_DEFS
  22. #define __MACH_ADS8260_DEFS
  23. #include <asm/ppcboot.h>
  24. /* For our show_cpuinfo hooks. */
  25. #define CPUINFO_VENDOR "Freescale Semiconductor"
  26. #define CPUINFO_MACHINE "PQ2 ADS PowerPC"
  27. /* Backword-compatibility stuff for the drivers */
  28. #define CPM_MAP_ADDR ((uint)0xf0000000)
  29. #define CPM_IRQ_OFFSET 0
  30. /* The ADS8260 has 16, 32-bit wide control/status registers, accessed
  31. * only on word boundaries.
  32. * Not all are used (yet), or are interesting to us (yet).
  33. */
  34. /* Things of interest in the CSR.
  35. */
  36. #define BCSR0_LED0 ((uint)0x02000000) /* 0 == on */
  37. #define BCSR0_LED1 ((uint)0x01000000) /* 0 == on */
  38. #define BCSR1_FETHIEN ((uint)0x08000000) /* 0 == enable*/
  39. #define BCSR1_FETH_RST ((uint)0x04000000) /* 0 == reset */
  40. #define BCSR1_RS232_EN1 ((uint)0x02000000) /* 0 ==enable */
  41. #define BCSR1_RS232_EN2 ((uint)0x01000000) /* 0 ==enable */
  42. #define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable*/
  43. #define BCSR3_FETH2_RS ((uint)0x80000000) /* 0 == reset */
  44. /* cpm serial driver works with constants below */
  45. #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET)
  46. #define SIU_INT_SMC2i ((uint)0x05+CPM_IRQ_OFFSET)
  47. #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET)
  48. #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET)
  49. #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
  50. #define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
  51. void m82xx_pci_init_irq(void);
  52. void mpc82xx_ads_show_cpuinfo(struct seq_file*);
  53. void m82xx_calibrate_decr(void);
  54. #endif /* __MACH_ADS8260_DEFS */
  55. #endif /* __KERNEL__ */