cputable.c 32 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. struct cpu_spec* cur_cpu_spec = NULL;
  20. EXPORT_SYMBOL(cur_cpu_spec);
  21. /* NOTE:
  22. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  23. * the responsibility of the appropriate CPU save/restore functions to
  24. * eventually copy these settings over. Those save/restore aren't yet
  25. * part of the cputable though. That has to be fixed for both ppc32
  26. * and ppc64
  27. */
  28. #ifdef CONFIG_PPC32
  29. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  30. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  31. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  32. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  33. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  37. #endif /* CONFIG_PPC32 */
  38. #ifdef CONFIG_PPC64
  39. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  40. extern void __restore_cpu_ppc970(void);
  41. #endif /* CONFIG_PPC64 */
  42. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  43. * ones as well...
  44. */
  45. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  46. PPC_FEATURE_HAS_MMU)
  47. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  48. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  49. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  50. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  51. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  52. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  53. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  54. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  55. PPC_FEATURE_TRUE_LE)
  56. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  57. PPC_FEATURE_TRUE_LE | \
  58. PPC_FEATURE_HAS_ALTIVEC_COMP)
  59. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  60. PPC_FEATURE_BOOKE)
  61. /* We only set the spe features if the kernel was compiled with
  62. * spe support
  63. */
  64. #ifdef CONFIG_SPE
  65. #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
  66. #else
  67. #define PPC_FEATURE_SPE_COMP 0
  68. #endif
  69. struct cpu_spec cpu_specs[] = {
  70. #ifdef CONFIG_PPC64
  71. { /* Power3 */
  72. .pvr_mask = 0xffff0000,
  73. .pvr_value = 0x00400000,
  74. .cpu_name = "POWER3 (630)",
  75. .cpu_features = CPU_FTRS_POWER3,
  76. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  77. .icache_bsize = 128,
  78. .dcache_bsize = 128,
  79. .num_pmcs = 8,
  80. .oprofile_cpu_type = "ppc64/power3",
  81. .oprofile_type = PPC_OPROFILE_RS64,
  82. .platform = "power3",
  83. },
  84. { /* Power3+ */
  85. .pvr_mask = 0xffff0000,
  86. .pvr_value = 0x00410000,
  87. .cpu_name = "POWER3 (630+)",
  88. .cpu_features = CPU_FTRS_POWER3,
  89. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  90. .icache_bsize = 128,
  91. .dcache_bsize = 128,
  92. .num_pmcs = 8,
  93. .oprofile_cpu_type = "ppc64/power3",
  94. .oprofile_type = PPC_OPROFILE_RS64,
  95. .platform = "power3",
  96. },
  97. { /* Northstar */
  98. .pvr_mask = 0xffff0000,
  99. .pvr_value = 0x00330000,
  100. .cpu_name = "RS64-II (northstar)",
  101. .cpu_features = CPU_FTRS_RS64,
  102. .cpu_user_features = COMMON_USER_PPC64,
  103. .icache_bsize = 128,
  104. .dcache_bsize = 128,
  105. .num_pmcs = 8,
  106. .oprofile_cpu_type = "ppc64/rs64",
  107. .oprofile_type = PPC_OPROFILE_RS64,
  108. .platform = "rs64",
  109. },
  110. { /* Pulsar */
  111. .pvr_mask = 0xffff0000,
  112. .pvr_value = 0x00340000,
  113. .cpu_name = "RS64-III (pulsar)",
  114. .cpu_features = CPU_FTRS_RS64,
  115. .cpu_user_features = COMMON_USER_PPC64,
  116. .icache_bsize = 128,
  117. .dcache_bsize = 128,
  118. .num_pmcs = 8,
  119. .oprofile_cpu_type = "ppc64/rs64",
  120. .oprofile_type = PPC_OPROFILE_RS64,
  121. .platform = "rs64",
  122. },
  123. { /* I-star */
  124. .pvr_mask = 0xffff0000,
  125. .pvr_value = 0x00360000,
  126. .cpu_name = "RS64-III (icestar)",
  127. .cpu_features = CPU_FTRS_RS64,
  128. .cpu_user_features = COMMON_USER_PPC64,
  129. .icache_bsize = 128,
  130. .dcache_bsize = 128,
  131. .num_pmcs = 8,
  132. .oprofile_cpu_type = "ppc64/rs64",
  133. .oprofile_type = PPC_OPROFILE_RS64,
  134. .platform = "rs64",
  135. },
  136. { /* S-star */
  137. .pvr_mask = 0xffff0000,
  138. .pvr_value = 0x00370000,
  139. .cpu_name = "RS64-IV (sstar)",
  140. .cpu_features = CPU_FTRS_RS64,
  141. .cpu_user_features = COMMON_USER_PPC64,
  142. .icache_bsize = 128,
  143. .dcache_bsize = 128,
  144. .num_pmcs = 8,
  145. .oprofile_cpu_type = "ppc64/rs64",
  146. .oprofile_type = PPC_OPROFILE_RS64,
  147. .platform = "rs64",
  148. },
  149. { /* Power4 */
  150. .pvr_mask = 0xffff0000,
  151. .pvr_value = 0x00350000,
  152. .cpu_name = "POWER4 (gp)",
  153. .cpu_features = CPU_FTRS_POWER4,
  154. .cpu_user_features = COMMON_USER_POWER4,
  155. .icache_bsize = 128,
  156. .dcache_bsize = 128,
  157. .num_pmcs = 8,
  158. .oprofile_cpu_type = "ppc64/power4",
  159. .oprofile_type = PPC_OPROFILE_POWER4,
  160. .platform = "power4",
  161. },
  162. { /* Power4+ */
  163. .pvr_mask = 0xffff0000,
  164. .pvr_value = 0x00380000,
  165. .cpu_name = "POWER4+ (gq)",
  166. .cpu_features = CPU_FTRS_POWER4,
  167. .cpu_user_features = COMMON_USER_POWER4,
  168. .icache_bsize = 128,
  169. .dcache_bsize = 128,
  170. .num_pmcs = 8,
  171. .oprofile_cpu_type = "ppc64/power4",
  172. .oprofile_type = PPC_OPROFILE_POWER4,
  173. .platform = "power4",
  174. },
  175. { /* PPC970 */
  176. .pvr_mask = 0xffff0000,
  177. .pvr_value = 0x00390000,
  178. .cpu_name = "PPC970",
  179. .cpu_features = CPU_FTRS_PPC970,
  180. .cpu_user_features = COMMON_USER_POWER4 |
  181. PPC_FEATURE_HAS_ALTIVEC_COMP,
  182. .icache_bsize = 128,
  183. .dcache_bsize = 128,
  184. .num_pmcs = 8,
  185. .cpu_setup = __setup_cpu_ppc970,
  186. .cpu_restore = __restore_cpu_ppc970,
  187. .oprofile_cpu_type = "ppc64/970",
  188. .oprofile_type = PPC_OPROFILE_POWER4,
  189. .platform = "ppc970",
  190. },
  191. { /* PPC970FX */
  192. .pvr_mask = 0xffff0000,
  193. .pvr_value = 0x003c0000,
  194. .cpu_name = "PPC970FX",
  195. .cpu_features = CPU_FTRS_PPC970,
  196. .cpu_user_features = COMMON_USER_POWER4 |
  197. PPC_FEATURE_HAS_ALTIVEC_COMP,
  198. .icache_bsize = 128,
  199. .dcache_bsize = 128,
  200. .num_pmcs = 8,
  201. .cpu_setup = __setup_cpu_ppc970,
  202. .cpu_restore = __restore_cpu_ppc970,
  203. .oprofile_cpu_type = "ppc64/970",
  204. .oprofile_type = PPC_OPROFILE_POWER4,
  205. .platform = "ppc970",
  206. },
  207. { /* PPC970MP */
  208. .pvr_mask = 0xffff0000,
  209. .pvr_value = 0x00440000,
  210. .cpu_name = "PPC970MP",
  211. .cpu_features = CPU_FTRS_PPC970,
  212. .cpu_user_features = COMMON_USER_POWER4 |
  213. PPC_FEATURE_HAS_ALTIVEC_COMP,
  214. .icache_bsize = 128,
  215. .dcache_bsize = 128,
  216. .num_pmcs = 8,
  217. .cpu_setup = __setup_cpu_ppc970,
  218. .cpu_restore = __restore_cpu_ppc970,
  219. .oprofile_cpu_type = "ppc64/970",
  220. .oprofile_type = PPC_OPROFILE_POWER4,
  221. .platform = "ppc970",
  222. },
  223. { /* Power5 GR */
  224. .pvr_mask = 0xffff0000,
  225. .pvr_value = 0x003a0000,
  226. .cpu_name = "POWER5 (gr)",
  227. .cpu_features = CPU_FTRS_POWER5,
  228. .cpu_user_features = COMMON_USER_POWER5,
  229. .icache_bsize = 128,
  230. .dcache_bsize = 128,
  231. .num_pmcs = 6,
  232. .oprofile_cpu_type = "ppc64/power5",
  233. .oprofile_type = PPC_OPROFILE_POWER4,
  234. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  235. * and above but only works on POWER5 and above
  236. */
  237. .oprofile_mmcra_sihv = MMCRA_SIHV,
  238. .oprofile_mmcra_sipr = MMCRA_SIPR,
  239. .platform = "power5",
  240. },
  241. { /* Power5 GS */
  242. .pvr_mask = 0xffff0000,
  243. .pvr_value = 0x003b0000,
  244. .cpu_name = "POWER5+ (gs)",
  245. .cpu_features = CPU_FTRS_POWER5,
  246. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  247. .icache_bsize = 128,
  248. .dcache_bsize = 128,
  249. .num_pmcs = 6,
  250. .oprofile_cpu_type = "ppc64/power5+",
  251. .oprofile_type = PPC_OPROFILE_POWER4,
  252. .oprofile_mmcra_sihv = MMCRA_SIHV,
  253. .oprofile_mmcra_sipr = MMCRA_SIPR,
  254. .platform = "power5+",
  255. },
  256. { /* Power6 */
  257. .pvr_mask = 0xffff0000,
  258. .pvr_value = 0x003e0000,
  259. .cpu_name = "POWER6",
  260. .cpu_features = CPU_FTRS_POWER6,
  261. .cpu_user_features = COMMON_USER_POWER6,
  262. .icache_bsize = 128,
  263. .dcache_bsize = 128,
  264. .num_pmcs = 6,
  265. .oprofile_cpu_type = "ppc64/power6",
  266. .oprofile_type = PPC_OPROFILE_POWER4,
  267. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  268. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  269. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  270. POWER6_MMCRA_OTHER,
  271. .platform = "power6",
  272. },
  273. { /* Cell Broadband Engine */
  274. .pvr_mask = 0xffff0000,
  275. .pvr_value = 0x00700000,
  276. .cpu_name = "Cell Broadband Engine",
  277. .cpu_features = CPU_FTRS_CELL,
  278. .cpu_user_features = COMMON_USER_PPC64 |
  279. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  280. PPC_FEATURE_SMT,
  281. .icache_bsize = 128,
  282. .dcache_bsize = 128,
  283. .platform = "ppc-cell-be",
  284. },
  285. { /* PA Semi PA6T */
  286. .pvr_mask = 0x7fff0000,
  287. .pvr_value = 0x00900000,
  288. .cpu_name = "PA6T",
  289. .cpu_features = CPU_FTRS_PA6T,
  290. .cpu_user_features = COMMON_USER_PA6T,
  291. .icache_bsize = 64,
  292. .dcache_bsize = 64,
  293. .num_pmcs = 6,
  294. .platform = "pa6t",
  295. },
  296. { /* default match */
  297. .pvr_mask = 0x00000000,
  298. .pvr_value = 0x00000000,
  299. .cpu_name = "POWER4 (compatible)",
  300. .cpu_features = CPU_FTRS_COMPATIBLE,
  301. .cpu_user_features = COMMON_USER_PPC64,
  302. .icache_bsize = 128,
  303. .dcache_bsize = 128,
  304. .num_pmcs = 6,
  305. .platform = "power4",
  306. }
  307. #endif /* CONFIG_PPC64 */
  308. #ifdef CONFIG_PPC32
  309. #if CLASSIC_PPC
  310. { /* 601 */
  311. .pvr_mask = 0xffff0000,
  312. .pvr_value = 0x00010000,
  313. .cpu_name = "601",
  314. .cpu_features = CPU_FTRS_PPC601,
  315. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  316. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  317. .icache_bsize = 32,
  318. .dcache_bsize = 32,
  319. .platform = "ppc601",
  320. },
  321. { /* 603 */
  322. .pvr_mask = 0xffff0000,
  323. .pvr_value = 0x00030000,
  324. .cpu_name = "603",
  325. .cpu_features = CPU_FTRS_603,
  326. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  327. .icache_bsize = 32,
  328. .dcache_bsize = 32,
  329. .cpu_setup = __setup_cpu_603,
  330. .platform = "ppc603",
  331. },
  332. { /* 603e */
  333. .pvr_mask = 0xffff0000,
  334. .pvr_value = 0x00060000,
  335. .cpu_name = "603e",
  336. .cpu_features = CPU_FTRS_603,
  337. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  338. .icache_bsize = 32,
  339. .dcache_bsize = 32,
  340. .cpu_setup = __setup_cpu_603,
  341. .platform = "ppc603",
  342. },
  343. { /* 603ev */
  344. .pvr_mask = 0xffff0000,
  345. .pvr_value = 0x00070000,
  346. .cpu_name = "603ev",
  347. .cpu_features = CPU_FTRS_603,
  348. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  349. .icache_bsize = 32,
  350. .dcache_bsize = 32,
  351. .cpu_setup = __setup_cpu_603,
  352. .platform = "ppc603",
  353. },
  354. { /* 604 */
  355. .pvr_mask = 0xffff0000,
  356. .pvr_value = 0x00040000,
  357. .cpu_name = "604",
  358. .cpu_features = CPU_FTRS_604,
  359. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  360. .icache_bsize = 32,
  361. .dcache_bsize = 32,
  362. .num_pmcs = 2,
  363. .cpu_setup = __setup_cpu_604,
  364. .platform = "ppc604",
  365. },
  366. { /* 604e */
  367. .pvr_mask = 0xfffff000,
  368. .pvr_value = 0x00090000,
  369. .cpu_name = "604e",
  370. .cpu_features = CPU_FTRS_604,
  371. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  372. .icache_bsize = 32,
  373. .dcache_bsize = 32,
  374. .num_pmcs = 4,
  375. .cpu_setup = __setup_cpu_604,
  376. .platform = "ppc604",
  377. },
  378. { /* 604r */
  379. .pvr_mask = 0xffff0000,
  380. .pvr_value = 0x00090000,
  381. .cpu_name = "604r",
  382. .cpu_features = CPU_FTRS_604,
  383. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  384. .icache_bsize = 32,
  385. .dcache_bsize = 32,
  386. .num_pmcs = 4,
  387. .cpu_setup = __setup_cpu_604,
  388. .platform = "ppc604",
  389. },
  390. { /* 604ev */
  391. .pvr_mask = 0xffff0000,
  392. .pvr_value = 0x000a0000,
  393. .cpu_name = "604ev",
  394. .cpu_features = CPU_FTRS_604,
  395. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  396. .icache_bsize = 32,
  397. .dcache_bsize = 32,
  398. .num_pmcs = 4,
  399. .cpu_setup = __setup_cpu_604,
  400. .platform = "ppc604",
  401. },
  402. { /* 740/750 (0x4202, don't support TAU ?) */
  403. .pvr_mask = 0xffffffff,
  404. .pvr_value = 0x00084202,
  405. .cpu_name = "740/750",
  406. .cpu_features = CPU_FTRS_740_NOTAU,
  407. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  408. .icache_bsize = 32,
  409. .dcache_bsize = 32,
  410. .num_pmcs = 4,
  411. .cpu_setup = __setup_cpu_750,
  412. .platform = "ppc750",
  413. },
  414. { /* 750CX (80100 and 8010x?) */
  415. .pvr_mask = 0xfffffff0,
  416. .pvr_value = 0x00080100,
  417. .cpu_name = "750CX",
  418. .cpu_features = CPU_FTRS_750,
  419. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  420. .icache_bsize = 32,
  421. .dcache_bsize = 32,
  422. .num_pmcs = 4,
  423. .cpu_setup = __setup_cpu_750cx,
  424. .platform = "ppc750",
  425. },
  426. { /* 750CX (82201 and 82202) */
  427. .pvr_mask = 0xfffffff0,
  428. .pvr_value = 0x00082200,
  429. .cpu_name = "750CX",
  430. .cpu_features = CPU_FTRS_750,
  431. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  432. .icache_bsize = 32,
  433. .dcache_bsize = 32,
  434. .num_pmcs = 4,
  435. .cpu_setup = __setup_cpu_750cx,
  436. .platform = "ppc750",
  437. },
  438. { /* 750CXe (82214) */
  439. .pvr_mask = 0xfffffff0,
  440. .pvr_value = 0x00082210,
  441. .cpu_name = "750CXe",
  442. .cpu_features = CPU_FTRS_750,
  443. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  444. .icache_bsize = 32,
  445. .dcache_bsize = 32,
  446. .num_pmcs = 4,
  447. .cpu_setup = __setup_cpu_750cx,
  448. .platform = "ppc750",
  449. },
  450. { /* 750CXe "Gekko" (83214) */
  451. .pvr_mask = 0xffffffff,
  452. .pvr_value = 0x00083214,
  453. .cpu_name = "750CXe",
  454. .cpu_features = CPU_FTRS_750,
  455. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  456. .icache_bsize = 32,
  457. .dcache_bsize = 32,
  458. .num_pmcs = 4,
  459. .cpu_setup = __setup_cpu_750cx,
  460. .platform = "ppc750",
  461. },
  462. { /* 745/755 */
  463. .pvr_mask = 0xfffff000,
  464. .pvr_value = 0x00083000,
  465. .cpu_name = "745/755",
  466. .cpu_features = CPU_FTRS_750,
  467. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  468. .icache_bsize = 32,
  469. .dcache_bsize = 32,
  470. .num_pmcs = 4,
  471. .cpu_setup = __setup_cpu_750,
  472. .platform = "ppc750",
  473. },
  474. { /* 750FX rev 1.x */
  475. .pvr_mask = 0xffffff00,
  476. .pvr_value = 0x70000100,
  477. .cpu_name = "750FX",
  478. .cpu_features = CPU_FTRS_750FX1,
  479. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  480. .icache_bsize = 32,
  481. .dcache_bsize = 32,
  482. .num_pmcs = 4,
  483. .cpu_setup = __setup_cpu_750,
  484. .platform = "ppc750",
  485. },
  486. { /* 750FX rev 2.0 must disable HID0[DPM] */
  487. .pvr_mask = 0xffffffff,
  488. .pvr_value = 0x70000200,
  489. .cpu_name = "750FX",
  490. .cpu_features = CPU_FTRS_750FX2,
  491. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  492. .icache_bsize = 32,
  493. .dcache_bsize = 32,
  494. .num_pmcs = 4,
  495. .cpu_setup = __setup_cpu_750,
  496. .platform = "ppc750",
  497. },
  498. { /* 750FX (All revs except 2.0) */
  499. .pvr_mask = 0xffff0000,
  500. .pvr_value = 0x70000000,
  501. .cpu_name = "750FX",
  502. .cpu_features = CPU_FTRS_750FX,
  503. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  504. .icache_bsize = 32,
  505. .dcache_bsize = 32,
  506. .num_pmcs = 4,
  507. .cpu_setup = __setup_cpu_750fx,
  508. .platform = "ppc750",
  509. },
  510. { /* 750GX */
  511. .pvr_mask = 0xffff0000,
  512. .pvr_value = 0x70020000,
  513. .cpu_name = "750GX",
  514. .cpu_features = CPU_FTRS_750GX,
  515. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  516. .icache_bsize = 32,
  517. .dcache_bsize = 32,
  518. .num_pmcs = 4,
  519. .cpu_setup = __setup_cpu_750fx,
  520. .platform = "ppc750",
  521. },
  522. { /* 740/750 (L2CR bit need fixup for 740) */
  523. .pvr_mask = 0xffff0000,
  524. .pvr_value = 0x00080000,
  525. .cpu_name = "740/750",
  526. .cpu_features = CPU_FTRS_740,
  527. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  528. .icache_bsize = 32,
  529. .dcache_bsize = 32,
  530. .num_pmcs = 4,
  531. .cpu_setup = __setup_cpu_750,
  532. .platform = "ppc750",
  533. },
  534. { /* 7400 rev 1.1 ? (no TAU) */
  535. .pvr_mask = 0xffffffff,
  536. .pvr_value = 0x000c1101,
  537. .cpu_name = "7400 (1.1)",
  538. .cpu_features = CPU_FTRS_7400_NOTAU,
  539. .cpu_user_features = COMMON_USER |
  540. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  541. .icache_bsize = 32,
  542. .dcache_bsize = 32,
  543. .num_pmcs = 4,
  544. .cpu_setup = __setup_cpu_7400,
  545. .platform = "ppc7400",
  546. },
  547. { /* 7400 */
  548. .pvr_mask = 0xffff0000,
  549. .pvr_value = 0x000c0000,
  550. .cpu_name = "7400",
  551. .cpu_features = CPU_FTRS_7400,
  552. .cpu_user_features = COMMON_USER |
  553. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  554. .icache_bsize = 32,
  555. .dcache_bsize = 32,
  556. .num_pmcs = 4,
  557. .cpu_setup = __setup_cpu_7400,
  558. .platform = "ppc7400",
  559. },
  560. { /* 7410 */
  561. .pvr_mask = 0xffff0000,
  562. .pvr_value = 0x800c0000,
  563. .cpu_name = "7410",
  564. .cpu_features = CPU_FTRS_7400,
  565. .cpu_user_features = COMMON_USER |
  566. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  567. .icache_bsize = 32,
  568. .dcache_bsize = 32,
  569. .num_pmcs = 4,
  570. .cpu_setup = __setup_cpu_7410,
  571. .platform = "ppc7400",
  572. },
  573. { /* 7450 2.0 - no doze/nap */
  574. .pvr_mask = 0xffffffff,
  575. .pvr_value = 0x80000200,
  576. .cpu_name = "7450",
  577. .cpu_features = CPU_FTRS_7450_20,
  578. .cpu_user_features = COMMON_USER |
  579. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  580. .icache_bsize = 32,
  581. .dcache_bsize = 32,
  582. .num_pmcs = 6,
  583. .cpu_setup = __setup_cpu_745x,
  584. .oprofile_cpu_type = "ppc/7450",
  585. .oprofile_type = PPC_OPROFILE_G4,
  586. .platform = "ppc7450",
  587. },
  588. { /* 7450 2.1 */
  589. .pvr_mask = 0xffffffff,
  590. .pvr_value = 0x80000201,
  591. .cpu_name = "7450",
  592. .cpu_features = CPU_FTRS_7450_21,
  593. .cpu_user_features = COMMON_USER |
  594. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  595. .icache_bsize = 32,
  596. .dcache_bsize = 32,
  597. .num_pmcs = 6,
  598. .cpu_setup = __setup_cpu_745x,
  599. .oprofile_cpu_type = "ppc/7450",
  600. .oprofile_type = PPC_OPROFILE_G4,
  601. .platform = "ppc7450",
  602. },
  603. { /* 7450 2.3 and newer */
  604. .pvr_mask = 0xffff0000,
  605. .pvr_value = 0x80000000,
  606. .cpu_name = "7450",
  607. .cpu_features = CPU_FTRS_7450_23,
  608. .cpu_user_features = COMMON_USER |
  609. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  610. .icache_bsize = 32,
  611. .dcache_bsize = 32,
  612. .num_pmcs = 6,
  613. .cpu_setup = __setup_cpu_745x,
  614. .oprofile_cpu_type = "ppc/7450",
  615. .oprofile_type = PPC_OPROFILE_G4,
  616. .platform = "ppc7450",
  617. },
  618. { /* 7455 rev 1.x */
  619. .pvr_mask = 0xffffff00,
  620. .pvr_value = 0x80010100,
  621. .cpu_name = "7455",
  622. .cpu_features = CPU_FTRS_7455_1,
  623. .cpu_user_features = COMMON_USER |
  624. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  625. .icache_bsize = 32,
  626. .dcache_bsize = 32,
  627. .num_pmcs = 6,
  628. .cpu_setup = __setup_cpu_745x,
  629. .oprofile_cpu_type = "ppc/7450",
  630. .oprofile_type = PPC_OPROFILE_G4,
  631. .platform = "ppc7450",
  632. },
  633. { /* 7455 rev 2.0 */
  634. .pvr_mask = 0xffffffff,
  635. .pvr_value = 0x80010200,
  636. .cpu_name = "7455",
  637. .cpu_features = CPU_FTRS_7455_20,
  638. .cpu_user_features = COMMON_USER |
  639. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  640. .icache_bsize = 32,
  641. .dcache_bsize = 32,
  642. .num_pmcs = 6,
  643. .cpu_setup = __setup_cpu_745x,
  644. .oprofile_cpu_type = "ppc/7450",
  645. .oprofile_type = PPC_OPROFILE_G4,
  646. .platform = "ppc7450",
  647. },
  648. { /* 7455 others */
  649. .pvr_mask = 0xffff0000,
  650. .pvr_value = 0x80010000,
  651. .cpu_name = "7455",
  652. .cpu_features = CPU_FTRS_7455,
  653. .cpu_user_features = COMMON_USER |
  654. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  655. .icache_bsize = 32,
  656. .dcache_bsize = 32,
  657. .num_pmcs = 6,
  658. .cpu_setup = __setup_cpu_745x,
  659. .oprofile_cpu_type = "ppc/7450",
  660. .oprofile_type = PPC_OPROFILE_G4,
  661. .platform = "ppc7450",
  662. },
  663. { /* 7447/7457 Rev 1.0 */
  664. .pvr_mask = 0xffffffff,
  665. .pvr_value = 0x80020100,
  666. .cpu_name = "7447/7457",
  667. .cpu_features = CPU_FTRS_7447_10,
  668. .cpu_user_features = COMMON_USER |
  669. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  670. .icache_bsize = 32,
  671. .dcache_bsize = 32,
  672. .num_pmcs = 6,
  673. .cpu_setup = __setup_cpu_745x,
  674. .oprofile_cpu_type = "ppc/7450",
  675. .oprofile_type = PPC_OPROFILE_G4,
  676. .platform = "ppc7450",
  677. },
  678. { /* 7447/7457 Rev 1.1 */
  679. .pvr_mask = 0xffffffff,
  680. .pvr_value = 0x80020101,
  681. .cpu_name = "7447/7457",
  682. .cpu_features = CPU_FTRS_7447_10,
  683. .cpu_user_features = COMMON_USER |
  684. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  685. .icache_bsize = 32,
  686. .dcache_bsize = 32,
  687. .num_pmcs = 6,
  688. .cpu_setup = __setup_cpu_745x,
  689. .oprofile_cpu_type = "ppc/7450",
  690. .oprofile_type = PPC_OPROFILE_G4,
  691. .platform = "ppc7450",
  692. },
  693. { /* 7447/7457 Rev 1.2 and later */
  694. .pvr_mask = 0xffff0000,
  695. .pvr_value = 0x80020000,
  696. .cpu_name = "7447/7457",
  697. .cpu_features = CPU_FTRS_7447,
  698. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  699. .icache_bsize = 32,
  700. .dcache_bsize = 32,
  701. .num_pmcs = 6,
  702. .cpu_setup = __setup_cpu_745x,
  703. .oprofile_cpu_type = "ppc/7450",
  704. .oprofile_type = PPC_OPROFILE_G4,
  705. .platform = "ppc7450",
  706. },
  707. { /* 7447A */
  708. .pvr_mask = 0xffff0000,
  709. .pvr_value = 0x80030000,
  710. .cpu_name = "7447A",
  711. .cpu_features = CPU_FTRS_7447A,
  712. .cpu_user_features = COMMON_USER |
  713. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  714. .icache_bsize = 32,
  715. .dcache_bsize = 32,
  716. .num_pmcs = 6,
  717. .cpu_setup = __setup_cpu_745x,
  718. .oprofile_cpu_type = "ppc/7450",
  719. .oprofile_type = PPC_OPROFILE_G4,
  720. .platform = "ppc7450",
  721. },
  722. { /* 7448 */
  723. .pvr_mask = 0xffff0000,
  724. .pvr_value = 0x80040000,
  725. .cpu_name = "7448",
  726. .cpu_features = CPU_FTRS_7447A,
  727. .cpu_user_features = COMMON_USER |
  728. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  729. .icache_bsize = 32,
  730. .dcache_bsize = 32,
  731. .num_pmcs = 6,
  732. .cpu_setup = __setup_cpu_745x,
  733. .oprofile_cpu_type = "ppc/7450",
  734. .oprofile_type = PPC_OPROFILE_G4,
  735. .platform = "ppc7450",
  736. },
  737. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  738. .pvr_mask = 0x7fff0000,
  739. .pvr_value = 0x00810000,
  740. .cpu_name = "82xx",
  741. .cpu_features = CPU_FTRS_82XX,
  742. .cpu_user_features = COMMON_USER,
  743. .icache_bsize = 32,
  744. .dcache_bsize = 32,
  745. .cpu_setup = __setup_cpu_603,
  746. .platform = "ppc603",
  747. },
  748. { /* All G2_LE (603e core, plus some) have the same pvr */
  749. .pvr_mask = 0x7fff0000,
  750. .pvr_value = 0x00820000,
  751. .cpu_name = "G2_LE",
  752. .cpu_features = CPU_FTRS_G2_LE,
  753. .cpu_user_features = COMMON_USER,
  754. .icache_bsize = 32,
  755. .dcache_bsize = 32,
  756. .cpu_setup = __setup_cpu_603,
  757. .platform = "ppc603",
  758. },
  759. { /* e300c1 (a 603e core, plus some) on 83xx */
  760. .pvr_mask = 0x7fff0000,
  761. .pvr_value = 0x00830000,
  762. .cpu_name = "e300c1",
  763. .cpu_features = CPU_FTRS_E300,
  764. .cpu_user_features = COMMON_USER,
  765. .icache_bsize = 32,
  766. .dcache_bsize = 32,
  767. .cpu_setup = __setup_cpu_603,
  768. .platform = "ppc603",
  769. },
  770. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  771. .pvr_mask = 0x7fff0000,
  772. .pvr_value = 0x00840000,
  773. .cpu_name = "e300c2",
  774. .cpu_features = CPU_FTRS_E300,
  775. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  776. .icache_bsize = 32,
  777. .dcache_bsize = 32,
  778. .cpu_setup = __setup_cpu_603,
  779. .platform = "ppc603",
  780. },
  781. { /* default match, we assume split I/D cache & TB (non-601)... */
  782. .pvr_mask = 0x00000000,
  783. .pvr_value = 0x00000000,
  784. .cpu_name = "(generic PPC)",
  785. .cpu_features = CPU_FTRS_CLASSIC32,
  786. .cpu_user_features = COMMON_USER,
  787. .icache_bsize = 32,
  788. .dcache_bsize = 32,
  789. .platform = "ppc603",
  790. },
  791. #endif /* CLASSIC_PPC */
  792. #ifdef CONFIG_8xx
  793. { /* 8xx */
  794. .pvr_mask = 0xffff0000,
  795. .pvr_value = 0x00500000,
  796. .cpu_name = "8xx",
  797. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  798. * if the 8xx code is there.... */
  799. .cpu_features = CPU_FTRS_8XX,
  800. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  801. .icache_bsize = 16,
  802. .dcache_bsize = 16,
  803. .platform = "ppc823",
  804. },
  805. #endif /* CONFIG_8xx */
  806. #ifdef CONFIG_40x
  807. { /* 403GC */
  808. .pvr_mask = 0xffffff00,
  809. .pvr_value = 0x00200200,
  810. .cpu_name = "403GC",
  811. .cpu_features = CPU_FTRS_40X,
  812. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  813. .icache_bsize = 16,
  814. .dcache_bsize = 16,
  815. .platform = "ppc403",
  816. },
  817. { /* 403GCX */
  818. .pvr_mask = 0xffffff00,
  819. .pvr_value = 0x00201400,
  820. .cpu_name = "403GCX",
  821. .cpu_features = CPU_FTRS_40X,
  822. .cpu_user_features = PPC_FEATURE_32 |
  823. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  824. .icache_bsize = 16,
  825. .dcache_bsize = 16,
  826. .platform = "ppc403",
  827. },
  828. { /* 403G ?? */
  829. .pvr_mask = 0xffff0000,
  830. .pvr_value = 0x00200000,
  831. .cpu_name = "403G ??",
  832. .cpu_features = CPU_FTRS_40X,
  833. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  834. .icache_bsize = 16,
  835. .dcache_bsize = 16,
  836. .platform = "ppc403",
  837. },
  838. { /* 405GP */
  839. .pvr_mask = 0xffff0000,
  840. .pvr_value = 0x40110000,
  841. .cpu_name = "405GP",
  842. .cpu_features = CPU_FTRS_40X,
  843. .cpu_user_features = PPC_FEATURE_32 |
  844. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  845. .icache_bsize = 32,
  846. .dcache_bsize = 32,
  847. .platform = "ppc405",
  848. },
  849. { /* STB 03xxx */
  850. .pvr_mask = 0xffff0000,
  851. .pvr_value = 0x40130000,
  852. .cpu_name = "STB03xxx",
  853. .cpu_features = CPU_FTRS_40X,
  854. .cpu_user_features = PPC_FEATURE_32 |
  855. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  856. .icache_bsize = 32,
  857. .dcache_bsize = 32,
  858. .platform = "ppc405",
  859. },
  860. { /* STB 04xxx */
  861. .pvr_mask = 0xffff0000,
  862. .pvr_value = 0x41810000,
  863. .cpu_name = "STB04xxx",
  864. .cpu_features = CPU_FTRS_40X,
  865. .cpu_user_features = PPC_FEATURE_32 |
  866. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  867. .icache_bsize = 32,
  868. .dcache_bsize = 32,
  869. .platform = "ppc405",
  870. },
  871. { /* NP405L */
  872. .pvr_mask = 0xffff0000,
  873. .pvr_value = 0x41610000,
  874. .cpu_name = "NP405L",
  875. .cpu_features = CPU_FTRS_40X,
  876. .cpu_user_features = PPC_FEATURE_32 |
  877. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  878. .icache_bsize = 32,
  879. .dcache_bsize = 32,
  880. .platform = "ppc405",
  881. },
  882. { /* NP4GS3 */
  883. .pvr_mask = 0xffff0000,
  884. .pvr_value = 0x40B10000,
  885. .cpu_name = "NP4GS3",
  886. .cpu_features = CPU_FTRS_40X,
  887. .cpu_user_features = PPC_FEATURE_32 |
  888. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  889. .icache_bsize = 32,
  890. .dcache_bsize = 32,
  891. .platform = "ppc405",
  892. },
  893. { /* NP405H */
  894. .pvr_mask = 0xffff0000,
  895. .pvr_value = 0x41410000,
  896. .cpu_name = "NP405H",
  897. .cpu_features = CPU_FTRS_40X,
  898. .cpu_user_features = PPC_FEATURE_32 |
  899. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  900. .icache_bsize = 32,
  901. .dcache_bsize = 32,
  902. .platform = "ppc405",
  903. },
  904. { /* 405GPr */
  905. .pvr_mask = 0xffff0000,
  906. .pvr_value = 0x50910000,
  907. .cpu_name = "405GPr",
  908. .cpu_features = CPU_FTRS_40X,
  909. .cpu_user_features = PPC_FEATURE_32 |
  910. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  911. .icache_bsize = 32,
  912. .dcache_bsize = 32,
  913. .platform = "ppc405",
  914. },
  915. { /* STBx25xx */
  916. .pvr_mask = 0xffff0000,
  917. .pvr_value = 0x51510000,
  918. .cpu_name = "STBx25xx",
  919. .cpu_features = CPU_FTRS_40X,
  920. .cpu_user_features = PPC_FEATURE_32 |
  921. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  922. .icache_bsize = 32,
  923. .dcache_bsize = 32,
  924. .platform = "ppc405",
  925. },
  926. { /* 405LP */
  927. .pvr_mask = 0xffff0000,
  928. .pvr_value = 0x41F10000,
  929. .cpu_name = "405LP",
  930. .cpu_features = CPU_FTRS_40X,
  931. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  932. .icache_bsize = 32,
  933. .dcache_bsize = 32,
  934. .platform = "ppc405",
  935. },
  936. { /* Xilinx Virtex-II Pro */
  937. .pvr_mask = 0xfffff000,
  938. .pvr_value = 0x20010000,
  939. .cpu_name = "Virtex-II Pro",
  940. .cpu_features = CPU_FTRS_40X,
  941. .cpu_user_features = PPC_FEATURE_32 |
  942. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  943. .icache_bsize = 32,
  944. .dcache_bsize = 32,
  945. .platform = "ppc405",
  946. },
  947. { /* Xilinx Virtex-4 FX */
  948. .pvr_mask = 0xfffff000,
  949. .pvr_value = 0x20011000,
  950. .cpu_name = "Virtex-4 FX",
  951. .cpu_features = CPU_FTRS_40X,
  952. .cpu_user_features = PPC_FEATURE_32 |
  953. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  954. .icache_bsize = 32,
  955. .dcache_bsize = 32,
  956. .platform = "ppc405",
  957. },
  958. { /* 405EP */
  959. .pvr_mask = 0xffff0000,
  960. .pvr_value = 0x51210000,
  961. .cpu_name = "405EP",
  962. .cpu_features = CPU_FTRS_40X,
  963. .cpu_user_features = PPC_FEATURE_32 |
  964. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  965. .icache_bsize = 32,
  966. .dcache_bsize = 32,
  967. .platform = "ppc405",
  968. },
  969. #endif /* CONFIG_40x */
  970. #ifdef CONFIG_44x
  971. {
  972. .pvr_mask = 0xf0000fff,
  973. .pvr_value = 0x40000850,
  974. .cpu_name = "440EP Rev. A",
  975. .cpu_features = CPU_FTRS_44X,
  976. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  977. .icache_bsize = 32,
  978. .dcache_bsize = 32,
  979. .platform = "ppc440",
  980. },
  981. {
  982. .pvr_mask = 0xf0000fff,
  983. .pvr_value = 0x400008d3,
  984. .cpu_name = "440EP Rev. B",
  985. .cpu_features = CPU_FTRS_44X,
  986. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  987. .icache_bsize = 32,
  988. .dcache_bsize = 32,
  989. .platform = "ppc440",
  990. },
  991. { /* 440GP Rev. B */
  992. .pvr_mask = 0xf0000fff,
  993. .pvr_value = 0x40000440,
  994. .cpu_name = "440GP Rev. B",
  995. .cpu_features = CPU_FTRS_44X,
  996. .cpu_user_features = COMMON_USER_BOOKE,
  997. .icache_bsize = 32,
  998. .dcache_bsize = 32,
  999. .platform = "ppc440gp",
  1000. },
  1001. { /* 440GP Rev. C */
  1002. .pvr_mask = 0xf0000fff,
  1003. .pvr_value = 0x40000481,
  1004. .cpu_name = "440GP Rev. C",
  1005. .cpu_features = CPU_FTRS_44X,
  1006. .cpu_user_features = COMMON_USER_BOOKE,
  1007. .icache_bsize = 32,
  1008. .dcache_bsize = 32,
  1009. .platform = "ppc440gp",
  1010. },
  1011. { /* 440GX Rev. A */
  1012. .pvr_mask = 0xf0000fff,
  1013. .pvr_value = 0x50000850,
  1014. .cpu_name = "440GX Rev. A",
  1015. .cpu_features = CPU_FTRS_44X,
  1016. .cpu_user_features = COMMON_USER_BOOKE,
  1017. .icache_bsize = 32,
  1018. .dcache_bsize = 32,
  1019. .platform = "ppc440",
  1020. },
  1021. { /* 440GX Rev. B */
  1022. .pvr_mask = 0xf0000fff,
  1023. .pvr_value = 0x50000851,
  1024. .cpu_name = "440GX Rev. B",
  1025. .cpu_features = CPU_FTRS_44X,
  1026. .cpu_user_features = COMMON_USER_BOOKE,
  1027. .icache_bsize = 32,
  1028. .dcache_bsize = 32,
  1029. .platform = "ppc440",
  1030. },
  1031. { /* 440GX Rev. C */
  1032. .pvr_mask = 0xf0000fff,
  1033. .pvr_value = 0x50000892,
  1034. .cpu_name = "440GX Rev. C",
  1035. .cpu_features = CPU_FTRS_44X,
  1036. .cpu_user_features = COMMON_USER_BOOKE,
  1037. .icache_bsize = 32,
  1038. .dcache_bsize = 32,
  1039. .platform = "ppc440",
  1040. },
  1041. { /* 440GX Rev. F */
  1042. .pvr_mask = 0xf0000fff,
  1043. .pvr_value = 0x50000894,
  1044. .cpu_name = "440GX Rev. F",
  1045. .cpu_features = CPU_FTRS_44X,
  1046. .cpu_user_features = COMMON_USER_BOOKE,
  1047. .icache_bsize = 32,
  1048. .dcache_bsize = 32,
  1049. .platform = "ppc440",
  1050. },
  1051. { /* 440SP Rev. A */
  1052. .pvr_mask = 0xff000fff,
  1053. .pvr_value = 0x53000891,
  1054. .cpu_name = "440SP Rev. A",
  1055. .cpu_features = CPU_FTRS_44X,
  1056. .cpu_user_features = COMMON_USER_BOOKE,
  1057. .icache_bsize = 32,
  1058. .dcache_bsize = 32,
  1059. .platform = "ppc440",
  1060. },
  1061. { /* 440SPe Rev. A */
  1062. .pvr_mask = 0xff000fff,
  1063. .pvr_value = 0x53000890,
  1064. .cpu_name = "440SPe Rev. A",
  1065. .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
  1066. CPU_FTR_USE_TB,
  1067. .cpu_user_features = COMMON_USER_BOOKE,
  1068. .icache_bsize = 32,
  1069. .dcache_bsize = 32,
  1070. .platform = "ppc440",
  1071. },
  1072. #endif /* CONFIG_44x */
  1073. #ifdef CONFIG_FSL_BOOKE
  1074. { /* e200z5 */
  1075. .pvr_mask = 0xfff00000,
  1076. .pvr_value = 0x81000000,
  1077. .cpu_name = "e200z5",
  1078. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1079. .cpu_features = CPU_FTRS_E200,
  1080. .cpu_user_features = COMMON_USER_BOOKE |
  1081. PPC_FEATURE_HAS_EFP_SINGLE |
  1082. PPC_FEATURE_UNIFIED_CACHE,
  1083. .dcache_bsize = 32,
  1084. .platform = "ppc5554",
  1085. },
  1086. { /* e200z6 */
  1087. .pvr_mask = 0xfff00000,
  1088. .pvr_value = 0x81100000,
  1089. .cpu_name = "e200z6",
  1090. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1091. .cpu_features = CPU_FTRS_E200,
  1092. .cpu_user_features = COMMON_USER_BOOKE |
  1093. PPC_FEATURE_SPE_COMP |
  1094. PPC_FEATURE_HAS_EFP_SINGLE |
  1095. PPC_FEATURE_UNIFIED_CACHE,
  1096. .dcache_bsize = 32,
  1097. .platform = "ppc5554",
  1098. },
  1099. { /* e500 */
  1100. .pvr_mask = 0xffff0000,
  1101. .pvr_value = 0x80200000,
  1102. .cpu_name = "e500",
  1103. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1104. .cpu_features = CPU_FTRS_E500,
  1105. .cpu_user_features = COMMON_USER_BOOKE |
  1106. PPC_FEATURE_SPE_COMP |
  1107. PPC_FEATURE_HAS_EFP_SINGLE,
  1108. .icache_bsize = 32,
  1109. .dcache_bsize = 32,
  1110. .num_pmcs = 4,
  1111. .oprofile_cpu_type = "ppc/e500",
  1112. .oprofile_type = PPC_OPROFILE_BOOKE,
  1113. .platform = "ppc8540",
  1114. },
  1115. { /* e500v2 */
  1116. .pvr_mask = 0xffff0000,
  1117. .pvr_value = 0x80210000,
  1118. .cpu_name = "e500v2",
  1119. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1120. .cpu_features = CPU_FTRS_E500_2,
  1121. .cpu_user_features = COMMON_USER_BOOKE |
  1122. PPC_FEATURE_SPE_COMP |
  1123. PPC_FEATURE_HAS_EFP_SINGLE |
  1124. PPC_FEATURE_HAS_EFP_DOUBLE,
  1125. .icache_bsize = 32,
  1126. .dcache_bsize = 32,
  1127. .num_pmcs = 4,
  1128. .oprofile_cpu_type = "ppc/e500",
  1129. .oprofile_type = PPC_OPROFILE_BOOKE,
  1130. .platform = "ppc8548",
  1131. },
  1132. #endif
  1133. #if !CLASSIC_PPC
  1134. { /* default match */
  1135. .pvr_mask = 0x00000000,
  1136. .pvr_value = 0x00000000,
  1137. .cpu_name = "(generic PPC)",
  1138. .cpu_features = CPU_FTRS_GENERIC_32,
  1139. .cpu_user_features = PPC_FEATURE_32,
  1140. .icache_bsize = 32,
  1141. .dcache_bsize = 32,
  1142. .platform = "powerpc",
  1143. }
  1144. #endif /* !CLASSIC_PPC */
  1145. #endif /* CONFIG_PPC32 */
  1146. };