pci-dma.c 16 KB

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  1. /*
  2. ** PARISC 1.1 Dynamic DMA mapping support.
  3. ** This implementation is for PA-RISC platforms that do not support
  4. ** I/O TLBs (aka DMA address translation hardware).
  5. ** See Documentation/DMA-mapping.txt for interface definitions.
  6. **
  7. ** (c) Copyright 1999,2000 Hewlett-Packard Company
  8. ** (c) Copyright 2000 Grant Grundler
  9. ** (c) Copyright 2000 Philipp Rumpf <prumpf@tux.org>
  10. ** (c) Copyright 2000 John Marvin
  11. **
  12. ** "leveraged" from 2.3.47: arch/ia64/kernel/pci-dma.c.
  13. ** (I assume it's from David Mosberger-Tang but there was no Copyright)
  14. **
  15. ** AFAIK, all PA7100LC and PA7300LC platforms can use this code.
  16. **
  17. ** - ggg
  18. */
  19. #include <linux/init.h>
  20. #include <linux/mm.h>
  21. #include <linux/pci.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/slab.h>
  24. #include <linux/string.h>
  25. #include <linux/types.h>
  26. #include <asm/cacheflush.h>
  27. #include <asm/dma.h> /* for DMA_CHUNK_SIZE */
  28. #include <asm/io.h>
  29. #include <asm/page.h> /* get_order */
  30. #include <asm/pgalloc.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/tlbflush.h> /* for purge_tlb_*() macros */
  33. static struct proc_dir_entry * proc_gsc_root __read_mostly = NULL;
  34. static int pcxl_proc_info(char *buffer, char **start, off_t offset, int length);
  35. static unsigned long pcxl_used_bytes __read_mostly = 0;
  36. static unsigned long pcxl_used_pages __read_mostly = 0;
  37. extern unsigned long pcxl_dma_start; /* Start of pcxl dma mapping area */
  38. static spinlock_t pcxl_res_lock;
  39. static char *pcxl_res_map;
  40. static int pcxl_res_hint;
  41. static int pcxl_res_size;
  42. #ifdef DEBUG_PCXL_RESOURCE
  43. #define DBG_RES(x...) printk(x)
  44. #else
  45. #define DBG_RES(x...)
  46. #endif
  47. /*
  48. ** Dump a hex representation of the resource map.
  49. */
  50. #ifdef DUMP_RESMAP
  51. static
  52. void dump_resmap(void)
  53. {
  54. u_long *res_ptr = (unsigned long *)pcxl_res_map;
  55. u_long i = 0;
  56. printk("res_map: ");
  57. for(; i < (pcxl_res_size / sizeof(unsigned long)); ++i, ++res_ptr)
  58. printk("%08lx ", *res_ptr);
  59. printk("\n");
  60. }
  61. #else
  62. static inline void dump_resmap(void) {;}
  63. #endif
  64. static int pa11_dma_supported( struct device *dev, u64 mask)
  65. {
  66. return 1;
  67. }
  68. static inline int map_pte_uncached(pte_t * pte,
  69. unsigned long vaddr,
  70. unsigned long size, unsigned long *paddr_ptr)
  71. {
  72. unsigned long end;
  73. unsigned long orig_vaddr = vaddr;
  74. vaddr &= ~PMD_MASK;
  75. end = vaddr + size;
  76. if (end > PMD_SIZE)
  77. end = PMD_SIZE;
  78. do {
  79. if (!pte_none(*pte))
  80. printk(KERN_ERR "map_pte_uncached: page already exists\n");
  81. set_pte(pte, __mk_pte(*paddr_ptr, PAGE_KERNEL_UNC));
  82. purge_tlb_start();
  83. pdtlb_kernel(orig_vaddr);
  84. purge_tlb_end();
  85. vaddr += PAGE_SIZE;
  86. orig_vaddr += PAGE_SIZE;
  87. (*paddr_ptr) += PAGE_SIZE;
  88. pte++;
  89. } while (vaddr < end);
  90. return 0;
  91. }
  92. static inline int map_pmd_uncached(pmd_t * pmd, unsigned long vaddr,
  93. unsigned long size, unsigned long *paddr_ptr)
  94. {
  95. unsigned long end;
  96. unsigned long orig_vaddr = vaddr;
  97. vaddr &= ~PGDIR_MASK;
  98. end = vaddr + size;
  99. if (end > PGDIR_SIZE)
  100. end = PGDIR_SIZE;
  101. do {
  102. pte_t * pte = pte_alloc_kernel(pmd, vaddr);
  103. if (!pte)
  104. return -ENOMEM;
  105. if (map_pte_uncached(pte, orig_vaddr, end - vaddr, paddr_ptr))
  106. return -ENOMEM;
  107. vaddr = (vaddr + PMD_SIZE) & PMD_MASK;
  108. orig_vaddr += PMD_SIZE;
  109. pmd++;
  110. } while (vaddr < end);
  111. return 0;
  112. }
  113. static inline int map_uncached_pages(unsigned long vaddr, unsigned long size,
  114. unsigned long paddr)
  115. {
  116. pgd_t * dir;
  117. unsigned long end = vaddr + size;
  118. dir = pgd_offset_k(vaddr);
  119. do {
  120. pmd_t *pmd;
  121. pmd = pmd_alloc(NULL, dir, vaddr);
  122. if (!pmd)
  123. return -ENOMEM;
  124. if (map_pmd_uncached(pmd, vaddr, end - vaddr, &paddr))
  125. return -ENOMEM;
  126. vaddr = vaddr + PGDIR_SIZE;
  127. dir++;
  128. } while (vaddr && (vaddr < end));
  129. return 0;
  130. }
  131. static inline void unmap_uncached_pte(pmd_t * pmd, unsigned long vaddr,
  132. unsigned long size)
  133. {
  134. pte_t * pte;
  135. unsigned long end;
  136. unsigned long orig_vaddr = vaddr;
  137. if (pmd_none(*pmd))
  138. return;
  139. if (pmd_bad(*pmd)) {
  140. pmd_ERROR(*pmd);
  141. pmd_clear(pmd);
  142. return;
  143. }
  144. pte = pte_offset_map(pmd, vaddr);
  145. vaddr &= ~PMD_MASK;
  146. end = vaddr + size;
  147. if (end > PMD_SIZE)
  148. end = PMD_SIZE;
  149. do {
  150. pte_t page = *pte;
  151. pte_clear(&init_mm, vaddr, pte);
  152. purge_tlb_start();
  153. pdtlb_kernel(orig_vaddr);
  154. purge_tlb_end();
  155. vaddr += PAGE_SIZE;
  156. orig_vaddr += PAGE_SIZE;
  157. pte++;
  158. if (pte_none(page) || pte_present(page))
  159. continue;
  160. printk(KERN_CRIT "Whee.. Swapped out page in kernel page table\n");
  161. } while (vaddr < end);
  162. }
  163. static inline void unmap_uncached_pmd(pgd_t * dir, unsigned long vaddr,
  164. unsigned long size)
  165. {
  166. pmd_t * pmd;
  167. unsigned long end;
  168. unsigned long orig_vaddr = vaddr;
  169. if (pgd_none(*dir))
  170. return;
  171. if (pgd_bad(*dir)) {
  172. pgd_ERROR(*dir);
  173. pgd_clear(dir);
  174. return;
  175. }
  176. pmd = pmd_offset(dir, vaddr);
  177. vaddr &= ~PGDIR_MASK;
  178. end = vaddr + size;
  179. if (end > PGDIR_SIZE)
  180. end = PGDIR_SIZE;
  181. do {
  182. unmap_uncached_pte(pmd, orig_vaddr, end - vaddr);
  183. vaddr = (vaddr + PMD_SIZE) & PMD_MASK;
  184. orig_vaddr += PMD_SIZE;
  185. pmd++;
  186. } while (vaddr < end);
  187. }
  188. static void unmap_uncached_pages(unsigned long vaddr, unsigned long size)
  189. {
  190. pgd_t * dir;
  191. unsigned long end = vaddr + size;
  192. dir = pgd_offset_k(vaddr);
  193. do {
  194. unmap_uncached_pmd(dir, vaddr, end - vaddr);
  195. vaddr = vaddr + PGDIR_SIZE;
  196. dir++;
  197. } while (vaddr && (vaddr < end));
  198. }
  199. #define PCXL_SEARCH_LOOP(idx, mask, size) \
  200. for(; res_ptr < res_end; ++res_ptr) \
  201. { \
  202. if(0 == ((*res_ptr) & mask)) { \
  203. *res_ptr |= mask; \
  204. idx = (int)((u_long)res_ptr - (u_long)pcxl_res_map); \
  205. pcxl_res_hint = idx + (size >> 3); \
  206. goto resource_found; \
  207. } \
  208. }
  209. #define PCXL_FIND_FREE_MAPPING(idx, mask, size) { \
  210. u##size *res_ptr = (u##size *)&(pcxl_res_map[pcxl_res_hint & ~((size >> 3) - 1)]); \
  211. u##size *res_end = (u##size *)&pcxl_res_map[pcxl_res_size]; \
  212. PCXL_SEARCH_LOOP(idx, mask, size); \
  213. res_ptr = (u##size *)&pcxl_res_map[0]; \
  214. PCXL_SEARCH_LOOP(idx, mask, size); \
  215. }
  216. unsigned long
  217. pcxl_alloc_range(size_t size)
  218. {
  219. int res_idx;
  220. u_long mask, flags;
  221. unsigned int pages_needed = size >> PAGE_SHIFT;
  222. mask = (u_long) -1L;
  223. mask >>= BITS_PER_LONG - pages_needed;
  224. DBG_RES("pcxl_alloc_range() size: %d pages_needed %d pages_mask 0x%08lx\n",
  225. size, pages_needed, mask);
  226. spin_lock_irqsave(&pcxl_res_lock, flags);
  227. if(pages_needed <= 8) {
  228. PCXL_FIND_FREE_MAPPING(res_idx, mask, 8);
  229. } else if(pages_needed <= 16) {
  230. PCXL_FIND_FREE_MAPPING(res_idx, mask, 16);
  231. } else if(pages_needed <= 32) {
  232. PCXL_FIND_FREE_MAPPING(res_idx, mask, 32);
  233. } else {
  234. panic("%s: pcxl_alloc_range() Too many pages to map.\n",
  235. __FILE__);
  236. }
  237. dump_resmap();
  238. panic("%s: pcxl_alloc_range() out of dma mapping resources\n",
  239. __FILE__);
  240. resource_found:
  241. DBG_RES("pcxl_alloc_range() res_idx %d mask 0x%08lx res_hint: %d\n",
  242. res_idx, mask, pcxl_res_hint);
  243. pcxl_used_pages += pages_needed;
  244. pcxl_used_bytes += ((pages_needed >> 3) ? (pages_needed >> 3) : 1);
  245. spin_unlock_irqrestore(&pcxl_res_lock, flags);
  246. dump_resmap();
  247. /*
  248. ** return the corresponding vaddr in the pcxl dma map
  249. */
  250. return (pcxl_dma_start + (res_idx << (PAGE_SHIFT + 3)));
  251. }
  252. #define PCXL_FREE_MAPPINGS(idx, m, size) \
  253. u##size *res_ptr = (u##size *)&(pcxl_res_map[(idx) + (((size >> 3) - 1) & (~((size >> 3) - 1)))]); \
  254. /* BUG_ON((*res_ptr & m) != m); */ \
  255. *res_ptr &= ~m;
  256. /*
  257. ** clear bits in the pcxl resource map
  258. */
  259. static void
  260. pcxl_free_range(unsigned long vaddr, size_t size)
  261. {
  262. u_long mask, flags;
  263. unsigned int res_idx = (vaddr - pcxl_dma_start) >> (PAGE_SHIFT + 3);
  264. unsigned int pages_mapped = size >> PAGE_SHIFT;
  265. mask = (u_long) -1L;
  266. mask >>= BITS_PER_LONG - pages_mapped;
  267. DBG_RES("pcxl_free_range() res_idx: %d size: %d pages_mapped %d mask 0x%08lx\n",
  268. res_idx, size, pages_mapped, mask);
  269. spin_lock_irqsave(&pcxl_res_lock, flags);
  270. if(pages_mapped <= 8) {
  271. PCXL_FREE_MAPPINGS(res_idx, mask, 8);
  272. } else if(pages_mapped <= 16) {
  273. PCXL_FREE_MAPPINGS(res_idx, mask, 16);
  274. } else if(pages_mapped <= 32) {
  275. PCXL_FREE_MAPPINGS(res_idx, mask, 32);
  276. } else {
  277. panic("%s: pcxl_free_range() Too many pages to unmap.\n",
  278. __FILE__);
  279. }
  280. pcxl_used_pages -= (pages_mapped ? pages_mapped : 1);
  281. pcxl_used_bytes -= ((pages_mapped >> 3) ? (pages_mapped >> 3) : 1);
  282. spin_unlock_irqrestore(&pcxl_res_lock, flags);
  283. dump_resmap();
  284. }
  285. static int __init
  286. pcxl_dma_init(void)
  287. {
  288. if (pcxl_dma_start == 0)
  289. return 0;
  290. spin_lock_init(&pcxl_res_lock);
  291. pcxl_res_size = PCXL_DMA_MAP_SIZE >> (PAGE_SHIFT + 3);
  292. pcxl_res_hint = 0;
  293. pcxl_res_map = (char *)__get_free_pages(GFP_KERNEL,
  294. get_order(pcxl_res_size));
  295. memset(pcxl_res_map, 0, pcxl_res_size);
  296. proc_gsc_root = proc_mkdir("gsc", 0);
  297. if (!proc_gsc_root)
  298. printk(KERN_WARNING
  299. "pcxl_dma_init: Unable to create gsc /proc dir entry\n");
  300. else {
  301. struct proc_dir_entry* ent;
  302. ent = create_proc_info_entry("pcxl_dma", 0,
  303. proc_gsc_root, pcxl_proc_info);
  304. if (!ent)
  305. printk(KERN_WARNING
  306. "pci-dma.c: Unable to create pcxl_dma /proc entry.\n");
  307. }
  308. return 0;
  309. }
  310. __initcall(pcxl_dma_init);
  311. static void * pa11_dma_alloc_consistent (struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag)
  312. {
  313. unsigned long vaddr;
  314. unsigned long paddr;
  315. int order;
  316. order = get_order(size);
  317. size = 1 << (order + PAGE_SHIFT);
  318. vaddr = pcxl_alloc_range(size);
  319. paddr = __get_free_pages(flag, order);
  320. flush_kernel_dcache_range(paddr, size);
  321. paddr = __pa(paddr);
  322. map_uncached_pages(vaddr, size, paddr);
  323. *dma_handle = (dma_addr_t) paddr;
  324. #if 0
  325. /* This probably isn't needed to support EISA cards.
  326. ** ISA cards will certainly only support 24-bit DMA addressing.
  327. ** Not clear if we can, want, or need to support ISA.
  328. */
  329. if (!dev || *dev->coherent_dma_mask < 0xffffffff)
  330. gfp |= GFP_DMA;
  331. #endif
  332. return (void *)vaddr;
  333. }
  334. static void pa11_dma_free_consistent (struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle)
  335. {
  336. int order;
  337. order = get_order(size);
  338. size = 1 << (order + PAGE_SHIFT);
  339. unmap_uncached_pages((unsigned long)vaddr, size);
  340. pcxl_free_range((unsigned long)vaddr, size);
  341. free_pages((unsigned long)__va(dma_handle), order);
  342. }
  343. static dma_addr_t pa11_dma_map_single(struct device *dev, void *addr, size_t size, enum dma_data_direction direction)
  344. {
  345. if (direction == DMA_NONE) {
  346. printk(KERN_ERR "pa11_dma_map_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
  347. BUG();
  348. }
  349. flush_kernel_dcache_range((unsigned long) addr, size);
  350. return virt_to_phys(addr);
  351. }
  352. static void pa11_dma_unmap_single(struct device *dev, dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
  353. {
  354. if (direction == DMA_NONE) {
  355. printk(KERN_ERR "pa11_dma_unmap_single(PCI_DMA_NONE) called by %p\n", __builtin_return_address(0));
  356. BUG();
  357. }
  358. if (direction == DMA_TO_DEVICE)
  359. return;
  360. /*
  361. * For PCI_DMA_FROMDEVICE this flush is not necessary for the
  362. * simple map/unmap case. However, it IS necessary if if
  363. * pci_dma_sync_single_* has been called and the buffer reused.
  364. */
  365. flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle), size);
  366. return;
  367. }
  368. static int pa11_dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  369. {
  370. int i;
  371. if (direction == DMA_NONE)
  372. BUG();
  373. for (i = 0; i < nents; i++, sglist++ ) {
  374. unsigned long vaddr = sg_virt_addr(sglist);
  375. sg_dma_address(sglist) = (dma_addr_t) virt_to_phys(vaddr);
  376. sg_dma_len(sglist) = sglist->length;
  377. flush_kernel_dcache_range(vaddr, sglist->length);
  378. }
  379. return nents;
  380. }
  381. static void pa11_dma_unmap_sg(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  382. {
  383. int i;
  384. if (direction == DMA_NONE)
  385. BUG();
  386. if (direction == DMA_TO_DEVICE)
  387. return;
  388. /* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */
  389. for (i = 0; i < nents; i++, sglist++ )
  390. flush_kernel_dcache_range(sg_virt_addr(sglist), sglist->length);
  391. return;
  392. }
  393. static void pa11_dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
  394. {
  395. if (direction == DMA_NONE)
  396. BUG();
  397. flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
  398. }
  399. static void pa11_dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, unsigned long offset, size_t size, enum dma_data_direction direction)
  400. {
  401. if (direction == DMA_NONE)
  402. BUG();
  403. flush_kernel_dcache_range((unsigned long) phys_to_virt(dma_handle) + offset, size);
  404. }
  405. static void pa11_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  406. {
  407. int i;
  408. /* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */
  409. for (i = 0; i < nents; i++, sglist++ )
  410. flush_kernel_dcache_range(sg_virt_addr(sglist), sglist->length);
  411. }
  412. static void pa11_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist, int nents, enum dma_data_direction direction)
  413. {
  414. int i;
  415. /* once we do combining we'll need to use phys_to_virt(sg_dma_address(sglist)) */
  416. for (i = 0; i < nents; i++, sglist++ )
  417. flush_kernel_dcache_range(sg_virt_addr(sglist), sglist->length);
  418. }
  419. struct hppa_dma_ops pcxl_dma_ops = {
  420. .dma_supported = pa11_dma_supported,
  421. .alloc_consistent = pa11_dma_alloc_consistent,
  422. .alloc_noncoherent = pa11_dma_alloc_consistent,
  423. .free_consistent = pa11_dma_free_consistent,
  424. .map_single = pa11_dma_map_single,
  425. .unmap_single = pa11_dma_unmap_single,
  426. .map_sg = pa11_dma_map_sg,
  427. .unmap_sg = pa11_dma_unmap_sg,
  428. .dma_sync_single_for_cpu = pa11_dma_sync_single_for_cpu,
  429. .dma_sync_single_for_device = pa11_dma_sync_single_for_device,
  430. .dma_sync_sg_for_cpu = pa11_dma_sync_sg_for_cpu,
  431. .dma_sync_sg_for_device = pa11_dma_sync_sg_for_device,
  432. };
  433. static void *fail_alloc_consistent(struct device *dev, size_t size,
  434. dma_addr_t *dma_handle, gfp_t flag)
  435. {
  436. return NULL;
  437. }
  438. static void *pa11_dma_alloc_noncoherent(struct device *dev, size_t size,
  439. dma_addr_t *dma_handle, gfp_t flag)
  440. {
  441. void *addr = NULL;
  442. /* rely on kmalloc to be cacheline aligned */
  443. addr = kmalloc(size, flag);
  444. if(addr)
  445. *dma_handle = (dma_addr_t)virt_to_phys(addr);
  446. return addr;
  447. }
  448. static void pa11_dma_free_noncoherent(struct device *dev, size_t size,
  449. void *vaddr, dma_addr_t iova)
  450. {
  451. kfree(vaddr);
  452. return;
  453. }
  454. struct hppa_dma_ops pcx_dma_ops = {
  455. .dma_supported = pa11_dma_supported,
  456. .alloc_consistent = fail_alloc_consistent,
  457. .alloc_noncoherent = pa11_dma_alloc_noncoherent,
  458. .free_consistent = pa11_dma_free_noncoherent,
  459. .map_single = pa11_dma_map_single,
  460. .unmap_single = pa11_dma_unmap_single,
  461. .map_sg = pa11_dma_map_sg,
  462. .unmap_sg = pa11_dma_unmap_sg,
  463. .dma_sync_single_for_cpu = pa11_dma_sync_single_for_cpu,
  464. .dma_sync_single_for_device = pa11_dma_sync_single_for_device,
  465. .dma_sync_sg_for_cpu = pa11_dma_sync_sg_for_cpu,
  466. .dma_sync_sg_for_device = pa11_dma_sync_sg_for_device,
  467. };
  468. static int pcxl_proc_info(char *buf, char **start, off_t offset, int len)
  469. {
  470. #if 0
  471. u_long i = 0;
  472. unsigned long *res_ptr = (u_long *)pcxl_res_map;
  473. #endif
  474. unsigned long total_pages = pcxl_res_size << 3; /* 8 bits per byte */
  475. sprintf(buf, "\nDMA Mapping Area size : %d bytes (%ld pages)\n",
  476. PCXL_DMA_MAP_SIZE, total_pages);
  477. sprintf(buf, "%sResource bitmap : %d bytes\n", buf, pcxl_res_size);
  478. strcat(buf, " total: free: used: % used:\n");
  479. sprintf(buf, "%sblocks %8d %8ld %8ld %8ld%%\n", buf, pcxl_res_size,
  480. pcxl_res_size - pcxl_used_bytes, pcxl_used_bytes,
  481. (pcxl_used_bytes * 100) / pcxl_res_size);
  482. sprintf(buf, "%spages %8ld %8ld %8ld %8ld%%\n", buf, total_pages,
  483. total_pages - pcxl_used_pages, pcxl_used_pages,
  484. (pcxl_used_pages * 100 / total_pages));
  485. #if 0
  486. strcat(buf, "\nResource bitmap:");
  487. for(; i < (pcxl_res_size / sizeof(u_long)); ++i, ++res_ptr) {
  488. if ((i & 7) == 0)
  489. strcat(buf,"\n ");
  490. sprintf(buf, "%s %08lx", buf, *res_ptr);
  491. }
  492. #endif
  493. strcat(buf, "\n");
  494. return strlen(buf);
  495. }