prom.c 2.4 KB

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  1. /*
  2. * linux/arch/mips/tx4938/common/prom.c
  3. *
  4. * common tx4938 memory interface
  5. * Copyright (C) 2000-2001 Toshiba Corporation
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
  8. * terms of the GNU General Public License version 2. This program is
  9. * licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. *
  12. * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
  13. */
  14. #include <linux/init.h>
  15. #include <linux/mm.h>
  16. #include <linux/sched.h>
  17. #include <linux/bootmem.h>
  18. #include <asm/addrspace.h>
  19. #include <asm/bootinfo.h>
  20. #include <asm/tx4938/tx4938.h>
  21. static unsigned int __init
  22. tx4938_process_sdccr(u64 * addr)
  23. {
  24. u64 val;
  25. unsigned int sdccr_ce;
  26. unsigned int sdccr_rs;
  27. unsigned int sdccr_cs;
  28. unsigned int sdccr_mw;
  29. unsigned int rs = 0;
  30. unsigned int cs = 0;
  31. unsigned int mw = 0;
  32. unsigned int bc = 4;
  33. unsigned int msize = 0;
  34. val = (*((vu64 *) (addr)));
  35. /* MVMCP -- need #defs for these bits masks */
  36. sdccr_ce = ((val & (1 << 10)) >> 10);
  37. sdccr_rs = ((val & (3 << 5)) >> 5);
  38. sdccr_cs = ((val & (7 << 2)) >> 2);
  39. sdccr_mw = ((val & (1 << 0)) >> 0);
  40. if (sdccr_ce) {
  41. switch (sdccr_rs) {
  42. case 0:{
  43. rs = 2048;
  44. break;
  45. }
  46. case 1:{
  47. rs = 4096;
  48. break;
  49. }
  50. case 2:{
  51. rs = 8192;
  52. break;
  53. }
  54. default:{
  55. rs = 0;
  56. break;
  57. }
  58. }
  59. switch (sdccr_cs) {
  60. case 0:{
  61. cs = 256;
  62. break;
  63. }
  64. case 1:{
  65. cs = 512;
  66. break;
  67. }
  68. case 2:{
  69. cs = 1024;
  70. break;
  71. }
  72. case 3:{
  73. cs = 2048;
  74. break;
  75. }
  76. case 4:{
  77. cs = 4096;
  78. break;
  79. }
  80. default:{
  81. cs = 0;
  82. break;
  83. }
  84. }
  85. switch (sdccr_mw) {
  86. case 0:{
  87. mw = 8;
  88. break;
  89. } /* 8 bytes = 64 bits */
  90. case 1:{
  91. mw = 4;
  92. break;
  93. } /* 4 bytes = 32 bits */
  94. }
  95. }
  96. /* bytes per chip MB per chip bank count */
  97. msize = (((rs * cs * mw) / (1024 * 1024)) * (bc));
  98. /* MVMCP -- bc hard coded to 4 from table 9.3.1 */
  99. /* boad supports bc=2 but no way to detect */
  100. return (msize);
  101. }
  102. unsigned int __init
  103. tx4938_get_mem_size(void)
  104. {
  105. unsigned int c0;
  106. unsigned int c1;
  107. unsigned int c2;
  108. unsigned int c3;
  109. unsigned int total;
  110. /* MVMCP -- need #defs for these registers */
  111. c0 = tx4938_process_sdccr((u64 *) 0xff1f8000);
  112. c1 = tx4938_process_sdccr((u64 *) 0xff1f8008);
  113. c2 = tx4938_process_sdccr((u64 *) 0xff1f8010);
  114. c3 = tx4938_process_sdccr((u64 *) 0xff1f8018);
  115. total = c0 + c1 + c2 + c3;
  116. return (total);
  117. }