fixup-vr4133.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203
  1. /*
  2. * arch/mips/pci/fixup-vr4133.c
  3. *
  4. * The NEC CMB-VR4133 Board specific PCI fixups.
  5. *
  6. * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
  7. * Alex Sapkov <asapkov@ru.mvista.com>
  8. *
  9. * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. *
  14. * Modified for support in 2.6
  15. * Author: Manish Lachwani (mlachwani@mvista.com)
  16. *
  17. */
  18. #include <linux/init.h>
  19. #include <linux/pci.h>
  20. #include <asm/io.h>
  21. #include <asm/vr41xx/cmbvr4133.h>
  22. extern int vr4133_rockhopper;
  23. extern void ali_m1535plus_init(struct pci_dev *dev);
  24. extern void ali_m5229_init(struct pci_dev *dev);
  25. /* Do platform specific device initialization at pci_enable_device() time */
  26. int pcibios_plat_dev_init(struct pci_dev *dev)
  27. {
  28. /*
  29. * We have to reset AMD PCnet adapter on Rockhopper since
  30. * PMON leaves it enabled and generating interrupts. This leads
  31. * to a lock if some PCI device driver later enables the IRQ line
  32. * shared with PCnet and there is no AMD PCnet driver to catch its
  33. * interrupts.
  34. */
  35. #ifdef CONFIG_ROCKHOPPER
  36. if (dev->vendor == PCI_VENDOR_ID_AMD &&
  37. dev->device == PCI_DEVICE_ID_AMD_LANCE) {
  38. inl(pci_resource_start(dev, 0) + 0x18);
  39. }
  40. #endif
  41. /*
  42. * we have to open the bridges' windows down to 0 because otherwise
  43. * we cannot access ISA south bridge I/O registers that get mapped from
  44. * 0. for example, 8259 PIC would be unaccessible without that
  45. */
  46. if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
  47. pci_write_config_byte(dev, PCI_IO_BASE, 0);
  48. if(dev->bus->number == 0) {
  49. pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
  50. } else {
  51. pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1);
  52. }
  53. }
  54. return 0;
  55. }
  56. /*
  57. * M1535 IRQ mapping
  58. * Feel free to change this, although it shouldn't be needed
  59. */
  60. #define M1535_IRQ_INTA 7
  61. #define M1535_IRQ_INTB 9
  62. #define M1535_IRQ_INTC 10
  63. #define M1535_IRQ_INTD 11
  64. #define M1535_IRQ_USB 9
  65. #define M1535_IRQ_IDE 14
  66. #define M1535_IRQ_IDE2 15
  67. #define M1535_IRQ_PS2 12
  68. #define M1535_IRQ_RTC 8
  69. #define M1535_IRQ_FDC 6
  70. #define M1535_IRQ_AUDIO 5
  71. #define M1535_IRQ_COM1 4
  72. #define M1535_IRQ_COM2 4
  73. #define M1535_IRQ_IRDA 3
  74. #define M1535_IRQ_KBD 1
  75. #define M1535_IRQ_TMR 0
  76. /* Rockhopper "slots" assignment; this is hard-coded ... */
  77. #define ROCKHOPPER_M5451_SLOT 1
  78. #define ROCKHOPPER_M1535_SLOT 2
  79. #define ROCKHOPPER_M5229_SLOT 11
  80. #define ROCKHOPPER_M5237_SLOT 15
  81. #define ROCKHOPPER_PMU_SLOT 12
  82. /* ... and hard-wired. */
  83. #define ROCKHOPPER_PCI1_SLOT 3
  84. #define ROCKHOPPER_PCI2_SLOT 4
  85. #define ROCKHOPPER_PCI3_SLOT 5
  86. #define ROCKHOPPER_PCI4_SLOT 6
  87. #define ROCKHOPPER_PCNET_SLOT 1
  88. #define M1535_IRQ_MASK(n) (1 << (n))
  89. #define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
  90. M1535_IRQ_MASK(M1535_IRQ_KBD) | \
  91. M1535_IRQ_MASK(M1535_IRQ_COM1) | \
  92. M1535_IRQ_MASK(M1535_IRQ_COM2) | \
  93. M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
  94. M1535_IRQ_MASK(M1535_IRQ_RTC) | \
  95. M1535_IRQ_MASK(M1535_IRQ_FDC) | \
  96. M1535_IRQ_MASK(M1535_IRQ_PS2))
  97. #define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
  98. M1535_IRQ_MASK(M1535_IRQ_USB) | \
  99. M1535_IRQ_MASK(M1535_IRQ_INTA) | \
  100. M1535_IRQ_MASK(M1535_IRQ_INTB) | \
  101. M1535_IRQ_MASK(M1535_IRQ_INTC) | \
  102. M1535_IRQ_MASK(M1535_IRQ_INTD))
  103. struct irq_map_entry {
  104. u16 bus;
  105. u8 slot;
  106. u8 irq;
  107. };
  108. static struct irq_map_entry int_map[] = {
  109. {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */
  110. {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */
  111. {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
  112. {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
  113. {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
  114. {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
  115. ethernet */
  116. {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
  117. {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
  118. };
  119. static int pci_intlines[] =
  120. { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD };
  121. /* Determine the Rockhopper IRQ line number for the PCI device */
  122. int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot)
  123. {
  124. struct pci_bus *bus;
  125. int i;
  126. bus = dev->bus;
  127. if (bus == NULL)
  128. return -1;
  129. for (i = 0; i < sizeof (int_map) / sizeof (int_map[0]); i++) {
  130. if (int_map[i].bus == bus->number && int_map[i].slot == slot) {
  131. int line;
  132. for (line = 0; line < 4; line++)
  133. if (pci_intlines[line] == int_map[i].irq)
  134. break;
  135. if (line < 4)
  136. return pci_intlines[(line + (pin - 1)) % 4];
  137. else
  138. return int_map[i].irq;
  139. }
  140. }
  141. return -1;
  142. }
  143. #ifdef CONFIG_ROCKHOPPER
  144. void i8259_init(void)
  145. {
  146. outb(0x11, 0x20); /* Master ICW1 */
  147. outb(I8259_IRQ_BASE, 0x21); /* Master ICW2 */
  148. outb(0x04, 0x21); /* Master ICW3 */
  149. outb(0x01, 0x21); /* Master ICW4 */
  150. outb(0xff, 0x21); /* Master IMW */
  151. outb(0x11, 0xa0); /* Slave ICW1 */
  152. outb(I8259_IRQ_BASE + 8, 0xa1); /* Slave ICW2 */
  153. outb(0x02, 0xa1); /* Slave ICW3 */
  154. outb(0x01, 0xa1); /* Slave ICW4 */
  155. outb(0xff, 0xa1); /* Slave IMW */
  156. outb(0x00, 0x4d0);
  157. outb(0x02, 0x4d1); /* USB IRQ9 is level */
  158. }
  159. #endif
  160. int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  161. {
  162. extern int pci_probe_only;
  163. pci_probe_only = 1;
  164. #ifdef CONFIG_ROCKHOPPER
  165. if( dev->bus->number == 1 && vr4133_rockhopper ) {
  166. if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT)
  167. dev->irq = CMBVR41XX_INTA_IRQ;
  168. else
  169. dev->irq = rockhopper_get_irq(dev, pin, slot);
  170. } else
  171. dev->irq = CMBVR41XX_INTA_IRQ;
  172. #else
  173. dev->irq = CMBVR41XX_INTA_IRQ;
  174. #endif
  175. return dev->irq;
  176. }
  177. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init);
  178. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init);