kgdb_io.c 4.1 KB

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  1. /*
  2. * BRIEF MODULE DESCRIPTION
  3. * Low level uart routines to directly access a TX[34]927 SIO.
  4. *
  5. * Copyright 2001 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ahennessy@mvista.com or source@mvista.com
  8. *
  9. * Based on arch/mips/ddb5xxx/ddb5477/kgdb_io.c
  10. *
  11. * Copyright (C) 2000-2001 Toshiba Corporation
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  19. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  20. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  21. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  24. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  25. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28. *
  29. * You should have received a copy of the GNU General Public License along
  30. * with this program; if not, write to the Free Software Foundation, Inc.,
  31. * 675 Mass Ave, Cambridge, MA 02139, USA.
  32. */
  33. #include <linux/types.h>
  34. #include <asm/jmr3927/txx927.h>
  35. #include <asm/jmr3927/tx3927.h>
  36. #include <asm/jmr3927/jmr3927.h>
  37. #define TIMEOUT 0xffffff
  38. #define SLOW_DOWN
  39. static const char digits[16] = "0123456789abcdef";
  40. #ifdef SLOW_DOWN
  41. #define slow_down() { int k; for (k=0; k<10000; k++); }
  42. #else
  43. #define slow_down()
  44. #endif
  45. static int remoteDebugInitialized = 0;
  46. int putDebugChar(unsigned char c)
  47. {
  48. int i = 0;
  49. if (!remoteDebugInitialized) {
  50. remoteDebugInitialized = 1;
  51. debugInit(38400);
  52. }
  53. do {
  54. slow_down();
  55. i++;
  56. if (i>TIMEOUT) {
  57. break;
  58. }
  59. } while (!(tx3927_sioptr(0)->cisr & TXx927_SICISR_TXALS));
  60. tx3927_sioptr(0)->tfifo = c;
  61. return 1;
  62. }
  63. unsigned char getDebugChar(void)
  64. {
  65. int i = 0;
  66. int dicr;
  67. char c;
  68. if (!remoteDebugInitialized) {
  69. remoteDebugInitialized = 1;
  70. debugInit(38400);
  71. }
  72. /* diable RX int. */
  73. dicr = tx3927_sioptr(0)->dicr;
  74. tx3927_sioptr(0)->dicr = 0;
  75. do {
  76. slow_down();
  77. i++;
  78. if (i>TIMEOUT) {
  79. break;
  80. }
  81. } while (tx3927_sioptr(0)->disr & TXx927_SIDISR_UVALID)
  82. ;
  83. c = tx3927_sioptr(0)->rfifo;
  84. /* clear RX int. status */
  85. tx3927_sioptr(0)->disr &= ~TXx927_SIDISR_RDIS;
  86. /* enable RX int. */
  87. tx3927_sioptr(0)->dicr = dicr;
  88. return c;
  89. }
  90. void debugInit(int baud)
  91. {
  92. /*
  93. volatile unsigned long lcr;
  94. volatile unsigned long dicr;
  95. volatile unsigned long disr;
  96. volatile unsigned long cisr;
  97. volatile unsigned long fcr;
  98. volatile unsigned long flcr;
  99. volatile unsigned long bgr;
  100. volatile unsigned long tfifo;
  101. volatile unsigned long rfifo;
  102. */
  103. tx3927_sioptr(0)->lcr = 0x020;
  104. tx3927_sioptr(0)->dicr = 0;
  105. tx3927_sioptr(0)->disr = 0x4100;
  106. tx3927_sioptr(0)->cisr = 0x014;
  107. tx3927_sioptr(0)->fcr = 0;
  108. tx3927_sioptr(0)->flcr = 0x02;
  109. tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
  110. TXx927_SIBGR_BCLK_T0;
  111. #if 0
  112. /*
  113. * Reset the UART.
  114. */
  115. tx3927_sioptr(0)->fcr = TXx927_SIFCR_SWRST;
  116. while (tx3927_sioptr(0)->fcr & TXx927_SIFCR_SWRST)
  117. ;
  118. /*
  119. * and set the speed of the serial port
  120. * (currently hardwired to 9600 8N1
  121. */
  122. tx3927_sioptr(0)->lcr = TXx927_SILCR_UMODE_8BIT |
  123. TXx927_SILCR_USBL_1BIT |
  124. TXx927_SILCR_SCS_IMCLK_BG;
  125. tx3927_sioptr(0)->bgr =
  126. ((JMR3927_BASE_BAUD + baud / 2) / baud) |
  127. TXx927_SIBGR_BCLK_T0;
  128. /* HW RTS/CTS control */
  129. if (ser->flags & ASYNC_HAVE_CTS_LINE)
  130. tx3927_sioptr(0)->flcr = TXx927_SIFLCR_RCS | TXx927_SIFLCR_TES |
  131. TXx927_SIFLCR_RTSTL_MAX /* 15 */;
  132. /* Enable RX/TX */
  133. tx3927_sioptr(0)->flcr &= ~(TXx927_SIFLCR_RSDE | TXx927_SIFLCR_TSDE);
  134. #endif
  135. }