head.S 5.0 KB

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  1. /*****************************************************************************/
  2. /*
  3. * head.S -- common startup code for ColdFire CPUs.
  4. *
  5. * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>.
  6. */
  7. /*****************************************************************************/
  8. #include <linux/sys.h>
  9. #include <linux/linkage.h>
  10. #include <asm/asm-offsets.h>
  11. #include <asm/coldfire.h>
  12. #include <asm/mcfcache.h>
  13. #include <asm/mcfsim.h>
  14. /*****************************************************************************/
  15. /*
  16. * If we don't have a fixed memory size, then lets build in code
  17. * to auto detect the DRAM size. Obviously this is the prefered
  18. * method, and should work for most boards. It won't work for those
  19. * that do not have their RAM starting at address 0, and it only
  20. * works on SDRAM (not boards fitted with SRAM).
  21. */
  22. #if CONFIG_RAMSIZE != 0
  23. .macro GET_MEM_SIZE
  24. movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
  25. .endm
  26. #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
  27. defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
  28. defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
  29. defined(CONFIG_M5407)
  30. /*
  31. * Not all these devices have exactly the same DRAM controller,
  32. * but the DCMR register is virtually identical - give or take
  33. * a couple of bits. The only exception is the 5272 devices, their
  34. * DRAM controller is quite different.
  35. */
  36. .macro GET_MEM_SIZE
  37. movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
  38. btst #0,%d0 /* check if region enabled */
  39. beq 1f
  40. andl #0xfffc0000,%d0
  41. beq 1f
  42. addl #0x00040000,%d0 /* convert mask to size */
  43. 1:
  44. movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
  45. btst #0,%d1 /* check if region enabled */
  46. beq 2f
  47. andl #0xfffc0000, %d1
  48. beq 2f
  49. addl #0x00040000,%d1
  50. addl %d1,%d0 /* total mem size in d0 */
  51. 2:
  52. .endm
  53. #elif defined(CONFIG_M5272)
  54. .macro GET_MEM_SIZE
  55. movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
  56. andil #0xfffff000,%d0 /* mask out chip select options */
  57. negl %d0 /* negate bits */
  58. .endm
  59. #else
  60. #error "ERROR: I don't know how to probe your boards memory size?"
  61. #endif
  62. /*****************************************************************************/
  63. /*
  64. * Boards and platforms can do specific early hardware setup if
  65. * they need to. Most don't need this, define away if not required.
  66. */
  67. #ifndef PLATFORM_SETUP
  68. #define PLATFORM_SETUP
  69. #endif
  70. /*****************************************************************************/
  71. .global _start
  72. .global _rambase
  73. .global _ramvec
  74. .global _ramstart
  75. .global _ramend
  76. /*****************************************************************************/
  77. .data
  78. /*
  79. * During startup we store away the RAM setup. These are not in the
  80. * bss, since their values are determined and written before the bss
  81. * has been cleared.
  82. */
  83. _rambase:
  84. .long 0
  85. _ramvec:
  86. .long 0
  87. _ramstart:
  88. .long 0
  89. _ramend:
  90. .long 0
  91. /*****************************************************************************/
  92. .text
  93. /*
  94. * This is the codes first entry point. This is where it all
  95. * begins...
  96. */
  97. _start:
  98. nop /* filler */
  99. movew #0x2700, %sr /* no interrupts */
  100. /*
  101. * Do any platform or board specific setup now. Most boards
  102. * don't need anything. Those exceptions are define this in
  103. * their board specific includes.
  104. */
  105. PLATFORM_SETUP
  106. /*
  107. * Create basic memory configuration. Set VBR accordingly,
  108. * and size memory.
  109. */
  110. movel #CONFIG_VECTORBASE,%a7
  111. movec %a7,%VBR /* set vectors addr */
  112. movel %a7,_ramvec
  113. movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
  114. movel %a7,_rambase
  115. GET_MEM_SIZE /* macro code determines size */
  116. addl %a7,%d0
  117. movel %d0,_ramend /* set end ram addr */
  118. /*
  119. * Now that we know what the memory is, lets enable cache
  120. * and get things moving. This is Coldfire CPU specific.
  121. */
  122. CACHE_ENABLE /* enable CPU cache */
  123. #ifdef CONFIG_ROMFS_FS
  124. /*
  125. * Move ROM filesystem above bss :-)
  126. */
  127. lea _sbss,%a0 /* get start of bss */
  128. lea _ebss,%a1 /* set up destination */
  129. movel %a0,%a2 /* copy of bss start */
  130. movel 8(%a0),%d0 /* get size of ROMFS */
  131. addql #8,%d0 /* allow for rounding */
  132. andl #0xfffffffc, %d0 /* whole words */
  133. addl %d0,%a0 /* copy from end */
  134. addl %d0,%a1 /* copy from end */
  135. movel %a1,_ramstart /* set start of ram */
  136. _copy_romfs:
  137. movel -(%a0),%d0 /* copy dword */
  138. movel %d0,-(%a1)
  139. cmpl %a0,%a2 /* check if at end */
  140. bne _copy_romfs
  141. #else /* CONFIG_ROMFS_FS */
  142. lea _ebss,%a1
  143. movel %a1,_ramstart
  144. #endif /* CONFIG_ROMFS_FS */
  145. /*
  146. * Zero out the bss region.
  147. */
  148. lea _sbss,%a0 /* get start of bss */
  149. lea _ebss,%a1 /* get end of bss */
  150. clrl %d0 /* set value */
  151. _clear_bss:
  152. movel %d0,(%a0)+ /* clear each word */
  153. cmpl %a0,%a1 /* check if at end */
  154. bne _clear_bss
  155. /*
  156. * Load the current task pointer and stack.
  157. */
  158. lea init_thread_union,%a0
  159. lea THREAD_SIZE(%a0),%sp
  160. /*
  161. * Assember start up done, start code proper.
  162. */
  163. jsr start_kernel /* start Linux kernel */
  164. _exit:
  165. jmp _exit /* should never get here */
  166. /*****************************************************************************/