config.c 10 KB

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  1. /*
  2. * arch/m68k/bvme6000/config.c
  3. *
  4. * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
  5. *
  6. * Based on:
  7. *
  8. * linux/amiga/config.c
  9. *
  10. * Copyright (C) 1993 Hamish Macdonald
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file README.legal in the main directory of this archive
  14. * for more details.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/tty.h>
  20. #include <linux/console.h>
  21. #include <linux/linkage.h>
  22. #include <linux/init.h>
  23. #include <linux/major.h>
  24. #include <linux/genhd.h>
  25. #include <linux/rtc.h>
  26. #include <linux/interrupt.h>
  27. #include <asm/bootinfo.h>
  28. #include <asm/system.h>
  29. #include <asm/pgtable.h>
  30. #include <asm/setup.h>
  31. #include <asm/irq.h>
  32. #include <asm/traps.h>
  33. #include <asm/rtc.h>
  34. #include <asm/machdep.h>
  35. #include <asm/bvme6000hw.h>
  36. static void bvme6000_get_model(char *model);
  37. static int bvme6000_get_hardware_list(char *buffer);
  38. extern void bvme6000_sched_init(irq_handler_t handler);
  39. extern unsigned long bvme6000_gettimeoffset (void);
  40. extern int bvme6000_hwclk (int, struct rtc_time *);
  41. extern int bvme6000_set_clock_mmss (unsigned long);
  42. extern void bvme6000_reset (void);
  43. extern void bvme6000_waitbut(void);
  44. void bvme6000_set_vectors (void);
  45. static unsigned char bcd2bin (unsigned char b);
  46. static unsigned char bin2bcd (unsigned char b);
  47. /* Save tick handler routine pointer, will point to do_timer() in
  48. * kernel/sched.c, called via bvme6000_process_int() */
  49. static irq_handler_t tick_handler;
  50. int bvme6000_parse_bootinfo(const struct bi_record *bi)
  51. {
  52. if (bi->tag == BI_VME_TYPE)
  53. return 0;
  54. else
  55. return 1;
  56. }
  57. void bvme6000_reset(void)
  58. {
  59. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  60. printk ("\r\n\nCalled bvme6000_reset\r\n"
  61. "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  62. /* The string of returns is to delay the reset until the whole
  63. * message is output. */
  64. /* Enable the watchdog, via PIT port C bit 4 */
  65. pit->pcddr |= 0x10; /* WDOG enable */
  66. while(1)
  67. ;
  68. }
  69. static void bvme6000_get_model(char *model)
  70. {
  71. sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
  72. }
  73. /* No hardware options on BVME6000? */
  74. static int bvme6000_get_hardware_list(char *buffer)
  75. {
  76. *buffer = '\0';
  77. return 0;
  78. }
  79. /*
  80. * This function is called during kernel startup to initialize
  81. * the bvme6000 IRQ handling routines.
  82. */
  83. static void bvme6000_init_IRQ(void)
  84. {
  85. m68k_setup_user_interrupt(VEC_USER, 192, NULL);
  86. }
  87. void __init config_bvme6000(void)
  88. {
  89. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  90. /* Board type is only set by newer versions of vmelilo/tftplilo */
  91. if (!vme_brdtype) {
  92. if (m68k_cputype == CPU_68060)
  93. vme_brdtype = VME_TYPE_BVME6000;
  94. else
  95. vme_brdtype = VME_TYPE_BVME4000;
  96. }
  97. #if 0
  98. /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
  99. * debugger. Note trap_init() will splat the abort vector, but
  100. * bvme6000_init_IRQ() will put it back again. Hopefully. */
  101. bvme6000_set_vectors();
  102. #endif
  103. mach_max_dma_address = 0xffffffff;
  104. mach_sched_init = bvme6000_sched_init;
  105. mach_init_IRQ = bvme6000_init_IRQ;
  106. mach_gettimeoffset = bvme6000_gettimeoffset;
  107. mach_hwclk = bvme6000_hwclk;
  108. mach_set_clock_mmss = bvme6000_set_clock_mmss;
  109. mach_reset = bvme6000_reset;
  110. mach_get_model = bvme6000_get_model;
  111. mach_get_hardware_list = bvme6000_get_hardware_list;
  112. printk ("Board is %sconfigured as a System Controller\n",
  113. *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
  114. /* Now do the PIT configuration */
  115. pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
  116. pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
  117. pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
  118. pit->padr = 0x00; /* Just to be tidy! */
  119. pit->paddr = 0x00; /* All inputs for now (safest) */
  120. pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
  121. pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
  122. /* PRI, SYSCON?, Level3, SCC clks from xtal */
  123. pit->pbddr = 0xf3; /* Mostly outputs */
  124. pit->pcdr = 0x01; /* PA transceiver disabled */
  125. pit->pcddr = 0x03; /* WDOG disable */
  126. /* Disable snooping for Ethernet and VME accesses */
  127. bvme_acr_addrctl = 0;
  128. }
  129. irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
  130. {
  131. unsigned long *new = (unsigned long *)vectors;
  132. unsigned long *old = (unsigned long *)0xf8000000;
  133. /* Wait for button release */
  134. while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
  135. ;
  136. *(new+4) = *(old+4); /* Illegal instruction */
  137. *(new+9) = *(old+9); /* Trace */
  138. *(new+47) = *(old+47); /* Trap #15 */
  139. *(new+0x1f) = *(old+0x1f); /* ABORT switch */
  140. return IRQ_HANDLED;
  141. }
  142. static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
  143. {
  144. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  145. unsigned char msr = rtc->msr & 0xc0;
  146. rtc->msr = msr | 0x20; /* Ack the interrupt */
  147. return tick_handler(irq, dev_id);
  148. }
  149. /*
  150. * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
  151. * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
  152. * So, when reading the elapsed time, you should read timer1,
  153. * subtract it from 39999, and then add 40000 if T1 is high.
  154. * That gives you the number of 125ns ticks in to the 10ms period,
  155. * so divide by 8 to get the microsecond result.
  156. */
  157. void bvme6000_sched_init (irq_handler_t timer_routine)
  158. {
  159. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  160. unsigned char msr = rtc->msr & 0xc0;
  161. rtc->msr = 0; /* Ensure timer registers accessible */
  162. tick_handler = timer_routine;
  163. if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
  164. "timer", bvme6000_timer_int))
  165. panic ("Couldn't register timer int");
  166. rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
  167. rtc->t1msb = 39999 >> 8;
  168. rtc->t1lsb = 39999 & 0xff;
  169. rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
  170. rtc->msr = 0x40; /* Access int.cntrl, etc */
  171. rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
  172. rtc->irr_icr1 = 0;
  173. rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
  174. rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
  175. rtc->msr = 0; /* Access timer 1 control */
  176. rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
  177. rtc->msr = msr;
  178. if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
  179. "abort", bvme6000_abort_int))
  180. panic ("Couldn't register abort int");
  181. }
  182. /* This is always executed with interrupts disabled. */
  183. /*
  184. * NOTE: Don't accept any readings within 5us of rollover, as
  185. * the T1INT bit may be a little slow getting set. There is also
  186. * a fault in the chip, meaning that reads may produce invalid
  187. * results...
  188. */
  189. unsigned long bvme6000_gettimeoffset (void)
  190. {
  191. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  192. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  193. unsigned char msr = rtc->msr & 0xc0;
  194. unsigned char t1int, t1op;
  195. unsigned long v = 800000, ov;
  196. rtc->msr = 0; /* Ensure timer registers accessible */
  197. do {
  198. ov = v;
  199. t1int = rtc->msr & 0x20;
  200. t1op = pit->pcdr & 0x04;
  201. rtc->t1cr_omr |= 0x40; /* Latch timer1 */
  202. v = rtc->t1msb << 8; /* Read timer1 */
  203. v |= rtc->t1lsb; /* Read timer1 */
  204. } while (t1int != (rtc->msr & 0x20) ||
  205. t1op != (pit->pcdr & 0x04) ||
  206. abs(ov-v) > 80 ||
  207. v > 39960);
  208. v = 39999 - v;
  209. if (!t1op) /* If in second half cycle.. */
  210. v += 40000;
  211. v /= 8; /* Convert ticks to microseconds */
  212. if (t1int)
  213. v += 10000; /* Int pending, + 10ms */
  214. rtc->msr = msr;
  215. return v;
  216. }
  217. static unsigned char bcd2bin (unsigned char b)
  218. {
  219. return ((b>>4)*10 + (b&15));
  220. }
  221. static unsigned char bin2bcd (unsigned char b)
  222. {
  223. return (((b/10)*16) + (b%10));
  224. }
  225. /*
  226. * Looks like op is non-zero for setting the clock, and zero for
  227. * reading the clock.
  228. *
  229. * struct hwclk_time {
  230. * unsigned sec; 0..59
  231. * unsigned min; 0..59
  232. * unsigned hour; 0..23
  233. * unsigned day; 1..31
  234. * unsigned mon; 0..11
  235. * unsigned year; 00...
  236. * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
  237. * };
  238. */
  239. int bvme6000_hwclk(int op, struct rtc_time *t)
  240. {
  241. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  242. unsigned char msr = rtc->msr & 0xc0;
  243. rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
  244. * are accessible */
  245. if (op)
  246. { /* Write.... */
  247. rtc->t0cr_rtmr = t->tm_year%4;
  248. rtc->bcd_tenms = 0;
  249. rtc->bcd_sec = bin2bcd(t->tm_sec);
  250. rtc->bcd_min = bin2bcd(t->tm_min);
  251. rtc->bcd_hr = bin2bcd(t->tm_hour);
  252. rtc->bcd_dom = bin2bcd(t->tm_mday);
  253. rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
  254. rtc->bcd_year = bin2bcd(t->tm_year%100);
  255. if (t->tm_wday >= 0)
  256. rtc->bcd_dow = bin2bcd(t->tm_wday+1);
  257. rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
  258. }
  259. else
  260. { /* Read.... */
  261. do {
  262. t->tm_sec = bcd2bin(rtc->bcd_sec);
  263. t->tm_min = bcd2bin(rtc->bcd_min);
  264. t->tm_hour = bcd2bin(rtc->bcd_hr);
  265. t->tm_mday = bcd2bin(rtc->bcd_dom);
  266. t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
  267. t->tm_year = bcd2bin(rtc->bcd_year);
  268. if (t->tm_year < 70)
  269. t->tm_year += 100;
  270. t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
  271. } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
  272. }
  273. rtc->msr = msr;
  274. return 0;
  275. }
  276. /*
  277. * Set the minutes and seconds from seconds value 'nowtime'. Fail if
  278. * clock is out by > 30 minutes. Logic lifted from atari code.
  279. * Algorithm is to wait for the 10ms register to change, and then to
  280. * wait a short while, and then set it.
  281. */
  282. int bvme6000_set_clock_mmss (unsigned long nowtime)
  283. {
  284. int retval = 0;
  285. short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
  286. unsigned char rtc_minutes, rtc_tenms;
  287. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  288. unsigned char msr = rtc->msr & 0xc0;
  289. unsigned long flags;
  290. volatile int i;
  291. rtc->msr = 0; /* Ensure clock accessible */
  292. rtc_minutes = bcd2bin (rtc->bcd_min);
  293. if ((rtc_minutes < real_minutes
  294. ? real_minutes - rtc_minutes
  295. : rtc_minutes - real_minutes) < 30)
  296. {
  297. local_irq_save(flags);
  298. rtc_tenms = rtc->bcd_tenms;
  299. while (rtc_tenms == rtc->bcd_tenms)
  300. ;
  301. for (i = 0; i < 1000; i++)
  302. ;
  303. rtc->bcd_min = bin2bcd(real_minutes);
  304. rtc->bcd_sec = bin2bcd(real_seconds);
  305. local_irq_restore(flags);
  306. }
  307. else
  308. retval = -1;
  309. rtc->msr = msr;
  310. return retval;
  311. }