s3c2412.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181
  1. /* linux/arch/arm/mach-s3c2410/s3c2412.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * http://armlinux.simtec.co.uk/.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/sysdev.h>
  19. #include <linux/platform_device.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/mach/map.h>
  22. #include <asm/mach/irq.h>
  23. #include <asm/hardware.h>
  24. #include <asm/proc-fns.h>
  25. #include <asm/io.h>
  26. #include <asm/irq.h>
  27. #include <asm/arch/idle.h>
  28. #include <asm/arch/regs-clock.h>
  29. #include <asm/arch/regs-serial.h>
  30. #include <asm/arch/regs-power.h>
  31. #include <asm/arch/regs-gpio.h>
  32. #include <asm/arch/regs-gpioj.h>
  33. #include <asm/arch/regs-dsc.h>
  34. #include "s3c2412.h"
  35. #include "cpu.h"
  36. #include "devs.h"
  37. #include "clock.h"
  38. #include "pm.h"
  39. #ifndef CONFIG_CPU_S3C2412_ONLY
  40. void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
  41. static inline void s3c2412_init_gpio2(void)
  42. {
  43. s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
  44. }
  45. #else
  46. #define s3c2412_init_gpio2() do { } while(0)
  47. #endif
  48. /* Initial IO mappings */
  49. static struct map_desc s3c2412_iodesc[] __initdata = {
  50. IODESC_ENT(CLKPWR),
  51. IODESC_ENT(LCD),
  52. IODESC_ENT(TIMER),
  53. IODESC_ENT(ADC),
  54. IODESC_ENT(WATCHDOG),
  55. };
  56. /* uart registration process */
  57. void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  58. {
  59. s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
  60. /* rename devices that are s3c2412/s3c2413 specific */
  61. s3c_device_sdi.name = "s3c2412-sdi";
  62. s3c_device_lcd.name = "s3c2412-lcd";
  63. s3c_device_nand.name = "s3c2412-nand";
  64. }
  65. /* s3c2412_idle
  66. *
  67. * use the standard idle call by ensuring the idle mode
  68. * in power config, then issuing the idle co-processor
  69. * instruction
  70. */
  71. static void s3c2412_idle(void)
  72. {
  73. unsigned long tmp;
  74. /* ensure our idle mode is to go to idle */
  75. tmp = __raw_readl(S3C2412_PWRCFG);
  76. tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
  77. tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
  78. __raw_writel(tmp, S3C2412_PWRCFG);
  79. cpu_do_idle();
  80. }
  81. /* s3c2412_map_io
  82. *
  83. * register the standard cpu IO areas, and any passed in from the
  84. * machine specific initialisation.
  85. */
  86. void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
  87. {
  88. /* move base of IO */
  89. s3c2412_init_gpio2();
  90. /* set our idle function */
  91. s3c24xx_idle = s3c2412_idle;
  92. /* register our io-tables */
  93. iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
  94. iotable_init(mach_desc, mach_size);
  95. }
  96. void __init s3c2412_init_clocks(int xtal)
  97. {
  98. unsigned long tmp;
  99. unsigned long fclk;
  100. unsigned long hclk;
  101. unsigned long pclk;
  102. /* now we've got our machine bits initialised, work out what
  103. * clocks we've got */
  104. fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
  105. tmp = __raw_readl(S3C2410_CLKDIVN);
  106. /* work out clock scalings */
  107. hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
  108. hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
  109. pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
  110. /* print brieft summary of clocks, etc */
  111. printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
  112. print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
  113. /* initialise the clocks here, to allow other things like the
  114. * console to use them
  115. */
  116. s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
  117. s3c2412_baseclk_add();
  118. }
  119. /* need to register class before we actually register the device, and
  120. * we also need to ensure that it has been initialised before any of the
  121. * drivers even try to use it (even if not on an s3c2412 based system)
  122. * as a driver which may support both 2410 and 2440 may try and use it.
  123. */
  124. struct sysdev_class s3c2412_sysclass = {
  125. set_kset_name("s3c2412-core"),
  126. };
  127. static int __init s3c2412_core_init(void)
  128. {
  129. return sysdev_class_register(&s3c2412_sysclass);
  130. }
  131. core_initcall(s3c2412_core_init);
  132. static struct sys_device s3c2412_sysdev = {
  133. .cls = &s3c2412_sysclass,
  134. };
  135. int __init s3c2412_init(void)
  136. {
  137. printk("S3C2412: Initialising architecture\n");
  138. return sysdev_register(&s3c2412_sysdev);
  139. }